/* HP PA-RISC SOM object file format: definitions internal to BFD.
- Copyright (C) 1990-1991 Free Software Foundation, Inc.
+ Copyright (C) 1990-2020 Free Software Foundation, Inc.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
-#ifndef _HPPA_H
-#define _HPPA_H
+#ifndef _LIBHPPA_H
+#define _LIBHPPA_H
#define BYTES_IN_WORD 4
+#define PA_PAGESIZE 0x1000
-#ifndef INLINE
-#ifdef __GNUC__
-#define INLINE inline
-#else
-#define INLINE
-#endif /* GNU C? */
-#endif /* INLINE */
+/* The PA instruction set variants. */
+enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25};
/* HP PA-RISC relocation types */
R_HPPA_RDSEL = 0x6,
R_HPPA_LRSEL = 0x7,
R_HPPA_RRSEL = 0x8,
- R_HPPA_PSEL = 0x9,
- R_HPPA_LPSEL = 0xa,
- R_HPPA_RPSEL = 0xb,
- R_HPPA_TSEL = 0xc,
- R_HPPA_LTSEL = 0xd,
- R_HPPA_RTSEL = 0xe
+ R_HPPA_NSEL = 0x9,
+ R_HPPA_NLSEL = 0xa,
+ R_HPPA_NLRSEL = 0xb,
+ R_HPPA_PSEL = 0xc,
+ R_HPPA_LPSEL = 0xd,
+ R_HPPA_RPSEL = 0xe,
+ R_HPPA_TSEL = 0xf,
+ R_HPPA_LTSEL = 0x10,
+ R_HPPA_RTSEL = 0x11,
+ R_HPPA_LTPSEL = 0x12,
+ R_HPPA_RTPSEL = 0x13
};
+/* /usr/include/reloc.h defines these to constants. We want to use
+ them in enums, so #undef them before we start using them. We might
+ be able to fix this another way by simply managing not to include
+ /usr/include/reloc.h, but currently GDB picks up these defines
+ somewhere. */
+#undef e_fsel
+#undef e_lssel
+#undef e_rssel
+#undef e_lsel
+#undef e_rsel
+#undef e_ldsel
+#undef e_rdsel
+#undef e_lrsel
+#undef e_rrsel
+#undef e_nsel
+#undef e_nlsel
+#undef e_nlrsel
+#undef e_psel
+#undef e_lpsel
+#undef e_rpsel
+#undef e_tsel
+#undef e_ltsel
+#undef e_rtsel
+#undef e_one
+#undef e_two
+#undef e_pcrel
+#undef e_con
+#undef e_plabel
+#undef e_abs
+
/* for compatibility */
enum hppa_reloc_field_selector_type_alt
{
e_rdsel = R_HPPA_RDSEL,
e_lrsel = R_HPPA_LRSEL,
e_rrsel = R_HPPA_RRSEL,
+ e_nsel = R_HPPA_NSEL,
+ e_nlsel = R_HPPA_NLSEL,
+ e_nlrsel = R_HPPA_NLRSEL,
e_psel = R_HPPA_PSEL,
e_lpsel = R_HPPA_LPSEL,
e_rpsel = R_HPPA_RPSEL,
e_tsel = R_HPPA_TSEL,
e_ltsel = R_HPPA_LTSEL,
- e_rtsel = R_HPPA_RTSEL
+ e_rtsel = R_HPPA_RTSEL,
+ e_ltpsel = R_HPPA_LTPSEL,
+ e_rtpsel = R_HPPA_RTPSEL
};
enum hppa_reloc_expr_type
};
+/* Relocations for function calls must be accompanied by parameter
+ relocation bits. These bits describe exactly where the caller has
+ placed the function's arguments and where it expects to find a return
+ value.
+
+ Both ELF and SOM encode this information within the addend field
+ of the call relocation. (Note this could break very badly if one
+ was to make a call like bl foo + 0x12345678).
+
+ The high order 10 bits contain parameter relocation information,
+ the low order 22 bits contain the constant offset. */
+
+#define HPPA_R_ARG_RELOC(a) \
+ (((a) >> 22) & 0x3ff)
+#define HPPA_R_CONSTANT(a) \
+ ((((bfd_signed_vma) (a) & 0x3fffff) ^ 0x200000) - 0x200000)
+#define HPPA_R_ADDEND(r, c) \
+ (((r) << 22) + ((c) & 0x3fffff))
+
+
/* Some functions to manipulate PA instructions. */
-static INLINE unsigned int
-assemble_3 (x)
- unsigned int x;
-{
- return (((x & 1) << 2) | ((x & 6) >> 1)) & 7;
-}
-static INLINE void
-dis_assemble_3 (x, r)
- unsigned int x;
- unsigned int *r;
-{
- *r = (((x & 4) >> 2) | ((x & 3) << 1)) & 7;
-}
+/* The *sign_extend functions are used to assemble various bitfields
+ taken from an instruction and return the resulting immediate
+ value. */
-static INLINE unsigned int
-assemble_12 (x, y)
- unsigned int x, y;
+static inline unsigned ATTRIBUTE_UNUSED
+sign_extend (unsigned x, unsigned len)
{
- return (((y & 1) << 11) | ((x & 1) << 10) | ((x & 0x7fe) >> 1)) & 0xfff;
+ unsigned signbit = (1 << (len - 1));
+ unsigned mask = (signbit << 1) - 1;
+ return ((x & mask) ^ signbit) - signbit;
}
-static INLINE void
-dis_assemble_12 (as12, x, y)
- unsigned int as12;
- unsigned int *x, *y;
+static inline unsigned ATTRIBUTE_UNUSED
+low_sign_extend (unsigned x, unsigned len)
{
- *y = (as12 & 0x800) >> 11;
- *x = ((as12 & 0x3ff) << 1) | ((as12 & 0x400) >> 10);
+ return (x >> 1) - ((x & 1) << (len - 1));
}
-static INLINE unsigned long
-assemble_17 (x, y, z)
- unsigned int x, y, z;
-{
- unsigned long temp;
- temp = ((z & 1) << 16) |
- ((x & 0x1f) << 11) |
- ((y & 1) << 10) |
- ((y & 0x7fe) >> 1);
- return temp & 0x1ffff;
-}
+/* The re_assemble_* functions prepare an immediate value for
+ insertion into an opcode. pa-risc uses all sorts of weird bitfields
+ in the instruction to hold the value. */
-static INLINE void
-dis_assemble_17 (as17, x, y, z)
- unsigned int as17;
- unsigned int *x, *y, *z;
+static inline unsigned ATTRIBUTE_UNUSED
+sign_unext (unsigned x, unsigned len)
{
+ unsigned len_ones;
- *z = (as17 & 0x10000) >> 16;
- *x = (as17 & 0x0f800) >> 11;
- *y = (((as17 & 0x00400) >> 10) | ((as17 & 0x3ff) << 1)) & 0x7ff;
-}
+ len_ones = (1 << len) - 1;
-static INLINE unsigned long
-assemble_21 (x)
- unsigned int x;
-{
- unsigned long temp;
-
- temp = ((x & 1) << 20) |
- ((x & 0xffe) << 8) |
- ((x & 0xc000) >> 7) |
- ((x & 0x1f0000) >> 14) |
- ((x & 0x003000) >> 12);
- return temp & 0x1fffff;
+ return x & len_ones;
}
-static INLINE void
-dis_assemble_21 (as21, x)
- unsigned int as21, *x;
+static inline unsigned ATTRIBUTE_UNUSED
+low_sign_unext (unsigned x, unsigned len)
{
- unsigned long temp;
+ unsigned temp;
+ unsigned sign;
+
+ sign = (x >> (len-1)) & 1;
+ temp = sign_unext (x, len-1);
- temp = (as21 & 0x100000) >> 20;
- temp |= (as21 & 0x0ffe00) >> 8;
- temp |= (as21 & 0x000180) << 7;
- temp |= (as21 & 0x00007c) << 14;
- temp |= (as21 & 0x000003) << 12;
- *x = temp;
+ return (temp << 1) | sign;
}
-static INLINE unsigned long
-sign_ext (x, len)
- unsigned int x, len;
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_3 (unsigned as3)
{
- return (x << (32 - len)) >> (32 - len);
+ return (( (as3 & 4) << (13-2))
+ | ((as3 & 3) << (13+1)));
}
-static INLINE unsigned int
-ones (n)
- int n;
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_12 (unsigned as12)
{
- unsigned int len_ones;
- int i;
-
- i = 0;
- len_ones = 0;
- while (i < n)
- {
- len_ones = (len_ones << 1) | 1;
- i++;
- }
-
- return len_ones;
+ return (( (as12 & 0x800) >> 11)
+ | ((as12 & 0x400) >> (10 - 2))
+ | ((as12 & 0x3ff) << (1 + 2)));
}
-static INLINE void
-sign_unext (x, len, result)
- unsigned int x, len;
- unsigned int *result;
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_14 (unsigned as14)
{
- unsigned int len_ones;
+ return (( (as14 & 0x1fff) << 1)
+ | ((as14 & 0x2000) >> 13));
+}
- len_ones = ones (len);
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_16 (unsigned as16)
+{
+ unsigned s, t;
- *result = x & len_ones;
+ /* Unusual 16-bit encoding, for wide mode only. */
+ t = (as16 << 1) & 0xffff;
+ s = (as16 & 0x8000);
+ return (t ^ s ^ (s >> 1)) | (s >> 15);
}
-static INLINE unsigned long
-low_sign_ext (x, len)
- unsigned int x, len;
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_17 (unsigned as17)
{
- unsigned int temp1, temp2;
- unsigned int len_ones;
-
- len_ones = ones (len);
+ return (( (as17 & 0x10000) >> 16)
+ | ((as17 & 0x0f800) << (16 - 11))
+ | ((as17 & 0x00400) >> (10 - 2))
+ | ((as17 & 0x003ff) << (1 + 2)));
+}
- temp1 = (x & 1) << (len - 1);
- temp2 = ((x & 0xfffffffe) & len_ones) >> 1;
- return sign_ext ((temp1 | temp2), len);
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_21 (unsigned as21)
+{
+ return (( (as21 & 0x100000) >> 20)
+ | ((as21 & 0x0ffe00) >> 8)
+ | ((as21 & 0x000180) << 7)
+ | ((as21 & 0x00007c) << 14)
+ | ((as21 & 0x000003) << 12));
}
-static INLINE void
-low_sign_unext (x, len, result)
- unsigned int x, len;
- unsigned int *result;
+static inline unsigned ATTRIBUTE_UNUSED
+re_assemble_22 (unsigned as22)
{
- unsigned int temp;
- unsigned int sign;
- unsigned int rest;
- unsigned int one_bit_at_len;
- unsigned int len_ones;
+ return (( (as22 & 0x200000) >> 21)
+ | ((as22 & 0x1f0000) << (21 - 16))
+ | ((as22 & 0x00f800) << (16 - 11))
+ | ((as22 & 0x000400) >> (10 - 2))
+ | ((as22 & 0x0003ff) << (1 + 2)));
+}
- len_ones = ones (len);
- one_bit_at_len = 1 << (len - 1);
- sign_unext (x, len, &temp);
- sign = temp & one_bit_at_len;
- sign >>= (len - 1);
+/* Handle field selectors for PA instructions.
+ The L and R (and LS, RS etc.) selectors are used in pairs to form a
+ full 32 bit address. eg.
- rest = temp & (len_ones ^ one_bit_at_len);
- rest <<= 1;
+ LDIL L'start,%r1 ; put left part into r1
+ LDW R'start(%r1),%r2 ; add r1 and right part to form address
- *result = rest | sign;
-}
+ This function returns sign extended values in all cases.
+*/
-/* Handle field selectors for PA instructions. */
-
-static INLINE unsigned long
-hppa_field_adjust (value, constant_value, r_field)
- unsigned long value;
- unsigned long constant_value;
- unsigned short r_field;
+static inline bfd_signed_vma ATTRIBUTE_UNUSED
+hppa_field_adjust (bfd_vma sym_val,
+ bfd_signed_vma addend,
+ enum hppa_reloc_field_selector_type_alt r_field)
{
- unsigned long init_value = value;
- value += constant_value;
+ bfd_signed_vma value;
+
+ value = sym_val + addend;
switch (r_field)
{
- case e_fsel: /* F : no change */
+ case e_fsel:
+ /* F: No change. */
break;
- case e_lssel: /* LS : if (bit 21) then add 0x800
- arithmetic shift right 11 bits */
- if (value & 0x00000400)
- value += 0x800;
- value = (value & 0xfffff800) >> 11;
+ case e_nsel:
+ /* N: null selector. I don't really understand what this is all
+ about, but HP's documentation says "this indicates that zero
+ bits are to be used for the displacement on the instruction.
+ This fixup is used to identify three-instruction sequences to
+ access data (for importing shared library data)." */
+ value = 0;
break;
- case e_rssel: /* RS : Sign extend from bit 21 */
- if (value & 0x00000400)
- value |= 0xfffff800;
- else
- value &= 0x7ff;
+ case e_lsel:
+ case e_nlsel:
+ /* L: Select top 21 bits. */
+ value = value >> 11;
break;
- case e_lsel: /* L : Arithmetic shift right 11 bits */
- value = (value & 0xfffff800) >> 11;
+ case e_rsel:
+ /* R: Select bottom 11 bits. */
+ value = value & 0x7ff;
break;
- case e_rsel: /* R : Set bits 0-20 to zero */
- value = value & 0x7ff;
+ case e_lssel:
+ /* LS: Round to nearest multiple of 2048 then select top 21 bits. */
+ value = value + 0x400;
+ value = value >> 11;
break;
- case e_ldsel: /* LD : Add 0x800, arithmetic shift
- right 11 bits */
- value += 0x800;
- value = (value & 0xfffff800) >> 11;
+ case e_rssel:
+ /* RS: Select bottom 11 bits for LS.
+ We need to return a value such that 2048 * LS'x + RS'x == x.
+ ie. RS'x = x - ((x + 0x400) & -0x800)
+ this is just a sign extension from bit 21. */
+ value = ((value & 0x7ff) ^ 0x400) - 0x400;
break;
- case e_rdsel: /* RD : Set bits 0-20 to one */
- value |= 0xfffff800;
+ case e_ldsel:
+ /* LD: Round to next multiple of 2048 then select top 21 bits.
+ Yes, if we are already on a multiple of 2048, we go up to the
+ next one. RD in this case will be -2048. */
+ value = value + 0x800;
+ value = value >> 11;
break;
- case e_lrsel: /* LR : L with "rounded" constant */
- value = value + ((constant_value + 0x1000) & 0xffffe000);
- value = (value & 0xfffff800) >> 11;
+ case e_rdsel:
+ /* RD: Set bits 0-20 to one. */
+ value = value | -0x800;
break;
- case e_rrsel: /* RR : R with "rounded" constant */
- value = value + ((constant_value + 0x1000) & 0xffffe000);
- value = (value & 0x7ff) + constant_value - ((constant_value + 0x1000) & 0xffffe000);
+ case e_lrsel:
+ case e_nlrsel:
+ /* LR: L with rounding of the addend to nearest 8k. */
+ value = sym_val + ((addend + 0x1000) & -0x2000);
+ value = value >> 11;
+ break;
+
+ case e_rrsel:
+ /* RR: R with rounding of the addend to nearest 8k.
+ We need to return a value such that 2048 * LR'x + RR'x == x
+ ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
+ . = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
+ . = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
+ value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000);
break;
default:
abort ();
}
return value;
+}
+
+/* PA-RISC OPCODES */
+#define get_opcode(insn) (((insn) >> 26) & 0x3f)
+enum hppa_opcode_type
+{
+ /* None of the opcodes in the first group generate relocs, so we
+ aren't too concerned about them. */
+ OP_SYSOP = 0x00,
+ OP_MEMMNG = 0x01,
+ OP_ALU = 0x02,
+ OP_NDXMEM = 0x03,
+ OP_SPOP = 0x04,
+ OP_DIAG = 0x05,
+ OP_FMPYADD = 0x06,
+ OP_UNDEF07 = 0x07,
+ OP_COPRW = 0x09,
+ OP_COPRDW = 0x0b,
+ OP_COPR = 0x0c,
+ OP_FLOAT = 0x0e,
+ OP_PRDSPEC = 0x0f,
+ OP_UNDEF15 = 0x15,
+ OP_UNDEF1d = 0x1d,
+ OP_FMPYSUB = 0x26,
+ OP_FPFUSED = 0x2e,
+ OP_SHEXDP0 = 0x34,
+ OP_SHEXDP1 = 0x35,
+ OP_SHEXDP2 = 0x36,
+ OP_UNDEF37 = 0x37,
+ OP_SHEXDP3 = 0x3c,
+ OP_SHEXDP4 = 0x3d,
+ OP_MULTMED = 0x3e,
+ OP_UNDEF3f = 0x3f,
+
+ OP_LDIL = 0x08,
+ OP_ADDIL = 0x0a,
+
+ OP_LDO = 0x0d,
+ OP_LDB = 0x10,
+ OP_LDH = 0x11,
+ OP_LDW = 0x12,
+ OP_LDWM = 0x13,
+ OP_STB = 0x18,
+ OP_STH = 0x19,
+ OP_STW = 0x1a,
+ OP_STWM = 0x1b,
+
+ OP_LDD = 0x14,
+ OP_STD = 0x1c,
+
+ OP_FLDW = 0x16,
+ OP_LDWL = 0x17,
+ OP_FSTW = 0x1e,
+ OP_STWL = 0x1f,
+
+ OP_COMBT = 0x20,
+ OP_COMIBT = 0x21,
+ OP_COMBF = 0x22,
+ OP_COMIBF = 0x23,
+ OP_CMPBDT = 0x27,
+ OP_ADDBT = 0x28,
+ OP_ADDIBT = 0x29,
+ OP_ADDBF = 0x2a,
+ OP_ADDIBF = 0x2b,
+ OP_CMPBDF = 0x2f,
+ OP_BVB = 0x30,
+ OP_BB = 0x31,
+ OP_MOVB = 0x32,
+ OP_MOVIB = 0x33,
+ OP_CMPIBD = 0x3b,
+
+ OP_COMICLR = 0x24,
+ OP_SUBI = 0x25,
+ OP_ADDIT = 0x2c,
+ OP_ADDI = 0x2d,
+
+ OP_BE = 0x38,
+ OP_BLE = 0x39,
+ OP_BL = 0x3a
+};
+
+
+/* Given a machine instruction, return its format. */
+
+static inline unsigned ATTRIBUTE_UNUSED
+bfd_hppa_insn2fmt (bfd *abfd, unsigned insn)
+{
+ enum hppa_opcode_type op = (enum hppa_opcode_type) get_opcode (insn);
+
+ switch (op)
+ {
+ case OP_COMICLR:
+ case OP_SUBI:
+ case OP_ADDIT:
+ case OP_ADDI:
+ return 11;
+
+ case OP_COMBT:
+ case OP_COMIBT:
+ case OP_COMBF:
+ case OP_COMIBF:
+ case OP_CMPBDT:
+ case OP_ADDBT:
+ case OP_ADDIBT:
+ case OP_ADDBF:
+ case OP_ADDIBF:
+ case OP_CMPBDF:
+ case OP_BVB:
+ case OP_BB:
+ case OP_MOVB:
+ case OP_MOVIB:
+ case OP_CMPIBD:
+ return 12;
+
+ case OP_LDO:
+ case OP_LDB:
+ case OP_LDH:
+ case OP_LDW:
+ case OP_LDWM:
+ case OP_STB:
+ case OP_STH:
+ case OP_STW:
+ case OP_STWM:
+ if (abfd->arch_info->mach >= 25)
+ return 16; /* Wide mode, format 16. */
+ return 14;
+
+ case OP_FLDW:
+ case OP_LDWL:
+ case OP_FSTW:
+ case OP_STWL:
+ /* This is a hack. Unfortunately, format 11 is already taken
+ and we're using integers rather than an enum, so it's hard
+ to describe the 11a format. */
+ if (abfd->arch_info->mach >= 25)
+ return -16; /* Wide mode, format 16a. */
+ return -11;
+
+ case OP_LDD:
+ case OP_STD:
+ if (abfd->arch_info->mach >= 25)
+ return -10; /* Wide mode, format 10a. */
+ return 10;
+
+ case OP_BL:
+ if ((insn & 0x8000) != 0)
+ return 22;
+ /* fall thru */
+ case OP_BE:
+ case OP_BLE:
+ return 17;
+
+ case OP_LDIL:
+ case OP_ADDIL:
+ return 21;
+
+ default:
+ break;
+ }
+ return 32;
}
-#endif /* _HPPA_H */
+
+
+/* Insert VALUE into INSN using R_FORMAT to determine exactly what
+ bits to change. */
+
+static inline unsigned ATTRIBUTE_UNUSED
+hppa_rebuild_insn (unsigned insn, unsigned value, int r_format)
+{
+ switch (r_format)
+ {
+ case 11:
+ return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
+
+ case 12:
+ return (insn & ~ 0x1ffd) | re_assemble_12 (value);
+
+
+ case 10:
+ return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8);
+
+ case -11:
+ return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4);
+
+ case 14:
+ return (insn & ~ 0x3fff) | re_assemble_14 (value);
+
+
+ case -10:
+ return (insn & ~ 0xfff1) | re_assemble_16 (value & -8);
+
+ case -16:
+ return (insn & ~ 0xfff9) | re_assemble_16 (value & -4);
+
+ case 16:
+ return (insn & ~ 0xffff) | re_assemble_16 (value);
+
+
+ case 17:
+ return (insn & ~ 0x1f1ffd) | re_assemble_17 (value);
+
+ case 21:
+ return (insn & ~ 0x1fffff) | re_assemble_21 (value);
+
+ case 22:
+ return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value);
+
+ case 32:
+ return value;
+
+ default:
+ abort ();
+ }
+ return insn;
+}
+
+#endif /* _LIBHPPA_H */
projects / thirdparty / binutils-gdb.git / blobdiff