-*- text -*-
+* Extend .symver directive to update visibility of the original symbol
+ and assign one original symbol to different versioned symbols.
+
+* Add support for Intel SERIALIZE and TSXLDTRK instructions.
+
+* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
+ -mlfence-before-ret= options to x86 assembler to help mitigate
+ CVE-2020-0551.
+
+* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
+ (if such output is being generated). Added the ability to generate
+ version 5 .debug_line sections.
+
+* Add -mbig-obj support to i386 MingW targets.
+
+Changes in 2.34:
+
+* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
+ -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
+ options to x86 assembler to align branches within a fixed boundary
+ with segment prefixes or NOPs.
+
+* Add support for Zilog eZ80 and Zilog Z180 CPUs.
+
+* Add support for z80-elf target.
+
+* Add support for relocation of each byte or word of multibyte value to Z80
+ targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
+ with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
+
+* Add SDCC support for Z80 targets.
+
+Changes in 2.33:
+
+* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
+ instructions.
+
+* Add support for the Arm Transactional Memory Extension (TME)
+ instructions.
+
+* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
+ instructions.
+
+* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
+ LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
+ time option to set the default behavior. Set the default if the configure
+ option is not used to "no".
+
+* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
+ processors.
+
+* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
+ Cortex-A76AE, and Cortex-A77 processors.
+
+* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
+ floating point literals. Add .float16_format directive and
+ -mfp16-format=[ieee|alternative] option for Arm to control the format of the
+ encoding.
+
+* Add --gdwarf-cie-version command line flag. This allows control over which
+ version of DWARF CIE the assembler creates.
+
+Changes in 2.32:
+
+* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
+ VEX.W-ignored (WIG) VEX instructions.
+
+* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
+ notes. Add a --enable-x86-used-note configure time option to set the
+ default behavior. Set the default if the configure option is not used
+ to "no".
+
+* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
+
+* Add support for the MIPS Loongson EXTensions (EXT) instructions.
+
+* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
+
+* Add support for the C-SKY processor series.
+
+* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
+ ASE.
+
+Changes in 2.31:
+
+* The ADR and ADRL pseudo-instructions supported by the ARM assembler
+ now only set the bottom bit of the address of thumb function symbols
+ if the -mthumb-interwork command line option is active.
+
+* Add support for the MIPS Global INValidate (GINV) ASE.
+
+* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
+
+* Add support for the Freescale S12Z architecture.
+
+* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
+ Build Attribute notes if none are present in the input sources. Add a
+ --enable-generate-build-notes=[yes|no] configure time option to set the
+ default behaviour. Set the default if the configure option is not used
+ to "no".
+
+* Remove -mold-gcc command-line option for x86 targets.
+
+* Add -O[2|s] command-line options to x86 assembler to enable alternate
+ shorter instruction encoding.
+
+* Add support for .nops directive. It is currently supported only for
+ x86 targets.
+
+Changes in 2.30:
+
+* Add support for loaction views in DWARF debug line information.
+
+Changes in 2.29:
+
+* Add support for ELF SHF_GNU_MBIND.
+
+* Add support for the WebAssembly file format and wasm32 ELF conversion.
+
+* PowerPC gas now checks that the correct register class is used in
+ instructions. For instance, "addi %f4,%cr3,%r31" warns three times
+ that the registers are invalid.
+
+* Add support for the Texas Instruments PRU processor.
+
+* Support for the ARMv8-R architecture and Cortex-R52 processor has been
+ added to the ARM port.
+
+Changes in 2.28:
+
+* Add support for the RISC-V architecture.
+
+* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
+
+Changes in 2.27:
+
+* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
+
+* Add --no-pad-sections to stop the assembler from padding the end of output
+ sections up to their alignment boundary.
+
+* Support for the ARMv8-M architecture has been added to the ARM port. Support
+ for the ARMv8-M Security and DSP Extensions has also been added to the ARM
+ port.
+
+* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
+ .extCoreRegister pseudo-ops that allow an user to define custom
+ instructions, conditional codes, auxiliary and core registers.
+
+* Add a configure option --enable-elf-stt-common to decide whether ELF
+ assembler should generate common symbols with the STT_COMMON type by
+ default. Default to no.
+
+* New command-line option --elf-stt-common= for ELF targets to control
+ whether to generate common symbols with the STT_COMMON type.
+
+* Add ability to set section flags and types via numeric values for ELF
+ based targets.
+
+* Add a configure option --enable-x86-relax-relocations to decide whether
+ x86 assembler should generate relax relocations by default. Default to
+ yes, except for x86 Solaris targets older than Solaris 12.
+
+* New command-line option -mrelax-relocations= for x86 target to control
+ whether to generate relax relocations.
+
+* New command-line option -mfence-as-lock-add=yes for x86 target to encode
+ lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
+
+* Add assembly-time relaxation option for ARC cpus.
+
+* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
+ cpu type to be adjusted at configure time.
+
+Changes in 2.26:
+
+* Add a configure option --enable-compressed-debug-sections={all,gas} to
+ decide whether DWARF debug sections should be compressed by default.
+
+* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
+ assembler support for Argonaut RISC architectures.
+
+* Symbol and label names can now be enclosed in double quotes (") which allows
+ them to contain characters that are not part of valid symbol names in high
+ level languages.
+
+* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
+ previous spelling, -march=armv6zk, is still accepted.
+
+* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
+ Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
+ extensions has also been added to the Aarch64 port.
+
+* Support for the ARMv8.1 architecture has been added to the ARM port. Support
+ for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
+ been added to the ARM port.
+
+* Extend --compress-debug-sections option to support
+ --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
+ targets.
+
+* --compress-debug-sections is turned on for Linux/x86 by default.
+
+Changes in 2.25:
+
+* Add support for the AVR Tiny microcontrollers.
+
+* Replace support for openrisc and or32 with support for or1k.
+
+* Enhanced the ARM port to accept the assembler output from the CodeComposer
+ Studio tool. Support is enabled via the new command-line option -mccs.
+
+* Add support for the Andes NDS32.
+
+Changes in 2.24:
+
+* Add support for the Texas Instruments MSP430X processor.
+
+* Add -gdwarf-sections command-line option to enable per-code-section
+ generation of DWARF .debug_line sections.
+
+* Add support for Altera Nios II.
+
+* Add support for the Imagination Technologies Meta processor.
+
+* Add support for the v850e3v5.
+
+* Remove assembler support for MIPS ECOFF targets.
+
+Changes in 2.23:
+
+* Add support for the 64-bit ARM architecture: AArch64.
+
+* Add support for S12X processor.
+
+* Add support for the VLE extension to the PowerPC architecture.
+
+* Add support for the Freescale XGATE architecture.
+
+* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
+ directives. These are currently available only for x86 and ARM targets.
+
+* Add support for the Renesas RL78 architecture.
+
* Add support for the Adapteva EPIPHANY architecture.
+* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
+
Changes in 2.22:
* Add support for the Tilera TILEPro and TILE-Gx architectures.
* Add support for the Renesas RX processor.
-* New command line option, --compress-debug-sections, which requests
+* New command-line option, --compress-debug-sections, which requests
compression of DWARF debug information sections in the relocatable output
file. Compressed debug sections are supported by readelf, objdump, and
gold, but not currently by Gnu ld.
indicate that if the symbol is the target of a relocation, its value should
not be use. Instead the function should be invoked and its result used as
the value.
-
+
* Add support for Lattice Mico32 (lm32) architecture.
-* Add support for Xilinx MicroBlaze architecture.
+* Add support for Xilinx MicroBlaze architecture.
Changes in 2.19:
* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
tables without runtime relocation.
-* New command line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
+* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
adds compatibility with H'00 style hex constants.
-* New command line option, -msse-check=[none|error|warning], for x86
+* New command-line option, -msse-check=[none|error|warning], for x86
targets.
-* New sub-option added to the assembler's -a command line switch to
+* New sub-option added to the assembler's -a command-line switch to
generate a listing output. The 'g' sub-option will insert into the listing
various information about the assembly, such as assembler version, the
- command line options used, and a time stamp.
+ command-line options used, and a time stamp.
-* New command line option -msse2avx for x86 target to encode SSE
+* New command-line option -msse2avx for x86 target to encode SSE
instructions with VEX prefix.
* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
-* New command line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
+* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
-mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
-mnaked-reg and -mold-gcc, for x86 targets.
* Add support for the "@<file>" syntax to the command line, so that extra
switches can be read from <file>.
-* The SH target supports a new command line switch --enable-reg-prefix which,
+* The SH target supports a new command-line switch --enable-reg-prefix which,
if enabled, will allow register names to be optionally prefixed with a $
character. This allows register names to be distinguished from label names.
-
+
* Macros with a variable number of arguments are now supported. See the
documentation for how this works.
known to cause problems in certain sources when the respective target uses
characters inconsistently, and thus macro parameter references may no longer
be recognized as such (see the documentation for details).
-
+
* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
for the VAX target in order to be more compatible with the VAX MACRO
assembler.
-* New command line option -mtune=[itanium1|itanium2] for IA64 targets.
+* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
Changes in 2.16:
* Redefinition of macros now results in an error.
-* New command line option -mhint.b=[ok|warning|error] for IA64 targets.
+* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
-* New command line option -munwind-check=[warning|error] for IA64
+* New command-line option -munwind-check=[warning|error] for IA64
targets.
* The IA64 port now uses automatic dependency violation removal as its default
* Added support for generating unwind tables for ARM ELF targets.
-* Add a -g command line option to generate debug information in the target's
+* Add a -g command-line option to generate debug information in the target's
preferred debug format.
* Support for the crx-elf target added.
* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
instrucitons.
-* New command line option -mno-shared for MIPS ELF targets.
+* New command-line option -mno-shared for MIPS ELF targets.
-* New command line option --alternate and pseudo-ops .altmacro and .noaltmacro
+* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
added to enter (and leave) alternate macro syntax mode.
Changes in 2.15:
* Added --gstabs+ switch to enable the generation of STABS debug format
information with GNU extensions.
-
+
* Added support for MIPS64 Release 2.
* Added support for v850e1.
* An assembler test generator has been contributed and an example file that
uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
-
+
* Support for SH2E added.
* GASP has now been removed.
* Support for Texas Instruments TMS320C4x and TMS320C3x series of
DSP's contributed by Michael Hayes and Svein E. Seldal.
-
+
* Support for the Ubicom IP2xxx microcontroller added.
Changes in 2.13:
* Support for the OpenRISC 32-bit embedded processor by OpenCores.
-* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
- specifying the target instruction set. The old method of specifying the
+* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
+ specifying the target instruction set. The old method of specifying the
target processor has been deprecated, but is still accepted for
compatibility.
* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
but still works for compatability.
-* The MIPS assembler no longer issues a warning by default when it
- generates a nop instruction from a macro. The new command line option
+* The MIPS assembler no longer issues a warning by default when it
+ generates a nop instruction from a macro. The new command-line option
-n will turn on the warning.
Changes in 2.11:
* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
-* x86 gas -q command line option quietens warnings about register size changes
+* x86 gas -q command-line option quietens warnings about register size changes
due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
translating various deprecated floating point instructions.
* Motorola MCore 210 processor support added.
-* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
+* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
assembly programs with intel syntax.
* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
* Full 16-bit mode support for i386.
-* Greatly improved instruction operand checking for i386. This change will
+* Greatly improved instruction operand checking for i386. This change will
produce errors or warnings on incorrect assembly code that previous versions
of gas accepted. If you get unexpected messages from code that worked with
older versions of gas, please double check the code before reporting a bug.
* Texas Instruments c30 (tms320c30) support added.
-* The assembler now optimizes the exception frame information generated by egcs
+* The assembler now optimizes the exception frame information generated by egcs
and gcc 2.8. The new --traditional-format option disables this optimization.
* Added --gstabs option to generate stabs debugging information.
-* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
+* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
listing.
* Added -MD option to print dependencies.
* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
default is to build COFF-only support. To get a set of tools that generate
- ELF (they'll understand both COFF and ELF), you must configure with
+ ELF (they'll understand both COFF and ELF), you must configure with
target=i386-unknown-sco3.2v5elf.
* m88k-motorola-sysv3* support added.
* Support for the control registers in the 68060.
* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
- provide for possible future gcc changes, for targets where gas provides some
- features not available in the native assembler. If the native assembler is
+ provide for possible future gcc changes, for targets where gas provides some
+ features not available in the native assembler. If the native assembler is
used, it should become obvious pretty quickly what the problem is.
* Usage message is available with "--help".
-* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
+* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
also, but didn't get into the NEWS file.)
* Weak symbol support for a.out.
-* A bug in the listing code which could cause an infinite loop has been fixed.
+* A bug in the listing code which could cause an infinite loop has been fixed.
Bugs in listings when generating a COFF object file have also been fixed.
* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
again too.
* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
- with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
+ with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
in the "dist" directory.
simple tests okay. I haven't put it through extensive testing. (GNU make is
currently required for BSD 4.3 builds.)
-* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
+* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
based on code donated by CMU, which used an a.out-based format. I'm afraid
the alpha-a.out support is pretty badly mangled, and much of it removed;
making it work will require rewriting it as BFD support for the format anyways.
* Irix 5 support.
-* The test suites have been fixed up a bit, so that they should work with a
+* The test suites have been fixed up a bit, so that they should work with a
couple different versions of expect and dejagnu.
-* Symbols' values are now handled internally as expressions, permitting more
- flexibility in evaluating them in some cases. Some details of relocation
+* Symbols' values are now handled internally as expressions, permitting more
+ flexibility in evaluating them in some cases. Some details of relocation
handling have also changed, and simple constant pool management has been
added, to make the Alpha port easier.
* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
-* Configurations that are still in development (and therefore are convenient to
- have listed in configure.in) still get rejected without a minor change to
+* Configurations that are still in development (and therefore are convenient to
+ have listed in configure.in) still get rejected without a minor change to
gas/Makefile.in, so people not doing development work shouldn't get the
impression that support for such configurations is actually believed to be
reliable.
-* The program name (usually "as") is printed when a fatal error message is
+* The program name (usually "as") is printed when a fatal error message is
displayed. This should prevent some confusion about the source of occasional
messages about "internal errors".
-* ELF support is falling into place. Support for the 386 should be working.
+* ELF support is falling into place. Support for the 386 should be working.
Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
* Symbol values are maintained as expressions instead of being immediately
known.
* DBX-style debugging info ("stabs") is now supported for COFF formats.
- If any stabs directives are seen in the source, GAS will create two new
- sections: a ".stab" and a ".stabstr" section. The format of the .stab
+ If any stabs directives are seen in the source, GAS will create two new
+ sections: a ".stab" and a ".stabstr" section. The format of the .stab
section is nearly identical to the a.out symbol format, and .stabstr is
its string table. For this to be useful, you must have configured GCC
to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
that can use the stab sections (4.11 or later).
-* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
+* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
support is in progress.
Changes in 2.1:
-* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
+* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
incorporated, but not well tested yet.
-* Altered the opcode table split for m68k; it should require less VM to compile
+* Altered the opcode table split for m68k; it should require less VM to compile
with gcc now.
* Some minor adjustments to add (Convergent Technologies') Miniframe support,
of new CPUs and formats, lots of bugs fixed.
\f
+Copyright (C) 2012-2020 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
Local variables:
fill-column: 79
End:
projects / thirdparty / binutils-gdb.git / blobdiff