Roland McGrath [Fri, 3 Aug 2018 21:38:20 +0000 (14:38 -0700)]
[gold] Fix integer narrowing in switch
gold/
* target.h (Sized_target::record_gnu_property): Use unsigned int
for second argument.
* x86_64.cc (Target_x86_64<size>::record_gnu_property): Likewise.
This patch fixes some ifunc testisms after H.J. Lu's patch to enable the
use of IFUNC pointers in position dependent code for binutils. See PR
LD/23169 in binutils bugzilla.
The aarch64 ifunc error message test was changed to no longer expect
this error message as this is now an accepted combination. This patch
also disables the executable tests added by H.J. Lu for aarch64, just as
Alan Modra did with his patch, as these tests only seem to work on some
architectures.
ld/ChangeLog:
2018-07-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
* testsuite/ld-aarch64/ifunc-9.d: Remove no longer expected error.
* testsuite/ld-ifunc/ifunc.exp: Disable tests for aarch64.
In commit b5014f7af2 I've removed (instead of replaced) a conditional,
resulting in addressing forms not allowing 8-bit displacements to now
get their displacements scaled under certain circumstances. Re-add the
missing conditional.
* config/tc-hppa.c: Include "struc-symbol.h".
(pa_build_unwind_subspace): Use call_info->start_symbol->sy_frag
instead of frag_now for local symbol replacement.
H.J. Lu [Fri, 20 Jul 2018 16:18:47 +0000 (09:18 -0700)]
x86: Add a GNU_PROPERTY_X86_ISA_1_USED note if needed
When -z separate-code, which is enabled by default for Linux/x86, is
used to create executable, ld won't place any data in the code-only
PT_LOAD segment. If there are no data sections placed before the
code-only PT_LOAD segment, the program headers won't be mapped into
any PT_LOAD segment. When the executable tries to access it (based
on the program header address passed in AT_PHDR), it will lead to
segfault. This patch inserts a GNU_PROPERTY_X86_ISA_1_USED note if
there may be no data sections before the text section so that the
first PT_LOAD segment won't be code-only and will contain the program
header.
Testcases are adjusted to either pass "-z noseparate-code" to ld or
discard the .note.gnu.property section. A Linux/x86 run-time test is
added.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): If the
separate code program header is needed, make sure that the first
read-only PT_LOAD segment has no code by adding a
GNU_PROPERTY_X86_ISA_1_USED note.
ld/
PR ld/23428
* testsuite/ld-elf/linux-x86.S: New file.
* testsuite/ld-elf/linux-x86.exp: Likewise.
* testsuite/ld-elf/pr23428.c: Likewise.
* testsuite/ld-elf/sec64k.exp: Pass "-z noseparate-code" to ld
for Linux/x86 targets.
* testsuite/ld-i386/abs-iamcu.d: Likewise.
* testsuite/ld-i386/abs.d: Likewise.
* testsuite/ld-i386/pr12718.d: Likewise.
* testsuite/ld-i386/pr12921.d: Likewise.
* testsuite/ld-x86-64/abs-k1om.d: Likewise.
* testsuite/ld-x86-64/abs-l1om.d: Likewise.
* testsuite/ld-x86-64/abs.d: Likewise.
* testsuite/ld-x86-64/pr12718.d: Likewise.
* testsuite/ld-x86-64/pr12921.d: Likewise.
* testsuite/ld-linkonce/zeroeh.ld: Discard .note.gnu.property
section.
* testsuite/ld-scripts/print-memory-usage.t: Likewise.
* testsuite/ld-scripts/size-2.t: Likewise.
* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Use ld
to create executable if language is "asm".
... qualified by their respective sizes, allowing to drop FirstXmm0 at
the same time.
folded RegXMM, RegYMM and RegZMM into RegSIMD, it's no longer impossible
to distinguish if Xmmword can represent a memory reference when operand
specification contains SIMD register. For example, template operands
specification like these
RegXMM|...|Xmmword|...
and
RegXMM|...
The Xmmword bitfield is always set by RegXMM which is represented by
"RegSIMD|Xmmword". This patch splits each of vcvtps2qq, vcvtps2uqq,
vcvttps2qq and vcvttps2uqq into 2 templates: one template only has
RegXMM source operand and the other only has mempry source operand.
gas/
PR gas/23418
* testsuite/gas/i386/xmmword.s: Add tests for vcvtps2qq,
vcvtps2uqq, vcvttps2qq and vcvttps2uqq.
* testsuite/gas/i386/xmmword.l: Updated.
Nick Clifton [Mon, 16 Jul 2018 13:29:26 +0000 (14:29 +0100)]
Import patch from mainline to fix gold's handling of already versioned symbols.
gold PR gold/23409
* symtab.cc (Symbol_table::define_special_symbol): Add check for
version name on existing symbol.
* testsuite/Makefile.am (ver_test_pr23409): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_pr23409.sh: New test script.
* testsuite/ver_test_pr23409_1.script: New version script.
* testsuite/ver_test_pr23409_2.script: New version script.
Nick Clifton [Fri, 13 Jul 2018 10:44:49 +0000 (11:44 +0100)]
Allow bit-patterns in the immediate field of ARM neon mov instructions.
* config/tc-arm.c (do_neon_mov): When converting an integer
immediate into a floating point value, check that the conversion
is valid. Also warn if the immediate is valid as both a floating
point value and a bit pattern.
* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
floating point bit patterns.
* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
of the new insns.
Alan Modra [Tue, 3 Jul 2018 02:48:10 +0000 (12:18 +0930)]
Hide dynamic symbols in discarded sections
This is a followup to git commit 97196564c7 "Strip global symbol
defined in discarded section". If a symbol defined in a discarded
section was dynamic, that patch left .dynsym with holes (ie. all zero
entries). For example, the following from libstdc++.so:
Symbol table '.dynsym' contains 6090 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000000a74e0 0 SECTION LOCAL DEFAULT 10
2: 0000000000264180 0 SECTION LOCAL DEFAULT 17
3: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_addUserCommitAction
4: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_memcpyRtWn
5: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 5 found at index >= .dynsym's sh_info value of 3
6: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 6 found at index >= .dynsym's sh_info value of 3
[snip]
Tamar Christina [Thu, 12 Jul 2018 09:28:46 +0000 (10:28 +0100)]
Add remainder of Em16 restrictions for AArch64 gas.
This adds the missing Em16 constraints the rest of the instructions requiring them
and also adds a testcase to test all the instructions so these are checked from
now on.
The Em16 operand constrains the valid registers to the lower 16 registers when used
with a half precision qualifier.
The list has been cross checked (by hand) through the Arm ARM version Ca.
Max Filippov [Mon, 2 Jul 2018 18:12:44 +0000 (11:12 -0700)]
xtensa: don't emit dynamic relocation for weak undefined symbol
Resolved reference to a weak undefined symbol in PIE must not have
a dynamic relative relocation against itself, otherwise the value of a
reference will be changed from 0 to the base of executable, breaking
code like the following:
void weak_function (void);
if (weak_function)
weak_function ();
This fixes tests for PR ld/22269 and a number of PIE tests in xtensa gcc
testsuite.
bfd/
2018-07-11 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (elf_xtensa_allocate_dynrelocs): Don't allocate
space for dynamic relocation for undefined weak symbol.
(elf_xtensa_relocate_section): Don't emit R_XTENSA_RELATIVE
relocation for undefined weak symbols.
(shrink_dynamic_reloc_sections): Don't shrink dynamic relocation
section for relocations against undefined weak symbols.
Franz Sirl [Wed, 24 Jan 2018 13:39:11 +0000 (13:39 +0000)]
Fix printing the size of GOLD's memory areana on Cygwin based systems.
I just stumbled over this with 2.29.1 while building a cross-toolchain, on Cygwin64, but it's still the same for 2.30. m.arena has size_t on Cygwin64 and thus errors out due to -Werror=format.
BFD/ELF: Correct a `remove' global shadowing error for pre-4.8 GCC
Remove `-Wshadow' compilation errors:
cc1: warnings being treated as errors
.../bfd/elflink.c: In function 'bfd_elf_final_link':
.../bfd/elflink.c:11722: error: declaration of 'remove' shadows a global declaration
/usr/include/stdio.h:154: error: shadowed declaration is here
which for versions of GCC before 4.8 prevent support for ELF targets
from being built. See also GCC PR c/53066.
bfd/
* elflink.c (bfd_elf_final_link): Rename `remove' local variable
to `remove_section'.
Testing for the GCC version 5 or later isn't right, since C++ 11 support
wasn't enabled by default until later. This patch tests the C++ standard
support directly instead of inferring it from the GCC version.
gold/
* incremental.cc (Sized_incremental_binary::setup_readers): Use
emplace_back for C++ 11 or later.
Alan Modra [Fri, 6 Jul 2018 05:37:08 +0000 (15:07 +0930)]
Fix diagnostic errors
Fixes a number of build errors like the following
.../elf32-arm.c: In function 'elf32_arm_nabi_write_core_note':
.../elf32-arm.c:2177: error: #pragma GCC diagnostic not allowed inside functions
.../elf32-arm.c:2186: error: #pragma GCC diagnostic not allowed inside functions
See the comment in diagnostics.h.
Tamar Christina [Fri, 6 Jul 2018 15:15:41 +0000 (16:15 +0100)]
Fix the read/write flag for these registers on AArch64
The previous constraints were based on information already in opcodes and it
seems that a few of them were wrong. I have now hand verified the ones changed
by the previous patch and corrected where needed.
This prevents a warning to be issued when one shouldn't be.
Alan Modra [Tue, 3 Jul 2018 08:27:36 +0000 (17:57 +0930)]
Correct removal of .gnu.attributes
Setting SEC_EXCLUDE for empty .gnu.attributes is too late in the link
process for the linker to remove the section. That must be done in
bfd_elf_final_link, as we do for removed group sections.
* elflink.c (bfd_elf_final_link): Remove zero size .gnu.attributes
sections.
Alan Modra [Tue, 3 Jul 2018 05:20:38 +0000 (14:50 +0930)]
GNU attribute output on errors
.gnu.attributes entries from linker input files are merged to the
output file, the output having the union of compatible input
attributes. Incompatible attributes generally cause a linker error
and no output. However in some cases only a warning is emitted, and
one of the incompatible input attributes is passed on to the output.
PowerPC tends to emit warnings rather than errors, and the output
takes the first input attribute. For example, if we have two input
files with Tag_GNU_Power_ABI_FP, the first with a value signifying
"double-precision hard float, IBM long double", the second with a
value signifying "double-precision hard float, IEEE long double",
we'll get a warning about incompatible long double types and the
output will say "double-precision hard float, IBM long double".
The output attribute of course isn't correct. It would be correct to
specify "IBM and IEEE long double", but we don't have a way to
represent that currently. While it would be possible to extend the
encoding, there isn't much gain in doing so. A shared library
providing support for both long double types should link against
objects using either long double type without warning or error. That
is what you'd get if such a shared library had no Tag_GNU_Power_ABI_FP
attribute.
So this patch provides a way for the backend to omit .gnu.attributes
tags from the output.
Tamar Christina [Fri, 29 Jun 2018 11:12:27 +0000 (12:12 +0100)]
Fix AArch64 encodings for by element instructions.
Some instructions in Armv8-a place a limitation on FP16 registers that can be
used as the register from which to select an element from.
e.g. fmla restricts Rm to 4 bits when using an FP16 register. This restriction
does not apply for all instructions, e.g. fcmla does not have this restriction
as it gets an extra bit from the M field.
Unfortunately, this restriction to S_H was added for all _Em operands before,
meaning for a large number of instructions you couldn't use the full register
file.
This fixes the issue by introducing a new operand _Em16 which applies this
restriction only when paired with S_H and leaves the _Em and the other
qualifiers for _Em16 unbounded (i.e. using the full 5 bit range).
Also the patch updates all instructions that should be affected by this.
Alan Modra [Wed, 27 Jun 2018 03:17:13 +0000 (12:47 +0930)]
gas object file locations
With the update to newer autotools, some gas object files are now
built in config/, breaking xtensa-elf and ia64-vms. This patch fixes
the dependencies.
* configure.ac: Specify extra_objects with leading "config/"
for xtensa-relax.o and te-vms.o. Use case statements to unique
extra_objects. Formatting.
* configure: Regenerate.
Cary Coutant [Sat, 23 Jun 2018 00:28:05 +0000 (17:28 -0700)]
Add x86-64 support for Indirect Branch Tracking (IBT).
gold/
PR gold/22915
* x86_64.cc (Output_data_plt_x86_64_ibt): New class.
(Target_x86_64::do_make_data_plt): (All instantiations) Check for
IBT feature bit and create IBT PLTs.
Cary Coutant [Sat, 23 Jun 2018 06:36:50 +0000 (23:36 -0700)]
Update support for .note.gnu.property sections.
The original patch did not give the target enough hooks to discover that
an input object file does not have a particular property. For the
GNU_PROPERTY_X86_FEATURE_1_AND property, for example, where a missing
property should be assumed to be all zeroes, and ANDed with other
object modules, this is essential. We now store the target-specific
properties locally in the Target structure as native uint32_t fields,
then AND the per-object feature bits with the program's feature bits
when we're finished processing each input object file. The target-specific
properties are then added back to the output note section during
finalization.
gold/
PR gold/22914
* layout.cc (read_sized_value): Fix spelling of section name.
(Layout::layout_gnu_property): Call Sized_target::record_gnu_property
for target-specific properties;
don't store them with target-independent properties yet.
(Layout::merge_gnu_properties): New method.
(Layout::add_gnu_property): New method.
(Layout::create_gnu_properties_note): Call target to finalize
target-specific properties. Fix spelling of output section name.
* layout.h (Layout::merge_gnu_properties): New method.
(Layout::add_gnu_property): New method.
* object.cc (Sized_relobj_file::do_layout): Call
Layout::merge_gnu_properties.
* target.h (Target::merge_gnu_property): Remove.
(Target::finalize_gnu_properties): New method.
(Target::do_merge_gnu_property): Move to Sized_target and rename.
(Target::do_finalize_gnu_properties): New virtual method.
(Sized_target::record_gnu_property): Moved and renamed from
Target::do_merge_gnu_property.
(Sized_target::merge_gnu_properties): New virtual method.
* x86_64.cc (Target_x86_64::isa_1_used_, isa_1_needed_)
(feature_1_, object_feature_1_, seen_first_object_): New data members.
(Target_x86_64::do_merge_gnu_property): Rename to ...
(Target_x86_64::record_gnu_property): ... this. Save target-specific
properties in Target class object.
(Target_x86_64::merge_gnu_properties): New method.
(add_property): New static inline function.
(Target_x86_64::do_finalize_gnu_properties): New method.
* testsuite/Makefile.am (gnu_property_test): Remove C source file;
link directly without compiler driver.
* testsuite/Makefile.in: Regenerate.
* testsuite/gnu_property_a.S: Add _start.
projects / thirdparty / binutils-gdb.git / log
