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2024-02-29	Tatsuyuki Ishi	RISC-V: Add assembly support for TLSDESC.	commit \| commitdiff \| tree
2024-02-29	Tatsuyuki Ishi	RISC-V: Add TLSDESC reloc definitions.	commit \| commitdiff \| tree
2024-02-21	Tatsuyuki Ishi	RISC-V: Fix local GOT and reloc size calculation for...	commit \| commitdiff \| tree
2024-02-21	Nelson Chu	RISC-V: Don't generate branch/jump relocation if symbol...	commit \| commitdiff \| tree
2024-01-05	Jin Ma	RISC-V: T-HEAD: Fix wrong instruction encoding for...	commit \| commitdiff \| tree
2023-12-29	Jin Ma	RISC-V: THEAD: Add 5 assembly pseudoinstructions for...	commit \| commitdiff \| tree
2023-12-28	Nelson Chu	RISC-V: PR31179, The SET/ADD/SUB fix breaks ABI compatibilit...	commit \| commitdiff \| tree
2023-12-15	Xiao Zeng	RISC-V: Imply 'Zicntr' and 'Zihpm' implicitly depended...	commit \| commitdiff \| tree
2023-12-12	Rui Ueyama	RISC-V: Emit R_RISCV_RELAX for the la/lga pseudo instruction	commit \| commitdiff \| tree
2023-12-12	Lifang Xia	RISC-V: Resolve PCREL_HI20/LO12_I/S fixups with local...	commit \| commitdiff \| tree
2023-12-11	Nelson Chu	RISC-V/gas: Clarify the definition of `relaxable' in...	commit \| commitdiff \| tree
2023-12-07	Palmer Dabbelt	RISC-V: Fix "withand" in LEB128 error messages	commit \| commitdiff \| tree
2023-12-05	Peter Jones	Handle "efi-app-riscv64" and similar targets in objcopy.	commit \| commitdiff \| tree
2023-12-01	Patrick O'Neill	RISC-V: Make riscv_is_mapping_symbol stricter	commit \| commitdiff \| tree
2023-12-01	Nelson Chu	RISC-V: Update gas/NEWS for RISC-V vendor extension...	commit \| commitdiff \| tree
2023-12-01	Nelson Chu	RISC-V: Add SiFive custom vector coprocessor interface...	commit \| commitdiff \| tree
2023-11-30	Patrick O'Neill	RISC-V: Avoid updating state until symbol is found	commit \| commitdiff \| tree
2023-11-24	zengxiao	RISC-V: Update 'Zfa' extension version	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add vector permutation instructions for T-Head...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add vector mask instructions for T-Head VECTOR...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add reductions instructions for T-Head VECTOR...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add floating-point arithmetic instructions...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add fixed-point arithmetic instructions for...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add integer arithmetic instructions for T-Head...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add load/store segment instructions for T-Head...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add load/store instructions for T-Head VECTOR...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add configuration-setting instructions for...	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add CSRs for T-Head VECTOR vendor extension	commit \| commitdiff \| tree
2023-11-23	Jin Ma	RISC-V: Add T-Head VECTOR vendor extension.	commit \| commitdiff \| tree
2023-11-07	Mary Bennett	RISC-V: Add support for XCValu extension in CV32E40P	commit \| commitdiff \| tree
2023-11-07	Mary Bennett	RISC-V: Add support for XCVmac extension in CV32E40P	commit \| commitdiff \| tree
2023-11-06	Nelson Chu	RISC-V: Make sure rv32q conflict won't affect the fp...	commit \| commitdiff \| tree
2023-11-06	Nelson Chu	RISC-V: Moved out linker internal relocations after...	commit \| commitdiff \| tree
2023-10-27	Nelson Chu	RISC-V: Clarify the behaviors of SET/ADD/SUB relocations.	commit \| commitdiff \| tree
2023-10-19	Nelson Chu	RISC-V: Don't do undefweak relaxations for the linker_def...	commit \| commitdiff \| tree
2023-10-18	Nelson Chu	RISC-V: Make sure rv32q conflict won't affect the zfa...	commit \| commitdiff \| tree
2023-10-13	Joseph Faulls	RISC-V: Add support for numbered ISA mapping strings	commit \| commitdiff \| tree
2023-09-07	Nelson Chu	RISC-V: Clarify the naming rules of vendor operands.	commit \| commitdiff \| tree
2023-09-01	Nelson Chu	RISC-V: Fixed the wrong expansion for pseudo vmsge...	commit \| commitdiff \| tree
2023-08-18	Nelson Chu	RISC-V: Report "c or zca" for INSN_CLASS_C when error...	commit \| commitdiff \| tree
2023-07-18	Jiawei	RISC-V: Supports Zcb extension.	commit \| commitdiff \| tree
2023-07-18	Jiawei	RISC-V: Support Zca/f/d extensions.	commit \| commitdiff \| tree
2023-07-03	Christoph Müllner	RISC-V: Zvkh[a,b]: Remove individual instruction class Reported-By: Nelson Chu <nelson@rivosinc.com>	commit \| commitdiff \| tree
2023-06-01	Jim Wilson	RISC-V: PR30449, Add lga assembler macro support.	commit \| commitdiff \| tree
2023-06-01	Nelson Chu	[PR ld/22263][PR ld/24676] RISC-V: Avoid spurious R_RISCV_NO...	commit \| commitdiff \| tree
2023-05-27	Nelson Chu	[PR ld/22263][PR ld/25694] RISC-V: Avoid dynamic TLS...	commit \| commitdiff \| tree
2023-05-19	Kuan-Lin Chen	RISC-V: Support subtraction of .uleb128.	commit \| commitdiff \| tree
2023-05-19	Nelson Chu	RISC-V: Minor improvements for dis-assembler.	commit \| commitdiff \| tree
2023-04-28	Nelson Chu	RISC-V: Enable x0 base relaxation for relax_pc even...	commit \| commitdiff \| tree
2023-04-28	Nelson Chu	RISC-V: Relax R_RISCV_[PCREL_]LO12_I/S to R_RISCV_GPREL_I...	commit \| commitdiff \| tree
2023-04-21	Lifang Xia	RISC-V: Optimize relaxation of gp with max_alignment.	commit \| commitdiff \| tree
2023-04-18	Kito Cheng	RISC-V: Cache the latest mapping symbol and its boundary.	commit \| commitdiff \| tree
2023-03-29	Palmer Dabbelt	RISC-V: PR28789, Reject R_RISCV_PCREL relocations with...	commit \| commitdiff \| tree
2023-03-29	Nelson Chu	RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations...	commit \| commitdiff \| tree
2023-03-29	Nelson Chu	RISC-V: Extract the ld code which are too complicated...	commit \| commitdiff \| tree
2023-03-21	Jiawei	RISC-V: Fix disassemble fetch fail return value.	commit \| commitdiff \| tree
2022-12-23	Nelson Chu	RISC-V: Relax the order checking for the architecture...	commit \| commitdiff \| tree
2022-12-14	Li Xu	RISC-V: Add string length check for operands in AS	commit \| commitdiff \| tree
2022-11-25	Christoph Müllner	riscv: Add AIA extension support (Smaia, Ssaia)	commit \| commitdiff \| tree
2022-11-23	Xiao Zeng	RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard	commit \| commitdiff \| tree
2022-11-17	Christoph Müllner	RISC-V: Add T-Head Int vendor extension	commit \| commitdiff \| tree
2022-11-17	Christoph Müllner	RISC-V: Add T-Head Fmv vendor extension	commit \| commitdiff \| tree
2022-11-09	Christoph Müllner	RISC-V: xtheadfmemidx: Use fp register in mnemonics	commit \| commitdiff \| tree
2022-11-02	Nelson Chu	RISC-V: Fixed the missing $x+arch when adding odd paddings...	commit \| commitdiff \| tree
2022-10-29	Nelson Chu	RISC-V: Always generate mapping symbols at the start...	commit \| commitdiff \| tree
2022-10-28	Nelson Chu	RISC-V: Output mapping symbols with ISA string.	commit \| commitdiff \| tree
2022-10-27	Nelson Chu	RISC-V: Fix build failures for -Werror=sign-compare.	commit \| commitdiff \| tree
2022-10-25	Nelson Chu	RISC-V: Should reset `again' flag for _bfd_riscv_relax_pc.	commit \| commitdiff \| tree
2022-10-25	Patrick O'Neill	RISC-V: Improve link time complexity.	commit \| commitdiff \| tree
2022-10-04	Nelson Chu	RISC-V: Renamed INSN_CLASS for floating point in integer...	commit \| commitdiff \| tree
2022-09-21	Shihua	RISC-V: Implement Ztso extension	commit \| commitdiff \| tree
2022-09-21	Nelson Chu	RISC-V: Always generate R_RISCV_CALL_PLT reloc for...	commit \| commitdiff \| tree
2022-09-16	Nelson Chu	RISC-V: Make g imply zmmul extension.	commit \| commitdiff \| tree
2022-09-12	Nelson Chu	RISC-V: PR28509, the default visibility symbol cannot...	commit \| commitdiff \| tree
2022-09-02	Tsukasa OI	RISC-V: Print highest address (-1) on the disassembler	commit \| commitdiff \| tree
2022-09-02	Tsukasa OI	RISC-V: PR29342, Fix RV32 disassembler address computation	commit \| commitdiff \| tree
2022-09-02	Tsukasa OI	RISC-V: Add address printer tests with ADDIW	commit \| commitdiff \| tree
2022-08-30	Tsukasa OI	RISC-V: Add 'Zmmul' extension in assembler.	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.39	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.38	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.37	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.36	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.35	commit \| commitdiff \| tree
2022-08-25	Palmer Dabbelt	gas: NEWS: Add the RISC-V features for 2.31	commit \| commitdiff \| tree
2022-08-23	Nelson Chu	binutils: Updated my email address.	commit \| commitdiff \| tree

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