1 2020-05-05 Martin Liska <mliska@suse.cz>
4 * gcov.c (main): Print total lines summary at the end.
5 (generate_results): Expect file_name always being non-null.
6 Print newline after intermediate file is printed in order to align with
7 what we do for normal files.
9 2020-05-05 Martin Liska <mliska@suse.cz>
11 * dumpfile.c (dump_switch_p): Change return type
12 and print option suggestion.
13 * dumpfile.h: Change return type.
14 * opts-global.c (handle_common_deferred_options):
15 Move error into dump_switch_p function.
17 2020-05-05 Martin Liska <mliska@suse.cz>
20 * alloc-pool.h: Use const for some arguments.
22 * mem-stats.h: Likewise.
23 * sese.h (get_entry_bb): Likewise.
24 (get_exit_bb): Likewise.
26 2020-05-05 Richard Biener <rguenther@suse.de>
28 * tree-vect-slp.c (struct vdhs_data): New.
29 (vect_detect_hybrid_slp): New walker.
30 (vect_detect_hybrid_slp): Rewrite.
32 2020-05-05 Richard Biener <rguenther@suse.de>
35 * tree-ssa-structalias.c (ipa_pta_execute): Use
36 varpool_node::externally_visible_p ().
37 (refered_from_nonlocal_var): Likewise.
39 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
41 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
42 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
43 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
45 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
47 * gimplify.c (gimplify_init_constructor): Do not put the constructor
48 into static memory if it is not complete.
50 2020-05-05 Richard Biener <rguenther@suse.de>
52 PR tree-optimization/94949
53 * tree-ssa-loop-im.c (execute_sm): Check whether we use
54 the multithreaded model or always compute the stored value
55 before eliding a load.
57 2020-05-05 Alex Coplan <alex.coplan@arm.com>
59 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
61 2020-05-05 Jakub Jelinek <jakub@redhat.com>
63 PR tree-optimization/94800
64 * match.pd (X + (X << C) to X * (1 + (1 << C)),
65 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
69 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
71 PR tree-optimization/94914
72 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
75 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
77 * config/i386/i386.md (*testqi_ext_3): Use
78 int_nonimmediate_operand instead of manual mode checks.
79 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
80 Use int_nonimmediate_operand predicate. Rewrite
81 define_insn_and_split pattern to a combine pass splitter.
83 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
85 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
86 * configure: Regenerate.
88 2020-05-05 Jakub Jelinek <jakub@redhat.com>
91 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
92 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
93 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
94 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
96 2020-05-04 Clement Chigot <clement.chigot@atos.net>
97 David Edelsohn <dje.gcc@gmail.com>
99 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
100 for fmodl, frexpl, ldexpl and modfl builtins.
102 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
105 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
106 chosen lhs is different from the gcall lhs.
107 (expand_mask_load_optab_fn): Likewise.
108 (expand_gather_load_optab_fn): Likewise.
110 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
113 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
114 (EQ compare->LTU compare splitter): New splitter.
115 (NE compare->NEG splitter): Ditto.
117 2020-05-04 Marek Polacek <polacek@redhat.com>
120 2020-04-30 Marek Polacek <polacek@redhat.com>
123 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
124 (check_aligned_type): Check if TYPE_USER_ALIGN match.
126 2020-05-04 Richard Biener <rguenther@suse.de>
128 PR tree-optimization/93891
129 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
130 the original reference tree for assessing access alignment.
132 2020-05-04 Richard Biener <rguenther@suse.de>
134 PR tree-optimization/39612
135 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
136 (set_ref_loaded_in_loop): New.
137 (mark_ref_loaded): Likewise.
138 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
139 (execute_sm): Avoid issueing a load when it was not there.
140 (execute_sm_if_changed): Avoid issueing warnings for the
143 2020-05-04 Martin Jambor <mjambor@suse.cz>
146 * tree-inline.c (tree_function_versioning): Leave any type conversion
147 of replacements to setup_one_parameter and its friend
150 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
153 * config/i386/predicates.md (shr_comparison_operator): New predicate.
154 * config/i386/i386.md (compare->shr splitter): New splitters.
156 2020-05-04 Jakub Jelinek <jakub@redhat.com>
158 PR tree-optimization/94718
159 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
161 PR tree-optimization/94718
162 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
163 replace two nop conversions on bit_{and,ior,xor} argument
164 and result with just one conversion on the result or another argument.
166 PR tree-optimization/94718
167 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
168 -> (X ^ Y) & C eqne 0 optimization to ...
169 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
171 * opts.c (get_option_html_page): Instead of hardcoding a list of
172 options common between C/C++ and Fortran only use gfortran/
173 documentation for warnings that have CL_Fortran set but not
176 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
178 * config/i386/i386-expand.c (ix86_expand_int_movcc):
179 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
180 (emit_memmov): Ditto.
181 (emit_memset): Ditto.
182 (ix86_expand_strlensi_unroll_1): Ditto.
183 (release_scratch_register_on_entry): Ditto.
184 (gen_frame_set): Ditto.
185 (ix86_emit_restore_reg_using_pop): Ditto.
186 (ix86_emit_outlined_ms2sysv_restore): Ditto.
187 (ix86_expand_epilogue): Ditto.
188 (ix86_expand_split_stack_prologue): Ditto.
189 * config/i386/i386.md (push immediate splitter): Ditto.
193 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
196 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
199 2020-05-02 Jakub Jelinek <jakub@redhat.com>
201 * config/tilegx/tilegx.md
202 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
203 rather than just <n>.
205 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
208 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
209 and crtl->patch_area_entry.
210 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
211 * opts.c (common_handle_option): Limit
212 function_entry_patch_area_size and function_entry_patch_area_start
213 to USHRT_MAX. Fix a typo in error message.
214 * varasm.c (assemble_start_function): Use crtl->patch_area_size
215 and crtl->patch_area_entry.
216 * doc/invoke.texi: Document the maximum value for
217 -fpatchable-function-entry.
219 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
221 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
222 Override SUBTARGET_SHADOW_OFFSET macro.
224 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
226 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
227 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
228 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
229 * config/i386/freebsd.h: Likewise.
230 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
231 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
233 2020-04-30 Alexandre Oliva <oliva@adacore.com>
235 * doc/sourcebuild.texi (Effective-Target Keywords): Document
236 the newly-introduced fileio effective target.
238 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
240 PR rtl-optimization/94740
241 * cse.c (cse_process_notes_1): Replace with...
242 (cse_process_note_1): ...this new function, acting as a
243 simplify_replace_fn_rtx callback to process_note. Handle only
244 REGs and MEMs directly. Validate the MEM if cse_process_note
246 (cse_process_notes): Replace with...
247 (cse_process_note): ...this new function.
248 (cse_extended_basic_block): Update accordingly, iterating over
249 the register notes and passing individual notes to cse_process_note.
251 2020-04-30 Carl Love <cel@us.ibm.com>
253 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
255 2020-04-30 Martin Jambor <mjambor@suse.cz>
258 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
259 saved by the inliner and thunks which had their call inlined.
260 * ipa-inline-transform.c (save_inline_function_body): Fill in
261 former_clone_of of new body holders.
263 2020-04-30 Jakub Jelinek <jakub@redhat.com>
265 * BASE-VER: Set to 11.0.0.
267 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
269 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
271 2020-04-30 Marek Polacek <polacek@redhat.com>
274 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
275 (check_aligned_type): Check if TYPE_USER_ALIGN match.
277 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
279 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
280 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
281 * doc/invoke.texi (moutline-atomics): Document as on by default.
283 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
286 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
287 the check for NOTE_INSN_DELETED_LABEL.
289 2020-04-30 Jakub Jelinek <jakub@redhat.com>
291 * configure.ac (--with-documentation-root-url,
292 --with-changes-root-url): Diagnose URL not ending with /,
293 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
294 * opts.h (get_changes_url): Remove.
295 * opts.c (get_changes_url): Remove.
296 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
297 or -DCHANGES_ROOT_URL.
298 * doc/install.texi (--with-documentation-root-url,
299 --with-changes-root-url): Document.
300 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
301 get_changes_url and free, change url variable type to const char * and
302 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
303 * config/s390/s390.c (s390_function_arg_vector,
304 s390_function_arg_float): Likewise.
305 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
307 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
309 * config.in: Regenerate.
310 * configure: Regenerate.
312 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
315 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
317 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
319 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
320 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
322 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
324 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
325 Change constraint for vlrl/vstrl to jb4.
327 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
329 * var-tracking.c (vt_initialize): Move variables pre and post
330 into inner block and initialize both in order to fix warning
331 about uninitialized use. Remove unnecessary checks for
332 frame_pointer_needed.
334 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
336 * toplev.c (output_stack_usage_1): Ensure that first
337 argument to fprintf is not null.
339 2020-04-29 Jakub Jelinek <jakub@redhat.com>
341 * configure.ac (-with-changes-root-url): New configure option,
342 defaulting to https://gcc.gnu.org/.
343 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
345 * pretty-print.c (get_end_url_string): New function.
346 (pp_format): Handle %{ and %} for URLs.
347 (pp_begin_url): Use pp_string instead of pp_printf.
348 (pp_end_url): Use get_end_url_string.
349 * opts.h (get_changes_url): Declare.
350 * opts.c (get_changes_url): New function.
351 * config/rs6000/rs6000-call.c: Include opts.h.
352 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
353 of just in GCC 10.1 in diagnostics and add URL.
354 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
355 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
357 * config/s390/s390.c (s390_function_arg_vector,
358 s390_function_arg_float): Likewise.
359 * configure: Regenerated.
362 * config/s390/s390.c (s390_function_arg_vector,
363 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
364 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
365 passed to the function rather than the type of the single element.
366 Rename cxx17_empty_base_seen variable to empty_base_seen, change
367 type to int, and adjust diagnostics depending on if the field
368 has [[no_unique_attribute]] or not.
371 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
372 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
373 used in casts into parens.
374 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
375 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
376 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
377 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
378 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
379 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
380 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
381 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
382 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
383 _mm256_mask_cmp_epu8_mask): Likewise.
384 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
385 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
386 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
387 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
390 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
391 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
392 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
393 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
394 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
395 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
396 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
397 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
398 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
399 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
400 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
401 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
402 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
404 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
405 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
406 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
407 as mask vector containing -1.0 or -1.0f elts, but instead vector
408 with all bits set using _mm*_cmpeq_p? with zero operands.
409 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
410 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
411 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
412 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
413 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
414 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
415 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
416 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
417 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
418 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
419 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
420 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
421 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
422 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
423 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
424 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
425 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
427 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
428 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
429 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
430 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
431 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
432 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
433 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
434 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
435 _mm512_mask_prefetch_i64scatter_ps): Likewise.
436 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
437 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
438 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
439 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
440 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
441 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
442 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
443 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
444 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
445 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
446 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
447 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
448 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
449 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
450 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
451 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
452 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
453 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
454 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
455 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
456 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
457 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
458 _mm_mask_i64scatter_epi64): Likewise.
460 2020-04-29 Jeff Law <law@redhat.com>
462 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
463 division instructions are 4 bytes long.
465 2020-04-29 Jakub Jelinek <jakub@redhat.com>
468 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
469 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
470 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
471 take address of TARGET_EXPR of fenv_var with void_node initializer.
474 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
476 PR tree-optimization/94774
477 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
480 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
482 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
483 * calls.c (cxx17_empty_base_field_p): New function. Check
484 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
487 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
490 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
491 Allow -fcf-protection with -mindirect-branch=thunk-extern and
492 -mfunction-return=thunk-extern.
493 * doc/invoke.texi: Update notes for -fcf-protection=branch with
494 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
496 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
498 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
500 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
502 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
503 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
504 fenv_var and new_fenv_var.
506 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
508 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
509 effective-target keyword.
510 (arm_arch_v8a_hard_multilib): Likewise.
511 (arm_arch_v8a_hard): Document new dg-add-options keyword.
512 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
513 code is deprecated and has not been updated to handle
514 DECL_FIELD_ABI_IGNORED.
515 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
516 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
517 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
518 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
519 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
520 something actually is a HFA or HVA. Record whether we see a
521 [[no_unique_address]] field that previous GCCs would not have
523 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
524 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
525 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
527 (arm_needs_doubleword_align): Add a comment explaining why we
528 consider even zero-sized fields.
530 2020-04-29 Richard Biener <rguenther@suse.de>
531 Li Zekun <lizekun1@huawei.com>
534 * tree.c (component_ref_size): Guard against error_mark_node
535 DECL_INITIAL as it happens with LTO.
537 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
539 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
540 comment explaining why we consider even zero-sized fields.
541 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
542 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
543 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
544 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
545 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
546 something actually is a HFA or HVA. Record whether we see a
547 [[no_unique_address]] field that previous GCCs would not have
549 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
550 whether diagnostics should be suppressed. Update the calls to
551 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
552 [[no_unique_address]] case.
553 (aarch64_return_in_msb): Update call accordingly, never silencing
555 (aarch64_function_value): Likewise.
556 (aarch64_return_in_memory_1): Likewise.
557 (aarch64_init_cumulative_args): Likewise.
558 (aarch64_gimplify_va_arg_expr): Likewise.
559 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
560 use it to decide whether arch64_vfp_is_call_or_return_candidate
562 (aarch64_pass_by_reference): Update calls accordingly.
563 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
564 to decide whether arch64_vfp_is_call_or_return_candidate should be
567 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
570 * config/aarch64/aarch64-builtins.c
571 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
572 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
575 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
577 * configure.ac <$enable_offload_targets>: Do parsing as done
579 * configure: Regenerate.
581 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
582 * configure: Regenerate.
585 * rtlanal.c (set_noop_p): Handle non-constant selectors.
588 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
590 (TARGET_EXCEPT_UNWIND_INFO): Define.
592 2020-04-29 Jakub Jelinek <jakub@redhat.com>
595 * config/gcn/gcn.md (*mov<mode>_insn): Use
596 'reg_overlap_mentioned_p' to check for overlap.
599 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
600 instead of cxx17_empty_base_field_p.
603 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
604 DECL_FIELD_ABI_IGNORED.
605 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
606 * calls.h (cxx17_empty_base_field_p): Change into a temporary
607 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
609 * calls.c (cxx17_empty_base_field_p): Remove.
610 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
611 DECL_FIELD_ABI_IGNORED.
612 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
613 * lto-streamer-out.c (hash_tree): Likewise.
614 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
615 cxx17_empty_base_seen to empty_base_seen, change type to int *,
616 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
617 cxx17_empty_base_field_p, if "no_unique_address" attribute is
618 present, propagate that to the caller too.
619 (rs6000_discover_homogeneous_aggregate): Adjust
620 rs6000_aggregate_candidate caller, emit different diagnostics
621 when c++17 empty base fields are present and when empty
622 [[no_unique_address]] fields are present.
623 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
624 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
627 2020-04-29 Richard Biener <rguenther@suse.de>
629 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
630 Just check whether the stmt stores.
632 2020-04-28 Alexandre Oliva <oliva@adacore.com>
635 * gcc/config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
636 output operand in emulation. Don't overwrite pseudos.
638 2020-04-28 Jeff Law <law@redhat.com>
640 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
641 multiply patterns are 4 bytes long.
643 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
645 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
646 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
648 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
649 Jakub Jelinek <jakub@redhat.com>
652 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
653 base class artificial fields.
654 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
655 decision is different after this fix.
657 2020-04-28 David Malcolm <dmalcolm@redhat.com>
663 * doc/invoke.texi (Static Analyzer Options): Remove
664 -Wanalyzer-use-of-uninitialized-value.
665 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
667 2020-04-28 Jakub Jelinek <jakub@redhat.com>
669 PR tree-optimization/94809
670 * tree.c (build_call_expr_internal_loc_array): Call
671 process_call_operands.
673 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
675 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
676 * config/aarch64/aarch64-tune.md: Regenerate.
677 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
678 (thunderx3t110_regmove_cost): Likewise.
679 (thunderx3t110_vector_cost): Likewise.
680 (thunderx3t110_prefetch_tune): Likewise.
681 (thunderx3t110_tunings): Likewise.
682 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
684 * config/aarch64/thunderx3t110.md: New file.
685 * config/aarch64/aarch64.md: Include thunderx3t110.md.
686 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
688 2020-04-28 Jakub Jelinek <jakub@redhat.com>
691 * config/s390/s390.c (s390_function_arg_vector,
692 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
694 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
696 PR tree-optimization/94727
697 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
698 operands are invariant booleans, use the mask type associated with the
699 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
700 (vectorizable_condition): Pass vectype unconditionally to
703 2020-04-27 Jakub Jelinek <jakub@redhat.com>
706 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
707 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
708 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
710 2020-04-27 David Malcolm <dmalcolm@redhat.com>
713 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
714 default value, so that it can by supplied by get_option_html_page.
715 * configure: Regenerate.
716 * opts.c: Include "selftest.h".
717 (get_option_html_page): New function.
718 (get_option_url): Use it. Reformat to place comments next to the
719 expressions they refer to.
720 (selftest::test_get_option_html_page): New.
721 (selftest::opts_c_tests): New.
722 * selftest-run-tests.c (selftest::run_tests): Call
723 selftest::opts_c_tests.
724 * selftest.h (selftest::opts_c_tests): New decl.
726 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
728 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
729 UINTVAL to CONST_INTs.
731 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
733 * config/arm/constraints.md (e): Remove constraint.
734 (Te): Define constraint.
735 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
736 operand 0 from "e" to "Te".
737 (vaddvaq_<supf><mode>): Likewise.
738 (vaddvq_p_<supf><mode>): Likewise.
739 (vmladavq_<supf><mode>): Likewise.
740 (vmladavxq_s<mode>): Likewise.
741 (vmlsdavq_s<mode>): Likewise.
742 (vmlsdavxq_s<mode>): Likewise.
743 (vaddvaq_p_<supf><mode>): Likewise.
744 (vmladavaq_<supf><mode>): Likewise.
745 (vmladavq_p_<supf><mode>): Likewise.
746 (vmladavxq_p_s<mode>): Likewise.
747 (vmlsdavq_p_s<mode>): Likewise.
748 (vmlsdavxq_p_s<mode>): Likewise.
749 (vmlsdavaxq_s<mode>): Likewise.
750 (vmlsdavaq_s<mode>): Likewise.
751 (vmladavaxq_s<mode>): Likewise.
752 (vmladavaq_p_<supf><mode>): Likewise.
753 (vmladavaxq_p_s<mode>): Likewise.
754 (vmlsdavaq_p_s<mode>): Likewise.
755 (vmlsdavaxq_p_s<mode>): Likewise.
757 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
759 * config/arm/arm.c (output_move_neon): Only get the first operand if
762 2020-04-27 Felix Yang <felix.yang@huawei.com>
764 PR tree-optimization/94784
765 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
766 assert around so that it checks that the two vectors have equal
767 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
768 types is a useless_type_conversion_p.
770 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
773 * dwarf2cfi.c (struct GTY): Add ra_mangled.
774 (cfi_row_equal_p): Check ra_mangled.
775 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
776 this only handles the sparc logic now.
777 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
778 the aarch64 specific logic.
779 (dwarf2out_frame_debug): Update to use the new subroutines.
780 (change_cfi_row): Check ra_mangled.
782 2020-04-27 Jakub Jelinek <jakub@redhat.com>
785 * config/s390/s390.c (s390_function_arg_vector,
786 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
788 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
790 * common/config/rs6000/rs6000-common.c
791 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
793 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
796 2020-04-27 Martin Liska <mliska@suse.cz>
799 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
800 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
802 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
805 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
807 (rs6000_emit_prologue_components):
808 Check with frame_pointer_needed_indeed.
809 (rs6000_emit_epilogue_components): Likewise.
810 (rs6000_emit_prologue): Likewise.
811 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
813 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
815 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
816 stack frame when debugging and flag_compare_debug is enabled.
818 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
820 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
821 enable PC-relative addressing for -mcpu=future.
822 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
823 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
824 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
825 suppress PC-relative addressing.
826 (rs6000_option_override_internal): Split up error messages
827 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
830 2020-04-25 Jakub Jelinek <jakub@redhat.com>
831 Richard Biener <rguenther@suse.de>
833 PR tree-optimization/94734
834 PR tree-optimization/89430
835 * tree-ssa-phiopt.c: Include tree-eh.h.
836 (cond_store_replacement): Return false if an automatic variable
837 access could trap. If -fstore-data-races, don't return false
838 just because an automatic variable is addressable.
840 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
842 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
844 (add<mode>_sext_dup2_exec): Likewise.
846 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
849 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
850 endian byteshift_val calculation.
852 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
854 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
856 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
858 * config/aarch64/arm_sve.h: Add a comment.
860 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
862 PR rtl-optimization/94708
863 * combine.c (simplify_if_then_else): Add check for
864 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
866 2020-04-23 Martin Sebor <msebor@redhat.com>
869 * common.opt (-Wno-frame-larger-than): New option.
870 (-Wno-larger-than, -Wno-stack-usage): Same.
872 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
874 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
876 (mov<mode>_exec): Likewise.
877 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
878 (<convop><mode><vndi>2_exec): Likewise.
880 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
882 PR tree-optimization/94717
883 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
884 of the stores doesn't have the same landing pad number as the first.
885 (coalesce_immediate_stores): Do not try to coalesce the store using
886 bswap if it doesn't have the same landing pad number as the first.
888 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
890 * gcc/doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
891 Replace outdated link to ELFv2 ABI.
893 2020-04-23 Jakub Jelinek <jakub@redhat.com>
896 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
900 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
901 temporarily with non-final second operand and updating it later,
902 push COMPOUND_EXPRs into a vector and process it in reverse,
903 creating COMPOUND_EXPRs with the final operands.
905 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
908 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
909 bti c and bti j handling.
911 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
912 Thomas Schwinge <thomas@codesourcery.com>
916 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
917 t_async and the wait arguments.
919 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
921 PR tree-optimization/94727
922 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
923 comparing invariant scalar booleans.
925 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
926 Jakub Jelinek <jakub@redhat.com>
929 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
930 empty base class artificial fields.
931 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
932 different after this fix.
934 2020-04-23 Jakub Jelinek <jakub@redhat.com>
937 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
938 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
939 if the same type has been diagnosed most recently already.
941 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
943 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
945 (__arm_vbicq_n_s16): Likewise.
946 (__arm_vbicq_n_u32): Likewise.
947 (__arm_vbicq_n_s32): Likewise.
948 (__arm_vbicq): Likewise.
949 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
950 (__arm_vbicq_n_s32): Likewise.
951 (__arm_vbicq_n_u16): Likewise.
952 (__arm_vbicq_n_u32): Likewise.
953 (__arm_vdupq_m_n_s8): Likewise.
954 (__arm_vdupq_m_n_s16): Likewise.
955 (__arm_vdupq_m_n_s32): Likewise.
956 (__arm_vdupq_m_n_u8): Likewise.
957 (__arm_vdupq_m_n_u16): Likewise.
958 (__arm_vdupq_m_n_u32): Likewise.
959 (__arm_vdupq_m_n_f16): Likewise.
960 (__arm_vdupq_m_n_f32): Likewise.
961 (__arm_vldrhq_gather_offset_s16): Likewise.
962 (__arm_vldrhq_gather_offset_s32): Likewise.
963 (__arm_vldrhq_gather_offset_u16): Likewise.
964 (__arm_vldrhq_gather_offset_u32): Likewise.
965 (__arm_vldrhq_gather_offset_f16): Likewise.
966 (__arm_vldrhq_gather_offset_z_s16): Likewise.
967 (__arm_vldrhq_gather_offset_z_s32): Likewise.
968 (__arm_vldrhq_gather_offset_z_u16): Likewise.
969 (__arm_vldrhq_gather_offset_z_u32): Likewise.
970 (__arm_vldrhq_gather_offset_z_f16): Likewise.
971 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
972 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
973 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
974 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
975 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
976 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
977 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
978 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
979 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
980 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
981 (__arm_vldrwq_gather_offset_s32): Likewise.
982 (__arm_vldrwq_gather_offset_u32): Likewise.
983 (__arm_vldrwq_gather_offset_f32): Likewise.
984 (__arm_vldrwq_gather_offset_z_s32): Likewise.
985 (__arm_vldrwq_gather_offset_z_u32): Likewise.
986 (__arm_vldrwq_gather_offset_z_f32): Likewise.
987 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
988 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
989 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
990 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
991 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
992 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
993 (__arm_vdwdupq_x_n_u8): Likewise.
994 (__arm_vdwdupq_x_n_u16): Likewise.
995 (__arm_vdwdupq_x_n_u32): Likewise.
996 (__arm_viwdupq_x_n_u8): Likewise.
997 (__arm_viwdupq_x_n_u16): Likewise.
998 (__arm_viwdupq_x_n_u32): Likewise.
999 (__arm_vidupq_x_n_u8): Likewise.
1000 (__arm_vddupq_x_n_u8): Likewise.
1001 (__arm_vidupq_x_n_u16): Likewise.
1002 (__arm_vddupq_x_n_u16): Likewise.
1003 (__arm_vidupq_x_n_u32): Likewise.
1004 (__arm_vddupq_x_n_u32): Likewise.
1005 (__arm_vldrdq_gather_offset_s64): Likewise.
1006 (__arm_vldrdq_gather_offset_u64): Likewise.
1007 (__arm_vldrdq_gather_offset_z_s64): Likewise.
1008 (__arm_vldrdq_gather_offset_z_u64): Likewise.
1009 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
1010 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
1011 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
1012 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
1013 (__arm_vidupq_m_n_u8): Likewise.
1014 (__arm_vidupq_m_n_u16): Likewise.
1015 (__arm_vidupq_m_n_u32): Likewise.
1016 (__arm_vddupq_m_n_u8): Likewise.
1017 (__arm_vddupq_m_n_u16): Likewise.
1018 (__arm_vddupq_m_n_u32): Likewise.
1019 (__arm_vidupq_n_u16): Likewise.
1020 (__arm_vidupq_n_u32): Likewise.
1021 (__arm_vidupq_n_u8): Likewise.
1022 (__arm_vddupq_n_u16): Likewise.
1023 (__arm_vddupq_n_u32): Likewise.
1024 (__arm_vddupq_n_u8): Likewise.
1026 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
1028 * doc/install.texi (D-Specific Options): Document
1029 --enable-libphobos-checking and --with-libphobos-druntime-only.
1031 2020-04-23 Jakub Jelinek <jakub@redhat.com>
1034 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
1035 cxx17_empty_base_seen argument. Pass it to recursive calls.
1036 Ignore cxx17_empty_base_field_p fields after setting
1037 *cxx17_empty_base_seen to true.
1038 (rs6000_discover_homogeneous_aggregate): Adjust
1039 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
1040 aggregates with C++17 empty base fields.
1043 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1044 if last_decl is error_mark_node or has such a TREE_TYPE.
1047 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1048 if last_decl is error_mark_node or has such a TREE_TYPE.
1050 2020-04-22 Felix Yang <felix.yang@huawei.com>
1053 * config/aarch64/aarch64.h (TARGET_SVE):
1054 Add && !TARGET_GENERAL_REGS_ONLY.
1055 (TARGET_SVE2): Add && TARGET_SVE.
1056 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
1057 TARGET_SVE2_SM4): Add && TARGET_SVE2.
1058 * config/aarch64/aarch64-sve-builtins.h
1059 (sve_switcher::m_old_general_regs_only): New member.
1060 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
1062 (reported_missing_registers_p): New variable.
1063 (check_required_extensions): Call check_required_registers before
1064 return if all required extenstions are present.
1065 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
1066 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
1067 global_options.x_target_flags.
1068 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
1069 global_options.x_target_flags if m_old_general_regs_only is true.
1071 2020-04-22 Zackery Spytz <zspytz@gmail.com>
1073 * doc/extend.exi: Add "free" to list of other builtin functions
1076 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
1079 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
1081 (store_quadpti): Ditto.
1082 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
1083 plq will be used and doesn't need it.
1084 (atomic_store<mode>): Ditto, for pstq.
1086 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
1088 * doc/invoke.texi: Update flags turned on by -O3.
1090 2020-04-22 Jakub Jelinek <jakub@redhat.com>
1093 * config/ia64/ia64.c (hfa_element_mode): Ignore
1094 cxx17_empty_base_field_p fields.
1097 * calls.h (cxx17_empty_base_field_p): Declare.
1098 * calls.c (cxx17_empty_base_field_p): Define.
1100 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
1102 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
1104 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1105 Andre Vieira <andre.simoesdiasvieira@arm.com>
1106 Mihail Ionescu <mihail.ionescu@arm.com>
1108 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
1109 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
1110 (ALL_QUIRKS): Add quirk_no_asmcpu.
1111 (cortex-m55): Define new cpu.
1112 * config/arm/arm-tables.opt: Regenerate.
1113 * config/arm/arm-tune.md: Likewise.
1114 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
1116 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
1118 PR tree-optimization/94700
1119 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
1120 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
1121 of similarly-structured but distinct vector types.
1123 2020-04-21 Martin Sebor <msebor@redhat.com>
1126 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
1127 the computation of the lower bound of the source access size.
1128 (builtin_access::generic_overlap): Remove a hack for setting ranges
1131 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
1133 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
1134 (ASM_WEAKEN_DECL): New define.
1135 (HAVE_GAS_WEAKREF): Undefine.
1137 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
1139 PR tree-optimization/94683
1140 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
1141 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
1142 but distinct vector types.
1144 2020-04-21 Jakub Jelinek <jakub@redhat.com>
1147 * stor-layout.c (place_field, finalize_record_size): Don't emit
1148 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
1149 * ubsan.c (ubsan_get_type_descriptor_type,
1150 ubsan_get_source_location_type, ubsan_create_data): Set
1152 * asan.c (asan_global_struct): Likewise.
1154 2020-04-21 Duan bo <duanbo3@huawei.com>
1157 * config/aarch64/aarch64.c: Add an error message for option conflict.
1158 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
1159 incompatible with -fpic, -fPIC and -mabi=ilp32.
1161 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
1164 * omp-low.c (new_omp_context): Remove assignments to
1165 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
1167 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
1169 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
1170 ("popcountv2di2_vx"): Use simplify_gen_subreg.
1172 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
1175 * config/s390/s390-builtin-types.def: Add 3 new function modes.
1176 * config/s390/s390-builtins.def: Add mode dependent low-level
1177 builtin and map the overloaded builtins to these.
1178 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
1179 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
1181 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
1183 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
1184 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
1185 estimated VF and is no worse at double the estimated VF.
1187 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
1190 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
1191 order of arguments to rtx_vector_builder.
1192 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
1193 When extending the trailing constants to a full vector, replace any
1194 variables with zeros.
1196 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
1199 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
1202 2020-04-20 Martin Liska <mliska@suse.cz>
1204 * symtab.c (symtab_node::dump_references): Add space after
1206 (symtab_node::dump_referring): Likewise.
1208 2020-04-18 Jeff Law <law@redhat.com>
1211 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
1214 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
1216 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
1217 attributes): Document d_runtime_has_std_library.
1219 2020-04-17 Jeff Law <law@redhat.com>
1221 PR rtl-optimization/90275
1222 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
1223 when the destination has a REG_UNUSED note.
1225 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
1228 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
1231 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
1233 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
1234 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
1235 cost of load and store insns if one loop iteration has enough scalar
1236 elements to use an Advanced SIMD LDP or STP.
1237 (aarch64_add_stmt_cost): Update call accordingly.
1239 2020-04-17 Jakub Jelinek <jakub@redhat.com>
1240 Jeff Law <law@redhat.com>
1243 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
1244 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
1245 or pos + len >= 32, or pos + len is equal to operands[2] precision
1246 and operands[2] is not a register operand. During splitting perform
1247 SImode AND if operands[0] doesn't have CCZmode and pos + len is
1248 equal to mode precision.
1250 2020-04-17 Richard Biener <rguenther@suse.de>
1253 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
1255 * dwarf2out.c (dw_val_equal_p): Fix pasto in
1256 dw_val_class_vms_delta comparison.
1257 * optabs.c (expand_binop_directly): Fix pasto in commutation
1259 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
1262 2020-04-17 Jakub Jelinek <jakub@redhat.com>
1264 PR rtl-optimization/94618
1265 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
1266 insn is the BB_END of its block, but also when it is only followed
1267 by DEBUG_INSNs in its block.
1269 PR tree-optimization/94621
1270 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
1271 Move id->adjust_array_error_bounds check first in the condition.
1273 2020-04-17 Martin Liska <mliska@suse.cz>
1274 Jonathan Yong <10walls@gmail.com>
1276 PR gcov-profile/94570
1277 * coverage.c (coverage_init): Use separator properly.
1279 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
1281 PR rtl-optimization/93974
1282 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
1283 (rs6000_cannot_substitute_mem_equiv_p): New function.
1285 2020-04-16 Martin Jambor <mjambor@suse.cz>
1288 * ipa-inline.h (ipa_saved_clone_sources): Declare.
1289 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
1290 (save_inline_function_body): Link the new body holder with the
1292 * cgraph.c: Include ipa-inline.h.
1293 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
1294 the statement in ipa_saved_clone_sources.
1295 * cgraphunit.c: Include ipa-inline.h.
1296 (expand_all_functions): Free ipa_saved_clone_sources.
1298 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
1301 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
1302 the VNx16BI lowpart of the recursively-generated constant.
1304 2020-04-16 Martin Liska <mliska@suse.cz>
1305 Jakub Jelinek <jakub@redhat.com>
1308 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
1309 DECL_IS_REPLACEABLE_OPERATOR during cloning.
1310 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
1311 (propagate_necessity): Check operator names.
1313 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
1315 PR rtl-optimization/94605
1316 * early-remat.c (early_remat::process_block): Handle insns that
1317 set multiple candidate registers.
1318 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
1320 PR gcov-profile/93401
1321 * common.opt (profile-prefix-path): New option.
1322 * coverae.c: Include diagnostics.h.
1323 (coverage_init): Strip profile prefix path.
1324 * doc/invoke.texi (-fprofile-prefix-path): Document.
1326 2020-04-16 Richard Biener <rguenther@suse.de>
1329 * expr.c (emit_move_multi_word): Do not generate code when
1330 the destination part is undefined_operand_subword_p.
1331 * lower-subreg.c (resolve_clobber): Look through a paradoxica
1334 2020-04-16 Martin Jambor <mjambor@suse.cz>
1336 PR tree-optimization/94598
1337 * tree-sra.c (verify_sra_access_forest): Fix verification of total
1338 scalarization accesses under access to one-element arrays.
1340 2020-04-16 Jakub Jelinek <jakub@redhat.com>
1343 * function.c (assign_parm_find_data_types): Add workaround for
1344 BROKEN_VALUE_INITIALIZATION compilers.
1346 2020-04-16 Richard Biener <rguenther@suse.de>
1348 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
1351 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
1354 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
1355 Require OPTION_MASK_ISA_SSE2.
1357 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
1360 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
1361 Don't construct a dump_context temporary to call static method.
1363 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
1365 * config/aarch64/falkor-tag-collision-avoidance.c
1366 (valid_src_p): Check for aarch64_address_info type before
1367 accessing base field.
1369 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
1371 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
1372 (V_sz_elem2): Remove unused mode attribute.
1374 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
1376 * config/arm/arm.md (arm_movdi): Disallow for MVE.
1378 2020-04-15 Richard Biener <rguenther@suse.de>
1381 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
1382 alias_sets_conflict_p for pointers.
1384 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
1387 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
1388 (extendhisi2_internal): Add %v1 before the load instructions.
1390 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
1393 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
1394 use PC-relative addressing for TLS references.
1396 2020-04-14 Martin Jambor <mjambor@suse.cz>
1399 * ipa-sra.c: Include internal-fn.h.
1400 (enum isra_scan_context): Update comment.
1401 (scan_function): Treat calls to internal_functions like loads or stores.
1403 2020-04-14 Yang Yang <yangyang305@huawei.com>
1405 PR tree-optimization/94574
1406 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
1407 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
1409 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
1412 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
1414 2020-04-13 Martin Sebor <msebor@redhat.com>
1416 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
1417 -Wformat-truncation. Move -Wzero-length-bounds last.
1418 (-Wrestrict): Document positive form of option enabled by -Wall.
1420 2020-04-13 Zachary Spytz <zspytz@gmail.com>
1422 * doc/extend.texi: Add realloc to list of built-in functions
1423 are recognized by the compiler.
1425 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
1428 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
1429 pointer in word_mode for eh_return epilogues.
1431 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1433 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
1434 memory references in %B, %C and %D operand selectors when the inner
1435 operand is a post increment address.
1437 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1439 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
1440 reference by 4 bytes, and %D memory reference by 6 bytes.
1442 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
1445 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
1446 condition for V4SI, V8HI and V16QI modes.
1448 2020-04-11 Jakub Jelinek <jakub@redhat.com>
1452 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
1455 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
1459 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
1460 "#pragma omp declare target" has also been applied.
1462 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1464 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
1465 when to emit the epilogue_helper insn.
1466 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
1469 2020-04-09 Jakub Jelinek <jakub@redhat.com>
1472 * cselib.h (cselib_record_sp_cfa_base_equiv,
1473 cselib_sp_derived_value_p): Declare.
1474 * cselib.c (cselib_record_sp_cfa_base_equiv,
1475 cselib_sp_derived_value_p): New functions.
1476 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
1477 cselib_sp_derived_value_p values.
1478 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
1479 start of extended basic blocks other than the first one
1480 for !frame_pointer_needed functions.
1482 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1484 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
1485 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
1486 (aarch64_sve2048_hw): Document.
1487 * config/aarch64/aarch64-protos.h
1488 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
1489 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
1490 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
1491 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
1493 (find_type_suffix_for_scalar_type): Use it instead of comparing
1495 (function_resolver::infer_vector_or_tuple_type): Likewise.
1496 (function_resolver::require_vector_type): Likewise.
1497 (handle_arm_sve_vector_bits_attribute): New function.
1498 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
1499 (aarch64_attribute_table): Add arm_sve_vector_bits.
1500 (aarch64_return_in_memory_1):
1501 (pure_scalable_type_info::piece::get_rtx): New function.
1502 (pure_scalable_type_info::num_zr): Likewise.
1503 (pure_scalable_type_info::num_pr): Likewise.
1504 (pure_scalable_type_info::get_rtx): Likewise.
1505 (pure_scalable_type_info::analyze): Likewise.
1506 (pure_scalable_type_info::analyze_registers): Likewise.
1507 (pure_scalable_type_info::analyze_array): Likewise.
1508 (pure_scalable_type_info::analyze_record): Likewise.
1509 (pure_scalable_type_info::add_piece): Likewise.
1510 (aarch64_some_values_include_pst_objects_p): Likewise.
1511 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
1512 to analyze whether the type is returned in SVE registers.
1513 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
1514 is passed in SVE registers.
1515 (aarch64_pass_by_reference_1): New function, extracted from...
1516 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
1517 to analyze whether the type is a pure scalable type and, if so,
1518 whether it should be passed by reference.
1519 (aarch64_return_in_msb): Return false for pure scalable types.
1520 (aarch64_function_value_1): Fold back into...
1521 (aarch64_function_value): ...this function. Use
1522 pure_scalable_type_info to analyze whether the type is a pure
1523 scalable type and, if so, which registers it should use. Handle
1524 types that include pure scalable types but are not themselves
1525 pure scalable types.
1526 (aarch64_return_in_memory_1): New function, split out from...
1527 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
1528 to analyze whether the type is a pure scalable type and, if so,
1529 whether it should be returned by reference.
1530 (aarch64_layout_arg): Remove orig_mode argument. Use
1531 pure_scalable_type_info to analyze whether the type is a pure
1532 scalable type and, if so, which registers it should use. Handle
1533 types that include pure scalable types but are not themselves
1534 pure scalable types.
1535 (aarch64_function_arg): Update call accordingly.
1536 (aarch64_function_arg_advance): Likewise.
1537 (aarch64_pad_reg_upward): On big-endian targets, return false for
1538 pure scalable types that are smaller than 16 bytes.
1539 (aarch64_member_type_forces_blk): New function.
1540 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
1541 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
1542 correspond to built-in SVE types. Do not rely on a vector mode
1543 if the type includes an pure scalable type. When returning true,
1544 assert that the mode is not an SVE mode.
1545 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
1546 built-in types here. When returning true, assert that the type
1547 does not have an SVE mode.
1548 (aarch64_can_change_mode_class): Don't allow anything to change
1549 between a predicate mode and a non-predicate mode. Also don't
1550 allow changes between SVE vector modes and other modes that
1551 might be bigger than 128 bits.
1552 (aarch64_invalid_binary_op): Reject binary operations that mix
1553 SVE and GNU vector types.
1554 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
1556 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1558 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
1559 "SVE sizeless type".
1560 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
1561 (sizeless_type_p): New functions.
1562 (register_builtin_types): Apply make_type_sizeless to the type.
1563 (register_tuple_type): Likewise.
1564 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
1566 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
1568 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
1571 2020-04-09 Martin Jambor <mjambor@suse.cz>
1572 Richard Biener <rguenther@suse.de>
1574 PR tree-optimization/94482
1575 * tree-sra.c (create_access_replacement): Dump new replacement with
1577 (sra_modify_expr): Fix handling of cases when the original EXPR writes
1578 to only part of the replacement.
1579 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
1580 the first operand of combinations into REAL/IMAGPART_EXPR and
1583 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1585 * doc/sourcebuild.texi (check-function-bodies): Treat the third
1586 parameter as a list of option regexps and require each regexp
1589 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
1592 * config/aarch64/falkor-tag-collision-avoidance.c
1593 (valid_src_p): Fix missing rtx type check.
1595 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
1596 Richard Biener <rguenther@suse.de>
1598 PR tree-optimization/93674
1599 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
1600 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
1601 or non-mode precision type, add candidate in unsigned type with the
1604 2020-04-08 Clement Chigot <clement.chigot@atos.net>
1606 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
1607 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
1608 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
1610 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1613 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
1615 * reload1.c (eliminate_regs_1): Avoid creating
1616 (plus (reg) (const_int 0)) in DEBUG_INSNs.
1618 PR tree-optimization/94524
1619 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
1620 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
1621 op1 rather than op1 itself at the end. Punt for signed modulo by
1622 most negative constant.
1623 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
1624 modulo by most negative constant.
1626 2020-04-08 Richard Biener <rguenther@suse.de>
1628 PR rtl-optimization/93946
1629 * cse.c (cse_insn): Record the tabled expression in
1630 src_related. Verify a redundant store removal is valid.
1632 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
1635 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
1636 ENDBR at function entry if function will be called indirectly.
1638 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1641 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
1644 2020-04-08 Martin Liska <mliska@suse.cz>
1647 * gimple.c (gimple_call_operator_delete_p): Rename to...
1648 (gimple_call_replaceable_operator_delete_p): ... this.
1649 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1650 * gimple.h (gimple_call_operator_delete_p): Rename to ...
1651 (gimple_call_replaceable_operator_delete_p): ... this.
1652 * tree-core.h (tree_function_decl): Add replaceable_operator
1654 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
1655 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1656 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
1657 (eliminate_unnecessary_stmts): Likewise.
1658 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
1659 Pack DECL_IS_REPLACEABLE_OPERATOR.
1660 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
1661 Unpack the field here.
1662 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
1663 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
1664 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
1665 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
1666 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
1667 replaceable operator flags.
1669 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
1670 Matthew Malcomson <matthew.malcomson@arm.com>
1672 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
1673 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
1674 (CX_TERNARY_QUALIFIERS): Likewise.
1675 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
1676 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
1677 (arm_init_acle_builtins): Initialize CDE builtins.
1678 (arm_expand_acle_builtin): Check CDE constant operands.
1679 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
1680 of CDE constant operand.
1681 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
1683 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
1684 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
1685 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
1686 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
1687 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
1688 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
1689 * config/arm/arm_cde_builtins.def: New file.
1690 * config/arm/iterators.md (V_reg): New attribute of SI.
1691 * config/arm/predicates.md (const_int_coproc_operand): New.
1692 (const_int_vcde1_operand, const_int_vcde2_operand): New.
1693 (const_int_vcde3_operand): New.
1694 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
1695 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
1696 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
1697 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
1699 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
1701 * config.gcc: Add arm_cde.h.
1702 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
1703 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
1704 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
1705 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
1706 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
1707 * config/arm/arm.h (TARGET_CDE): New macro.
1708 * config/arm/arm_cde.h: New file.
1709 * doc/invoke.texi: Document CDE options +cdecp[0-7].
1710 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
1712 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
1714 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1716 PR rtl-optimization/94516
1717 * postreload.c: Include rtl-iter.h.
1718 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
1719 looking for all MEMs with RTX_AUTOINC operand.
1720 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
1722 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
1724 * omp-grid.c (grid_eliminate_combined_simd_part): Use
1725 OMP_CLAUSE_CODE to access the omp clause code.
1727 2020-04-07 Jeff Law <law@redhat.com>
1729 PR rtl-optimization/92264
1730 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
1731 the destination is the stack pointer.
1733 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1735 PR rtl-optimization/94291
1736 PR rtl-optimization/84169
1737 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
1738 must be a REG or SUBREG of REG; if it is not one of these, don't
1741 2020-04-07 Richard Biener <rguenther@suse.de>
1744 * gimplify.c (gimplify_addr_expr): Also consider generated
1747 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1749 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
1751 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1753 * config/arm/arm_mve.h: Cast some pointers to expected types.
1755 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1757 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
1758 same with '__arm_' prefix.
1760 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1762 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
1764 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1766 * config/arm/arm.c (arm_mve_immediate_check): Removed.
1767 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
1768 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
1769 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
1770 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
1771 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
1772 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
1774 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1776 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
1778 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1780 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
1781 * config/arm/mve/md: Fix v[id]wdup patterns.
1783 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1785 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
1786 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
1788 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1790 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
1791 and remove const_ptr enums.
1793 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1795 * config/arm/arm_mve.h (vsubq_n): Merge with...
1797 (vmulq_n): Merge with...
1799 (__ARM_mve_typeid): Simplify scalar and constant detection.
1801 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1804 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
1805 for inter-lane permutation for 64-byte modes.
1808 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
1809 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
1810 Assume it is a REG after that instead of testing it and doing FAIL
1811 otherwise. Formatting fix.
1813 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
1815 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
1817 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1820 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
1821 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
1823 2020-04-06 Jakub Jelinek <jakub@redhat.com>
1825 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
1826 + const0_rtx return the SP_DERIVED_VALUE_P.
1828 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
1830 PR rtl-optimization/92989
1831 * lra-lives.c (process_bb_lives): Do not treat eh_return data
1832 registers as being live at the beginning of the EH receiver.
1834 2020-04-05 Zachary Spytz <zspytz@gmail.com>
1836 * extend.texi: Add free to list of ISO C90 functions that
1837 are recognized by the compiler.
1839 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
1841 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
1844 * config/microblaze/microblaze.md (trap): Update output pattern.
1846 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
1847 Jakub Jelinek <jakub@redhat.com>
1850 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
1851 arrays, pointer-to-members, function types and qualifiers when
1852 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
1853 to emit type again on definition.
1855 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
1858 * ipa-fnsummary.c (vrp_will_run_p): New function.
1859 (fre_will_run_p): New function.
1860 (evaluate_properties_for_edge): Use it.
1861 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
1862 !optimize_debug to optimize_debug.
1864 2020-04-04 Jakub Jelinek <jakub@redhat.com>
1866 PR rtl-optimization/94468
1867 * cselib.c (references_value_p): Formatting fix.
1868 (cselib_useless_value_p): New function.
1869 (discard_useless_locs, discard_useless_values,
1870 cselib_invalidate_regno_val, cselib_invalidate_mem,
1871 cselib_record_set): Use it instead of
1872 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
1875 * tree-iterator.h (expr_single): Declare.
1876 * tree-iterator.c (expr_single): New function.
1877 * tree.h (protected_set_expr_location_if_unset): Declare.
1878 * tree.c (protected_set_expr_location): Use expr_single.
1879 (protected_set_expr_location_if_unset): New function.
1881 2020-04-03 Jeff Law <law@redhat.com>
1883 PR rtl-optimization/92264
1884 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
1885 reloading of auto-increment addressing modes.
1887 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
1890 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
1893 2020-04-03 Jeff Law <law@redhat.com>
1895 PR rtl-optimization/92264
1896 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
1897 post-increment addressing of source operands as well as residuals
1898 when computing any adjustments to the input pointer.
1900 2020-04-03 Jakub Jelinek <jakub@redhat.com>
1903 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
1904 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
1905 second half of first lane from first lane of second operand and
1906 first half of second lane from second lane of first operand.
1908 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
1910 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
1912 2020-04-03 Tamar Christina <tamar.christina@arm.com>
1915 * common/config/aarch64/aarch64-common.c
1916 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
1918 2020-04-03 Richard Biener <rguenther@suse.de>
1921 * tree.c (array_ref_low_bound): Deal with released SSA names
1924 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
1926 * config/gcn/gcn.c (print_operand): Handle unordered comparison
1928 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
1929 comparison operators.
1931 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
1933 PR tree-optimization/94443
1934 * tree-vect-loop.c (vectorizable_live_operation): Use
1935 gsi_insert_seq_before to replace gsi_insert_before.
1937 2020-04-03 Martin Liska <mliska@suse.cz>
1940 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
1941 Compare type attributes for gimple_call_fntypes.
1943 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
1945 * alias.c (get_alias_set): Fix comment typos.
1947 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
1950 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
1951 attribute checking used by TYPE.
1953 2020-04-02 Martin Jambor <mjambor@suse.cz>
1956 * ipa-sra.c (struct caller_issues): New fields candidate and
1957 call_from_outside_comdat.
1958 (check_for_caller_issues): Check for calls from outsied of
1959 candidate's same_comdat_group.
1960 (check_all_callers_for_issues): Set up issues.candidate, check result
1962 (mark_callers_calls_comdat_local): New function.
1963 (process_isra_node_results): Set calls_comdat_local of callers if
1966 2020-04-02 Richard Biener <rguenther@suse.de>
1969 * common.opt (ffinite-loops): Initialize to zero.
1970 * opts.c (default_options_table): Remove OPT_ffinite_loops
1972 * cfgloop.h (loop::finite_p): New member.
1973 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
1974 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
1976 * lto-streamer-in.c (input_cfg): Stream finite_p.
1977 * lto-streamer-out.c (output_cfg): Likewise.
1978 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
1979 from flag_finite_loops at CFG build time.
1980 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
1981 finite_p flag instead of flag_finite_loops.
1982 * doc/invoke.texi (ffinite-loops): Adjust documentation of
1985 2020-04-02 Richard Biener <rguenther@suse.de>
1988 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
1989 DW_TAG_imported_unit.
1991 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
1993 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
1994 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
1997 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
1999 PR tree-optimization/94401
2000 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
2001 access type when loading halves of vector to avoid peeling for gaps.
2003 2020-04-02 Jakub Jelinek <jakub@redhat.com>
2005 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
2006 between a string literal and MIPS_SYSVERSION_SPEC macro.
2008 2020-04-02 Martin Jambor <mjambor@suse.cz>
2010 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
2012 2020-04-02 Jakub Jelinek <jakub@redhat.com>
2014 PR rtl-optimization/92264
2015 * params.opt (-param=max-find-base-term-values=): Decrease default
2018 PR rtl-optimization/92264
2019 * rtl.h (struct rtx_def): Mention that call bit is used as
2020 SP_DERIVED_VALUE_P in cselib.c.
2021 * cselib.c (SP_DERIVED_VALUE_P): Define.
2022 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
2023 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
2024 val_rtx and sp based expression where offsets cancel each other.
2025 (preserve_constants_and_equivs): Formatting fix.
2026 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
2027 locs list for cfa_base_preserved_val if needed. Formatting fix.
2028 (autoinc_split): If the to be returned value is a REG, MEM or
2029 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
2030 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
2031 (rtx_equal_for_cselib_1): Call autoinc_split even if both
2032 expressions are PLUS in Pmode with CONST_INT second operands.
2033 Handle SP_DERIVED_VALUE_P cases.
2034 (cselib_hash_plus_const_int): New function.
2035 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
2036 second operand, as well as for PRE_DEC etc. that ought to be
2037 hashed the same way.
2038 (cselib_subst_to_values): Substitute PLUS with Pmode and
2039 CONST_INT operand if the first operand is a VALUE which has
2040 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
2041 SP_DERIVED_VALUE_P + adjusted offset.
2042 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
2043 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
2044 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
2045 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
2046 on the sp value before calling cselib_add_permanent_equiv on the
2048 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
2049 in the insn without REG_INC note.
2050 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
2051 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
2054 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
2055 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
2057 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2060 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
2061 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
2062 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
2063 intrinsic defintion by adding a new builtin call to writeback into base
2065 (__arm_vldrdq_gather_base_wb_u64): Likewise.
2066 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
2067 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
2068 (__arm_vldrwq_gather_base_wb_s32): Likewise.
2069 (__arm_vldrwq_gather_base_wb_u32): Likewise.
2070 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
2071 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
2072 (__arm_vldrwq_gather_base_wb_f32): Likewise.
2073 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
2074 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
2075 builtin's qualifier.
2076 (vldrdq_gather_base_wb_z_u): Likewise.
2077 (vldrwq_gather_base_wb_u): Likewise.
2078 (vldrdq_gather_base_wb_u): Likewise.
2079 (vldrwq_gather_base_wb_z_s): Likewise.
2080 (vldrwq_gather_base_wb_z_f): Likewise.
2081 (vldrdq_gather_base_wb_z_s): Likewise.
2082 (vldrwq_gather_base_wb_s): Likewise.
2083 (vldrwq_gather_base_wb_f): Likewise.
2084 (vldrdq_gather_base_wb_s): Likewise.
2085 (vldrwq_gather_base_nowb_z_u): Define builtin.
2086 (vldrdq_gather_base_nowb_z_u): Likewise.
2087 (vldrwq_gather_base_nowb_u): Likewise.
2088 (vldrdq_gather_base_nowb_u): Likewise.
2089 (vldrwq_gather_base_nowb_z_s): Likewise.
2090 (vldrwq_gather_base_nowb_z_f): Likewise.
2091 (vldrdq_gather_base_nowb_z_s): Likewise.
2092 (vldrwq_gather_base_nowb_s): Likewise.
2093 (vldrwq_gather_base_nowb_f): Likewise.
2094 (vldrdq_gather_base_nowb_s): Likewise.
2095 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
2097 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
2098 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
2099 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
2100 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
2101 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
2102 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
2103 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
2104 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
2105 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
2106 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
2107 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
2109 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
2111 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
2112 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
2113 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
2114 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
2115 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
2116 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
2117 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
2118 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
2119 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
2121 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
2122 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
2123 Remove constraints from expander.
2124 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
2125 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
2126 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
2127 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
2128 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
2129 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
2131 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
2133 PR rtl-optimization/94123
2134 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
2135 flag_split_wide_types_early.
2137 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
2139 * doc/extend.texi (Common Function Attributes): Fix typo.
2141 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
2144 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
2147 2020-04-01 Zackery Spytz <zspytz@gmail.com>
2149 * doc/extend.texi: Fix a typo in the documentation of the
2150 copy function attribute.
2152 2020-04-01 Jakub Jelinek <jakub@redhat.com>
2155 * tree-object-size.c (pass_object_sizes::execute): Don't call
2156 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
2157 call replace_call_with_value.
2159 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
2161 PR tree-optimization/94043
2162 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
2163 phi for vec_lhs and use it for lane extraction.
2165 2020-03-31 Felix Yang <felix.yang@huawei.com>
2167 PR tree-optimization/94398
2168 * tree-vect-stmts.c (vectorizable_store): Instead of calling
2169 vect_supportable_dr_alignment, set alignment_support_scheme to
2170 dr_unaligned_supported for gather-scatter accesses.
2171 (vectorizable_load): Likewise.
2173 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
2175 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
2177 (vnsi, VnSI, vndi, VnDI): New mode attributes.
2178 (mov<mode>): Use <VnDI> in place of V64DI.
2179 (mov<mode>_exec): Likewise.
2180 (mov<mode>_sgprbase): Likewise.
2181 (reload_out<mode>): Likewise.
2182 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
2183 (gather_load<mode>v64si): Rename to ...
2184 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
2185 and <VnDI> in place of V64DI.
2186 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
2187 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
2188 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
2189 (scatter_store<mode>v64si): Rename to ...
2190 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2191 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
2192 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
2193 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
2194 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
2195 (ds_bpermute<mode>): Use <VnSI>.
2196 (addv64si3_vcc<exec_vcc>): Rename to ...
2197 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2198 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
2199 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
2200 (addcv64si3<exec_vcc>): Rename to ...
2201 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
2202 (subv64si3_vcc<exec_vcc>): Rename to ...
2203 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2204 (subcv64si3<exec_vcc>): Rename to ...
2205 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
2206 (addv64di3): Rename to ...
2207 (add<mode>3): ... this, and use V_DI.
2208 (addv64di3_exec): Rename to ...
2209 (add<mode>3_exec): ... this, and use V_DI.
2210 (subv64di3): Rename to ...
2211 (sub<mode>3): ... this, and use V_DI.
2212 (subv64di3_exec): Rename to ...
2213 (sub<mode>3_exec): ... this, and use V_DI.
2214 (addv64di3_zext): Rename to ...
2215 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
2216 (addv64di3_zext_exec): Rename to ...
2217 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2218 (addv64di3_zext_dup): Rename to ...
2219 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
2220 (addv64di3_zext_dup_exec): Rename to ...
2221 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
2222 (addv64di3_zext_dup2): Rename to ...
2223 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2224 (addv64di3_zext_dup2_exec): Rename to ...
2225 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2226 (addv64di3_sext_dup2): Rename to ...
2227 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
2228 (addv64di3_sext_dup2_exec): Rename to ...
2229 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
2230 (<su>mulv64si3_highpart<exec>): Rename to ...
2231 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
2232 (mulv64di3): Rename to ...
2233 (mul<mode>3): ... this, and use V_DI and <VnSI>.
2234 (mulv64di3_exec): Rename to ...
2235 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
2236 (mulv64di3_zext): Rename to ...
2237 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
2238 (mulv64di3_zext_exec): Rename to ...
2239 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2240 (mulv64di3_zext_dup2): Rename to ...
2241 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2242 (mulv64di3_zext_dup2_exec): Rename to ...
2243 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2244 (<expander>v64di3): Rename to ...
2245 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
2246 (<expander>v64di3_exec): Rename to ...
2247 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
2248 (<expander>v64si3<exec>): Rename to ...
2249 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2250 (v<expander>v64si3<exec>): Rename to ...
2251 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2252 (<expander>v64si3<exec>): Rename to ...
2253 (<expander><vnsi>3<exec>): ... this, and use V_SI.
2254 (subv64df3<exec>): Rename to ...
2255 (sub<mode>3<exec>): ... this, and use V_DF.
2256 (truncv64di<mode>2): Rename to ...
2257 (trunc<vndi><mode>2): ... this, and use <VnDI>.
2258 (truncv64di<mode>2_exec): Rename to ...
2259 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
2260 (<convop><mode>v64di2): Rename to ...
2261 (<convop><mode><vndi>2): ... this, and use <VnDI>.
2262 (<convop><mode>v64di2_exec): Rename to ...
2263 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
2264 (vec_cmp<u>v64qidi): Rename to ...
2265 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
2266 (vec_cmp<u>v64qidi_exec): Rename to ...
2267 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
2268 (vcond_mask_<mode>di): Use <VnDI>.
2269 (maskload<mode>di): Likewise.
2270 (maskstore<mode>di): Likewise.
2271 (mask_gather_load<mode>v64si): Rename to ...
2272 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2273 (mask_scatter_store<mode>v64si): Rename to ...
2274 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2275 (*<reduc_op>_dpp_shr_v64di): Rename to ...
2276 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2277 (*plus_carry_in_dpp_shr_v64si): Rename to ...
2278 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
2279 (*plus_carry_dpp_shr_v64di): Rename to ...
2280 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2281 (vec_seriesv64si): Rename to ...
2282 (vec_series<mode>): ... this, and use V_SI.
2283 (vec_seriesv64di): Rename to ...
2284 (vec_series<mode>): ... this, and use V_DI.
2286 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
2288 * config/arc/arc.c (arc_print_operand): Use
2289 HOST_WIDE_INT_PRINT_DEC macro.
2291 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
2293 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
2295 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2297 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
2299 (__arm_vbicq): Likewise.
2301 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
2303 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
2305 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2307 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
2308 common section of both MVE Integer and MVE Floating Point.
2310 (vaddlvq_p): Likewise.
2311 (vaddvaq): Likewise.
2312 (vaddvq_p): Likewise.
2313 (vcmpcsq): Likewise.
2314 (vmlsdavxq): Likewise.
2315 (vmlsdavq): Likewise.
2316 (vmladavxq): Likewise.
2317 (vmladavq): Likewise.
2319 (vminavq): Likewise.
2321 (vmaxavq): Likewise.
2322 (vmlaldavq): Likewise.
2323 (vcmphiq): Likewise.
2324 (vaddlvaq): Likewise.
2325 (vrmlaldavhq): Likewise.
2326 (vrmlaldavhxq): Likewise.
2327 (vrmlsldavhq): Likewise.
2328 (vrmlsldavhxq): Likewise.
2329 (vmlsldavxq): Likewise.
2330 (vmlsldavq): Likewise.
2332 (vrmlaldavhaq): Likewise.
2333 (vcmpgeq_m_n): Likewise.
2334 (vmlsdavxq_p): Likewise.
2335 (vmlsdavq_p): Likewise.
2336 (vmlsdavaxq): Likewise.
2337 (vmlsdavaq): Likewise.
2338 (vaddvaq_p): Likewise.
2339 (vcmpcsq_m_n): Likewise.
2340 (vcmpcsq_m): Likewise.
2341 (vmladavxq_p): Likewise.
2342 (vmladavq_p): Likewise.
2343 (vmladavaxq): Likewise.
2344 (vmladavaq): Likewise.
2345 (vminvq_p): Likewise.
2346 (vminavq_p): Likewise.
2347 (vmaxvq_p): Likewise.
2348 (vmaxavq_p): Likewise.
2349 (vcmphiq_m): Likewise.
2350 (vaddlvaq_p): Likewise.
2351 (vmlaldavaq): Likewise.
2352 (vmlaldavaxq): Likewise.
2353 (vmlaldavq_p): Likewise.
2354 (vmlaldavxq_p): Likewise.
2355 (vmlsldavaq): Likewise.
2356 (vmlsldavaxq): Likewise.
2357 (vmlsldavq_p): Likewise.
2358 (vmlsldavxq_p): Likewise.
2359 (vrmlaldavhaxq): Likewise.
2360 (vrmlaldavhq_p): Likewise.
2361 (vrmlaldavhxq_p): Likewise.
2362 (vrmlsldavhaq): Likewise.
2363 (vrmlsldavhaxq): Likewise.
2364 (vrmlsldavhq_p): Likewise.
2365 (vrmlsldavhxq_p): Likewise.
2366 (vabavq_p): Likewise.
2367 (vmladavaq_p): Likewise.
2368 (vstrbq_scatter_offset): Likewise.
2369 (vstrbq_p): Likewise.
2370 (vstrbq_scatter_offset_p): Likewise.
2371 (vstrdq_scatter_base_p): Likewise.
2372 (vstrdq_scatter_base): Likewise.
2373 (vstrdq_scatter_offset_p): Likewise.
2374 (vstrdq_scatter_offset): Likewise.
2375 (vstrdq_scatter_shifted_offset_p): Likewise.
2376 (vstrdq_scatter_shifted_offset): Likewise.
2377 (vmaxq_x): Likewise.
2378 (vminq_x): Likewise.
2379 (vmovlbq_x): Likewise.
2380 (vmovltq_x): Likewise.
2381 (vmulhq_x): Likewise.
2382 (vmullbq_int_x): Likewise.
2383 (vmullbq_poly_x): Likewise.
2384 (vmulltq_int_x): Likewise.
2385 (vmulltq_poly_x): Likewise.
2388 2020-03-31 Jakub Jelinek <jakub@redhat.com>
2391 * config/aarch64/constraints.md (Uph): New constraint.
2392 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
2393 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
2396 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
2397 Jakub Jelinek <jakub@redhat.com>
2400 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
2401 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
2403 2020-03-31 Jakub Jelinek <jakub@redhat.com>
2405 PR tree-optimization/94403
2406 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
2407 ENUMERAL_TYPE lhs_type.
2409 PR rtl-optimization/94344
2410 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
2411 conversions, either on both operands of |^+ or just one. Handle
2412 also extra same precision conversion on RSHIFT_EXPR first operand
2413 provided RSHIFT_EXPR is performed in unsigned type.
2415 2020-03-30 David Malcolm <dmalcolm@redhat.com>
2417 * lra.c (finish_insn_code_data_once): Set the array elements
2418 to NULL after freeing them.
2420 2020-03-30 Andreas Schwab <schwab@suse.de>
2422 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
2425 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2427 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
2428 to skip defining builtins based on builtin_mask.
2430 2020-03-30 Jakub Jelinek <jakub@redhat.com>
2433 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
2434 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
2435 operand is a register. Don't enable masked variants for V*[QH]Imode.
2438 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
2439 <store_mask_constraint> instead of m in output operand constraint.
2440 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
2443 2020-03-30 Alan Modra <amodra@gmail.com>
2445 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
2446 (rs6000_indirect_call_template_1): Adjust to suit.
2447 * config/rs6000/rs6000.md (call_local): Merge call_local32,
2448 call_local64, and call_local_aix.
2449 (call_value_local): Simlarly.
2450 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
2451 and disable pattern when CALL_LONG.
2452 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
2453 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
2454 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
2456 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
2459 * doc/invoke.texi: Update -falign-functions, -falign-loops and
2460 -falign-jumps documentation.
2462 2020-03-29 Martin Liska <mliska@suse.cz>
2465 * cgraphunit.c (process_function_and_variable_attributes): Remove
2466 double 'attribute' words.
2468 2020-03-29 John David Anglin <dave.anglin@bell.net>
2470 * gcc/config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
2473 2020-03-28 Jakub Jelinek <jakub@redhat.com>
2476 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
2477 to true after setting size to integer_one_node.
2479 PR tree-optimization/94329
2480 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
2481 on the last stmt in a bb, make sure gsi_prev isn't done immediately
2484 2020-03-27 Alan Modra <amodra@gmail.com>
2487 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
2488 for PLT16_LO and PLT_PCREL.
2489 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
2490 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
2491 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
2493 2020-03-27 Martin Sebor <msebor@redhat.com>
2496 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
2498 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
2500 * config/gcn/gcn-valu.md:
2501 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
2502 (VEC_1REG_MODE): Delete.
2503 (VEC_1REG_ALT): Delete.
2504 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
2505 (VEC_1REG_INT_MODE): Delete.
2506 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
2507 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
2508 (VEC_2REG_MODE): Rename to V_2REG throughout.
2509 (VEC_REG_MODE): Rename to V_noHI throughout.
2510 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
2511 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
2512 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
2513 (VEC_INT_MODE): Delete.
2514 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
2515 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
2516 (FP_MODE): Delete and replace with FP throughout.
2517 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
2518 (VCMP_MODE): Rename to V_noQI throughout and move to top.
2519 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
2520 * config/gcn/gcn.md (FP): New mode iterator.
2521 (FP_1REG): New mode iterator.
2523 2020-03-27 David Malcolm <dmalcolm@redhat.com>
2525 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
2526 now emits two .dot files.
2527 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
2528 (graphviz_out::end_tr): Only close a TR, not a TD.
2529 (graphviz_out::begin_td): New.
2530 (graphviz_out::end_td): New.
2531 (graphviz_out::begin_trtd): New, replacing the old implementation
2532 of graphviz_out::begin_tr.
2533 (graphviz_out::end_tdtr): New, replacing the old implementation
2534 of graphviz_out::end_tr.
2535 * graphviz.h (graphviz_out::begin_td): New decl.
2536 (graphviz_out::end_td): New decl.
2537 (graphviz_out::begin_trtd): New decl.
2538 (graphviz_out::end_tdtr): New decl.
2540 2020-03-27 Richard Biener <rguenther@suse.de>
2543 * dwarf2out.c (should_emit_struct_debug): Return false for
2546 2020-03-27 Richard Biener <rguenther@suse.de>
2548 PR tree-optimization/94352
2549 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
2551 (ssa_propagation_engine::ssa_propagate): ... here after
2552 initializing curr_order.
2554 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
2556 PR tree-optimization/90332
2557 * tree-vect-stmts.c (vector_vector_composition_type): New function.
2558 (get_group_load_store_type): Adjust to call
2559 vector_vector_composition_type, extend it to construct with scalar
2561 (vectorizable_load): Likewise.
2563 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
2565 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
2566 (create_ddg_dep_no_link): Likewise.
2567 (add_cross_iteration_register_deps): Move debug instruction check.
2568 Other minor refactoring.
2569 (add_intra_loop_mem_dep): Do not check for debug instructions.
2570 (add_inter_loop_mem_dep): Likewise.
2571 (build_intra_loop_deps): Likewise.
2572 (create_ddg): Do not include debug insns into the graph.
2573 * ddg.h (struct ddg): Remove num_debug field.
2574 * modulo-sched.c (doloop_register_get): Adjust condition.
2575 (res_MII): Remove DDG num_debug field usage.
2576 (sms_schedule_by_order): Use assertion against debug insns.
2577 (ps_has_conflicts): Drop debug insn check.
2579 2020-03-26 Jakub Jelinek <jakub@redhat.com>
2582 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
2583 that contains exactly one non-DEBUG_BEGIN_STMT statement.
2586 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
2587 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
2588 a single non-debug stmt followed by one or more debug stmts.
2589 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
2590 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
2591 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
2592 gimple_seq_last to check if outer_stmt gbind could be reused and
2593 if yes and it is surrounded by any debug stmts, move them into the
2596 PR rtl-optimization/92264
2597 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
2598 for sp based values in !frame_pointer_needed
2599 && !ACCUMULATE_OUTGOING_ARGS functions.
2601 2020-03-26 Felix Yang <felix.yang@huawei.com>
2603 PR tree-optimization/94269
2604 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
2606 operation to single basic block.
2608 2020-03-25 Jeff Law <law@redhat.com>
2610 PR rtl-optimization/90275
2611 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
2614 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2617 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
2618 mode rather than VOIDmode.
2620 2020-03-25 Martin Sebor <msebor@redhat.com>
2623 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
2624 even for alloca calls resulting from system macro expansion.
2625 Include inlining context in all warnings.
2627 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
2630 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
2631 FPRs to change between SDmode and DDmode.
2633 2020-03-25 Martin Sebor <msebor@redhat.com>
2635 PR tree-optimization/94131
2636 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
2638 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
2639 types have constant sizes.
2641 2020-03-25 Martin Liska <mliska@suse.cz>
2644 * configure.ac: Report error only when --with-zstd
2646 * configure: Regenerate.
2648 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2651 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
2652 INSN_CODE (insn) to -1 when changing the pattern.
2654 2020-03-25 Martin Liska <mliska@suse.cz>
2658 * config/i386/i386-features.c (make_resolver_func): Drop
2659 public flag for resolver.
2660 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
2661 group for resolver and drop public flag if possible.
2662 * multiple_target.c (create_dispatcher_calls): Drop unique_name
2663 and resolution as we want to enable LTO privatization of the default
2666 2020-03-25 Martin Liska <mliska@suse.cz>
2669 * configure.ac: Respect --without-zstd and report
2670 error when we can't find header file with --with-zstd.
2671 * configure: Regenerate.
2673 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2676 * varasm.c (output_constructor_array_range): If local->index
2677 RANGE_EXPR doesn't start at the current location in the constructor,
2678 skip needed number of bytes using assemble_zeros or assert we don't
2682 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
2683 counter instead of DECL_UID.
2685 PR tree-optimization/94300
2686 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
2687 is positive, make sure that off + size isn't larger than needed_len.
2689 2020-03-25 Richard Biener <rguenther@suse.de>
2690 Jakub Jelinek <jakub@redhat.com>
2693 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
2695 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
2697 * doc/sourcebuild.texi (ARM-specific attributes): Add
2699 (Features for dg-add-options): Add arm_fp_dp.
2701 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
2704 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
2706 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
2709 * omp-offload.c (omp_finish_file): Fix target-link handling if
2710 targetm_common.have_named_sections is false.
2712 2020-03-24 Jakub Jelinek <jakub@redhat.com>
2715 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
2719 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
2720 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
2721 If not after and at *incr_pos is a debug stmt, set stmt location to
2722 location of next non-debug stmt after it if any.
2725 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
2726 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
2727 worklist or set GF_PLF_2 just because it is used in a debug stmt in
2728 another bb. Formatting improvements.
2731 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
2732 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
2733 regardless of whether TREE_NO_WARNING is set on it or whether
2734 warn_unused_function is true or not.
2736 2020-03-23 Jeff Law <law@redhat.com>
2738 PR rtl-optimization/90275
2741 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
2742 (simplify_logical_relational_operation): Use it.
2744 2020-03-23 Jakub Jelinek <jakub@redhat.com>
2747 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
2748 ultimate rhs and if returned something different, reconstructing
2751 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
2753 * opts.c (print_filtered_help): Improve the help text for alias options.
2755 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2756 Andre Vieira <andre.simoesdiasvieira@arm.com>
2757 Mihail Ionescu <mihail.ionescu@arm.com>
2759 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
2760 (vshlcq_m_u8): Likewise.
2761 (vshlcq_m_s16): Likewise.
2762 (vshlcq_m_u16): Likewise.
2763 (vshlcq_m_s32): Likewise.
2764 (vshlcq_m_u32): Likewise.
2765 (__arm_vshlcq_m_s8): Define intrinsic.
2766 (__arm_vshlcq_m_u8): Likewise.
2767 (__arm_vshlcq_m_s16): Likewise.
2768 (__arm_vshlcq_m_u16): Likewise.
2769 (__arm_vshlcq_m_s32): Likewise.
2770 (__arm_vshlcq_m_u32): Likewise.
2771 (vshlcq_m): Define polymorphic variant.
2772 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
2773 Use builtin qualifier.
2774 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
2775 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
2776 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
2777 (mve_vshlcq_m_<supf><mode>): Likewise.
2779 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2781 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
2782 (UQSHL_QUALIFIERS): Likewise.
2783 (ASRL_QUALIFIERS): Likewise.
2784 (SQSHL_QUALIFIERS): Likewise.
2785 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
2787 (sqrshr): Define macro.
2788 (sqrshrl): Likewise.
2789 (sqrshrl_sat48): Likewise.
2795 (uqrshll): Likewise.
2796 (uqrshll_sat48): Likewise.
2803 (__arm_lsll): Define intrinsic.
2804 (__arm_asrl): Likewise.
2805 (__arm_uqrshll): Likewise.
2806 (__arm_uqrshll_sat48): Likewise.
2807 (__arm_sqrshrl): Likewise.
2808 (__arm_sqrshrl_sat48): Likewise.
2809 (__arm_uqshll): Likewise.
2810 (__arm_urshrl): Likewise.
2811 (__arm_srshrl): Likewise.
2812 (__arm_sqshll): Likewise.
2813 (__arm_uqrshl): Likewise.
2814 (__arm_sqrshr): Likewise.
2815 (__arm_uqshl): Likewise.
2816 (__arm_urshr): Likewise.
2817 (__arm_sqshl): Likewise.
2818 (__arm_srshr): Likewise.
2819 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
2821 (UQSHL_QUALIFIERS): Likewise.
2822 (ASRL_QUALIFIERS): Likewise.
2823 (SQSHL_QUALIFIERS): Likewise.
2824 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
2825 (mve_sqrshrl_sat<supf>_di): Likewise.
2826 (mve_uqrshl_si): Likewise.
2827 (mve_sqrshr_si): Likewise.
2828 (mve_uqshll_di): Likewise.
2829 (mve_urshrl_di): Likewise.
2830 (mve_uqshl_si): Likewise.
2831 (mve_urshr_si): Likewise.
2832 (mve_sqshl_si): Likewise.
2833 (mve_srshr_si): Likewise.
2834 (mve_srshrl_di): Likewise.
2835 (mve_sqshll_di): Likewise.
2837 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2838 Andre Vieira <andre.simoesdiasvieira@arm.com>
2839 Mihail Ionescu <mihail.ionescu@arm.com>
2841 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
2842 (vsetq_lane_f32): Likewise.
2843 (vsetq_lane_s16): Likewise.
2844 (vsetq_lane_s32): Likewise.
2845 (vsetq_lane_s8): Likewise.
2846 (vsetq_lane_s64): Likewise.
2847 (vsetq_lane_u8): Likewise.
2848 (vsetq_lane_u16): Likewise.
2849 (vsetq_lane_u32): Likewise.
2850 (vsetq_lane_u64): Likewise.
2851 (vgetq_lane_f16): Likewise.
2852 (vgetq_lane_f32): Likewise.
2853 (vgetq_lane_s16): Likewise.
2854 (vgetq_lane_s32): Likewise.
2855 (vgetq_lane_s8): Likewise.
2856 (vgetq_lane_s64): Likewise.
2857 (vgetq_lane_u8): Likewise.
2858 (vgetq_lane_u16): Likewise.
2859 (vgetq_lane_u32): Likewise.
2860 (vgetq_lane_u64): Likewise.
2861 (__ARM_NUM_LANES): Likewise.
2862 (__ARM_LANEQ): Likewise.
2863 (__ARM_CHECK_LANEQ): Likewise.
2864 (__arm_vsetq_lane_s16): Define intrinsic.
2865 (__arm_vsetq_lane_s32): Likewise.
2866 (__arm_vsetq_lane_s8): Likewise.
2867 (__arm_vsetq_lane_s64): Likewise.
2868 (__arm_vsetq_lane_u8): Likewise.
2869 (__arm_vsetq_lane_u16): Likewise.
2870 (__arm_vsetq_lane_u32): Likewise.
2871 (__arm_vsetq_lane_u64): Likewise.
2872 (__arm_vgetq_lane_s16): Likewise.
2873 (__arm_vgetq_lane_s32): Likewise.
2874 (__arm_vgetq_lane_s8): Likewise.
2875 (__arm_vgetq_lane_s64): Likewise.
2876 (__arm_vgetq_lane_u8): Likewise.
2877 (__arm_vgetq_lane_u16): Likewise.
2878 (__arm_vgetq_lane_u32): Likewise.
2879 (__arm_vgetq_lane_u64): Likewise.
2880 (__arm_vsetq_lane_f16): Likewise.
2881 (__arm_vsetq_lane_f32): Likewise.
2882 (__arm_vgetq_lane_f16): Likewise.
2883 (__arm_vgetq_lane_f32): Likewise.
2884 (vgetq_lane): Define polymorphic variant.
2885 (vsetq_lane): Likewise.
2886 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
2888 (mve_vec_extractv2didi): Likewise.
2889 (mve_vec_extract_sext_internal<mode>): Likewise.
2890 (mve_vec_extract_zext_internal<mode>): Likewise.
2891 (mve_vec_set<mode>_internal): Likewise.
2892 (mve_vec_setv2di_internal): Likewise.
2893 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
2895 (vec_extract<mode><V_elem_l>): Rename to
2896 "neon_vec_extract<mode><V_elem_l>".
2897 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
2898 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
2899 pattern common for MVE and NEON.
2900 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
2903 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
2905 * config/arm/mve.md (earlyclobber_32): New mode attribute.
2906 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
2907 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
2909 2020-03-23 Richard Biener <rguenther@suse.de>
2911 PR tree-optimization/94261
2912 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
2913 IL operand swapping code.
2914 (vect_slp_rearrange_stmts): Do not arrange isomorphic
2915 nodes that would need operation code adjustments.
2917 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
2919 * doc/install.texi (amdgcn-*-amdhsa): Renamed
2920 from amdgcn-unknown-amdhsa; change
2921 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
2923 2020-03-23 Richard Biener <rguenther@suse.de>
2926 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
2927 directly rather than also folding it via build_fold_addr_expr.
2929 2020-03-23 Richard Biener <rguenther@suse.de>
2931 PR tree-optimization/94266
2932 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
2933 addresses of TARGET_MEM_REFs.
2935 2020-03-23 Martin Liska <mliska@suse.cz>
2938 * symtab.c (symtab_node::clone_references): Save speculative_id
2939 as ref may be overwritten by create_reference.
2940 (symtab_node::clone_referring): Likewise.
2941 (symtab_node::clone_reference): Likewise.
2943 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
2945 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
2946 references to Darwin.
2947 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
2948 unconditionally and comment on why.
2950 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
2952 * config/darwin.c (darwin_mergeable_constant_section): Collect
2953 section anchor checks into the caller.
2954 (machopic_select_section): Collect section anchor checks into
2955 the determination of 'effective zero-size' objects. When the
2956 size is unknown, assume it is non-zero, and thus return the
2957 'generic' section for the DECL.
2959 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
2962 * gcc/config/darwin.opt: Amend options descriptions.
2964 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
2966 PR rtl-optimization/94052
2967 * lra-constraints.c (simplify_operand_subreg): Reload the inner
2968 register of a paradoxical subreg if simplify_subreg_regno fails
2969 to give a valid hard register for the outer mode.
2971 2020-03-20 Martin Jambor <mjambor@suse.cz>
2973 PR tree-optimization/93435
2974 * params.opt (sra-max-propagations): New parameter.
2975 * tree-sra.c (propagation_budget): New variable.
2976 (budget_for_propagation_access): New function.
2977 (propagate_subaccesses_from_rhs): Use it.
2978 (propagate_subaccesses_from_lhs): Likewise.
2979 (propagate_all_subaccesses): Set up and destroy propagation_budget.
2981 2020-03-20 Carl Love <cel@us.ibm.com>
2984 * gcc/config/rs6000/rs6000.c (rs6000_option_override_internal):
2985 Add check for TARGET_FPRND for Power 7 or newer.
2987 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
2990 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
2991 (cgraph_edge::redirect_callee): Move here; likewise.
2992 (cgraph_node::remove_callees): Update calls_comdat_local flag.
2993 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
2995 (cgraph_node::check_calls_comdat_local_p): New member function.
2996 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
2997 (cgraph_edge::redirect_callee): Move offline.
2998 * ipa-fnsummary.c (compute_fn_summary): Do not compute
2999 calls_comdat_local flag here.
3000 * ipa-inline-transform.c (inline_call): Fix updating of
3001 calls_comdat_local flag.
3002 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
3003 * symtab.c (symtab_node::add_to_same_comdat_group): Update
3004 calls_comdat_local flag.
3006 2020-03-20 Richard Biener <rguenther@suse.de>
3008 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
3009 from the possibly modified root.
3011 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3012 Andre Vieira <andre.simoesdiasvieira@arm.com>
3013 Mihail Ionescu <mihail.ionescu@arm.com>
3015 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
3016 (vst1q_p_s8): Likewise.
3017 (vst2q_s8): Likewise.
3018 (vst2q_u8): Likewise.
3019 (vld1q_z_u8): Likewise.
3020 (vld1q_z_s8): Likewise.
3021 (vld2q_s8): Likewise.
3022 (vld2q_u8): Likewise.
3023 (vld4q_s8): Likewise.
3024 (vld4q_u8): Likewise.
3025 (vst1q_p_u16): Likewise.
3026 (vst1q_p_s16): Likewise.
3027 (vst2q_s16): Likewise.
3028 (vst2q_u16): Likewise.
3029 (vld1q_z_u16): Likewise.
3030 (vld1q_z_s16): Likewise.
3031 (vld2q_s16): Likewise.
3032 (vld2q_u16): Likewise.
3033 (vld4q_s16): Likewise.
3034 (vld4q_u16): Likewise.
3035 (vst1q_p_u32): Likewise.
3036 (vst1q_p_s32): Likewise.
3037 (vst2q_s32): Likewise.
3038 (vst2q_u32): Likewise.
3039 (vld1q_z_u32): Likewise.
3040 (vld1q_z_s32): Likewise.
3041 (vld2q_s32): Likewise.
3042 (vld2q_u32): Likewise.
3043 (vld4q_s32): Likewise.
3044 (vld4q_u32): Likewise.
3045 (vld4q_f16): Likewise.
3046 (vld2q_f16): Likewise.
3047 (vld1q_z_f16): Likewise.
3048 (vst2q_f16): Likewise.
3049 (vst1q_p_f16): Likewise.
3050 (vld4q_f32): Likewise.
3051 (vld2q_f32): Likewise.
3052 (vld1q_z_f32): Likewise.
3053 (vst2q_f32): Likewise.
3054 (vst1q_p_f32): Likewise.
3055 (__arm_vst1q_p_u8): Define intrinsic.
3056 (__arm_vst1q_p_s8): Likewise.
3057 (__arm_vst2q_s8): Likewise.
3058 (__arm_vst2q_u8): Likewise.
3059 (__arm_vld1q_z_u8): Likewise.
3060 (__arm_vld1q_z_s8): Likewise.
3061 (__arm_vld2q_s8): Likewise.
3062 (__arm_vld2q_u8): Likewise.
3063 (__arm_vld4q_s8): Likewise.
3064 (__arm_vld4q_u8): Likewise.
3065 (__arm_vst1q_p_u16): Likewise.
3066 (__arm_vst1q_p_s16): Likewise.
3067 (__arm_vst2q_s16): Likewise.
3068 (__arm_vst2q_u16): Likewise.
3069 (__arm_vld1q_z_u16): Likewise.
3070 (__arm_vld1q_z_s16): Likewise.
3071 (__arm_vld2q_s16): Likewise.
3072 (__arm_vld2q_u16): Likewise.
3073 (__arm_vld4q_s16): Likewise.
3074 (__arm_vld4q_u16): Likewise.
3075 (__arm_vst1q_p_u32): Likewise.
3076 (__arm_vst1q_p_s32): Likewise.
3077 (__arm_vst2q_s32): Likewise.
3078 (__arm_vst2q_u32): Likewise.
3079 (__arm_vld1q_z_u32): Likewise.
3080 (__arm_vld1q_z_s32): Likewise.
3081 (__arm_vld2q_s32): Likewise.
3082 (__arm_vld2q_u32): Likewise.
3083 (__arm_vld4q_s32): Likewise.
3084 (__arm_vld4q_u32): Likewise.
3085 (__arm_vld4q_f16): Likewise.
3086 (__arm_vld2q_f16): Likewise.
3087 (__arm_vld1q_z_f16): Likewise.
3088 (__arm_vst2q_f16): Likewise.
3089 (__arm_vst1q_p_f16): Likewise.
3090 (__arm_vld4q_f32): Likewise.
3091 (__arm_vld2q_f32): Likewise.
3092 (__arm_vld1q_z_f32): Likewise.
3093 (__arm_vst2q_f32): Likewise.
3094 (__arm_vst1q_p_f32): Likewise.
3095 (vld1q_z): Define polymorphic variant.
3098 (vst1q_p): Likewise.
3100 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
3102 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
3103 (mve_vld2q<mode>): Likewise.
3104 (mve_vld4q<mode>): Likewise.
3106 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3107 Andre Vieira <andre.simoesdiasvieira@arm.com>
3108 Mihail Ionescu <mihail.ionescu@arm.com>
3110 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
3111 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
3112 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
3113 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
3114 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
3115 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
3116 * config/arm/arm_mve.h (vadciq_s32): Define macro.
3117 (vadciq_u32): Likewise.
3118 (vadciq_m_s32): Likewise.
3119 (vadciq_m_u32): Likewise.
3120 (vadcq_s32): Likewise.
3121 (vadcq_u32): Likewise.
3122 (vadcq_m_s32): Likewise.
3123 (vadcq_m_u32): Likewise.
3124 (vsbciq_s32): Likewise.
3125 (vsbciq_u32): Likewise.
3126 (vsbciq_m_s32): Likewise.
3127 (vsbciq_m_u32): Likewise.
3128 (vsbcq_s32): Likewise.
3129 (vsbcq_u32): Likewise.
3130 (vsbcq_m_s32): Likewise.
3131 (vsbcq_m_u32): Likewise.
3132 (__arm_vadciq_s32): Define intrinsic.
3133 (__arm_vadciq_u32): Likewise.
3134 (__arm_vadciq_m_s32): Likewise.
3135 (__arm_vadciq_m_u32): Likewise.
3136 (__arm_vadcq_s32): Likewise.
3137 (__arm_vadcq_u32): Likewise.
3138 (__arm_vadcq_m_s32): Likewise.
3139 (__arm_vadcq_m_u32): Likewise.
3140 (__arm_vsbciq_s32): Likewise.
3141 (__arm_vsbciq_u32): Likewise.
3142 (__arm_vsbciq_m_s32): Likewise.
3143 (__arm_vsbciq_m_u32): Likewise.
3144 (__arm_vsbcq_s32): Likewise.
3145 (__arm_vsbcq_u32): Likewise.
3146 (__arm_vsbcq_m_s32): Likewise.
3147 (__arm_vsbcq_m_u32): Likewise.
3148 (vadciq_m): Define polymorphic variant.
3150 (vadcq_m): Likewise.
3152 (vsbciq_m): Likewise.
3154 (vsbcq_m): Likewise.
3156 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
3158 (BINOP_UNONE_UNONE_UNONE): Likewise.
3159 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
3160 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
3161 * config/arm/mve.md (VADCIQ): Define iterator.
3162 (VADCIQ_M): Likewise.
3164 (VSBCQ_M): Likewise.
3166 (VSBCIQ_M): Likewise.
3168 (VADCQ_M): Likewise.
3169 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
3170 (mve_vadciq_<supf>v4si): Likewise.
3171 (mve_vadcq_m_<supf>v4si): Likewise.
3172 (mve_vadcq_<supf>v4si): Likewise.
3173 (mve_vsbciq_m_<supf>v4si): Likewise.
3174 (mve_vsbciq_<supf>v4si): Likewise.
3175 (mve_vsbcq_m_<supf>v4si): Likewise.
3176 (mve_vsbcq_<supf>v4si): Likewise.
3177 (get_fpscr_nzcvqc): Define isns.
3178 (set_fpscr_nzcvqc): Define isns.
3179 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
3180 (UNSPEC_SET_FPSCR_NZCVQC): Define.
3182 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3184 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
3185 (vddupq_x_n_u16): Likewise.
3186 (vddupq_x_n_u32): Likewise.
3187 (vddupq_x_wb_u8): Likewise.
3188 (vddupq_x_wb_u16): Likewise.
3189 (vddupq_x_wb_u32): Likewise.
3190 (vdwdupq_x_n_u8): Likewise.
3191 (vdwdupq_x_n_u16): Likewise.
3192 (vdwdupq_x_n_u32): Likewise.
3193 (vdwdupq_x_wb_u8): Likewise.
3194 (vdwdupq_x_wb_u16): Likewise.
3195 (vdwdupq_x_wb_u32): Likewise.
3196 (vidupq_x_n_u8): Likewise.
3197 (vidupq_x_n_u16): Likewise.
3198 (vidupq_x_n_u32): Likewise.
3199 (vidupq_x_wb_u8): Likewise.
3200 (vidupq_x_wb_u16): Likewise.
3201 (vidupq_x_wb_u32): Likewise.
3202 (viwdupq_x_n_u8): Likewise.
3203 (viwdupq_x_n_u16): Likewise.
3204 (viwdupq_x_n_u32): Likewise.
3205 (viwdupq_x_wb_u8): Likewise.
3206 (viwdupq_x_wb_u16): Likewise.
3207 (viwdupq_x_wb_u32): Likewise.
3208 (vdupq_x_n_s8): Likewise.
3209 (vdupq_x_n_s16): Likewise.
3210 (vdupq_x_n_s32): Likewise.
3211 (vdupq_x_n_u8): Likewise.
3212 (vdupq_x_n_u16): Likewise.
3213 (vdupq_x_n_u32): Likewise.
3214 (vminq_x_s8): Likewise.
3215 (vminq_x_s16): Likewise.
3216 (vminq_x_s32): Likewise.
3217 (vminq_x_u8): Likewise.
3218 (vminq_x_u16): Likewise.
3219 (vminq_x_u32): Likewise.
3220 (vmaxq_x_s8): Likewise.
3221 (vmaxq_x_s16): Likewise.
3222 (vmaxq_x_s32): Likewise.
3223 (vmaxq_x_u8): Likewise.
3224 (vmaxq_x_u16): Likewise.
3225 (vmaxq_x_u32): Likewise.
3226 (vabdq_x_s8): Likewise.
3227 (vabdq_x_s16): Likewise.
3228 (vabdq_x_s32): Likewise.
3229 (vabdq_x_u8): Likewise.
3230 (vabdq_x_u16): Likewise.
3231 (vabdq_x_u32): Likewise.
3232 (vabsq_x_s8): Likewise.
3233 (vabsq_x_s16): Likewise.
3234 (vabsq_x_s32): Likewise.
3235 (vaddq_x_s8): Likewise.
3236 (vaddq_x_s16): Likewise.
3237 (vaddq_x_s32): Likewise.
3238 (vaddq_x_n_s8): Likewise.
3239 (vaddq_x_n_s16): Likewise.
3240 (vaddq_x_n_s32): Likewise.
3241 (vaddq_x_u8): Likewise.
3242 (vaddq_x_u16): Likewise.
3243 (vaddq_x_u32): Likewise.
3244 (vaddq_x_n_u8): Likewise.
3245 (vaddq_x_n_u16): Likewise.
3246 (vaddq_x_n_u32): Likewise.
3247 (vclsq_x_s8): Likewise.
3248 (vclsq_x_s16): Likewise.
3249 (vclsq_x_s32): Likewise.
3250 (vclzq_x_s8): Likewise.
3251 (vclzq_x_s16): Likewise.
3252 (vclzq_x_s32): Likewise.
3253 (vclzq_x_u8): Likewise.
3254 (vclzq_x_u16): Likewise.
3255 (vclzq_x_u32): Likewise.
3256 (vnegq_x_s8): Likewise.
3257 (vnegq_x_s16): Likewise.
3258 (vnegq_x_s32): Likewise.
3259 (vmulhq_x_s8): Likewise.
3260 (vmulhq_x_s16): Likewise.
3261 (vmulhq_x_s32): Likewise.
3262 (vmulhq_x_u8): Likewise.
3263 (vmulhq_x_u16): Likewise.
3264 (vmulhq_x_u32): Likewise.
3265 (vmullbq_poly_x_p8): Likewise.
3266 (vmullbq_poly_x_p16): Likewise.
3267 (vmullbq_int_x_s8): Likewise.
3268 (vmullbq_int_x_s16): Likewise.
3269 (vmullbq_int_x_s32): Likewise.
3270 (vmullbq_int_x_u8): Likewise.
3271 (vmullbq_int_x_u16): Likewise.
3272 (vmullbq_int_x_u32): Likewise.
3273 (vmulltq_poly_x_p8): Likewise.
3274 (vmulltq_poly_x_p16): Likewise.
3275 (vmulltq_int_x_s8): Likewise.
3276 (vmulltq_int_x_s16): Likewise.
3277 (vmulltq_int_x_s32): Likewise.
3278 (vmulltq_int_x_u8): Likewise.
3279 (vmulltq_int_x_u16): Likewise.
3280 (vmulltq_int_x_u32): Likewise.
3281 (vmulq_x_s8): Likewise.
3282 (vmulq_x_s16): Likewise.
3283 (vmulq_x_s32): Likewise.
3284 (vmulq_x_n_s8): Likewise.
3285 (vmulq_x_n_s16): Likewise.
3286 (vmulq_x_n_s32): Likewise.
3287 (vmulq_x_u8): Likewise.
3288 (vmulq_x_u16): Likewise.
3289 (vmulq_x_u32): Likewise.
3290 (vmulq_x_n_u8): Likewise.
3291 (vmulq_x_n_u16): Likewise.
3292 (vmulq_x_n_u32): Likewise.
3293 (vsubq_x_s8): Likewise.
3294 (vsubq_x_s16): Likewise.
3295 (vsubq_x_s32): Likewise.
3296 (vsubq_x_n_s8): Likewise.
3297 (vsubq_x_n_s16): Likewise.
3298 (vsubq_x_n_s32): Likewise.
3299 (vsubq_x_u8): Likewise.
3300 (vsubq_x_u16): Likewise.
3301 (vsubq_x_u32): Likewise.
3302 (vsubq_x_n_u8): Likewise.
3303 (vsubq_x_n_u16): Likewise.
3304 (vsubq_x_n_u32): Likewise.
3305 (vcaddq_rot90_x_s8): Likewise.
3306 (vcaddq_rot90_x_s16): Likewise.
3307 (vcaddq_rot90_x_s32): Likewise.
3308 (vcaddq_rot90_x_u8): Likewise.
3309 (vcaddq_rot90_x_u16): Likewise.
3310 (vcaddq_rot90_x_u32): Likewise.
3311 (vcaddq_rot270_x_s8): Likewise.
3312 (vcaddq_rot270_x_s16): Likewise.
3313 (vcaddq_rot270_x_s32): Likewise.
3314 (vcaddq_rot270_x_u8): Likewise.
3315 (vcaddq_rot270_x_u16): Likewise.
3316 (vcaddq_rot270_x_u32): Likewise.
3317 (vhaddq_x_n_s8): Likewise.
3318 (vhaddq_x_n_s16): Likewise.
3319 (vhaddq_x_n_s32): Likewise.
3320 (vhaddq_x_n_u8): Likewise.
3321 (vhaddq_x_n_u16): Likewise.
3322 (vhaddq_x_n_u32): Likewise.
3323 (vhaddq_x_s8): Likewise.
3324 (vhaddq_x_s16): Likewise.
3325 (vhaddq_x_s32): Likewise.
3326 (vhaddq_x_u8): Likewise.
3327 (vhaddq_x_u16): Likewise.
3328 (vhaddq_x_u32): Likewise.
3329 (vhcaddq_rot90_x_s8): Likewise.
3330 (vhcaddq_rot90_x_s16): Likewise.
3331 (vhcaddq_rot90_x_s32): Likewise.
3332 (vhcaddq_rot270_x_s8): Likewise.
3333 (vhcaddq_rot270_x_s16): Likewise.
3334 (vhcaddq_rot270_x_s32): Likewise.
3335 (vhsubq_x_n_s8): Likewise.
3336 (vhsubq_x_n_s16): Likewise.
3337 (vhsubq_x_n_s32): Likewise.
3338 (vhsubq_x_n_u8): Likewise.
3339 (vhsubq_x_n_u16): Likewise.
3340 (vhsubq_x_n_u32): Likewise.
3341 (vhsubq_x_s8): Likewise.
3342 (vhsubq_x_s16): Likewise.
3343 (vhsubq_x_s32): Likewise.
3344 (vhsubq_x_u8): Likewise.
3345 (vhsubq_x_u16): Likewise.
3346 (vhsubq_x_u32): Likewise.
3347 (vrhaddq_x_s8): Likewise.
3348 (vrhaddq_x_s16): Likewise.
3349 (vrhaddq_x_s32): Likewise.
3350 (vrhaddq_x_u8): Likewise.
3351 (vrhaddq_x_u16): Likewise.
3352 (vrhaddq_x_u32): Likewise.
3353 (vrmulhq_x_s8): Likewise.
3354 (vrmulhq_x_s16): Likewise.
3355 (vrmulhq_x_s32): Likewise.
3356 (vrmulhq_x_u8): Likewise.
3357 (vrmulhq_x_u16): Likewise.
3358 (vrmulhq_x_u32): Likewise.
3359 (vandq_x_s8): Likewise.
3360 (vandq_x_s16): Likewise.
3361 (vandq_x_s32): Likewise.
3362 (vandq_x_u8): Likewise.
3363 (vandq_x_u16): Likewise.
3364 (vandq_x_u32): Likewise.
3365 (vbicq_x_s8): Likewise.
3366 (vbicq_x_s16): Likewise.
3367 (vbicq_x_s32): Likewise.
3368 (vbicq_x_u8): Likewise.
3369 (vbicq_x_u16): Likewise.
3370 (vbicq_x_u32): Likewise.
3371 (vbrsrq_x_n_s8): Likewise.
3372 (vbrsrq_x_n_s16): Likewise.
3373 (vbrsrq_x_n_s32): Likewise.
3374 (vbrsrq_x_n_u8): Likewise.
3375 (vbrsrq_x_n_u16): Likewise.
3376 (vbrsrq_x_n_u32): Likewise.
3377 (veorq_x_s8): Likewise.
3378 (veorq_x_s16): Likewise.
3379 (veorq_x_s32): Likewise.
3380 (veorq_x_u8): Likewise.
3381 (veorq_x_u16): Likewise.
3382 (veorq_x_u32): Likewise.
3383 (vmovlbq_x_s8): Likewise.
3384 (vmovlbq_x_s16): Likewise.
3385 (vmovlbq_x_u8): Likewise.
3386 (vmovlbq_x_u16): Likewise.
3387 (vmovltq_x_s8): Likewise.
3388 (vmovltq_x_s16): Likewise.
3389 (vmovltq_x_u8): Likewise.
3390 (vmovltq_x_u16): Likewise.
3391 (vmvnq_x_s8): Likewise.
3392 (vmvnq_x_s16): Likewise.
3393 (vmvnq_x_s32): Likewise.
3394 (vmvnq_x_u8): Likewise.
3395 (vmvnq_x_u16): Likewise.
3396 (vmvnq_x_u32): Likewise.
3397 (vmvnq_x_n_s16): Likewise.
3398 (vmvnq_x_n_s32): Likewise.
3399 (vmvnq_x_n_u16): Likewise.
3400 (vmvnq_x_n_u32): Likewise.
3401 (vornq_x_s8): Likewise.
3402 (vornq_x_s16): Likewise.
3403 (vornq_x_s32): Likewise.
3404 (vornq_x_u8): Likewise.
3405 (vornq_x_u16): Likewise.
3406 (vornq_x_u32): Likewise.
3407 (vorrq_x_s8): Likewise.
3408 (vorrq_x_s16): Likewise.
3409 (vorrq_x_s32): Likewise.
3410 (vorrq_x_u8): Likewise.
3411 (vorrq_x_u16): Likewise.
3412 (vorrq_x_u32): Likewise.
3413 (vrev16q_x_s8): Likewise.
3414 (vrev16q_x_u8): Likewise.
3415 (vrev32q_x_s8): Likewise.
3416 (vrev32q_x_s16): Likewise.
3417 (vrev32q_x_u8): Likewise.
3418 (vrev32q_x_u16): Likewise.
3419 (vrev64q_x_s8): Likewise.
3420 (vrev64q_x_s16): Likewise.
3421 (vrev64q_x_s32): Likewise.
3422 (vrev64q_x_u8): Likewise.
3423 (vrev64q_x_u16): Likewise.
3424 (vrev64q_x_u32): Likewise.
3425 (vrshlq_x_s8): Likewise.
3426 (vrshlq_x_s16): Likewise.
3427 (vrshlq_x_s32): Likewise.
3428 (vrshlq_x_u8): Likewise.
3429 (vrshlq_x_u16): Likewise.
3430 (vrshlq_x_u32): Likewise.
3431 (vshllbq_x_n_s8): Likewise.
3432 (vshllbq_x_n_s16): Likewise.
3433 (vshllbq_x_n_u8): Likewise.
3434 (vshllbq_x_n_u16): Likewise.
3435 (vshlltq_x_n_s8): Likewise.
3436 (vshlltq_x_n_s16): Likewise.
3437 (vshlltq_x_n_u8): Likewise.
3438 (vshlltq_x_n_u16): Likewise.
3439 (vshlq_x_s8): Likewise.
3440 (vshlq_x_s16): Likewise.
3441 (vshlq_x_s32): Likewise.
3442 (vshlq_x_u8): Likewise.
3443 (vshlq_x_u16): Likewise.
3444 (vshlq_x_u32): Likewise.
3445 (vshlq_x_n_s8): Likewise.
3446 (vshlq_x_n_s16): Likewise.
3447 (vshlq_x_n_s32): Likewise.
3448 (vshlq_x_n_u8): Likewise.
3449 (vshlq_x_n_u16): Likewise.
3450 (vshlq_x_n_u32): Likewise.
3451 (vrshrq_x_n_s8): Likewise.
3452 (vrshrq_x_n_s16): Likewise.
3453 (vrshrq_x_n_s32): Likewise.
3454 (vrshrq_x_n_u8): Likewise.
3455 (vrshrq_x_n_u16): Likewise.
3456 (vrshrq_x_n_u32): Likewise.
3457 (vshrq_x_n_s8): Likewise.
3458 (vshrq_x_n_s16): Likewise.
3459 (vshrq_x_n_s32): Likewise.
3460 (vshrq_x_n_u8): Likewise.
3461 (vshrq_x_n_u16): Likewise.
3462 (vshrq_x_n_u32): Likewise.
3463 (vdupq_x_n_f16): Likewise.
3464 (vdupq_x_n_f32): Likewise.
3465 (vminnmq_x_f16): Likewise.
3466 (vminnmq_x_f32): Likewise.
3467 (vmaxnmq_x_f16): Likewise.
3468 (vmaxnmq_x_f32): Likewise.
3469 (vabdq_x_f16): Likewise.
3470 (vabdq_x_f32): Likewise.
3471 (vabsq_x_f16): Likewise.
3472 (vabsq_x_f32): Likewise.
3473 (vaddq_x_f16): Likewise.
3474 (vaddq_x_f32): Likewise.
3475 (vaddq_x_n_f16): Likewise.
3476 (vaddq_x_n_f32): Likewise.
3477 (vnegq_x_f16): Likewise.
3478 (vnegq_x_f32): Likewise.
3479 (vmulq_x_f16): Likewise.
3480 (vmulq_x_f32): Likewise.
3481 (vmulq_x_n_f16): Likewise.
3482 (vmulq_x_n_f32): Likewise.
3483 (vsubq_x_f16): Likewise.
3484 (vsubq_x_f32): Likewise.
3485 (vsubq_x_n_f16): Likewise.
3486 (vsubq_x_n_f32): Likewise.
3487 (vcaddq_rot90_x_f16): Likewise.
3488 (vcaddq_rot90_x_f32): Likewise.
3489 (vcaddq_rot270_x_f16): Likewise.
3490 (vcaddq_rot270_x_f32): Likewise.
3491 (vcmulq_x_f16): Likewise.
3492 (vcmulq_x_f32): Likewise.
3493 (vcmulq_rot90_x_f16): Likewise.
3494 (vcmulq_rot90_x_f32): Likewise.
3495 (vcmulq_rot180_x_f16): Likewise.
3496 (vcmulq_rot180_x_f32): Likewise.
3497 (vcmulq_rot270_x_f16): Likewise.
3498 (vcmulq_rot270_x_f32): Likewise.
3499 (vcvtaq_x_s16_f16): Likewise.
3500 (vcvtaq_x_s32_f32): Likewise.
3501 (vcvtaq_x_u16_f16): Likewise.
3502 (vcvtaq_x_u32_f32): Likewise.
3503 (vcvtnq_x_s16_f16): Likewise.
3504 (vcvtnq_x_s32_f32): Likewise.
3505 (vcvtnq_x_u16_f16): Likewise.
3506 (vcvtnq_x_u32_f32): Likewise.
3507 (vcvtpq_x_s16_f16): Likewise.
3508 (vcvtpq_x_s32_f32): Likewise.
3509 (vcvtpq_x_u16_f16): Likewise.
3510 (vcvtpq_x_u32_f32): Likewise.
3511 (vcvtmq_x_s16_f16): Likewise.
3512 (vcvtmq_x_s32_f32): Likewise.
3513 (vcvtmq_x_u16_f16): Likewise.
3514 (vcvtmq_x_u32_f32): Likewise.
3515 (vcvtbq_x_f32_f16): Likewise.
3516 (vcvttq_x_f32_f16): Likewise.
3517 (vcvtq_x_f16_u16): Likewise.
3518 (vcvtq_x_f16_s16): Likewise.
3519 (vcvtq_x_f32_s32): Likewise.
3520 (vcvtq_x_f32_u32): Likewise.
3521 (vcvtq_x_n_f16_s16): Likewise.
3522 (vcvtq_x_n_f16_u16): Likewise.
3523 (vcvtq_x_n_f32_s32): Likewise.
3524 (vcvtq_x_n_f32_u32): Likewise.
3525 (vcvtq_x_s16_f16): Likewise.
3526 (vcvtq_x_s32_f32): Likewise.
3527 (vcvtq_x_u16_f16): Likewise.
3528 (vcvtq_x_u32_f32): Likewise.
3529 (vcvtq_x_n_s16_f16): Likewise.
3530 (vcvtq_x_n_s32_f32): Likewise.
3531 (vcvtq_x_n_u16_f16): Likewise.
3532 (vcvtq_x_n_u32_f32): Likewise.
3533 (vrndq_x_f16): Likewise.
3534 (vrndq_x_f32): Likewise.
3535 (vrndnq_x_f16): Likewise.
3536 (vrndnq_x_f32): Likewise.
3537 (vrndmq_x_f16): Likewise.
3538 (vrndmq_x_f32): Likewise.
3539 (vrndpq_x_f16): Likewise.
3540 (vrndpq_x_f32): Likewise.
3541 (vrndaq_x_f16): Likewise.
3542 (vrndaq_x_f32): Likewise.
3543 (vrndxq_x_f16): Likewise.
3544 (vrndxq_x_f32): Likewise.
3545 (vandq_x_f16): Likewise.
3546 (vandq_x_f32): Likewise.
3547 (vbicq_x_f16): Likewise.
3548 (vbicq_x_f32): Likewise.
3549 (vbrsrq_x_n_f16): Likewise.
3550 (vbrsrq_x_n_f32): Likewise.
3551 (veorq_x_f16): Likewise.
3552 (veorq_x_f32): Likewise.
3553 (vornq_x_f16): Likewise.
3554 (vornq_x_f32): Likewise.
3555 (vorrq_x_f16): Likewise.
3556 (vorrq_x_f32): Likewise.
3557 (vrev32q_x_f16): Likewise.
3558 (vrev64q_x_f16): Likewise.
3559 (vrev64q_x_f32): Likewise.
3560 (__arm_vddupq_x_n_u8): Define intrinsic.
3561 (__arm_vddupq_x_n_u16): Likewise.
3562 (__arm_vddupq_x_n_u32): Likewise.
3563 (__arm_vddupq_x_wb_u8): Likewise.
3564 (__arm_vddupq_x_wb_u16): Likewise.
3565 (__arm_vddupq_x_wb_u32): Likewise.
3566 (__arm_vdwdupq_x_n_u8): Likewise.
3567 (__arm_vdwdupq_x_n_u16): Likewise.
3568 (__arm_vdwdupq_x_n_u32): Likewise.
3569 (__arm_vdwdupq_x_wb_u8): Likewise.
3570 (__arm_vdwdupq_x_wb_u16): Likewise.
3571 (__arm_vdwdupq_x_wb_u32): Likewise.
3572 (__arm_vidupq_x_n_u8): Likewise.
3573 (__arm_vidupq_x_n_u16): Likewise.
3574 (__arm_vidupq_x_n_u32): Likewise.
3575 (__arm_vidupq_x_wb_u8): Likewise.
3576 (__arm_vidupq_x_wb_u16): Likewise.
3577 (__arm_vidupq_x_wb_u32): Likewise.
3578 (__arm_viwdupq_x_n_u8): Likewise.
3579 (__arm_viwdupq_x_n_u16): Likewise.
3580 (__arm_viwdupq_x_n_u32): Likewise.
3581 (__arm_viwdupq_x_wb_u8): Likewise.
3582 (__arm_viwdupq_x_wb_u16): Likewise.
3583 (__arm_viwdupq_x_wb_u32): Likewise.
3584 (__arm_vdupq_x_n_s8): Likewise.
3585 (__arm_vdupq_x_n_s16): Likewise.
3586 (__arm_vdupq_x_n_s32): Likewise.
3587 (__arm_vdupq_x_n_u8): Likewise.
3588 (__arm_vdupq_x_n_u16): Likewise.
3589 (__arm_vdupq_x_n_u32): Likewise.
3590 (__arm_vminq_x_s8): Likewise.
3591 (__arm_vminq_x_s16): Likewise.
3592 (__arm_vminq_x_s32): Likewise.
3593 (__arm_vminq_x_u8): Likewise.
3594 (__arm_vminq_x_u16): Likewise.
3595 (__arm_vminq_x_u32): Likewise.
3596 (__arm_vmaxq_x_s8): Likewise.
3597 (__arm_vmaxq_x_s16): Likewise.
3598 (__arm_vmaxq_x_s32): Likewise.
3599 (__arm_vmaxq_x_u8): Likewise.
3600 (__arm_vmaxq_x_u16): Likewise.
3601 (__arm_vmaxq_x_u32): Likewise.
3602 (__arm_vabdq_x_s8): Likewise.
3603 (__arm_vabdq_x_s16): Likewise.
3604 (__arm_vabdq_x_s32): Likewise.
3605 (__arm_vabdq_x_u8): Likewise.
3606 (__arm_vabdq_x_u16): Likewise.
3607 (__arm_vabdq_x_u32): Likewise.
3608 (__arm_vabsq_x_s8): Likewise.
3609 (__arm_vabsq_x_s16): Likewise.
3610 (__arm_vabsq_x_s32): Likewise.
3611 (__arm_vaddq_x_s8): Likewise.
3612 (__arm_vaddq_x_s16): Likewise.
3613 (__arm_vaddq_x_s32): Likewise.
3614 (__arm_vaddq_x_n_s8): Likewise.
3615 (__arm_vaddq_x_n_s16): Likewise.
3616 (__arm_vaddq_x_n_s32): Likewise.
3617 (__arm_vaddq_x_u8): Likewise.
3618 (__arm_vaddq_x_u16): Likewise.
3619 (__arm_vaddq_x_u32): Likewise.
3620 (__arm_vaddq_x_n_u8): Likewise.
3621 (__arm_vaddq_x_n_u16): Likewise.
3622 (__arm_vaddq_x_n_u32): Likewise.
3623 (__arm_vclsq_x_s8): Likewise.
3624 (__arm_vclsq_x_s16): Likewise.
3625 (__arm_vclsq_x_s32): Likewise.
3626 (__arm_vclzq_x_s8): Likewise.
3627 (__arm_vclzq_x_s16): Likewise.
3628 (__arm_vclzq_x_s32): Likewise.
3629 (__arm_vclzq_x_u8): Likewise.
3630 (__arm_vclzq_x_u16): Likewise.
3631 (__arm_vclzq_x_u32): Likewise.
3632 (__arm_vnegq_x_s8): Likewise.
3633 (__arm_vnegq_x_s16): Likewise.
3634 (__arm_vnegq_x_s32): Likewise.
3635 (__arm_vmulhq_x_s8): Likewise.
3636 (__arm_vmulhq_x_s16): Likewise.
3637 (__arm_vmulhq_x_s32): Likewise.
3638 (__arm_vmulhq_x_u8): Likewise.
3639 (__arm_vmulhq_x_u16): Likewise.
3640 (__arm_vmulhq_x_u32): Likewise.
3641 (__arm_vmullbq_poly_x_p8): Likewise.
3642 (__arm_vmullbq_poly_x_p16): Likewise.
3643 (__arm_vmullbq_int_x_s8): Likewise.
3644 (__arm_vmullbq_int_x_s16): Likewise.
3645 (__arm_vmullbq_int_x_s32): Likewise.
3646 (__arm_vmullbq_int_x_u8): Likewise.
3647 (__arm_vmullbq_int_x_u16): Likewise.
3648 (__arm_vmullbq_int_x_u32): Likewise.
3649 (__arm_vmulltq_poly_x_p8): Likewise.
3650 (__arm_vmulltq_poly_x_p16): Likewise.
3651 (__arm_vmulltq_int_x_s8): Likewise.
3652 (__arm_vmulltq_int_x_s16): Likewise.
3653 (__arm_vmulltq_int_x_s32): Likewise.
3654 (__arm_vmulltq_int_x_u8): Likewise.
3655 (__arm_vmulltq_int_x_u16): Likewise.
3656 (__arm_vmulltq_int_x_u32): Likewise.
3657 (__arm_vmulq_x_s8): Likewise.
3658 (__arm_vmulq_x_s16): Likewise.
3659 (__arm_vmulq_x_s32): Likewise.
3660 (__arm_vmulq_x_n_s8): Likewise.
3661 (__arm_vmulq_x_n_s16): Likewise.
3662 (__arm_vmulq_x_n_s32): Likewise.
3663 (__arm_vmulq_x_u8): Likewise.
3664 (__arm_vmulq_x_u16): Likewise.
3665 (__arm_vmulq_x_u32): Likewise.
3666 (__arm_vmulq_x_n_u8): Likewise.
3667 (__arm_vmulq_x_n_u16): Likewise.
3668 (__arm_vmulq_x_n_u32): Likewise.
3669 (__arm_vsubq_x_s8): Likewise.
3670 (__arm_vsubq_x_s16): Likewise.
3671 (__arm_vsubq_x_s32): Likewise.
3672 (__arm_vsubq_x_n_s8): Likewise.
3673 (__arm_vsubq_x_n_s16): Likewise.
3674 (__arm_vsubq_x_n_s32): Likewise.
3675 (__arm_vsubq_x_u8): Likewise.
3676 (__arm_vsubq_x_u16): Likewise.
3677 (__arm_vsubq_x_u32): Likewise.
3678 (__arm_vsubq_x_n_u8): Likewise.
3679 (__arm_vsubq_x_n_u16): Likewise.
3680 (__arm_vsubq_x_n_u32): Likewise.
3681 (__arm_vcaddq_rot90_x_s8): Likewise.
3682 (__arm_vcaddq_rot90_x_s16): Likewise.
3683 (__arm_vcaddq_rot90_x_s32): Likewise.
3684 (__arm_vcaddq_rot90_x_u8): Likewise.
3685 (__arm_vcaddq_rot90_x_u16): Likewise.
3686 (__arm_vcaddq_rot90_x_u32): Likewise.
3687 (__arm_vcaddq_rot270_x_s8): Likewise.
3688 (__arm_vcaddq_rot270_x_s16): Likewise.
3689 (__arm_vcaddq_rot270_x_s32): Likewise.
3690 (__arm_vcaddq_rot270_x_u8): Likewise.
3691 (__arm_vcaddq_rot270_x_u16): Likewise.
3692 (__arm_vcaddq_rot270_x_u32): Likewise.
3693 (__arm_vhaddq_x_n_s8): Likewise.
3694 (__arm_vhaddq_x_n_s16): Likewise.
3695 (__arm_vhaddq_x_n_s32): Likewise.
3696 (__arm_vhaddq_x_n_u8): Likewise.
3697 (__arm_vhaddq_x_n_u16): Likewise.
3698 (__arm_vhaddq_x_n_u32): Likewise.
3699 (__arm_vhaddq_x_s8): Likewise.
3700 (__arm_vhaddq_x_s16): Likewise.
3701 (__arm_vhaddq_x_s32): Likewise.
3702 (__arm_vhaddq_x_u8): Likewise.
3703 (__arm_vhaddq_x_u16): Likewise.
3704 (__arm_vhaddq_x_u32): Likewise.
3705 (__arm_vhcaddq_rot90_x_s8): Likewise.
3706 (__arm_vhcaddq_rot90_x_s16): Likewise.
3707 (__arm_vhcaddq_rot90_x_s32): Likewise.
3708 (__arm_vhcaddq_rot270_x_s8): Likewise.
3709 (__arm_vhcaddq_rot270_x_s16): Likewise.
3710 (__arm_vhcaddq_rot270_x_s32): Likewise.
3711 (__arm_vhsubq_x_n_s8): Likewise.
3712 (__arm_vhsubq_x_n_s16): Likewise.
3713 (__arm_vhsubq_x_n_s32): Likewise.
3714 (__arm_vhsubq_x_n_u8): Likewise.
3715 (__arm_vhsubq_x_n_u16): Likewise.
3716 (__arm_vhsubq_x_n_u32): Likewise.
3717 (__arm_vhsubq_x_s8): Likewise.
3718 (__arm_vhsubq_x_s16): Likewise.
3719 (__arm_vhsubq_x_s32): Likewise.
3720 (__arm_vhsubq_x_u8): Likewise.
3721 (__arm_vhsubq_x_u16): Likewise.
3722 (__arm_vhsubq_x_u32): Likewise.
3723 (__arm_vrhaddq_x_s8): Likewise.
3724 (__arm_vrhaddq_x_s16): Likewise.
3725 (__arm_vrhaddq_x_s32): Likewise.
3726 (__arm_vrhaddq_x_u8): Likewise.
3727 (__arm_vrhaddq_x_u16): Likewise.
3728 (__arm_vrhaddq_x_u32): Likewise.
3729 (__arm_vrmulhq_x_s8): Likewise.
3730 (__arm_vrmulhq_x_s16): Likewise.
3731 (__arm_vrmulhq_x_s32): Likewise.
3732 (__arm_vrmulhq_x_u8): Likewise.
3733 (__arm_vrmulhq_x_u16): Likewise.
3734 (__arm_vrmulhq_x_u32): Likewise.
3735 (__arm_vandq_x_s8): Likewise.
3736 (__arm_vandq_x_s16): Likewise.
3737 (__arm_vandq_x_s32): Likewise.
3738 (__arm_vandq_x_u8): Likewise.
3739 (__arm_vandq_x_u16): Likewise.
3740 (__arm_vandq_x_u32): Likewise.
3741 (__arm_vbicq_x_s8): Likewise.
3742 (__arm_vbicq_x_s16): Likewise.
3743 (__arm_vbicq_x_s32): Likewise.
3744 (__arm_vbicq_x_u8): Likewise.
3745 (__arm_vbicq_x_u16): Likewise.
3746 (__arm_vbicq_x_u32): Likewise.
3747 (__arm_vbrsrq_x_n_s8): Likewise.
3748 (__arm_vbrsrq_x_n_s16): Likewise.
3749 (__arm_vbrsrq_x_n_s32): Likewise.
3750 (__arm_vbrsrq_x_n_u8): Likewise.
3751 (__arm_vbrsrq_x_n_u16): Likewise.
3752 (__arm_vbrsrq_x_n_u32): Likewise.
3753 (__arm_veorq_x_s8): Likewise.
3754 (__arm_veorq_x_s16): Likewise.
3755 (__arm_veorq_x_s32): Likewise.
3756 (__arm_veorq_x_u8): Likewise.
3757 (__arm_veorq_x_u16): Likewise.
3758 (__arm_veorq_x_u32): Likewise.
3759 (__arm_vmovlbq_x_s8): Likewise.
3760 (__arm_vmovlbq_x_s16): Likewise.
3761 (__arm_vmovlbq_x_u8): Likewise.
3762 (__arm_vmovlbq_x_u16): Likewise.
3763 (__arm_vmovltq_x_s8): Likewise.
3764 (__arm_vmovltq_x_s16): Likewise.
3765 (__arm_vmovltq_x_u8): Likewise.
3766 (__arm_vmovltq_x_u16): Likewise.
3767 (__arm_vmvnq_x_s8): Likewise.
3768 (__arm_vmvnq_x_s16): Likewise.
3769 (__arm_vmvnq_x_s32): Likewise.
3770 (__arm_vmvnq_x_u8): Likewise.
3771 (__arm_vmvnq_x_u16): Likewise.
3772 (__arm_vmvnq_x_u32): Likewise.
3773 (__arm_vmvnq_x_n_s16): Likewise.
3774 (__arm_vmvnq_x_n_s32): Likewise.
3775 (__arm_vmvnq_x_n_u16): Likewise.
3776 (__arm_vmvnq_x_n_u32): Likewise.
3777 (__arm_vornq_x_s8): Likewise.
3778 (__arm_vornq_x_s16): Likewise.
3779 (__arm_vornq_x_s32): Likewise.
3780 (__arm_vornq_x_u8): Likewise.
3781 (__arm_vornq_x_u16): Likewise.
3782 (__arm_vornq_x_u32): Likewise.
3783 (__arm_vorrq_x_s8): Likewise.
3784 (__arm_vorrq_x_s16): Likewise.
3785 (__arm_vorrq_x_s32): Likewise.
3786 (__arm_vorrq_x_u8): Likewise.
3787 (__arm_vorrq_x_u16): Likewise.
3788 (__arm_vorrq_x_u32): Likewise.
3789 (__arm_vrev16q_x_s8): Likewise.
3790 (__arm_vrev16q_x_u8): Likewise.
3791 (__arm_vrev32q_x_s8): Likewise.
3792 (__arm_vrev32q_x_s16): Likewise.
3793 (__arm_vrev32q_x_u8): Likewise.
3794 (__arm_vrev32q_x_u16): Likewise.
3795 (__arm_vrev64q_x_s8): Likewise.
3796 (__arm_vrev64q_x_s16): Likewise.
3797 (__arm_vrev64q_x_s32): Likewise.
3798 (__arm_vrev64q_x_u8): Likewise.
3799 (__arm_vrev64q_x_u16): Likewise.
3800 (__arm_vrev64q_x_u32): Likewise.
3801 (__arm_vrshlq_x_s8): Likewise.
3802 (__arm_vrshlq_x_s16): Likewise.
3803 (__arm_vrshlq_x_s32): Likewise.
3804 (__arm_vrshlq_x_u8): Likewise.
3805 (__arm_vrshlq_x_u16): Likewise.
3806 (__arm_vrshlq_x_u32): Likewise.
3807 (__arm_vshllbq_x_n_s8): Likewise.
3808 (__arm_vshllbq_x_n_s16): Likewise.
3809 (__arm_vshllbq_x_n_u8): Likewise.
3810 (__arm_vshllbq_x_n_u16): Likewise.
3811 (__arm_vshlltq_x_n_s8): Likewise.
3812 (__arm_vshlltq_x_n_s16): Likewise.
3813 (__arm_vshlltq_x_n_u8): Likewise.
3814 (__arm_vshlltq_x_n_u16): Likewise.
3815 (__arm_vshlq_x_s8): Likewise.
3816 (__arm_vshlq_x_s16): Likewise.
3817 (__arm_vshlq_x_s32): Likewise.
3818 (__arm_vshlq_x_u8): Likewise.
3819 (__arm_vshlq_x_u16): Likewise.
3820 (__arm_vshlq_x_u32): Likewise.
3821 (__arm_vshlq_x_n_s8): Likewise.
3822 (__arm_vshlq_x_n_s16): Likewise.
3823 (__arm_vshlq_x_n_s32): Likewise.
3824 (__arm_vshlq_x_n_u8): Likewise.
3825 (__arm_vshlq_x_n_u16): Likewise.
3826 (__arm_vshlq_x_n_u32): Likewise.
3827 (__arm_vrshrq_x_n_s8): Likewise.
3828 (__arm_vrshrq_x_n_s16): Likewise.
3829 (__arm_vrshrq_x_n_s32): Likewise.
3830 (__arm_vrshrq_x_n_u8): Likewise.
3831 (__arm_vrshrq_x_n_u16): Likewise.
3832 (__arm_vrshrq_x_n_u32): Likewise.
3833 (__arm_vshrq_x_n_s8): Likewise.
3834 (__arm_vshrq_x_n_s16): Likewise.
3835 (__arm_vshrq_x_n_s32): Likewise.
3836 (__arm_vshrq_x_n_u8): Likewise.
3837 (__arm_vshrq_x_n_u16): Likewise.
3838 (__arm_vshrq_x_n_u32): Likewise.
3839 (__arm_vdupq_x_n_f16): Likewise.
3840 (__arm_vdupq_x_n_f32): Likewise.
3841 (__arm_vminnmq_x_f16): Likewise.
3842 (__arm_vminnmq_x_f32): Likewise.
3843 (__arm_vmaxnmq_x_f16): Likewise.
3844 (__arm_vmaxnmq_x_f32): Likewise.
3845 (__arm_vabdq_x_f16): Likewise.
3846 (__arm_vabdq_x_f32): Likewise.
3847 (__arm_vabsq_x_f16): Likewise.
3848 (__arm_vabsq_x_f32): Likewise.
3849 (__arm_vaddq_x_f16): Likewise.
3850 (__arm_vaddq_x_f32): Likewise.
3851 (__arm_vaddq_x_n_f16): Likewise.
3852 (__arm_vaddq_x_n_f32): Likewise.
3853 (__arm_vnegq_x_f16): Likewise.
3854 (__arm_vnegq_x_f32): Likewise.
3855 (__arm_vmulq_x_f16): Likewise.
3856 (__arm_vmulq_x_f32): Likewise.
3857 (__arm_vmulq_x_n_f16): Likewise.
3858 (__arm_vmulq_x_n_f32): Likewise.
3859 (__arm_vsubq_x_f16): Likewise.
3860 (__arm_vsubq_x_f32): Likewise.
3861 (__arm_vsubq_x_n_f16): Likewise.
3862 (__arm_vsubq_x_n_f32): Likewise.
3863 (__arm_vcaddq_rot90_x_f16): Likewise.
3864 (__arm_vcaddq_rot90_x_f32): Likewise.
3865 (__arm_vcaddq_rot270_x_f16): Likewise.
3866 (__arm_vcaddq_rot270_x_f32): Likewise.
3867 (__arm_vcmulq_x_f16): Likewise.
3868 (__arm_vcmulq_x_f32): Likewise.
3869 (__arm_vcmulq_rot90_x_f16): Likewise.
3870 (__arm_vcmulq_rot90_x_f32): Likewise.
3871 (__arm_vcmulq_rot180_x_f16): Likewise.
3872 (__arm_vcmulq_rot180_x_f32): Likewise.
3873 (__arm_vcmulq_rot270_x_f16): Likewise.
3874 (__arm_vcmulq_rot270_x_f32): Likewise.
3875 (__arm_vcvtaq_x_s16_f16): Likewise.
3876 (__arm_vcvtaq_x_s32_f32): Likewise.
3877 (__arm_vcvtaq_x_u16_f16): Likewise.
3878 (__arm_vcvtaq_x_u32_f32): Likewise.
3879 (__arm_vcvtnq_x_s16_f16): Likewise.
3880 (__arm_vcvtnq_x_s32_f32): Likewise.
3881 (__arm_vcvtnq_x_u16_f16): Likewise.
3882 (__arm_vcvtnq_x_u32_f32): Likewise.
3883 (__arm_vcvtpq_x_s16_f16): Likewise.
3884 (__arm_vcvtpq_x_s32_f32): Likewise.
3885 (__arm_vcvtpq_x_u16_f16): Likewise.
3886 (__arm_vcvtpq_x_u32_f32): Likewise.
3887 (__arm_vcvtmq_x_s16_f16): Likewise.
3888 (__arm_vcvtmq_x_s32_f32): Likewise.
3889 (__arm_vcvtmq_x_u16_f16): Likewise.
3890 (__arm_vcvtmq_x_u32_f32): Likewise.
3891 (__arm_vcvtbq_x_f32_f16): Likewise.
3892 (__arm_vcvttq_x_f32_f16): Likewise.
3893 (__arm_vcvtq_x_f16_u16): Likewise.
3894 (__arm_vcvtq_x_f16_s16): Likewise.
3895 (__arm_vcvtq_x_f32_s32): Likewise.
3896 (__arm_vcvtq_x_f32_u32): Likewise.
3897 (__arm_vcvtq_x_n_f16_s16): Likewise.
3898 (__arm_vcvtq_x_n_f16_u16): Likewise.
3899 (__arm_vcvtq_x_n_f32_s32): Likewise.
3900 (__arm_vcvtq_x_n_f32_u32): Likewise.
3901 (__arm_vcvtq_x_s16_f16): Likewise.
3902 (__arm_vcvtq_x_s32_f32): Likewise.
3903 (__arm_vcvtq_x_u16_f16): Likewise.
3904 (__arm_vcvtq_x_u32_f32): Likewise.
3905 (__arm_vcvtq_x_n_s16_f16): Likewise.
3906 (__arm_vcvtq_x_n_s32_f32): Likewise.
3907 (__arm_vcvtq_x_n_u16_f16): Likewise.
3908 (__arm_vcvtq_x_n_u32_f32): Likewise.
3909 (__arm_vrndq_x_f16): Likewise.
3910 (__arm_vrndq_x_f32): Likewise.
3911 (__arm_vrndnq_x_f16): Likewise.
3912 (__arm_vrndnq_x_f32): Likewise.
3913 (__arm_vrndmq_x_f16): Likewise.
3914 (__arm_vrndmq_x_f32): Likewise.
3915 (__arm_vrndpq_x_f16): Likewise.
3916 (__arm_vrndpq_x_f32): Likewise.
3917 (__arm_vrndaq_x_f16): Likewise.
3918 (__arm_vrndaq_x_f32): Likewise.
3919 (__arm_vrndxq_x_f16): Likewise.
3920 (__arm_vrndxq_x_f32): Likewise.
3921 (__arm_vandq_x_f16): Likewise.
3922 (__arm_vandq_x_f32): Likewise.
3923 (__arm_vbicq_x_f16): Likewise.
3924 (__arm_vbicq_x_f32): Likewise.
3925 (__arm_vbrsrq_x_n_f16): Likewise.
3926 (__arm_vbrsrq_x_n_f32): Likewise.
3927 (__arm_veorq_x_f16): Likewise.
3928 (__arm_veorq_x_f32): Likewise.
3929 (__arm_vornq_x_f16): Likewise.
3930 (__arm_vornq_x_f32): Likewise.
3931 (__arm_vorrq_x_f16): Likewise.
3932 (__arm_vorrq_x_f32): Likewise.
3933 (__arm_vrev32q_x_f16): Likewise.
3934 (__arm_vrev64q_x_f16): Likewise.
3935 (__arm_vrev64q_x_f32): Likewise.
3936 (vabdq_x): Define polymorphic variant.
3937 (vabsq_x): Likewise.
3938 (vaddq_x): Likewise.
3939 (vandq_x): Likewise.
3940 (vbicq_x): Likewise.
3941 (vbrsrq_x): Likewise.
3942 (vcaddq_rot270_x): Likewise.
3943 (vcaddq_rot90_x): Likewise.
3944 (vcmulq_rot180_x): Likewise.
3945 (vcmulq_rot270_x): Likewise.
3946 (vcmulq_x): Likewise.
3947 (vcvtq_x): Likewise.
3948 (vcvtq_x_n): Likewise.
3949 (vcvtnq_m): Likewise.
3950 (veorq_x): Likewise.
3951 (vmaxnmq_x): Likewise.
3952 (vminnmq_x): Likewise.
3953 (vmulq_x): Likewise.
3954 (vnegq_x): Likewise.
3955 (vornq_x): Likewise.
3956 (vorrq_x): Likewise.
3957 (vrev32q_x): Likewise.
3958 (vrev64q_x): Likewise.
3959 (vrndaq_x): Likewise.
3960 (vrndmq_x): Likewise.
3961 (vrndnq_x): Likewise.
3962 (vrndpq_x): Likewise.
3963 (vrndq_x): Likewise.
3964 (vrndxq_x): Likewise.
3965 (vsubq_x): Likewise.
3966 (vcmulq_rot90_x): Likewise.
3968 (vclsq_x): Likewise.
3969 (vclzq_x): Likewise.
3970 (vhaddq_x): Likewise.
3971 (vhcaddq_rot270_x): Likewise.
3972 (vhcaddq_rot90_x): Likewise.
3973 (vhsubq_x): Likewise.
3974 (vmaxq_x): Likewise.
3975 (vminq_x): Likewise.
3976 (vmovlbq_x): Likewise.
3977 (vmovltq_x): Likewise.
3978 (vmulhq_x): Likewise.
3979 (vmullbq_int_x): Likewise.
3980 (vmullbq_poly_x): Likewise.
3981 (vmulltq_int_x): Likewise.
3982 (vmulltq_poly_x): Likewise.
3983 (vmvnq_x): Likewise.
3984 (vrev16q_x): Likewise.
3985 (vrhaddq_x): Likewise.
3986 (vrmulhq_x): Likewise.
3987 (vrshlq_x): Likewise.
3988 (vrshrq_x): Likewise.
3989 (vshllbq_x): Likewise.
3990 (vshlltq_x): Likewise.
3991 (vshlq_x_n): Likewise.
3992 (vshlq_x): Likewise.
3993 (vdwdupq_x_u8): Likewise.
3994 (vdwdupq_x_u16): Likewise.
3995 (vdwdupq_x_u32): Likewise.
3996 (viwdupq_x_u8): Likewise.
3997 (viwdupq_x_u16): Likewise.
3998 (viwdupq_x_u32): Likewise.
3999 (vidupq_x_u8): Likewise.
4000 (vddupq_x_u8): Likewise.
4001 (vidupq_x_u16): Likewise.
4002 (vddupq_x_u16): Likewise.
4003 (vidupq_x_u32): Likewise.
4004 (vddupq_x_u32): Likewise.
4005 (vshrq_x): Likewise.
4007 2020-03-20 Richard Biener <rguenther@suse.de>
4009 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
4010 to vectorize for CTOR defs.
4012 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4013 Andre Vieira <andre.simoesdiasvieira@arm.com>
4014 Mihail Ionescu <mihail.ionescu@arm.com>
4016 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
4018 (LDRGBWBU_QUALIFIERS): Likewise.
4019 (LDRGBWBS_Z_QUALIFIERS): Likewise.
4020 (LDRGBWBU_Z_QUALIFIERS): Likewise.
4021 (STRSBWBS_QUALIFIERS): Likewise.
4022 (STRSBWBU_QUALIFIERS): Likewise.
4023 (STRSBWBS_P_QUALIFIERS): Likewise.
4024 (STRSBWBU_P_QUALIFIERS): Likewise.
4025 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
4026 (vldrdq_gather_base_wb_u64): Likewise.
4027 (vldrdq_gather_base_wb_z_s64): Likewise.
4028 (vldrdq_gather_base_wb_z_u64): Likewise.
4029 (vldrwq_gather_base_wb_f32): Likewise.
4030 (vldrwq_gather_base_wb_s32): Likewise.
4031 (vldrwq_gather_base_wb_u32): Likewise.
4032 (vldrwq_gather_base_wb_z_f32): Likewise.
4033 (vldrwq_gather_base_wb_z_s32): Likewise.
4034 (vldrwq_gather_base_wb_z_u32): Likewise.
4035 (vstrdq_scatter_base_wb_p_s64): Likewise.
4036 (vstrdq_scatter_base_wb_p_u64): Likewise.
4037 (vstrdq_scatter_base_wb_s64): Likewise.
4038 (vstrdq_scatter_base_wb_u64): Likewise.
4039 (vstrwq_scatter_base_wb_p_s32): Likewise.
4040 (vstrwq_scatter_base_wb_p_f32): Likewise.
4041 (vstrwq_scatter_base_wb_p_u32): Likewise.
4042 (vstrwq_scatter_base_wb_s32): Likewise.
4043 (vstrwq_scatter_base_wb_u32): Likewise.
4044 (vstrwq_scatter_base_wb_f32): Likewise.
4045 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
4046 (__arm_vldrdq_gather_base_wb_u64): Likewise.
4047 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4048 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4049 (__arm_vldrwq_gather_base_wb_s32): Likewise.
4050 (__arm_vldrwq_gather_base_wb_u32): Likewise.
4051 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4052 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4053 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
4054 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
4055 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
4056 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
4057 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
4058 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
4059 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
4060 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
4061 (__arm_vldrwq_gather_base_wb_f32): Likewise.
4062 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4063 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
4064 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
4065 (vstrwq_scatter_base_wb): Define polymorphic variant.
4066 (vstrwq_scatter_base_wb_p): Likewise.
4067 (vstrdq_scatter_base_wb_p): Likewise.
4068 (vstrdq_scatter_base_wb): Likewise.
4069 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
4071 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
4073 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
4074 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
4075 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
4076 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
4077 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
4078 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
4079 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
4080 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
4081 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
4082 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
4083 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
4084 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
4085 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
4086 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
4087 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
4088 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
4089 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
4090 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
4091 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
4092 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
4093 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
4094 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
4095 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
4096 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
4097 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
4098 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
4099 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
4100 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
4101 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
4103 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4104 Andre Vieira <andre.simoesdiasvieira@arm.com>
4105 Mihail Ionescu <mihail.ionescu@arm.com>
4107 * config/arm/arm-builtins.c
4108 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
4110 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
4111 (vddupq_m_n_u32): Likewise.
4112 (vddupq_m_n_u16): Likewise.
4113 (vddupq_m_wb_u8): Likewise.
4114 (vddupq_m_wb_u16): Likewise.
4115 (vddupq_m_wb_u32): Likewise.
4116 (vddupq_n_u8): Likewise.
4117 (vddupq_n_u32): Likewise.
4118 (vddupq_n_u16): Likewise.
4119 (vddupq_wb_u8): Likewise.
4120 (vddupq_wb_u16): Likewise.
4121 (vddupq_wb_u32): Likewise.
4122 (vdwdupq_m_n_u8): Likewise.
4123 (vdwdupq_m_n_u32): Likewise.
4124 (vdwdupq_m_n_u16): Likewise.
4125 (vdwdupq_m_wb_u8): Likewise.
4126 (vdwdupq_m_wb_u32): Likewise.
4127 (vdwdupq_m_wb_u16): Likewise.
4128 (vdwdupq_n_u8): Likewise.
4129 (vdwdupq_n_u32): Likewise.
4130 (vdwdupq_n_u16): Likewise.
4131 (vdwdupq_wb_u8): Likewise.
4132 (vdwdupq_wb_u32): Likewise.
4133 (vdwdupq_wb_u16): Likewise.
4134 (vidupq_m_n_u8): Likewise.
4135 (vidupq_m_n_u32): Likewise.
4136 (vidupq_m_n_u16): Likewise.
4137 (vidupq_m_wb_u8): Likewise.
4138 (vidupq_m_wb_u16): Likewise.
4139 (vidupq_m_wb_u32): Likewise.
4140 (vidupq_n_u8): Likewise.
4141 (vidupq_n_u32): Likewise.
4142 (vidupq_n_u16): Likewise.
4143 (vidupq_wb_u8): Likewise.
4144 (vidupq_wb_u16): Likewise.
4145 (vidupq_wb_u32): Likewise.
4146 (viwdupq_m_n_u8): Likewise.
4147 (viwdupq_m_n_u32): Likewise.
4148 (viwdupq_m_n_u16): Likewise.
4149 (viwdupq_m_wb_u8): Likewise.
4150 (viwdupq_m_wb_u32): Likewise.
4151 (viwdupq_m_wb_u16): Likewise.
4152 (viwdupq_n_u8): Likewise.
4153 (viwdupq_n_u32): Likewise.
4154 (viwdupq_n_u16): Likewise.
4155 (viwdupq_wb_u8): Likewise.
4156 (viwdupq_wb_u32): Likewise.
4157 (viwdupq_wb_u16): Likewise.
4158 (__arm_vddupq_m_n_u8): Define intrinsic.
4159 (__arm_vddupq_m_n_u32): Likewise.
4160 (__arm_vddupq_m_n_u16): Likewise.
4161 (__arm_vddupq_m_wb_u8): Likewise.
4162 (__arm_vddupq_m_wb_u16): Likewise.
4163 (__arm_vddupq_m_wb_u32): Likewise.
4164 (__arm_vddupq_n_u8): Likewise.
4165 (__arm_vddupq_n_u32): Likewise.
4166 (__arm_vddupq_n_u16): Likewise.
4167 (__arm_vdwdupq_m_n_u8): Likewise.
4168 (__arm_vdwdupq_m_n_u32): Likewise.
4169 (__arm_vdwdupq_m_n_u16): Likewise.
4170 (__arm_vdwdupq_m_wb_u8): Likewise.
4171 (__arm_vdwdupq_m_wb_u32): Likewise.
4172 (__arm_vdwdupq_m_wb_u16): Likewise.
4173 (__arm_vdwdupq_n_u8): Likewise.
4174 (__arm_vdwdupq_n_u32): Likewise.
4175 (__arm_vdwdupq_n_u16): Likewise.
4176 (__arm_vdwdupq_wb_u8): Likewise.
4177 (__arm_vdwdupq_wb_u32): Likewise.
4178 (__arm_vdwdupq_wb_u16): Likewise.
4179 (__arm_vidupq_m_n_u8): Likewise.
4180 (__arm_vidupq_m_n_u32): Likewise.
4181 (__arm_vidupq_m_n_u16): Likewise.
4182 (__arm_vidupq_n_u8): Likewise.
4183 (__arm_vidupq_m_wb_u8): Likewise.
4184 (__arm_vidupq_m_wb_u16): Likewise.
4185 (__arm_vidupq_m_wb_u32): Likewise.
4186 (__arm_vidupq_n_u32): Likewise.
4187 (__arm_vidupq_n_u16): Likewise.
4188 (__arm_vidupq_wb_u8): Likewise.
4189 (__arm_vidupq_wb_u16): Likewise.
4190 (__arm_vidupq_wb_u32): Likewise.
4191 (__arm_vddupq_wb_u8): Likewise.
4192 (__arm_vddupq_wb_u16): Likewise.
4193 (__arm_vddupq_wb_u32): Likewise.
4194 (__arm_viwdupq_m_n_u8): Likewise.
4195 (__arm_viwdupq_m_n_u32): Likewise.
4196 (__arm_viwdupq_m_n_u16): Likewise.
4197 (__arm_viwdupq_m_wb_u8): Likewise.
4198 (__arm_viwdupq_m_wb_u32): Likewise.
4199 (__arm_viwdupq_m_wb_u16): Likewise.
4200 (__arm_viwdupq_n_u8): Likewise.
4201 (__arm_viwdupq_n_u32): Likewise.
4202 (__arm_viwdupq_n_u16): Likewise.
4203 (__arm_viwdupq_wb_u8): Likewise.
4204 (__arm_viwdupq_wb_u32): Likewise.
4205 (__arm_viwdupq_wb_u16): Likewise.
4206 (vidupq_m): Define polymorphic variant.
4207 (vddupq_m): Likewise.
4208 (vidupq_u16): Likewise.
4209 (vidupq_u32): Likewise.
4210 (vidupq_u8): Likewise.
4211 (vddupq_u16): Likewise.
4212 (vddupq_u32): Likewise.
4213 (vddupq_u8): Likewise.
4214 (viwdupq_m): Likewise.
4215 (viwdupq_u16): Likewise.
4216 (viwdupq_u32): Likewise.
4217 (viwdupq_u8): Likewise.
4218 (vdwdupq_m): Likewise.
4219 (vdwdupq_u16): Likewise.
4220 (vdwdupq_u32): Likewise.
4221 (vdwdupq_u8): Likewise.
4222 * config/arm/arm_mve_builtins.def
4223 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
4225 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
4226 (mve_vidupq_u<mode>_insn): Likewise.
4227 (mve_vidupq_m_n_u<mode>): Likewise.
4228 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
4229 (mve_vddupq_n_u<mode>): Likewise.
4230 (mve_vddupq_u<mode>_insn): Likewise.
4231 (mve_vddupq_m_n_u<mode>): Likewise.
4232 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
4233 (mve_vdwdupq_n_u<mode>): Likewise.
4234 (mve_vdwdupq_wb_u<mode>): Likewise.
4235 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
4236 (mve_vdwdupq_m_n_u<mode>): Likewise.
4237 (mve_vdwdupq_m_wb_u<mode>): Likewise.
4238 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
4239 (mve_viwdupq_n_u<mode>): Likewise.
4240 (mve_viwdupq_wb_u<mode>): Likewise.
4241 (mve_viwdupq_wb_u<mode>_insn): Likewise.
4242 (mve_viwdupq_m_n_u<mode>): Likewise.
4243 (mve_viwdupq_m_wb_u<mode>): Likewise.
4244 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
4246 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4248 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
4249 (vreinterpretq_s16_s64): Likewise.
4250 (vreinterpretq_s16_s8): Likewise.
4251 (vreinterpretq_s16_u16): Likewise.
4252 (vreinterpretq_s16_u32): Likewise.
4253 (vreinterpretq_s16_u64): Likewise.
4254 (vreinterpretq_s16_u8): Likewise.
4255 (vreinterpretq_s32_s16): Likewise.
4256 (vreinterpretq_s32_s64): Likewise.
4257 (vreinterpretq_s32_s8): Likewise.
4258 (vreinterpretq_s32_u16): Likewise.
4259 (vreinterpretq_s32_u32): Likewise.
4260 (vreinterpretq_s32_u64): Likewise.
4261 (vreinterpretq_s32_u8): Likewise.
4262 (vreinterpretq_s64_s16): Likewise.
4263 (vreinterpretq_s64_s32): Likewise.
4264 (vreinterpretq_s64_s8): Likewise.
4265 (vreinterpretq_s64_u16): Likewise.
4266 (vreinterpretq_s64_u32): Likewise.
4267 (vreinterpretq_s64_u64): Likewise.
4268 (vreinterpretq_s64_u8): Likewise.
4269 (vreinterpretq_s8_s16): Likewise.
4270 (vreinterpretq_s8_s32): Likewise.
4271 (vreinterpretq_s8_s64): Likewise.
4272 (vreinterpretq_s8_u16): Likewise.
4273 (vreinterpretq_s8_u32): Likewise.
4274 (vreinterpretq_s8_u64): Likewise.
4275 (vreinterpretq_s8_u8): Likewise.
4276 (vreinterpretq_u16_s16): Likewise.
4277 (vreinterpretq_u16_s32): Likewise.
4278 (vreinterpretq_u16_s64): Likewise.
4279 (vreinterpretq_u16_s8): Likewise.
4280 (vreinterpretq_u16_u32): Likewise.
4281 (vreinterpretq_u16_u64): Likewise.
4282 (vreinterpretq_u16_u8): Likewise.
4283 (vreinterpretq_u32_s16): Likewise.
4284 (vreinterpretq_u32_s32): Likewise.
4285 (vreinterpretq_u32_s64): Likewise.
4286 (vreinterpretq_u32_s8): Likewise.
4287 (vreinterpretq_u32_u16): Likewise.
4288 (vreinterpretq_u32_u64): Likewise.
4289 (vreinterpretq_u32_u8): Likewise.
4290 (vreinterpretq_u64_s16): Likewise.
4291 (vreinterpretq_u64_s32): Likewise.
4292 (vreinterpretq_u64_s64): Likewise.
4293 (vreinterpretq_u64_s8): Likewise.
4294 (vreinterpretq_u64_u16): Likewise.
4295 (vreinterpretq_u64_u32): Likewise.
4296 (vreinterpretq_u64_u8): Likewise.
4297 (vreinterpretq_u8_s16): Likewise.
4298 (vreinterpretq_u8_s32): Likewise.
4299 (vreinterpretq_u8_s64): Likewise.
4300 (vreinterpretq_u8_s8): Likewise.
4301 (vreinterpretq_u8_u16): Likewise.
4302 (vreinterpretq_u8_u32): Likewise.
4303 (vreinterpretq_u8_u64): Likewise.
4304 (vreinterpretq_s32_f16): Likewise.
4305 (vreinterpretq_s32_f32): Likewise.
4306 (vreinterpretq_u16_f16): Likewise.
4307 (vreinterpretq_u16_f32): Likewise.
4308 (vreinterpretq_u32_f16): Likewise.
4309 (vreinterpretq_u32_f32): Likewise.
4310 (vreinterpretq_u64_f16): Likewise.
4311 (vreinterpretq_u64_f32): Likewise.
4312 (vreinterpretq_u8_f16): Likewise.
4313 (vreinterpretq_u8_f32): Likewise.
4314 (vreinterpretq_f16_f32): Likewise.
4315 (vreinterpretq_f16_s16): Likewise.
4316 (vreinterpretq_f16_s32): Likewise.
4317 (vreinterpretq_f16_s64): Likewise.
4318 (vreinterpretq_f16_s8): Likewise.
4319 (vreinterpretq_f16_u16): Likewise.
4320 (vreinterpretq_f16_u32): Likewise.
4321 (vreinterpretq_f16_u64): Likewise.
4322 (vreinterpretq_f16_u8): Likewise.
4323 (vreinterpretq_f32_f16): Likewise.
4324 (vreinterpretq_f32_s16): Likewise.
4325 (vreinterpretq_f32_s32): Likewise.
4326 (vreinterpretq_f32_s64): Likewise.
4327 (vreinterpretq_f32_s8): Likewise.
4328 (vreinterpretq_f32_u16): Likewise.
4329 (vreinterpretq_f32_u32): Likewise.
4330 (vreinterpretq_f32_u64): Likewise.
4331 (vreinterpretq_f32_u8): Likewise.
4332 (vreinterpretq_s16_f16): Likewise.
4333 (vreinterpretq_s16_f32): Likewise.
4334 (vreinterpretq_s64_f16): Likewise.
4335 (vreinterpretq_s64_f32): Likewise.
4336 (vreinterpretq_s8_f16): Likewise.
4337 (vreinterpretq_s8_f32): Likewise.
4338 (vuninitializedq_u8): Likewise.
4339 (vuninitializedq_u16): Likewise.
4340 (vuninitializedq_u32): Likewise.
4341 (vuninitializedq_u64): Likewise.
4342 (vuninitializedq_s8): Likewise.
4343 (vuninitializedq_s16): Likewise.
4344 (vuninitializedq_s32): Likewise.
4345 (vuninitializedq_s64): Likewise.
4346 (vuninitializedq_f16): Likewise.
4347 (vuninitializedq_f32): Likewise.
4348 (__arm_vuninitializedq_u8): Define intrinsic.
4349 (__arm_vuninitializedq_u16): Likewise.
4350 (__arm_vuninitializedq_u32): Likewise.
4351 (__arm_vuninitializedq_u64): Likewise.
4352 (__arm_vuninitializedq_s8): Likewise.
4353 (__arm_vuninitializedq_s16): Likewise.
4354 (__arm_vuninitializedq_s32): Likewise.
4355 (__arm_vuninitializedq_s64): Likewise.
4356 (__arm_vreinterpretq_s16_s32): Likewise.
4357 (__arm_vreinterpretq_s16_s64): Likewise.
4358 (__arm_vreinterpretq_s16_s8): Likewise.
4359 (__arm_vreinterpretq_s16_u16): Likewise.
4360 (__arm_vreinterpretq_s16_u32): Likewise.
4361 (__arm_vreinterpretq_s16_u64): Likewise.
4362 (__arm_vreinterpretq_s16_u8): Likewise.
4363 (__arm_vreinterpretq_s32_s16): Likewise.
4364 (__arm_vreinterpretq_s32_s64): Likewise.
4365 (__arm_vreinterpretq_s32_s8): Likewise.
4366 (__arm_vreinterpretq_s32_u16): Likewise.
4367 (__arm_vreinterpretq_s32_u32): Likewise.
4368 (__arm_vreinterpretq_s32_u64): Likewise.
4369 (__arm_vreinterpretq_s32_u8): Likewise.
4370 (__arm_vreinterpretq_s64_s16): Likewise.
4371 (__arm_vreinterpretq_s64_s32): Likewise.
4372 (__arm_vreinterpretq_s64_s8): Likewise.
4373 (__arm_vreinterpretq_s64_u16): Likewise.
4374 (__arm_vreinterpretq_s64_u32): Likewise.
4375 (__arm_vreinterpretq_s64_u64): Likewise.
4376 (__arm_vreinterpretq_s64_u8): Likewise.
4377 (__arm_vreinterpretq_s8_s16): Likewise.
4378 (__arm_vreinterpretq_s8_s32): Likewise.
4379 (__arm_vreinterpretq_s8_s64): Likewise.
4380 (__arm_vreinterpretq_s8_u16): Likewise.
4381 (__arm_vreinterpretq_s8_u32): Likewise.
4382 (__arm_vreinterpretq_s8_u64): Likewise.
4383 (__arm_vreinterpretq_s8_u8): Likewise.
4384 (__arm_vreinterpretq_u16_s16): Likewise.
4385 (__arm_vreinterpretq_u16_s32): Likewise.
4386 (__arm_vreinterpretq_u16_s64): Likewise.
4387 (__arm_vreinterpretq_u16_s8): Likewise.
4388 (__arm_vreinterpretq_u16_u32): Likewise.
4389 (__arm_vreinterpretq_u16_u64): Likewise.
4390 (__arm_vreinterpretq_u16_u8): Likewise.
4391 (__arm_vreinterpretq_u32_s16): Likewise.
4392 (__arm_vreinterpretq_u32_s32): Likewise.
4393 (__arm_vreinterpretq_u32_s64): Likewise.
4394 (__arm_vreinterpretq_u32_s8): Likewise.
4395 (__arm_vreinterpretq_u32_u16): Likewise.
4396 (__arm_vreinterpretq_u32_u64): Likewise.
4397 (__arm_vreinterpretq_u32_u8): Likewise.
4398 (__arm_vreinterpretq_u64_s16): Likewise.
4399 (__arm_vreinterpretq_u64_s32): Likewise.
4400 (__arm_vreinterpretq_u64_s64): Likewise.
4401 (__arm_vreinterpretq_u64_s8): Likewise.
4402 (__arm_vreinterpretq_u64_u16): Likewise.
4403 (__arm_vreinterpretq_u64_u32): Likewise.
4404 (__arm_vreinterpretq_u64_u8): Likewise.
4405 (__arm_vreinterpretq_u8_s16): Likewise.
4406 (__arm_vreinterpretq_u8_s32): Likewise.
4407 (__arm_vreinterpretq_u8_s64): Likewise.
4408 (__arm_vreinterpretq_u8_s8): Likewise.
4409 (__arm_vreinterpretq_u8_u16): Likewise.
4410 (__arm_vreinterpretq_u8_u32): Likewise.
4411 (__arm_vreinterpretq_u8_u64): Likewise.
4412 (__arm_vuninitializedq_f16): Likewise.
4413 (__arm_vuninitializedq_f32): Likewise.
4414 (__arm_vreinterpretq_s32_f16): Likewise.
4415 (__arm_vreinterpretq_s32_f32): Likewise.
4416 (__arm_vreinterpretq_s16_f16): Likewise.
4417 (__arm_vreinterpretq_s16_f32): Likewise.
4418 (__arm_vreinterpretq_s64_f16): Likewise.
4419 (__arm_vreinterpretq_s64_f32): Likewise.
4420 (__arm_vreinterpretq_s8_f16): Likewise.
4421 (__arm_vreinterpretq_s8_f32): Likewise.
4422 (__arm_vreinterpretq_u16_f16): Likewise.
4423 (__arm_vreinterpretq_u16_f32): Likewise.
4424 (__arm_vreinterpretq_u32_f16): Likewise.
4425 (__arm_vreinterpretq_u32_f32): Likewise.
4426 (__arm_vreinterpretq_u64_f16): Likewise.
4427 (__arm_vreinterpretq_u64_f32): Likewise.
4428 (__arm_vreinterpretq_u8_f16): Likewise.
4429 (__arm_vreinterpretq_u8_f32): Likewise.
4430 (__arm_vreinterpretq_f16_f32): Likewise.
4431 (__arm_vreinterpretq_f16_s16): Likewise.
4432 (__arm_vreinterpretq_f16_s32): Likewise.
4433 (__arm_vreinterpretq_f16_s64): Likewise.
4434 (__arm_vreinterpretq_f16_s8): Likewise.
4435 (__arm_vreinterpretq_f16_u16): Likewise.
4436 (__arm_vreinterpretq_f16_u32): Likewise.
4437 (__arm_vreinterpretq_f16_u64): Likewise.
4438 (__arm_vreinterpretq_f16_u8): Likewise.
4439 (__arm_vreinterpretq_f32_f16): Likewise.
4440 (__arm_vreinterpretq_f32_s16): Likewise.
4441 (__arm_vreinterpretq_f32_s32): Likewise.
4442 (__arm_vreinterpretq_f32_s64): Likewise.
4443 (__arm_vreinterpretq_f32_s8): Likewise.
4444 (__arm_vreinterpretq_f32_u16): Likewise.
4445 (__arm_vreinterpretq_f32_u32): Likewise.
4446 (__arm_vreinterpretq_f32_u64): Likewise.
4447 (__arm_vreinterpretq_f32_u8): Likewise.
4448 (vuninitializedq): Define polymorphic variant.
4449 (vreinterpretq_f16): Likewise.
4450 (vreinterpretq_f32): Likewise.
4451 (vreinterpretq_s16): Likewise.
4452 (vreinterpretq_s32): Likewise.
4453 (vreinterpretq_s64): Likewise.
4454 (vreinterpretq_s8): Likewise.
4455 (vreinterpretq_u16): Likewise.
4456 (vreinterpretq_u32): Likewise.
4457 (vreinterpretq_u64): Likewise.
4458 (vreinterpretq_u8): Likewise.
4460 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4461 Andre Vieira <andre.simoesdiasvieira@arm.com>
4462 Mihail Ionescu <mihail.ionescu@arm.com>
4464 * config/arm/arm_mve.h (vaddq_s8): Define macro.
4465 (vaddq_s16): Likewise.
4466 (vaddq_s32): Likewise.
4467 (vaddq_u8): Likewise.
4468 (vaddq_u16): Likewise.
4469 (vaddq_u32): Likewise.
4470 (vaddq_f16): Likewise.
4471 (vaddq_f32): Likewise.
4472 (__arm_vaddq_s8): Define intrinsic.
4473 (__arm_vaddq_s16): Likewise.
4474 (__arm_vaddq_s32): Likewise.
4475 (__arm_vaddq_u8): Likewise.
4476 (__arm_vaddq_u16): Likewise.
4477 (__arm_vaddq_u32): Likewise.
4478 (__arm_vaddq_f16): Likewise.
4479 (__arm_vaddq_f32): Likewise.
4480 (vaddq): Define polymorphic variant.
4481 * config/arm/iterators.md (VNIM): Define mode iterator for common types
4482 Neon, IWMMXT and MVE.
4483 (VNINOTM): Likewise.
4484 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
4485 (mve_vaddq_f<mode>): Define RTL pattern.
4486 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
4487 (addv8hf3_neon): Define RTL pattern.
4488 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
4490 (addv8hf3): Define standard RTL pattern for MVE and Neon.
4491 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
4493 2020-03-20 Martin Liska <mliska@suse.cz>
4496 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
4497 build_ref_for_offset function was used and it transforms off to bytes
4500 2020-03-20 Richard Biener <rguenther@suse.de>
4502 PR tree-optimization/94266
4503 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
4504 type of the underlying object to adjust for the containing
4507 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4509 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
4510 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
4511 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
4513 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4515 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
4517 2020-03-20 Jakub Jelinek <jakub@redhat.com>
4519 PR tree-optimization/94224
4520 * gimple-ssa-store-merging.c
4521 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
4522 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
4525 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4527 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
4529 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
4532 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
4533 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
4535 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
4538 * cgraphunit.c (process_function_and_variable_attributes): warn
4539 for flatten attribute on alias.
4540 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
4542 2020-03-19 Martin Liska <mliska@suse.cz>
4544 * lto-section-in.c: Add ext_symtab.
4545 * lto-streamer-out.c (write_symbol_extension_info): New.
4546 (produce_symtab_extension): New.
4547 (produce_asm_for_decls): Stream also produce_symtab_extension.
4548 * lto-streamer.h (enum lto_section_type): New section.
4550 2020-03-19 Jakub Jelinek <jakub@redhat.com>
4552 PR tree-optimization/94211
4553 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
4554 instead of estimate_num_insns for bb_seq (middle_bb). Rename
4555 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
4558 2020-03-19 Richard Biener <rguenther@suse.de>
4561 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
4562 and build_ref_for_offset.
4564 2020-03-19 Richard Biener <rguenther@suse.de>
4567 * fold-const.c (fold_binary_loc): Avoid using
4568 build_fold_addr_expr when we really want an ADDR_EXPR.
4570 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
4572 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
4575 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
4577 PR rtl-optimization/90275
4578 * cse.c (cse_insn): Delete no-op register moves too.
4580 2020-03-18 Martin Sebor <msebor@redhat.com>
4583 * cgraphunit.c (process_function_and_variable_attributes): Also
4584 complain about weakref function definitions and drop all effects
4587 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4588 Mihail Ionescu <mihail.ionescu@arm.com>
4589 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4591 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
4592 (vstrdq_scatter_base_p_u64): Likewise.
4593 (vstrdq_scatter_base_s64): Likewise.
4594 (vstrdq_scatter_base_u64): Likewise.
4595 (vstrdq_scatter_offset_p_s64): Likewise.
4596 (vstrdq_scatter_offset_p_u64): Likewise.
4597 (vstrdq_scatter_offset_s64): Likewise.
4598 (vstrdq_scatter_offset_u64): Likewise.
4599 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
4600 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
4601 (vstrdq_scatter_shifted_offset_s64): Likewise.
4602 (vstrdq_scatter_shifted_offset_u64): Likewise.
4603 (vstrhq_scatter_offset_f16): Likewise.
4604 (vstrhq_scatter_offset_p_f16): Likewise.
4605 (vstrhq_scatter_shifted_offset_f16): Likewise.
4606 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
4607 (vstrwq_scatter_base_f32): Likewise.
4608 (vstrwq_scatter_base_p_f32): Likewise.
4609 (vstrwq_scatter_offset_f32): Likewise.
4610 (vstrwq_scatter_offset_p_f32): Likewise.
4611 (vstrwq_scatter_offset_p_s32): Likewise.
4612 (vstrwq_scatter_offset_p_u32): Likewise.
4613 (vstrwq_scatter_offset_s32): Likewise.
4614 (vstrwq_scatter_offset_u32): Likewise.
4615 (vstrwq_scatter_shifted_offset_f32): Likewise.
4616 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
4617 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
4618 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
4619 (vstrwq_scatter_shifted_offset_s32): Likewise.
4620 (vstrwq_scatter_shifted_offset_u32): Likewise.
4621 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
4622 (__arm_vstrdq_scatter_base_p_u64): Likewise.
4623 (__arm_vstrdq_scatter_base_s64): Likewise.
4624 (__arm_vstrdq_scatter_base_u64): Likewise.
4625 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
4626 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
4627 (__arm_vstrdq_scatter_offset_s64): Likewise.
4628 (__arm_vstrdq_scatter_offset_u64): Likewise.
4629 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
4630 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
4631 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
4632 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
4633 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
4634 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
4635 (__arm_vstrwq_scatter_offset_s32): Likewise.
4636 (__arm_vstrwq_scatter_offset_u32): Likewise.
4637 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
4638 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
4639 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
4640 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
4641 (__arm_vstrhq_scatter_offset_f16): Likewise.
4642 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
4643 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
4644 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
4645 (__arm_vstrwq_scatter_base_f32): Likewise.
4646 (__arm_vstrwq_scatter_base_p_f32): Likewise.
4647 (__arm_vstrwq_scatter_offset_f32): Likewise.
4648 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
4649 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
4650 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
4651 (vstrhq_scatter_offset): Define polymorphic variant.
4652 (vstrhq_scatter_offset_p): Likewise.
4653 (vstrhq_scatter_shifted_offset): Likewise.
4654 (vstrhq_scatter_shifted_offset_p): Likewise.
4655 (vstrwq_scatter_base): Likewise.
4656 (vstrwq_scatter_base_p): Likewise.
4657 (vstrwq_scatter_offset): Likewise.
4658 (vstrwq_scatter_offset_p): Likewise.
4659 (vstrwq_scatter_shifted_offset): Likewise.
4660 (vstrwq_scatter_shifted_offset_p): Likewise.
4661 (vstrdq_scatter_base_p): Likewise.
4662 (vstrdq_scatter_base): Likewise.
4663 (vstrdq_scatter_offset_p): Likewise.
4664 (vstrdq_scatter_offset): Likewise.
4665 (vstrdq_scatter_shifted_offset_p): Likewise.
4666 (vstrdq_scatter_shifted_offset): Likewise.
4667 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
4668 (STRSBS_P): Likewise.
4670 (STRSBU_P): Likewise.
4672 (STRSS_P): Likewise.
4674 (STRSU_P): Likewise.
4675 * config/arm/constraints.md (Ri): Define.
4676 * config/arm/mve.md (VSTRDSBQ): Define iterator.
4677 (VSTRDSOQ): Likewise.
4678 (VSTRDSSOQ): Likewise.
4679 (VSTRWSOQ): Likewise.
4680 (VSTRWSSOQ): Likewise.
4681 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
4682 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
4683 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
4684 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
4685 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
4686 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
4687 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
4688 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
4689 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
4690 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
4691 (mve_vstrwq_scatter_base_fv4sf): Likewise.
4692 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
4693 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
4694 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
4695 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
4696 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
4697 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
4698 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
4699 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
4700 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
4701 * config/arm/predicates.md (Ri): Define predicate to check immediate
4702 is the range +/-1016 and multiple of 8.
4704 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4705 Mihail Ionescu <mihail.ionescu@arm.com>
4706 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4708 * config/arm/arm_mve.h (vst1q_f32): Define macro.
4709 (vst1q_f16): Likewise.
4710 (vst1q_s8): Likewise.
4711 (vst1q_s32): Likewise.
4712 (vst1q_s16): Likewise.
4713 (vst1q_u8): Likewise.
4714 (vst1q_u32): Likewise.
4715 (vst1q_u16): Likewise.
4716 (vstrhq_f16): Likewise.
4717 (vstrhq_scatter_offset_s32): Likewise.
4718 (vstrhq_scatter_offset_s16): Likewise.
4719 (vstrhq_scatter_offset_u32): Likewise.
4720 (vstrhq_scatter_offset_u16): Likewise.
4721 (vstrhq_scatter_offset_p_s32): Likewise.
4722 (vstrhq_scatter_offset_p_s16): Likewise.
4723 (vstrhq_scatter_offset_p_u32): Likewise.
4724 (vstrhq_scatter_offset_p_u16): Likewise.
4725 (vstrhq_scatter_shifted_offset_s32): Likewise.
4726 (vstrhq_scatter_shifted_offset_s16): Likewise.
4727 (vstrhq_scatter_shifted_offset_u32): Likewise.
4728 (vstrhq_scatter_shifted_offset_u16): Likewise.
4729 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
4730 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
4731 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
4732 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
4733 (vstrhq_s32): Likewise.
4734 (vstrhq_s16): Likewise.
4735 (vstrhq_u32): Likewise.
4736 (vstrhq_u16): Likewise.
4737 (vstrhq_p_f16): Likewise.
4738 (vstrhq_p_s32): Likewise.
4739 (vstrhq_p_s16): Likewise.
4740 (vstrhq_p_u32): Likewise.
4741 (vstrhq_p_u16): Likewise.
4742 (vstrwq_f32): Likewise.
4743 (vstrwq_s32): Likewise.
4744 (vstrwq_u32): Likewise.
4745 (vstrwq_p_f32): Likewise.
4746 (vstrwq_p_s32): Likewise.
4747 (vstrwq_p_u32): Likewise.
4748 (__arm_vst1q_s8): Define intrinsic.
4749 (__arm_vst1q_s32): Likewise.
4750 (__arm_vst1q_s16): Likewise.
4751 (__arm_vst1q_u8): Likewise.
4752 (__arm_vst1q_u32): Likewise.
4753 (__arm_vst1q_u16): Likewise.
4754 (__arm_vstrhq_scatter_offset_s32): Likewise.
4755 (__arm_vstrhq_scatter_offset_s16): Likewise.
4756 (__arm_vstrhq_scatter_offset_u32): Likewise.
4757 (__arm_vstrhq_scatter_offset_u16): Likewise.
4758 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
4759 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
4760 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
4761 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
4762 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
4763 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
4764 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
4765 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
4766 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
4767 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
4768 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
4769 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
4770 (__arm_vstrhq_s32): Likewise.
4771 (__arm_vstrhq_s16): Likewise.
4772 (__arm_vstrhq_u32): Likewise.
4773 (__arm_vstrhq_u16): Likewise.
4774 (__arm_vstrhq_p_s32): Likewise.
4775 (__arm_vstrhq_p_s16): Likewise.
4776 (__arm_vstrhq_p_u32): Likewise.
4777 (__arm_vstrhq_p_u16): Likewise.
4778 (__arm_vstrwq_s32): Likewise.
4779 (__arm_vstrwq_u32): Likewise.
4780 (__arm_vstrwq_p_s32): Likewise.
4781 (__arm_vstrwq_p_u32): Likewise.
4782 (__arm_vstrwq_p_f32): Likewise.
4783 (__arm_vstrwq_f32): Likewise.
4784 (__arm_vst1q_f32): Likewise.
4785 (__arm_vst1q_f16): Likewise.
4786 (__arm_vstrhq_f16): Likewise.
4787 (__arm_vstrhq_p_f16): Likewise.
4788 (vst1q): Define polymorphic variant.
4790 (vstrhq_p): Likewise.
4791 (vstrhq_scatter_offset_p): Likewise.
4792 (vstrhq_scatter_offset): Likewise.
4793 (vstrhq_scatter_shifted_offset_p): Likewise.
4794 (vstrhq_scatter_shifted_offset): Likewise.
4795 (vstrwq_p): Likewise.
4797 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
4800 (STRSS_P): Likewise.
4802 (STRSU_P): Likewise.
4805 * config/arm/mve.md (VST1Q): Define iterator.
4806 (VSTRHSOQ): Likewise.
4807 (VSTRHSSOQ): Likewise.
4810 (mve_vstrhq_fv8hf): Define RTL pattern.
4811 (mve_vstrhq_p_fv8hf): Likewise.
4812 (mve_vstrhq_p_<supf><mode>): Likewise.
4813 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
4814 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
4815 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
4816 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
4817 (mve_vstrhq_<supf><mode>): Likewise.
4818 (mve_vstrwq_fv4sf): Likewise.
4819 (mve_vstrwq_p_fv4sf): Likewise.
4820 (mve_vstrwq_p_<supf>v4si): Likewise.
4821 (mve_vstrwq_<supf>v4si): Likewise.
4822 (mve_vst1q_f<mode>): Define expand.
4823 (mve_vst1q_<supf><mode>): Likewise.
4825 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4826 Mihail Ionescu <mihail.ionescu@arm.com>
4827 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4829 * config/arm/arm_mve.h (vld1q_s8): Define macro.
4830 (vld1q_s32): Likewise.
4831 (vld1q_s16): Likewise.
4832 (vld1q_u8): Likewise.
4833 (vld1q_u32): Likewise.
4834 (vld1q_u16): Likewise.
4835 (vldrhq_gather_offset_s32): Likewise.
4836 (vldrhq_gather_offset_s16): Likewise.
4837 (vldrhq_gather_offset_u32): Likewise.
4838 (vldrhq_gather_offset_u16): Likewise.
4839 (vldrhq_gather_offset_z_s32): Likewise.
4840 (vldrhq_gather_offset_z_s16): Likewise.
4841 (vldrhq_gather_offset_z_u32): Likewise.
4842 (vldrhq_gather_offset_z_u16): Likewise.
4843 (vldrhq_gather_shifted_offset_s32): Likewise.
4844 (vldrhq_gather_shifted_offset_s16): Likewise.
4845 (vldrhq_gather_shifted_offset_u32): Likewise.
4846 (vldrhq_gather_shifted_offset_u16): Likewise.
4847 (vldrhq_gather_shifted_offset_z_s32): Likewise.
4848 (vldrhq_gather_shifted_offset_z_s16): Likewise.
4849 (vldrhq_gather_shifted_offset_z_u32): Likewise.
4850 (vldrhq_gather_shifted_offset_z_u16): Likewise.
4851 (vldrhq_s32): Likewise.
4852 (vldrhq_s16): Likewise.
4853 (vldrhq_u32): Likewise.
4854 (vldrhq_u16): Likewise.
4855 (vldrhq_z_s32): Likewise.
4856 (vldrhq_z_s16): Likewise.
4857 (vldrhq_z_u32): Likewise.
4858 (vldrhq_z_u16): Likewise.
4859 (vldrwq_s32): Likewise.
4860 (vldrwq_u32): Likewise.
4861 (vldrwq_z_s32): Likewise.
4862 (vldrwq_z_u32): Likewise.
4863 (vld1q_f32): Likewise.
4864 (vld1q_f16): Likewise.
4865 (vldrhq_f16): Likewise.
4866 (vldrhq_z_f16): Likewise.
4867 (vldrwq_f32): Likewise.
4868 (vldrwq_z_f32): Likewise.
4869 (__arm_vld1q_s8): Define intrinsic.
4870 (__arm_vld1q_s32): Likewise.
4871 (__arm_vld1q_s16): Likewise.
4872 (__arm_vld1q_u8): Likewise.
4873 (__arm_vld1q_u32): Likewise.
4874 (__arm_vld1q_u16): Likewise.
4875 (__arm_vldrhq_gather_offset_s32): Likewise.
4876 (__arm_vldrhq_gather_offset_s16): Likewise.
4877 (__arm_vldrhq_gather_offset_u32): Likewise.
4878 (__arm_vldrhq_gather_offset_u16): Likewise.
4879 (__arm_vldrhq_gather_offset_z_s32): Likewise.
4880 (__arm_vldrhq_gather_offset_z_s16): Likewise.
4881 (__arm_vldrhq_gather_offset_z_u32): Likewise.
4882 (__arm_vldrhq_gather_offset_z_u16): Likewise.
4883 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
4884 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
4885 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
4886 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
4887 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
4888 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
4889 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
4890 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
4891 (__arm_vldrhq_s32): Likewise.
4892 (__arm_vldrhq_s16): Likewise.
4893 (__arm_vldrhq_u32): Likewise.
4894 (__arm_vldrhq_u16): Likewise.
4895 (__arm_vldrhq_z_s32): Likewise.
4896 (__arm_vldrhq_z_s16): Likewise.
4897 (__arm_vldrhq_z_u32): Likewise.
4898 (__arm_vldrhq_z_u16): Likewise.
4899 (__arm_vldrwq_s32): Likewise.
4900 (__arm_vldrwq_u32): Likewise.
4901 (__arm_vldrwq_z_s32): Likewise.
4902 (__arm_vldrwq_z_u32): Likewise.
4903 (__arm_vld1q_f32): Likewise.
4904 (__arm_vld1q_f16): Likewise.
4905 (__arm_vldrwq_f32): Likewise.
4906 (__arm_vldrwq_z_f32): Likewise.
4907 (__arm_vldrhq_z_f16): Likewise.
4908 (__arm_vldrhq_f16): Likewise.
4909 (vld1q): Define polymorphic variant.
4910 (vldrhq_gather_offset): Likewise.
4911 (vldrhq_gather_offset_z): Likewise.
4912 (vldrhq_gather_shifted_offset): Likewise.
4913 (vldrhq_gather_shifted_offset_z): Likewise.
4914 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
4918 (LDRGU_Z): Likewise.
4920 (LDRGS_Z): Likewise.
4922 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
4923 (V_sz_elem1): Likewise.
4924 (VLD1Q): Define iterator.
4925 (VLDRHGOQ): Likewise.
4926 (VLDRHGSOQ): Likewise.
4929 (mve_vldrhq_fv8hf): Define RTL pattern.
4930 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
4931 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
4932 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
4933 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
4934 (mve_vldrhq_<supf><mode>): Likewise.
4935 (mve_vldrhq_z_fv8hf): Likewise.
4936 (mve_vldrhq_z_<supf><mode>): Likewise.
4937 (mve_vldrwq_fv4sf): Likewise.
4938 (mve_vldrwq_<supf>v4si): Likewise.
4939 (mve_vldrwq_z_fv4sf): Likewise.
4940 (mve_vldrwq_z_<supf>v4si): Likewise.
4941 (mve_vld1q_f<mode>): Define RTL expand pattern.
4942 (mve_vld1q_<supf><mode>): Likewise.
4944 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4945 Mihail Ionescu <mihail.ionescu@arm.com>
4946 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4948 * config/arm/arm_mve.h (vld1q_s8): Define macro.
4949 (vld1q_s32): Likewise.
4950 (vld1q_s16): Likewise.
4951 (vld1q_u8): Likewise.
4952 (vld1q_u32): Likewise.
4953 (vld1q_u16): Likewise.
4954 (vldrhq_gather_offset_s32): Likewise.
4955 (vldrhq_gather_offset_s16): Likewise.
4956 (vldrhq_gather_offset_u32): Likewise.
4957 (vldrhq_gather_offset_u16): Likewise.
4958 (vldrhq_gather_offset_z_s32): Likewise.
4959 (vldrhq_gather_offset_z_s16): Likewise.
4960 (vldrhq_gather_offset_z_u32): Likewise.
4961 (vldrhq_gather_offset_z_u16): Likewise.
4962 (vldrhq_gather_shifted_offset_s32): Likewise.
4963 (vldrhq_gather_shifted_offset_s16): Likewise.
4964 (vldrhq_gather_shifted_offset_u32): Likewise.
4965 (vldrhq_gather_shifted_offset_u16): Likewise.
4966 (vldrhq_gather_shifted_offset_z_s32): Likewise.
4967 (vldrhq_gather_shifted_offset_z_s16): Likewise.
4968 (vldrhq_gather_shifted_offset_z_u32): Likewise.
4969 (vldrhq_gather_shifted_offset_z_u16): Likewise.
4970 (vldrhq_s32): Likewise.
4971 (vldrhq_s16): Likewise.
4972 (vldrhq_u32): Likewise.
4973 (vldrhq_u16): Likewise.
4974 (vldrhq_z_s32): Likewise.
4975 (vldrhq_z_s16): Likewise.
4976 (vldrhq_z_u32): Likewise.
4977 (vldrhq_z_u16): Likewise.
4978 (vldrwq_s32): Likewise.
4979 (vldrwq_u32): Likewise.
4980 (vldrwq_z_s32): Likewise.
4981 (vldrwq_z_u32): Likewise.
4982 (vld1q_f32): Likewise.
4983 (vld1q_f16): Likewise.
4984 (vldrhq_f16): Likewise.
4985 (vldrhq_z_f16): Likewise.
4986 (vldrwq_f32): Likewise.
4987 (vldrwq_z_f32): Likewise.
4988 (__arm_vld1q_s8): Define intrinsic.
4989 (__arm_vld1q_s32): Likewise.
4990 (__arm_vld1q_s16): Likewise.
4991 (__arm_vld1q_u8): Likewise.
4992 (__arm_vld1q_u32): Likewise.
4993 (__arm_vld1q_u16): Likewise.
4994 (__arm_vldrhq_gather_offset_s32): Likewise.
4995 (__arm_vldrhq_gather_offset_s16): Likewise.
4996 (__arm_vldrhq_gather_offset_u32): Likewise.
4997 (__arm_vldrhq_gather_offset_u16): Likewise.
4998 (__arm_vldrhq_gather_offset_z_s32): Likewise.
4999 (__arm_vldrhq_gather_offset_z_s16): Likewise.
5000 (__arm_vldrhq_gather_offset_z_u32): Likewise.
5001 (__arm_vldrhq_gather_offset_z_u16): Likewise.
5002 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
5003 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
5004 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
5005 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
5006 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
5007 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
5008 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
5009 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
5010 (__arm_vldrhq_s32): Likewise.
5011 (__arm_vldrhq_s16): Likewise.
5012 (__arm_vldrhq_u32): Likewise.
5013 (__arm_vldrhq_u16): Likewise.
5014 (__arm_vldrhq_z_s32): Likewise.
5015 (__arm_vldrhq_z_s16): Likewise.
5016 (__arm_vldrhq_z_u32): Likewise.
5017 (__arm_vldrhq_z_u16): Likewise.
5018 (__arm_vldrwq_s32): Likewise.
5019 (__arm_vldrwq_u32): Likewise.
5020 (__arm_vldrwq_z_s32): Likewise.
5021 (__arm_vldrwq_z_u32): Likewise.
5022 (__arm_vld1q_f32): Likewise.
5023 (__arm_vld1q_f16): Likewise.
5024 (__arm_vldrwq_f32): Likewise.
5025 (__arm_vldrwq_z_f32): Likewise.
5026 (__arm_vldrhq_z_f16): Likewise.
5027 (__arm_vldrhq_f16): Likewise.
5028 (vld1q): Define polymorphic variant.
5029 (vldrhq_gather_offset): Likewise.
5030 (vldrhq_gather_offset_z): Likewise.
5031 (vldrhq_gather_shifted_offset): Likewise.
5032 (vldrhq_gather_shifted_offset_z): Likewise.
5033 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
5037 (LDRGU_Z): Likewise.
5039 (LDRGS_Z): Likewise.
5041 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
5042 (V_sz_elem1): Likewise.
5043 (VLD1Q): Define iterator.
5044 (VLDRHGOQ): Likewise.
5045 (VLDRHGSOQ): Likewise.
5048 (mve_vldrhq_fv8hf): Define RTL pattern.
5049 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
5050 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
5051 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
5052 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
5053 (mve_vldrhq_<supf><mode>): Likewise.
5054 (mve_vldrhq_z_fv8hf): Likewise.
5055 (mve_vldrhq_z_<supf><mode>): Likewise.
5056 (mve_vldrwq_fv4sf): Likewise.
5057 (mve_vldrwq_<supf>v4si): Likewise.
5058 (mve_vldrwq_z_fv4sf): Likewise.
5059 (mve_vldrwq_z_<supf>v4si): Likewise.
5060 (mve_vld1q_f<mode>): Define RTL expand pattern.
5061 (mve_vld1q_<supf><mode>): Likewise.
5063 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5064 Mihail Ionescu <mihail.ionescu@arm.com>
5065 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5067 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
5069 (LDRGBU_Z_QUALIFIERS): Likewise.
5070 (LDRGS_Z_QUALIFIERS): Likewise.
5071 (LDRGU_Z_QUALIFIERS): Likewise.
5072 (LDRS_Z_QUALIFIERS): Likewise.
5073 (LDRU_Z_QUALIFIERS): Likewise.
5074 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
5075 (vldrbq_gather_offset_z_u8): Likewise.
5076 (vldrbq_gather_offset_z_s32): Likewise.
5077 (vldrbq_gather_offset_z_u16): Likewise.
5078 (vldrbq_gather_offset_z_u32): Likewise.
5079 (vldrbq_gather_offset_z_s8): Likewise.
5080 (vldrbq_z_s16): Likewise.
5081 (vldrbq_z_u8): Likewise.
5082 (vldrbq_z_s8): Likewise.
5083 (vldrbq_z_s32): Likewise.
5084 (vldrbq_z_u16): Likewise.
5085 (vldrbq_z_u32): Likewise.
5086 (vldrwq_gather_base_z_u32): Likewise.
5087 (vldrwq_gather_base_z_s32): Likewise.
5088 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
5089 (__arm_vldrbq_gather_offset_z_s32): Likewise.
5090 (__arm_vldrbq_gather_offset_z_s16): Likewise.
5091 (__arm_vldrbq_gather_offset_z_u8): Likewise.
5092 (__arm_vldrbq_gather_offset_z_u32): Likewise.
5093 (__arm_vldrbq_gather_offset_z_u16): Likewise.
5094 (__arm_vldrbq_z_s8): Likewise.
5095 (__arm_vldrbq_z_s32): Likewise.
5096 (__arm_vldrbq_z_s16): Likewise.
5097 (__arm_vldrbq_z_u8): Likewise.
5098 (__arm_vldrbq_z_u32): Likewise.
5099 (__arm_vldrbq_z_u16): Likewise.
5100 (__arm_vldrwq_gather_base_z_s32): Likewise.
5101 (__arm_vldrwq_gather_base_z_u32): Likewise.
5102 (vldrbq_gather_offset_z): Define polymorphic variant.
5103 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
5105 (LDRGBU_Z_QUALIFIERS): Likewise.
5106 (LDRGS_Z_QUALIFIERS): Likewise.
5107 (LDRGU_Z_QUALIFIERS): Likewise.
5108 (LDRS_Z_QUALIFIERS): Likewise.
5109 (LDRU_Z_QUALIFIERS): Likewise.
5110 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
5112 (mve_vldrbq_z_<supf><mode>): Likewise.
5113 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
5115 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5116 Mihail Ionescu <mihail.ionescu@arm.com>
5117 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5119 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
5121 (STRU_P_QUALIFIERS): Likewise.
5122 (STRSU_P_QUALIFIERS): Likewise.
5123 (STRSS_P_QUALIFIERS): Likewise.
5124 (STRSBS_P_QUALIFIERS): Likewise.
5125 (STRSBU_P_QUALIFIERS): Likewise.
5126 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
5127 (vstrbq_p_s32): Likewise.
5128 (vstrbq_p_s16): Likewise.
5129 (vstrbq_p_u8): Likewise.
5130 (vstrbq_p_u32): Likewise.
5131 (vstrbq_p_u16): Likewise.
5132 (vstrbq_scatter_offset_p_s8): Likewise.
5133 (vstrbq_scatter_offset_p_s32): Likewise.
5134 (vstrbq_scatter_offset_p_s16): Likewise.
5135 (vstrbq_scatter_offset_p_u8): Likewise.
5136 (vstrbq_scatter_offset_p_u32): Likewise.
5137 (vstrbq_scatter_offset_p_u16): Likewise.
5138 (vstrwq_scatter_base_p_s32): Likewise.
5139 (vstrwq_scatter_base_p_u32): Likewise.
5140 (__arm_vstrbq_p_s8): Define intrinsic.
5141 (__arm_vstrbq_p_s32): Likewise.
5142 (__arm_vstrbq_p_s16): Likewise.
5143 (__arm_vstrbq_p_u8): Likewise.
5144 (__arm_vstrbq_p_u32): Likewise.
5145 (__arm_vstrbq_p_u16): Likewise.
5146 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
5147 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
5148 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
5149 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
5150 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
5151 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
5152 (__arm_vstrwq_scatter_base_p_s32): Likewise.
5153 (__arm_vstrwq_scatter_base_p_u32): Likewise.
5154 (vstrbq_p): Define polymorphic variant.
5155 (vstrbq_scatter_offset_p): Likewise.
5156 (vstrwq_scatter_base_p): Likewise.
5157 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
5159 (STRU_P_QUALIFIERS): Likewise.
5160 (STRSU_P_QUALIFIERS): Likewise.
5161 (STRSS_P_QUALIFIERS): Likewise.
5162 (STRSBS_P_QUALIFIERS): Likewise.
5163 (STRSBU_P_QUALIFIERS): Likewise.
5164 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
5166 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
5167 (mve_vstrbq_p_<supf><mode>): Likewise.
5169 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5170 Mihail Ionescu <mihail.ionescu@arm.com>
5171 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5173 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
5175 (LDRGS_QUALIFIERS): Likewise.
5176 (LDRS_QUALIFIERS): Likewise.
5177 (LDRU_QUALIFIERS): Likewise.
5178 (LDRGBS_QUALIFIERS): Likewise.
5179 (LDRGBU_QUALIFIERS): Likewise.
5180 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
5181 (vldrbq_gather_offset_s8): Likewise.
5182 (vldrbq_s8): Likewise.
5183 (vldrbq_u8): Likewise.
5184 (vldrbq_gather_offset_u16): Likewise.
5185 (vldrbq_gather_offset_s16): Likewise.
5186 (vldrbq_s16): Likewise.
5187 (vldrbq_u16): Likewise.
5188 (vldrbq_gather_offset_u32): Likewise.
5189 (vldrbq_gather_offset_s32): Likewise.
5190 (vldrbq_s32): Likewise.
5191 (vldrbq_u32): Likewise.
5192 (vldrwq_gather_base_s32): Likewise.
5193 (vldrwq_gather_base_u32): Likewise.
5194 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
5195 (__arm_vldrbq_gather_offset_s8): Likewise.
5196 (__arm_vldrbq_s8): Likewise.
5197 (__arm_vldrbq_u8): Likewise.
5198 (__arm_vldrbq_gather_offset_u16): Likewise.
5199 (__arm_vldrbq_gather_offset_s16): Likewise.
5200 (__arm_vldrbq_s16): Likewise.
5201 (__arm_vldrbq_u16): Likewise.
5202 (__arm_vldrbq_gather_offset_u32): Likewise.
5203 (__arm_vldrbq_gather_offset_s32): Likewise.
5204 (__arm_vldrbq_s32): Likewise.
5205 (__arm_vldrbq_u32): Likewise.
5206 (__arm_vldrwq_gather_base_s32): Likewise.
5207 (__arm_vldrwq_gather_base_u32): Likewise.
5208 (vldrbq_gather_offset): Define polymorphic variant.
5209 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
5211 (LDRGS_QUALIFIERS): Likewise.
5212 (LDRS_QUALIFIERS): Likewise.
5213 (LDRU_QUALIFIERS): Likewise.
5214 (LDRGBS_QUALIFIERS): Likewise.
5215 (LDRGBU_QUALIFIERS): Likewise.
5216 * config/arm/mve.md (VLDRBGOQ): Define iterator.
5218 (VLDRWGBQ): Likewise.
5219 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
5220 (mve_vldrbq_<supf><mode>): Likewise.
5221 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
5223 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5224 Mihail Ionescu <mihail.ionescu@arm.com>
5225 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5227 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
5228 (STRU_QUALIFIERS): Likewise.
5229 (STRSS_QUALIFIERS): Likewise.
5230 (STRSU_QUALIFIERS): Likewise.
5231 (STRSBS_QUALIFIERS): Likewise.
5232 (STRSBU_QUALIFIERS): Likewise.
5233 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
5234 (vstrbq_u8): Likewise.
5235 (vstrbq_u16): Likewise.
5236 (vstrbq_scatter_offset_s8): Likewise.
5237 (vstrbq_scatter_offset_u8): Likewise.
5238 (vstrbq_scatter_offset_u16): Likewise.
5239 (vstrbq_s16): Likewise.
5240 (vstrbq_u32): Likewise.
5241 (vstrbq_scatter_offset_s16): Likewise.
5242 (vstrbq_scatter_offset_u32): Likewise.
5243 (vstrbq_s32): Likewise.
5244 (vstrbq_scatter_offset_s32): Likewise.
5245 (vstrwq_scatter_base_s32): Likewise.
5246 (vstrwq_scatter_base_u32): Likewise.
5247 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
5248 (__arm_vstrbq_scatter_offset_s32): Likewise.
5249 (__arm_vstrbq_scatter_offset_s16): Likewise.
5250 (__arm_vstrbq_scatter_offset_u8): Likewise.
5251 (__arm_vstrbq_scatter_offset_u32): Likewise.
5252 (__arm_vstrbq_scatter_offset_u16): Likewise.
5253 (__arm_vstrbq_s8): Likewise.
5254 (__arm_vstrbq_s32): Likewise.
5255 (__arm_vstrbq_s16): Likewise.
5256 (__arm_vstrbq_u8): Likewise.
5257 (__arm_vstrbq_u32): Likewise.
5258 (__arm_vstrbq_u16): Likewise.
5259 (__arm_vstrwq_scatter_base_s32): Likewise.
5260 (__arm_vstrwq_scatter_base_u32): Likewise.
5261 (vstrbq): Define polymorphic variant.
5262 (vstrbq_scatter_offset): Likewise.
5263 (vstrwq_scatter_base): Likewise.
5264 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
5266 (STRU_QUALIFIERS): Likewise.
5267 (STRSS_QUALIFIERS): Likewise.
5268 (STRSU_QUALIFIERS): Likewise.
5269 (STRSBS_QUALIFIERS): Likewise.
5270 (STRSBU_QUALIFIERS): Likewise.
5271 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
5272 (VSTRWSBQ): Define iterators.
5273 (VSTRBSOQ): Likewise.
5275 (mve_vstrbq_<supf><mode>): Define RTL pattern.
5276 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
5277 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
5279 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5280 Mihail Ionescu <mihail.ionescu@arm.com>
5281 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5283 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
5284 (vabdq_m_f16): Likewise.
5285 (vaddq_m_f32): Likewise.
5286 (vaddq_m_f16): Likewise.
5287 (vaddq_m_n_f32): Likewise.
5288 (vaddq_m_n_f16): Likewise.
5289 (vandq_m_f32): Likewise.
5290 (vandq_m_f16): Likewise.
5291 (vbicq_m_f32): Likewise.
5292 (vbicq_m_f16): Likewise.
5293 (vbrsrq_m_n_f32): Likewise.
5294 (vbrsrq_m_n_f16): Likewise.
5295 (vcaddq_rot270_m_f32): Likewise.
5296 (vcaddq_rot270_m_f16): Likewise.
5297 (vcaddq_rot90_m_f32): Likewise.
5298 (vcaddq_rot90_m_f16): Likewise.
5299 (vcmlaq_m_f32): Likewise.
5300 (vcmlaq_m_f16): Likewise.
5301 (vcmlaq_rot180_m_f32): Likewise.
5302 (vcmlaq_rot180_m_f16): Likewise.
5303 (vcmlaq_rot270_m_f32): Likewise.
5304 (vcmlaq_rot270_m_f16): Likewise.
5305 (vcmlaq_rot90_m_f32): Likewise.
5306 (vcmlaq_rot90_m_f16): Likewise.
5307 (vcmulq_m_f32): Likewise.
5308 (vcmulq_m_f16): Likewise.
5309 (vcmulq_rot180_m_f32): Likewise.
5310 (vcmulq_rot180_m_f16): Likewise.
5311 (vcmulq_rot270_m_f32): Likewise.
5312 (vcmulq_rot270_m_f16): Likewise.
5313 (vcmulq_rot90_m_f32): Likewise.
5314 (vcmulq_rot90_m_f16): Likewise.
5315 (vcvtq_m_n_s32_f32): Likewise.
5316 (vcvtq_m_n_s16_f16): Likewise.
5317 (vcvtq_m_n_u32_f32): Likewise.
5318 (vcvtq_m_n_u16_f16): Likewise.
5319 (veorq_m_f32): Likewise.
5320 (veorq_m_f16): Likewise.
5321 (vfmaq_m_f32): Likewise.
5322 (vfmaq_m_f16): Likewise.
5323 (vfmaq_m_n_f32): Likewise.
5324 (vfmaq_m_n_f16): Likewise.
5325 (vfmasq_m_n_f32): Likewise.
5326 (vfmasq_m_n_f16): Likewise.
5327 (vfmsq_m_f32): Likewise.
5328 (vfmsq_m_f16): Likewise.
5329 (vmaxnmq_m_f32): Likewise.
5330 (vmaxnmq_m_f16): Likewise.
5331 (vminnmq_m_f32): Likewise.
5332 (vminnmq_m_f16): Likewise.
5333 (vmulq_m_f32): Likewise.
5334 (vmulq_m_f16): Likewise.
5335 (vmulq_m_n_f32): Likewise.
5336 (vmulq_m_n_f16): Likewise.
5337 (vornq_m_f32): Likewise.
5338 (vornq_m_f16): Likewise.
5339 (vorrq_m_f32): Likewise.
5340 (vorrq_m_f16): Likewise.
5341 (vsubq_m_f32): Likewise.
5342 (vsubq_m_f16): Likewise.
5343 (vsubq_m_n_f32): Likewise.
5344 (vsubq_m_n_f16): Likewise.
5345 (__attribute__): Likewise.
5346 (__arm_vabdq_m_f32): Likewise.
5347 (__arm_vabdq_m_f16): Likewise.
5348 (__arm_vaddq_m_f32): Likewise.
5349 (__arm_vaddq_m_f16): Likewise.
5350 (__arm_vaddq_m_n_f32): Likewise.
5351 (__arm_vaddq_m_n_f16): Likewise.
5352 (__arm_vandq_m_f32): Likewise.
5353 (__arm_vandq_m_f16): Likewise.
5354 (__arm_vbicq_m_f32): Likewise.
5355 (__arm_vbicq_m_f16): Likewise.
5356 (__arm_vbrsrq_m_n_f32): Likewise.
5357 (__arm_vbrsrq_m_n_f16): Likewise.
5358 (__arm_vcaddq_rot270_m_f32): Likewise.
5359 (__arm_vcaddq_rot270_m_f16): Likewise.
5360 (__arm_vcaddq_rot90_m_f32): Likewise.
5361 (__arm_vcaddq_rot90_m_f16): Likewise.
5362 (__arm_vcmlaq_m_f32): Likewise.
5363 (__arm_vcmlaq_m_f16): Likewise.
5364 (__arm_vcmlaq_rot180_m_f32): Likewise.
5365 (__arm_vcmlaq_rot180_m_f16): Likewise.
5366 (__arm_vcmlaq_rot270_m_f32): Likewise.
5367 (__arm_vcmlaq_rot270_m_f16): Likewise.
5368 (__arm_vcmlaq_rot90_m_f32): Likewise.
5369 (__arm_vcmlaq_rot90_m_f16): Likewise.
5370 (__arm_vcmulq_m_f32): Likewise.
5371 (__arm_vcmulq_m_f16): Likewise.
5372 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
5373 (__arm_vcmulq_rot180_m_f16): Likewise.
5374 (__arm_vcmulq_rot270_m_f32): Likewise.
5375 (__arm_vcmulq_rot270_m_f16): Likewise.
5376 (__arm_vcmulq_rot90_m_f32): Likewise.
5377 (__arm_vcmulq_rot90_m_f16): Likewise.
5378 (__arm_vcvtq_m_n_s32_f32): Likewise.
5379 (__arm_vcvtq_m_n_s16_f16): Likewise.
5380 (__arm_vcvtq_m_n_u32_f32): Likewise.
5381 (__arm_vcvtq_m_n_u16_f16): Likewise.
5382 (__arm_veorq_m_f32): Likewise.
5383 (__arm_veorq_m_f16): Likewise.
5384 (__arm_vfmaq_m_f32): Likewise.
5385 (__arm_vfmaq_m_f16): Likewise.
5386 (__arm_vfmaq_m_n_f32): Likewise.
5387 (__arm_vfmaq_m_n_f16): Likewise.
5388 (__arm_vfmasq_m_n_f32): Likewise.
5389 (__arm_vfmasq_m_n_f16): Likewise.
5390 (__arm_vfmsq_m_f32): Likewise.
5391 (__arm_vfmsq_m_f16): Likewise.
5392 (__arm_vmaxnmq_m_f32): Likewise.
5393 (__arm_vmaxnmq_m_f16): Likewise.
5394 (__arm_vminnmq_m_f32): Likewise.
5395 (__arm_vminnmq_m_f16): Likewise.
5396 (__arm_vmulq_m_f32): Likewise.
5397 (__arm_vmulq_m_f16): Likewise.
5398 (__arm_vmulq_m_n_f32): Likewise.
5399 (__arm_vmulq_m_n_f16): Likewise.
5400 (__arm_vornq_m_f32): Likewise.
5401 (__arm_vornq_m_f16): Likewise.
5402 (__arm_vorrq_m_f32): Likewise.
5403 (__arm_vorrq_m_f16): Likewise.
5404 (__arm_vsubq_m_f32): Likewise.
5405 (__arm_vsubq_m_f16): Likewise.
5406 (__arm_vsubq_m_n_f32): Likewise.
5407 (__arm_vsubq_m_n_f16): Likewise.
5408 (vabdq_m): Define polymorphic variant.
5409 (vaddq_m): Likewise.
5410 (vaddq_m_n): Likewise.
5411 (vandq_m): Likewise.
5412 (vbicq_m): Likewise.
5413 (vbrsrq_m_n): Likewise.
5414 (vcaddq_rot270_m): Likewise.
5415 (vcaddq_rot90_m): Likewise.
5416 (vcmlaq_m): Likewise.
5417 (vcmlaq_rot180_m): Likewise.
5418 (vcmlaq_rot270_m): Likewise.
5419 (vcmlaq_rot90_m): Likewise.
5420 (vcmulq_m): Likewise.
5421 (vcmulq_rot180_m): Likewise.
5422 (vcmulq_rot270_m): Likewise.
5423 (vcmulq_rot90_m): Likewise.
5424 (veorq_m): Likewise.
5425 (vfmaq_m): Likewise.
5426 (vfmaq_m_n): Likewise.
5427 (vfmasq_m_n): Likewise.
5428 (vfmsq_m): Likewise.
5429 (vmaxnmq_m): Likewise.
5430 (vminnmq_m): Likewise.
5431 (vmulq_m): Likewise.
5432 (vmulq_m_n): Likewise.
5433 (vornq_m): Likewise.
5434 (vsubq_m): Likewise.
5435 (vsubq_m_n): Likewise.
5436 (vorrq_m): Likewise.
5437 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5439 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5440 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5441 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
5442 (mve_vaddq_m_f<mode>): Likewise.
5443 (mve_vaddq_m_n_f<mode>): Likewise.
5444 (mve_vandq_m_f<mode>): Likewise.
5445 (mve_vbicq_m_f<mode>): Likewise.
5446 (mve_vbrsrq_m_n_f<mode>): Likewise.
5447 (mve_vcaddq_rot270_m_f<mode>): Likewise.
5448 (mve_vcaddq_rot90_m_f<mode>): Likewise.
5449 (mve_vcmlaq_m_f<mode>): Likewise.
5450 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
5451 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
5452 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
5453 (mve_vcmulq_m_f<mode>): Likewise.
5454 (mve_vcmulq_rot180_m_f<mode>): Likewise.
5455 (mve_vcmulq_rot270_m_f<mode>): Likewise.
5456 (mve_vcmulq_rot90_m_f<mode>): Likewise.
5457 (mve_veorq_m_f<mode>): Likewise.
5458 (mve_vfmaq_m_f<mode>): Likewise.
5459 (mve_vfmaq_m_n_f<mode>): Likewise.
5460 (mve_vfmasq_m_n_f<mode>): Likewise.
5461 (mve_vfmsq_m_f<mode>): Likewise.
5462 (mve_vmaxnmq_m_f<mode>): Likewise.
5463 (mve_vminnmq_m_f<mode>): Likewise.
5464 (mve_vmulq_m_f<mode>): Likewise.
5465 (mve_vmulq_m_n_f<mode>): Likewise.
5466 (mve_vornq_m_f<mode>): Likewise.
5467 (mve_vorrq_m_f<mode>): Likewise.
5468 (mve_vsubq_m_f<mode>): Likewise.
5469 (mve_vsubq_m_n_f<mode>): Likewise.
5471 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5472 Mihail Ionescu <mihail.ionescu@arm.com>
5473 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5475 * config/arm/arm-protos.h (arm_mve_immediate_check):
5476 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
5477 mode and interger value.
5478 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
5479 (vmlaldavaq_p_s16): Likewise.
5480 (vmlaldavaq_p_u32): Likewise.
5481 (vmlaldavaq_p_u16): Likewise.
5482 (vmlaldavaxq_p_s32): Likewise.
5483 (vmlaldavaxq_p_s16): Likewise.
5484 (vmlaldavaxq_p_u32): Likewise.
5485 (vmlaldavaxq_p_u16): Likewise.
5486 (vmlsldavaq_p_s32): Likewise.
5487 (vmlsldavaq_p_s16): Likewise.
5488 (vmlsldavaxq_p_s32): Likewise.
5489 (vmlsldavaxq_p_s16): Likewise.
5490 (vmullbq_poly_m_p8): Likewise.
5491 (vmullbq_poly_m_p16): Likewise.
5492 (vmulltq_poly_m_p8): Likewise.
5493 (vmulltq_poly_m_p16): Likewise.
5494 (vqdmullbq_m_n_s32): Likewise.
5495 (vqdmullbq_m_n_s16): Likewise.
5496 (vqdmullbq_m_s32): Likewise.
5497 (vqdmullbq_m_s16): Likewise.
5498 (vqdmulltq_m_n_s32): Likewise.
5499 (vqdmulltq_m_n_s16): Likewise.
5500 (vqdmulltq_m_s32): Likewise.
5501 (vqdmulltq_m_s16): Likewise.
5502 (vqrshrnbq_m_n_s32): Likewise.
5503 (vqrshrnbq_m_n_s16): Likewise.
5504 (vqrshrnbq_m_n_u32): Likewise.
5505 (vqrshrnbq_m_n_u16): Likewise.
5506 (vqrshrntq_m_n_s32): Likewise.
5507 (vqrshrntq_m_n_s16): Likewise.
5508 (vqrshrntq_m_n_u32): Likewise.
5509 (vqrshrntq_m_n_u16): Likewise.
5510 (vqrshrunbq_m_n_s32): Likewise.
5511 (vqrshrunbq_m_n_s16): Likewise.
5512 (vqrshruntq_m_n_s32): Likewise.
5513 (vqrshruntq_m_n_s16): Likewise.
5514 (vqshrnbq_m_n_s32): Likewise.
5515 (vqshrnbq_m_n_s16): Likewise.
5516 (vqshrnbq_m_n_u32): Likewise.
5517 (vqshrnbq_m_n_u16): Likewise.
5518 (vqshrntq_m_n_s32): Likewise.
5519 (vqshrntq_m_n_s16): Likewise.
5520 (vqshrntq_m_n_u32): Likewise.
5521 (vqshrntq_m_n_u16): Likewise.
5522 (vqshrunbq_m_n_s32): Likewise.
5523 (vqshrunbq_m_n_s16): Likewise.
5524 (vqshruntq_m_n_s32): Likewise.
5525 (vqshruntq_m_n_s16): Likewise.
5526 (vrmlaldavhaq_p_s32): Likewise.
5527 (vrmlaldavhaq_p_u32): Likewise.
5528 (vrmlaldavhaxq_p_s32): Likewise.
5529 (vrmlsldavhaq_p_s32): Likewise.
5530 (vrmlsldavhaxq_p_s32): Likewise.
5531 (vrshrnbq_m_n_s32): Likewise.
5532 (vrshrnbq_m_n_s16): Likewise.
5533 (vrshrnbq_m_n_u32): Likewise.
5534 (vrshrnbq_m_n_u16): Likewise.
5535 (vrshrntq_m_n_s32): Likewise.
5536 (vrshrntq_m_n_s16): Likewise.
5537 (vrshrntq_m_n_u32): Likewise.
5538 (vrshrntq_m_n_u16): Likewise.
5539 (vshllbq_m_n_s8): Likewise.
5540 (vshllbq_m_n_s16): Likewise.
5541 (vshllbq_m_n_u8): Likewise.
5542 (vshllbq_m_n_u16): Likewise.
5543 (vshlltq_m_n_s8): Likewise.
5544 (vshlltq_m_n_s16): Likewise.
5545 (vshlltq_m_n_u8): Likewise.
5546 (vshlltq_m_n_u16): Likewise.
5547 (vshrnbq_m_n_s32): Likewise.
5548 (vshrnbq_m_n_s16): Likewise.
5549 (vshrnbq_m_n_u32): Likewise.
5550 (vshrnbq_m_n_u16): Likewise.
5551 (vshrntq_m_n_s32): Likewise.
5552 (vshrntq_m_n_s16): Likewise.
5553 (vshrntq_m_n_u32): Likewise.
5554 (vshrntq_m_n_u16): Likewise.
5555 (__arm_vmlaldavaq_p_s32): Define intrinsic.
5556 (__arm_vmlaldavaq_p_s16): Likewise.
5557 (__arm_vmlaldavaq_p_u32): Likewise.
5558 (__arm_vmlaldavaq_p_u16): Likewise.
5559 (__arm_vmlaldavaxq_p_s32): Likewise.
5560 (__arm_vmlaldavaxq_p_s16): Likewise.
5561 (__arm_vmlaldavaxq_p_u32): Likewise.
5562 (__arm_vmlaldavaxq_p_u16): Likewise.
5563 (__arm_vmlsldavaq_p_s32): Likewise.
5564 (__arm_vmlsldavaq_p_s16): Likewise.
5565 (__arm_vmlsldavaxq_p_s32): Likewise.
5566 (__arm_vmlsldavaxq_p_s16): Likewise.
5567 (__arm_vmullbq_poly_m_p8): Likewise.
5568 (__arm_vmullbq_poly_m_p16): Likewise.
5569 (__arm_vmulltq_poly_m_p8): Likewise.
5570 (__arm_vmulltq_poly_m_p16): Likewise.
5571 (__arm_vqdmullbq_m_n_s32): Likewise.
5572 (__arm_vqdmullbq_m_n_s16): Likewise.
5573 (__arm_vqdmullbq_m_s32): Likewise.
5574 (__arm_vqdmullbq_m_s16): Likewise.
5575 (__arm_vqdmulltq_m_n_s32): Likewise.
5576 (__arm_vqdmulltq_m_n_s16): Likewise.
5577 (__arm_vqdmulltq_m_s32): Likewise.
5578 (__arm_vqdmulltq_m_s16): Likewise.
5579 (__arm_vqrshrnbq_m_n_s32): Likewise.
5580 (__arm_vqrshrnbq_m_n_s16): Likewise.
5581 (__arm_vqrshrnbq_m_n_u32): Likewise.
5582 (__arm_vqrshrnbq_m_n_u16): Likewise.
5583 (__arm_vqrshrntq_m_n_s32): Likewise.
5584 (__arm_vqrshrntq_m_n_s16): Likewise.
5585 (__arm_vqrshrntq_m_n_u32): Likewise.
5586 (__arm_vqrshrntq_m_n_u16): Likewise.
5587 (__arm_vqrshrunbq_m_n_s32): Likewise.
5588 (__arm_vqrshrunbq_m_n_s16): Likewise.
5589 (__arm_vqrshruntq_m_n_s32): Likewise.
5590 (__arm_vqrshruntq_m_n_s16): Likewise.
5591 (__arm_vqshrnbq_m_n_s32): Likewise.
5592 (__arm_vqshrnbq_m_n_s16): Likewise.
5593 (__arm_vqshrnbq_m_n_u32): Likewise.
5594 (__arm_vqshrnbq_m_n_u16): Likewise.
5595 (__arm_vqshrntq_m_n_s32): Likewise.
5596 (__arm_vqshrntq_m_n_s16): Likewise.
5597 (__arm_vqshrntq_m_n_u32): Likewise.
5598 (__arm_vqshrntq_m_n_u16): Likewise.
5599 (__arm_vqshrunbq_m_n_s32): Likewise.
5600 (__arm_vqshrunbq_m_n_s16): Likewise.
5601 (__arm_vqshruntq_m_n_s32): Likewise.
5602 (__arm_vqshruntq_m_n_s16): Likewise.
5603 (__arm_vrmlaldavhaq_p_s32): Likewise.
5604 (__arm_vrmlaldavhaq_p_u32): Likewise.
5605 (__arm_vrmlaldavhaxq_p_s32): Likewise.
5606 (__arm_vrmlsldavhaq_p_s32): Likewise.
5607 (__arm_vrmlsldavhaxq_p_s32): Likewise.
5608 (__arm_vrshrnbq_m_n_s32): Likewise.
5609 (__arm_vrshrnbq_m_n_s16): Likewise.
5610 (__arm_vrshrnbq_m_n_u32): Likewise.
5611 (__arm_vrshrnbq_m_n_u16): Likewise.
5612 (__arm_vrshrntq_m_n_s32): Likewise.
5613 (__arm_vrshrntq_m_n_s16): Likewise.
5614 (__arm_vrshrntq_m_n_u32): Likewise.
5615 (__arm_vrshrntq_m_n_u16): Likewise.
5616 (__arm_vshllbq_m_n_s8): Likewise.
5617 (__arm_vshllbq_m_n_s16): Likewise.
5618 (__arm_vshllbq_m_n_u8): Likewise.
5619 (__arm_vshllbq_m_n_u16): Likewise.
5620 (__arm_vshlltq_m_n_s8): Likewise.
5621 (__arm_vshlltq_m_n_s16): Likewise.
5622 (__arm_vshlltq_m_n_u8): Likewise.
5623 (__arm_vshlltq_m_n_u16): Likewise.
5624 (__arm_vshrnbq_m_n_s32): Likewise.
5625 (__arm_vshrnbq_m_n_s16): Likewise.
5626 (__arm_vshrnbq_m_n_u32): Likewise.
5627 (__arm_vshrnbq_m_n_u16): Likewise.
5628 (__arm_vshrntq_m_n_s32): Likewise.
5629 (__arm_vshrntq_m_n_s16): Likewise.
5630 (__arm_vshrntq_m_n_u32): Likewise.
5631 (__arm_vshrntq_m_n_u16): Likewise.
5632 (vmullbq_poly_m): Define polymorphic variant.
5633 (vmulltq_poly_m): Likewise.
5634 (vshllbq_m): Likewise.
5635 (vshrntq_m_n): Likewise.
5636 (vshrnbq_m_n): Likewise.
5637 (vshlltq_m_n): Likewise.
5638 (vshllbq_m_n): Likewise.
5639 (vrshrntq_m_n): Likewise.
5640 (vrshrnbq_m_n): Likewise.
5641 (vqshruntq_m_n): Likewise.
5642 (vqshrunbq_m_n): Likewise.
5643 (vqdmullbq_m_n): Likewise.
5644 (vqdmullbq_m): Likewise.
5645 (vqdmulltq_m_n): Likewise.
5646 (vqdmulltq_m): Likewise.
5647 (vqrshrnbq_m_n): Likewise.
5648 (vqrshrntq_m_n): Likewise.
5649 (vqrshrunbq_m_n): Likewise.
5650 (vqrshruntq_m_n): Likewise.
5651 (vqshrnbq_m_n): Likewise.
5652 (vqshrntq_m_n): Likewise.
5653 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5655 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5656 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5657 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
5658 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5659 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
5660 (VMLALDAVAXQ_P): Likewise.
5661 (VQRSHRNBQ_M_N): Likewise.
5662 (VQRSHRNTQ_M_N): Likewise.
5663 (VQSHRNBQ_M_N): Likewise.
5664 (VQSHRNTQ_M_N): Likewise.
5665 (VRSHRNBQ_M_N): Likewise.
5666 (VRSHRNTQ_M_N): Likewise.
5667 (VSHLLBQ_M_N): Likewise.
5668 (VSHLLTQ_M_N): Likewise.
5669 (VSHRNBQ_M_N): Likewise.
5670 (VSHRNTQ_M_N): Likewise.
5671 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
5672 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
5673 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
5674 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
5675 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
5676 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
5677 (mve_vrmlaldavhaq_p_sv4si): Likewise.
5678 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
5679 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
5680 (mve_vshllbq_m_n_<supf><mode>): Likewise.
5681 (mve_vshlltq_m_n_<supf><mode>): Likewise.
5682 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
5683 (mve_vshrntq_m_n_<supf><mode>): Likewise.
5684 (mve_vmlsldavaq_p_s<mode>): Likewise.
5685 (mve_vmlsldavaxq_p_s<mode>): Likewise.
5686 (mve_vmullbq_poly_m_p<mode>): Likewise.
5687 (mve_vmulltq_poly_m_p<mode>): Likewise.
5688 (mve_vqdmullbq_m_n_s<mode>): Likewise.
5689 (mve_vqdmullbq_m_s<mode>): Likewise.
5690 (mve_vqdmulltq_m_n_s<mode>): Likewise.
5691 (mve_vqdmulltq_m_s<mode>): Likewise.
5692 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
5693 (mve_vqrshruntq_m_n_s<mode>): Likewise.
5694 (mve_vqshrunbq_m_n_s<mode>): Likewise.
5695 (mve_vqshruntq_m_n_s<mode>): Likewise.
5696 (mve_vrmlaldavhaq_p_uv4si): Likewise.
5697 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
5698 (mve_vrmlsldavhaq_p_sv4si): Likewise.
5699 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
5701 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5702 Mihail Ionescu <mihail.ionescu@arm.com>
5703 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5705 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
5706 (vabdq_m_s32): Likewise.
5707 (vabdq_m_s16): Likewise.
5708 (vabdq_m_u8): Likewise.
5709 (vabdq_m_u32): Likewise.
5710 (vabdq_m_u16): Likewise.
5711 (vaddq_m_n_s8): Likewise.
5712 (vaddq_m_n_s32): Likewise.
5713 (vaddq_m_n_s16): Likewise.
5714 (vaddq_m_n_u8): Likewise.
5715 (vaddq_m_n_u32): Likewise.
5716 (vaddq_m_n_u16): Likewise.
5717 (vaddq_m_s8): Likewise.
5718 (vaddq_m_s32): Likewise.
5719 (vaddq_m_s16): Likewise.
5720 (vaddq_m_u8): Likewise.
5721 (vaddq_m_u32): Likewise.
5722 (vaddq_m_u16): Likewise.
5723 (vandq_m_s8): Likewise.
5724 (vandq_m_s32): Likewise.
5725 (vandq_m_s16): Likewise.
5726 (vandq_m_u8): Likewise.
5727 (vandq_m_u32): Likewise.
5728 (vandq_m_u16): Likewise.
5729 (vbicq_m_s8): Likewise.
5730 (vbicq_m_s32): Likewise.
5731 (vbicq_m_s16): Likewise.
5732 (vbicq_m_u8): Likewise.
5733 (vbicq_m_u32): Likewise.
5734 (vbicq_m_u16): Likewise.
5735 (vbrsrq_m_n_s8): Likewise.
5736 (vbrsrq_m_n_s32): Likewise.
5737 (vbrsrq_m_n_s16): Likewise.
5738 (vbrsrq_m_n_u8): Likewise.
5739 (vbrsrq_m_n_u32): Likewise.
5740 (vbrsrq_m_n_u16): Likewise.
5741 (vcaddq_rot270_m_s8): Likewise.
5742 (vcaddq_rot270_m_s32): Likewise.
5743 (vcaddq_rot270_m_s16): Likewise.
5744 (vcaddq_rot270_m_u8): Likewise.
5745 (vcaddq_rot270_m_u32): Likewise.
5746 (vcaddq_rot270_m_u16): Likewise.
5747 (vcaddq_rot90_m_s8): Likewise.
5748 (vcaddq_rot90_m_s32): Likewise.
5749 (vcaddq_rot90_m_s16): Likewise.
5750 (vcaddq_rot90_m_u8): Likewise.
5751 (vcaddq_rot90_m_u32): Likewise.
5752 (vcaddq_rot90_m_u16): Likewise.
5753 (veorq_m_s8): Likewise.
5754 (veorq_m_s32): Likewise.
5755 (veorq_m_s16): Likewise.
5756 (veorq_m_u8): Likewise.
5757 (veorq_m_u32): Likewise.
5758 (veorq_m_u16): Likewise.
5759 (vhaddq_m_n_s8): Likewise.
5760 (vhaddq_m_n_s32): Likewise.
5761 (vhaddq_m_n_s16): Likewise.
5762 (vhaddq_m_n_u8): Likewise.
5763 (vhaddq_m_n_u32): Likewise.
5764 (vhaddq_m_n_u16): Likewise.
5765 (vhaddq_m_s8): Likewise.
5766 (vhaddq_m_s32): Likewise.
5767 (vhaddq_m_s16): Likewise.
5768 (vhaddq_m_u8): Likewise.
5769 (vhaddq_m_u32): Likewise.
5770 (vhaddq_m_u16): Likewise.
5771 (vhcaddq_rot270_m_s8): Likewise.
5772 (vhcaddq_rot270_m_s32): Likewise.
5773 (vhcaddq_rot270_m_s16): Likewise.
5774 (vhcaddq_rot90_m_s8): Likewise.
5775 (vhcaddq_rot90_m_s32): Likewise.
5776 (vhcaddq_rot90_m_s16): Likewise.
5777 (vhsubq_m_n_s8): Likewise.
5778 (vhsubq_m_n_s32): Likewise.
5779 (vhsubq_m_n_s16): Likewise.
5780 (vhsubq_m_n_u8): Likewise.
5781 (vhsubq_m_n_u32): Likewise.
5782 (vhsubq_m_n_u16): Likewise.
5783 (vhsubq_m_s8): Likewise.
5784 (vhsubq_m_s32): Likewise.
5785 (vhsubq_m_s16): Likewise.
5786 (vhsubq_m_u8): Likewise.
5787 (vhsubq_m_u32): Likewise.
5788 (vhsubq_m_u16): Likewise.
5789 (vmaxq_m_s8): Likewise.
5790 (vmaxq_m_s32): Likewise.
5791 (vmaxq_m_s16): Likewise.
5792 (vmaxq_m_u8): Likewise.
5793 (vmaxq_m_u32): Likewise.
5794 (vmaxq_m_u16): Likewise.
5795 (vminq_m_s8): Likewise.
5796 (vminq_m_s32): Likewise.
5797 (vminq_m_s16): Likewise.
5798 (vminq_m_u8): Likewise.
5799 (vminq_m_u32): Likewise.
5800 (vminq_m_u16): Likewise.
5801 (vmladavaq_p_s8): Likewise.
5802 (vmladavaq_p_s32): Likewise.
5803 (vmladavaq_p_s16): Likewise.
5804 (vmladavaq_p_u8): Likewise.
5805 (vmladavaq_p_u32): Likewise.
5806 (vmladavaq_p_u16): Likewise.
5807 (vmladavaxq_p_s8): Likewise.
5808 (vmladavaxq_p_s32): Likewise.
5809 (vmladavaxq_p_s16): Likewise.
5810 (vmlaq_m_n_s8): Likewise.
5811 (vmlaq_m_n_s32): Likewise.
5812 (vmlaq_m_n_s16): Likewise.
5813 (vmlaq_m_n_u8): Likewise.
5814 (vmlaq_m_n_u32): Likewise.
5815 (vmlaq_m_n_u16): Likewise.
5816 (vmlasq_m_n_s8): Likewise.
5817 (vmlasq_m_n_s32): Likewise.
5818 (vmlasq_m_n_s16): Likewise.
5819 (vmlasq_m_n_u8): Likewise.
5820 (vmlasq_m_n_u32): Likewise.
5821 (vmlasq_m_n_u16): Likewise.
5822 (vmlsdavaq_p_s8): Likewise.
5823 (vmlsdavaq_p_s32): Likewise.
5824 (vmlsdavaq_p_s16): Likewise.
5825 (vmlsdavaxq_p_s8): Likewise.
5826 (vmlsdavaxq_p_s32): Likewise.
5827 (vmlsdavaxq_p_s16): Likewise.
5828 (vmulhq_m_s8): Likewise.
5829 (vmulhq_m_s32): Likewise.
5830 (vmulhq_m_s16): Likewise.
5831 (vmulhq_m_u8): Likewise.
5832 (vmulhq_m_u32): Likewise.
5833 (vmulhq_m_u16): Likewise.
5834 (vmullbq_int_m_s8): Likewise.
5835 (vmullbq_int_m_s32): Likewise.
5836 (vmullbq_int_m_s16): Likewise.
5837 (vmullbq_int_m_u8): Likewise.
5838 (vmullbq_int_m_u32): Likewise.
5839 (vmullbq_int_m_u16): Likewise.
5840 (vmulltq_int_m_s8): Likewise.
5841 (vmulltq_int_m_s32): Likewise.
5842 (vmulltq_int_m_s16): Likewise.
5843 (vmulltq_int_m_u8): Likewise.
5844 (vmulltq_int_m_u32): Likewise.
5845 (vmulltq_int_m_u16): Likewise.
5846 (vmulq_m_n_s8): Likewise.
5847 (vmulq_m_n_s32): Likewise.
5848 (vmulq_m_n_s16): Likewise.
5849 (vmulq_m_n_u8): Likewise.
5850 (vmulq_m_n_u32): Likewise.
5851 (vmulq_m_n_u16): Likewise.
5852 (vmulq_m_s8): Likewise.
5853 (vmulq_m_s32): Likewise.
5854 (vmulq_m_s16): Likewise.
5855 (vmulq_m_u8): Likewise.
5856 (vmulq_m_u32): Likewise.
5857 (vmulq_m_u16): Likewise.
5858 (vornq_m_s8): Likewise.
5859 (vornq_m_s32): Likewise.
5860 (vornq_m_s16): Likewise.
5861 (vornq_m_u8): Likewise.
5862 (vornq_m_u32): Likewise.
5863 (vornq_m_u16): Likewise.
5864 (vorrq_m_s8): Likewise.
5865 (vorrq_m_s32): Likewise.
5866 (vorrq_m_s16): Likewise.
5867 (vorrq_m_u8): Likewise.
5868 (vorrq_m_u32): Likewise.
5869 (vorrq_m_u16): Likewise.
5870 (vqaddq_m_n_s8): Likewise.
5871 (vqaddq_m_n_s32): Likewise.
5872 (vqaddq_m_n_s16): Likewise.
5873 (vqaddq_m_n_u8): Likewise.
5874 (vqaddq_m_n_u32): Likewise.
5875 (vqaddq_m_n_u16): Likewise.
5876 (vqaddq_m_s8): Likewise.
5877 (vqaddq_m_s32): Likewise.
5878 (vqaddq_m_s16): Likewise.
5879 (vqaddq_m_u8): Likewise.
5880 (vqaddq_m_u32): Likewise.
5881 (vqaddq_m_u16): Likewise.
5882 (vqdmladhq_m_s8): Likewise.
5883 (vqdmladhq_m_s32): Likewise.
5884 (vqdmladhq_m_s16): Likewise.
5885 (vqdmladhxq_m_s8): Likewise.
5886 (vqdmladhxq_m_s32): Likewise.
5887 (vqdmladhxq_m_s16): Likewise.
5888 (vqdmlahq_m_n_s8): Likewise.
5889 (vqdmlahq_m_n_s32): Likewise.
5890 (vqdmlahq_m_n_s16): Likewise.
5891 (vqdmlahq_m_n_u8): Likewise.
5892 (vqdmlahq_m_n_u32): Likewise.
5893 (vqdmlahq_m_n_u16): Likewise.
5894 (vqdmlsdhq_m_s8): Likewise.
5895 (vqdmlsdhq_m_s32): Likewise.
5896 (vqdmlsdhq_m_s16): Likewise.
5897 (vqdmlsdhxq_m_s8): Likewise.
5898 (vqdmlsdhxq_m_s32): Likewise.
5899 (vqdmlsdhxq_m_s16): Likewise.
5900 (vqdmulhq_m_n_s8): Likewise.
5901 (vqdmulhq_m_n_s32): Likewise.
5902 (vqdmulhq_m_n_s16): Likewise.
5903 (vqdmulhq_m_s8): Likewise.
5904 (vqdmulhq_m_s32): Likewise.
5905 (vqdmulhq_m_s16): Likewise.
5906 (vqrdmladhq_m_s8): Likewise.
5907 (vqrdmladhq_m_s32): Likewise.
5908 (vqrdmladhq_m_s16): Likewise.
5909 (vqrdmladhxq_m_s8): Likewise.
5910 (vqrdmladhxq_m_s32): Likewise.
5911 (vqrdmladhxq_m_s16): Likewise.
5912 (vqrdmlahq_m_n_s8): Likewise.
5913 (vqrdmlahq_m_n_s32): Likewise.
5914 (vqrdmlahq_m_n_s16): Likewise.
5915 (vqrdmlahq_m_n_u8): Likewise.
5916 (vqrdmlahq_m_n_u32): Likewise.
5917 (vqrdmlahq_m_n_u16): Likewise.
5918 (vqrdmlashq_m_n_s8): Likewise.
5919 (vqrdmlashq_m_n_s32): Likewise.
5920 (vqrdmlashq_m_n_s16): Likewise.
5921 (vqrdmlashq_m_n_u8): Likewise.
5922 (vqrdmlashq_m_n_u32): Likewise.
5923 (vqrdmlashq_m_n_u16): Likewise.
5924 (vqrdmlsdhq_m_s8): Likewise.
5925 (vqrdmlsdhq_m_s32): Likewise.
5926 (vqrdmlsdhq_m_s16): Likewise.
5927 (vqrdmlsdhxq_m_s8): Likewise.
5928 (vqrdmlsdhxq_m_s32): Likewise.
5929 (vqrdmlsdhxq_m_s16): Likewise.
5930 (vqrdmulhq_m_n_s8): Likewise.
5931 (vqrdmulhq_m_n_s32): Likewise.
5932 (vqrdmulhq_m_n_s16): Likewise.
5933 (vqrdmulhq_m_s8): Likewise.
5934 (vqrdmulhq_m_s32): Likewise.
5935 (vqrdmulhq_m_s16): Likewise.
5936 (vqrshlq_m_s8): Likewise.
5937 (vqrshlq_m_s32): Likewise.
5938 (vqrshlq_m_s16): Likewise.
5939 (vqrshlq_m_u8): Likewise.
5940 (vqrshlq_m_u32): Likewise.
5941 (vqrshlq_m_u16): Likewise.
5942 (vqshlq_m_n_s8): Likewise.
5943 (vqshlq_m_n_s32): Likewise.
5944 (vqshlq_m_n_s16): Likewise.
5945 (vqshlq_m_n_u8): Likewise.
5946 (vqshlq_m_n_u32): Likewise.
5947 (vqshlq_m_n_u16): Likewise.
5948 (vqshlq_m_s8): Likewise.
5949 (vqshlq_m_s32): Likewise.
5950 (vqshlq_m_s16): Likewise.
5951 (vqshlq_m_u8): Likewise.
5952 (vqshlq_m_u32): Likewise.
5953 (vqshlq_m_u16): Likewise.
5954 (vqsubq_m_n_s8): Likewise.
5955 (vqsubq_m_n_s32): Likewise.
5956 (vqsubq_m_n_s16): Likewise.
5957 (vqsubq_m_n_u8): Likewise.
5958 (vqsubq_m_n_u32): Likewise.
5959 (vqsubq_m_n_u16): Likewise.
5960 (vqsubq_m_s8): Likewise.
5961 (vqsubq_m_s32): Likewise.
5962 (vqsubq_m_s16): Likewise.
5963 (vqsubq_m_u8): Likewise.
5964 (vqsubq_m_u32): Likewise.
5965 (vqsubq_m_u16): Likewise.
5966 (vrhaddq_m_s8): Likewise.
5967 (vrhaddq_m_s32): Likewise.
5968 (vrhaddq_m_s16): Likewise.
5969 (vrhaddq_m_u8): Likewise.
5970 (vrhaddq_m_u32): Likewise.
5971 (vrhaddq_m_u16): Likewise.
5972 (vrmulhq_m_s8): Likewise.
5973 (vrmulhq_m_s32): Likewise.
5974 (vrmulhq_m_s16): Likewise.
5975 (vrmulhq_m_u8): Likewise.
5976 (vrmulhq_m_u32): Likewise.
5977 (vrmulhq_m_u16): Likewise.
5978 (vrshlq_m_s8): Likewise.
5979 (vrshlq_m_s32): Likewise.
5980 (vrshlq_m_s16): Likewise.
5981 (vrshlq_m_u8): Likewise.
5982 (vrshlq_m_u32): Likewise.
5983 (vrshlq_m_u16): Likewise.
5984 (vrshrq_m_n_s8): Likewise.
5985 (vrshrq_m_n_s32): Likewise.
5986 (vrshrq_m_n_s16): Likewise.
5987 (vrshrq_m_n_u8): Likewise.
5988 (vrshrq_m_n_u32): Likewise.
5989 (vrshrq_m_n_u16): Likewise.
5990 (vshlq_m_n_s8): Likewise.
5991 (vshlq_m_n_s32): Likewise.
5992 (vshlq_m_n_s16): Likewise.
5993 (vshlq_m_n_u8): Likewise.
5994 (vshlq_m_n_u32): Likewise.
5995 (vshlq_m_n_u16): Likewise.
5996 (vshrq_m_n_s8): Likewise.
5997 (vshrq_m_n_s32): Likewise.
5998 (vshrq_m_n_s16): Likewise.
5999 (vshrq_m_n_u8): Likewise.
6000 (vshrq_m_n_u32): Likewise.
6001 (vshrq_m_n_u16): Likewise.
6002 (vsliq_m_n_s8): Likewise.
6003 (vsliq_m_n_s32): Likewise.
6004 (vsliq_m_n_s16): Likewise.
6005 (vsliq_m_n_u8): Likewise.
6006 (vsliq_m_n_u32): Likewise.
6007 (vsliq_m_n_u16): Likewise.
6008 (vsubq_m_n_s8): Likewise.
6009 (vsubq_m_n_s32): Likewise.
6010 (vsubq_m_n_s16): Likewise.
6011 (vsubq_m_n_u8): Likewise.
6012 (vsubq_m_n_u32): Likewise.
6013 (vsubq_m_n_u16): Likewise.
6014 (__arm_vabdq_m_s8): Define intrinsic.
6015 (__arm_vabdq_m_s32): Likewise.
6016 (__arm_vabdq_m_s16): Likewise.
6017 (__arm_vabdq_m_u8): Likewise.
6018 (__arm_vabdq_m_u32): Likewise.
6019 (__arm_vabdq_m_u16): Likewise.
6020 (__arm_vaddq_m_n_s8): Likewise.
6021 (__arm_vaddq_m_n_s32): Likewise.
6022 (__arm_vaddq_m_n_s16): Likewise.
6023 (__arm_vaddq_m_n_u8): Likewise.
6024 (__arm_vaddq_m_n_u32): Likewise.
6025 (__arm_vaddq_m_n_u16): Likewise.
6026 (__arm_vaddq_m_s8): Likewise.
6027 (__arm_vaddq_m_s32): Likewise.
6028 (__arm_vaddq_m_s16): Likewise.
6029 (__arm_vaddq_m_u8): Likewise.
6030 (__arm_vaddq_m_u32): Likewise.
6031 (__arm_vaddq_m_u16): Likewise.
6032 (__arm_vandq_m_s8): Likewise.
6033 (__arm_vandq_m_s32): Likewise.
6034 (__arm_vandq_m_s16): Likewise.
6035 (__arm_vandq_m_u8): Likewise.
6036 (__arm_vandq_m_u32): Likewise.
6037 (__arm_vandq_m_u16): Likewise.
6038 (__arm_vbicq_m_s8): Likewise.
6039 (__arm_vbicq_m_s32): Likewise.
6040 (__arm_vbicq_m_s16): Likewise.
6041 (__arm_vbicq_m_u8): Likewise.
6042 (__arm_vbicq_m_u32): Likewise.
6043 (__arm_vbicq_m_u16): Likewise.
6044 (__arm_vbrsrq_m_n_s8): Likewise.
6045 (__arm_vbrsrq_m_n_s32): Likewise.
6046 (__arm_vbrsrq_m_n_s16): Likewise.
6047 (__arm_vbrsrq_m_n_u8): Likewise.
6048 (__arm_vbrsrq_m_n_u32): Likewise.
6049 (__arm_vbrsrq_m_n_u16): Likewise.
6050 (__arm_vcaddq_rot270_m_s8): Likewise.
6051 (__arm_vcaddq_rot270_m_s32): Likewise.
6052 (__arm_vcaddq_rot270_m_s16): Likewise.
6053 (__arm_vcaddq_rot270_m_u8): Likewise.
6054 (__arm_vcaddq_rot270_m_u32): Likewise.
6055 (__arm_vcaddq_rot270_m_u16): Likewise.
6056 (__arm_vcaddq_rot90_m_s8): Likewise.
6057 (__arm_vcaddq_rot90_m_s32): Likewise.
6058 (__arm_vcaddq_rot90_m_s16): Likewise.
6059 (__arm_vcaddq_rot90_m_u8): Likewise.
6060 (__arm_vcaddq_rot90_m_u32): Likewise.
6061 (__arm_vcaddq_rot90_m_u16): Likewise.
6062 (__arm_veorq_m_s8): Likewise.
6063 (__arm_veorq_m_s32): Likewise.
6064 (__arm_veorq_m_s16): Likewise.
6065 (__arm_veorq_m_u8): Likewise.
6066 (__arm_veorq_m_u32): Likewise.
6067 (__arm_veorq_m_u16): Likewise.
6068 (__arm_vhaddq_m_n_s8): Likewise.
6069 (__arm_vhaddq_m_n_s32): Likewise.
6070 (__arm_vhaddq_m_n_s16): Likewise.
6071 (__arm_vhaddq_m_n_u8): Likewise.
6072 (__arm_vhaddq_m_n_u32): Likewise.
6073 (__arm_vhaddq_m_n_u16): Likewise.
6074 (__arm_vhaddq_m_s8): Likewise.
6075 (__arm_vhaddq_m_s32): Likewise.
6076 (__arm_vhaddq_m_s16): Likewise.
6077 (__arm_vhaddq_m_u8): Likewise.
6078 (__arm_vhaddq_m_u32): Likewise.
6079 (__arm_vhaddq_m_u16): Likewise.
6080 (__arm_vhcaddq_rot270_m_s8): Likewise.
6081 (__arm_vhcaddq_rot270_m_s32): Likewise.
6082 (__arm_vhcaddq_rot270_m_s16): Likewise.
6083 (__arm_vhcaddq_rot90_m_s8): Likewise.
6084 (__arm_vhcaddq_rot90_m_s32): Likewise.
6085 (__arm_vhcaddq_rot90_m_s16): Likewise.
6086 (__arm_vhsubq_m_n_s8): Likewise.
6087 (__arm_vhsubq_m_n_s32): Likewise.
6088 (__arm_vhsubq_m_n_s16): Likewise.
6089 (__arm_vhsubq_m_n_u8): Likewise.
6090 (__arm_vhsubq_m_n_u32): Likewise.
6091 (__arm_vhsubq_m_n_u16): Likewise.
6092 (__arm_vhsubq_m_s8): Likewise.
6093 (__arm_vhsubq_m_s32): Likewise.
6094 (__arm_vhsubq_m_s16): Likewise.
6095 (__arm_vhsubq_m_u8): Likewise.
6096 (__arm_vhsubq_m_u32): Likewise.
6097 (__arm_vhsubq_m_u16): Likewise.
6098 (__arm_vmaxq_m_s8): Likewise.
6099 (__arm_vmaxq_m_s32): Likewise.
6100 (__arm_vmaxq_m_s16): Likewise.
6101 (__arm_vmaxq_m_u8): Likewise.
6102 (__arm_vmaxq_m_u32): Likewise.
6103 (__arm_vmaxq_m_u16): Likewise.
6104 (__arm_vminq_m_s8): Likewise.
6105 (__arm_vminq_m_s32): Likewise.
6106 (__arm_vminq_m_s16): Likewise.
6107 (__arm_vminq_m_u8): Likewise.
6108 (__arm_vminq_m_u32): Likewise.
6109 (__arm_vminq_m_u16): Likewise.
6110 (__arm_vmladavaq_p_s8): Likewise.
6111 (__arm_vmladavaq_p_s32): Likewise.
6112 (__arm_vmladavaq_p_s16): Likewise.
6113 (__arm_vmladavaq_p_u8): Likewise.
6114 (__arm_vmladavaq_p_u32): Likewise.
6115 (__arm_vmladavaq_p_u16): Likewise.
6116 (__arm_vmladavaxq_p_s8): Likewise.
6117 (__arm_vmladavaxq_p_s32): Likewise.
6118 (__arm_vmladavaxq_p_s16): Likewise.
6119 (__arm_vmlaq_m_n_s8): Likewise.
6120 (__arm_vmlaq_m_n_s32): Likewise.
6121 (__arm_vmlaq_m_n_s16): Likewise.
6122 (__arm_vmlaq_m_n_u8): Likewise.
6123 (__arm_vmlaq_m_n_u32): Likewise.
6124 (__arm_vmlaq_m_n_u16): Likewise.
6125 (__arm_vmlasq_m_n_s8): Likewise.
6126 (__arm_vmlasq_m_n_s32): Likewise.
6127 (__arm_vmlasq_m_n_s16): Likewise.
6128 (__arm_vmlasq_m_n_u8): Likewise.
6129 (__arm_vmlasq_m_n_u32): Likewise.
6130 (__arm_vmlasq_m_n_u16): Likewise.
6131 (__arm_vmlsdavaq_p_s8): Likewise.
6132 (__arm_vmlsdavaq_p_s32): Likewise.
6133 (__arm_vmlsdavaq_p_s16): Likewise.
6134 (__arm_vmlsdavaxq_p_s8): Likewise.
6135 (__arm_vmlsdavaxq_p_s32): Likewise.
6136 (__arm_vmlsdavaxq_p_s16): Likewise.
6137 (__arm_vmulhq_m_s8): Likewise.
6138 (__arm_vmulhq_m_s32): Likewise.
6139 (__arm_vmulhq_m_s16): Likewise.
6140 (__arm_vmulhq_m_u8): Likewise.
6141 (__arm_vmulhq_m_u32): Likewise.
6142 (__arm_vmulhq_m_u16): Likewise.
6143 (__arm_vmullbq_int_m_s8): Likewise.
6144 (__arm_vmullbq_int_m_s32): Likewise.
6145 (__arm_vmullbq_int_m_s16): Likewise.
6146 (__arm_vmullbq_int_m_u8): Likewise.
6147 (__arm_vmullbq_int_m_u32): Likewise.
6148 (__arm_vmullbq_int_m_u16): Likewise.
6149 (__arm_vmulltq_int_m_s8): Likewise.
6150 (__arm_vmulltq_int_m_s32): Likewise.
6151 (__arm_vmulltq_int_m_s16): Likewise.
6152 (__arm_vmulltq_int_m_u8): Likewise.
6153 (__arm_vmulltq_int_m_u32): Likewise.
6154 (__arm_vmulltq_int_m_u16): Likewise.
6155 (__arm_vmulq_m_n_s8): Likewise.
6156 (__arm_vmulq_m_n_s32): Likewise.
6157 (__arm_vmulq_m_n_s16): Likewise.
6158 (__arm_vmulq_m_n_u8): Likewise.
6159 (__arm_vmulq_m_n_u32): Likewise.
6160 (__arm_vmulq_m_n_u16): Likewise.
6161 (__arm_vmulq_m_s8): Likewise.
6162 (__arm_vmulq_m_s32): Likewise.
6163 (__arm_vmulq_m_s16): Likewise.
6164 (__arm_vmulq_m_u8): Likewise.
6165 (__arm_vmulq_m_u32): Likewise.
6166 (__arm_vmulq_m_u16): Likewise.
6167 (__arm_vornq_m_s8): Likewise.
6168 (__arm_vornq_m_s32): Likewise.
6169 (__arm_vornq_m_s16): Likewise.
6170 (__arm_vornq_m_u8): Likewise.
6171 (__arm_vornq_m_u32): Likewise.
6172 (__arm_vornq_m_u16): Likewise.
6173 (__arm_vorrq_m_s8): Likewise.
6174 (__arm_vorrq_m_s32): Likewise.
6175 (__arm_vorrq_m_s16): Likewise.
6176 (__arm_vorrq_m_u8): Likewise.
6177 (__arm_vorrq_m_u32): Likewise.
6178 (__arm_vorrq_m_u16): Likewise.
6179 (__arm_vqaddq_m_n_s8): Likewise.
6180 (__arm_vqaddq_m_n_s32): Likewise.
6181 (__arm_vqaddq_m_n_s16): Likewise.
6182 (__arm_vqaddq_m_n_u8): Likewise.
6183 (__arm_vqaddq_m_n_u32): Likewise.
6184 (__arm_vqaddq_m_n_u16): Likewise.
6185 (__arm_vqaddq_m_s8): Likewise.
6186 (__arm_vqaddq_m_s32): Likewise.
6187 (__arm_vqaddq_m_s16): Likewise.
6188 (__arm_vqaddq_m_u8): Likewise.
6189 (__arm_vqaddq_m_u32): Likewise.
6190 (__arm_vqaddq_m_u16): Likewise.
6191 (__arm_vqdmladhq_m_s8): Likewise.
6192 (__arm_vqdmladhq_m_s32): Likewise.
6193 (__arm_vqdmladhq_m_s16): Likewise.
6194 (__arm_vqdmladhxq_m_s8): Likewise.
6195 (__arm_vqdmladhxq_m_s32): Likewise.
6196 (__arm_vqdmladhxq_m_s16): Likewise.
6197 (__arm_vqdmlahq_m_n_s8): Likewise.
6198 (__arm_vqdmlahq_m_n_s32): Likewise.
6199 (__arm_vqdmlahq_m_n_s16): Likewise.
6200 (__arm_vqdmlahq_m_n_u8): Likewise.
6201 (__arm_vqdmlahq_m_n_u32): Likewise.
6202 (__arm_vqdmlahq_m_n_u16): Likewise.
6203 (__arm_vqdmlsdhq_m_s8): Likewise.
6204 (__arm_vqdmlsdhq_m_s32): Likewise.
6205 (__arm_vqdmlsdhq_m_s16): Likewise.
6206 (__arm_vqdmlsdhxq_m_s8): Likewise.
6207 (__arm_vqdmlsdhxq_m_s32): Likewise.
6208 (__arm_vqdmlsdhxq_m_s16): Likewise.
6209 (__arm_vqdmulhq_m_n_s8): Likewise.
6210 (__arm_vqdmulhq_m_n_s32): Likewise.
6211 (__arm_vqdmulhq_m_n_s16): Likewise.
6212 (__arm_vqdmulhq_m_s8): Likewise.
6213 (__arm_vqdmulhq_m_s32): Likewise.
6214 (__arm_vqdmulhq_m_s16): Likewise.
6215 (__arm_vqrdmladhq_m_s8): Likewise.
6216 (__arm_vqrdmladhq_m_s32): Likewise.
6217 (__arm_vqrdmladhq_m_s16): Likewise.
6218 (__arm_vqrdmladhxq_m_s8): Likewise.
6219 (__arm_vqrdmladhxq_m_s32): Likewise.
6220 (__arm_vqrdmladhxq_m_s16): Likewise.
6221 (__arm_vqrdmlahq_m_n_s8): Likewise.
6222 (__arm_vqrdmlahq_m_n_s32): Likewise.
6223 (__arm_vqrdmlahq_m_n_s16): Likewise.
6224 (__arm_vqrdmlahq_m_n_u8): Likewise.
6225 (__arm_vqrdmlahq_m_n_u32): Likewise.
6226 (__arm_vqrdmlahq_m_n_u16): Likewise.
6227 (__arm_vqrdmlashq_m_n_s8): Likewise.
6228 (__arm_vqrdmlashq_m_n_s32): Likewise.
6229 (__arm_vqrdmlashq_m_n_s16): Likewise.
6230 (__arm_vqrdmlashq_m_n_u8): Likewise.
6231 (__arm_vqrdmlashq_m_n_u32): Likewise.
6232 (__arm_vqrdmlashq_m_n_u16): Likewise.
6233 (__arm_vqrdmlsdhq_m_s8): Likewise.
6234 (__arm_vqrdmlsdhq_m_s32): Likewise.
6235 (__arm_vqrdmlsdhq_m_s16): Likewise.
6236 (__arm_vqrdmlsdhxq_m_s8): Likewise.
6237 (__arm_vqrdmlsdhxq_m_s32): Likewise.
6238 (__arm_vqrdmlsdhxq_m_s16): Likewise.
6239 (__arm_vqrdmulhq_m_n_s8): Likewise.
6240 (__arm_vqrdmulhq_m_n_s32): Likewise.
6241 (__arm_vqrdmulhq_m_n_s16): Likewise.
6242 (__arm_vqrdmulhq_m_s8): Likewise.
6243 (__arm_vqrdmulhq_m_s32): Likewise.
6244 (__arm_vqrdmulhq_m_s16): Likewise.
6245 (__arm_vqrshlq_m_s8): Likewise.
6246 (__arm_vqrshlq_m_s32): Likewise.
6247 (__arm_vqrshlq_m_s16): Likewise.
6248 (__arm_vqrshlq_m_u8): Likewise.
6249 (__arm_vqrshlq_m_u32): Likewise.
6250 (__arm_vqrshlq_m_u16): Likewise.
6251 (__arm_vqshlq_m_n_s8): Likewise.
6252 (__arm_vqshlq_m_n_s32): Likewise.
6253 (__arm_vqshlq_m_n_s16): Likewise.
6254 (__arm_vqshlq_m_n_u8): Likewise.
6255 (__arm_vqshlq_m_n_u32): Likewise.
6256 (__arm_vqshlq_m_n_u16): Likewise.
6257 (__arm_vqshlq_m_s8): Likewise.
6258 (__arm_vqshlq_m_s32): Likewise.
6259 (__arm_vqshlq_m_s16): Likewise.
6260 (__arm_vqshlq_m_u8): Likewise.
6261 (__arm_vqshlq_m_u32): Likewise.
6262 (__arm_vqshlq_m_u16): Likewise.
6263 (__arm_vqsubq_m_n_s8): Likewise.
6264 (__arm_vqsubq_m_n_s32): Likewise.
6265 (__arm_vqsubq_m_n_s16): Likewise.
6266 (__arm_vqsubq_m_n_u8): Likewise.
6267 (__arm_vqsubq_m_n_u32): Likewise.
6268 (__arm_vqsubq_m_n_u16): Likewise.
6269 (__arm_vqsubq_m_s8): Likewise.
6270 (__arm_vqsubq_m_s32): Likewise.
6271 (__arm_vqsubq_m_s16): Likewise.
6272 (__arm_vqsubq_m_u8): Likewise.
6273 (__arm_vqsubq_m_u32): Likewise.
6274 (__arm_vqsubq_m_u16): Likewise.
6275 (__arm_vrhaddq_m_s8): Likewise.
6276 (__arm_vrhaddq_m_s32): Likewise.
6277 (__arm_vrhaddq_m_s16): Likewise.
6278 (__arm_vrhaddq_m_u8): Likewise.
6279 (__arm_vrhaddq_m_u32): Likewise.
6280 (__arm_vrhaddq_m_u16): Likewise.
6281 (__arm_vrmulhq_m_s8): Likewise.
6282 (__arm_vrmulhq_m_s32): Likewise.
6283 (__arm_vrmulhq_m_s16): Likewise.
6284 (__arm_vrmulhq_m_u8): Likewise.
6285 (__arm_vrmulhq_m_u32): Likewise.
6286 (__arm_vrmulhq_m_u16): Likewise.
6287 (__arm_vrshlq_m_s8): Likewise.
6288 (__arm_vrshlq_m_s32): Likewise.
6289 (__arm_vrshlq_m_s16): Likewise.
6290 (__arm_vrshlq_m_u8): Likewise.
6291 (__arm_vrshlq_m_u32): Likewise.
6292 (__arm_vrshlq_m_u16): Likewise.
6293 (__arm_vrshrq_m_n_s8): Likewise.
6294 (__arm_vrshrq_m_n_s32): Likewise.
6295 (__arm_vrshrq_m_n_s16): Likewise.
6296 (__arm_vrshrq_m_n_u8): Likewise.
6297 (__arm_vrshrq_m_n_u32): Likewise.
6298 (__arm_vrshrq_m_n_u16): Likewise.
6299 (__arm_vshlq_m_n_s8): Likewise.
6300 (__arm_vshlq_m_n_s32): Likewise.
6301 (__arm_vshlq_m_n_s16): Likewise.
6302 (__arm_vshlq_m_n_u8): Likewise.
6303 (__arm_vshlq_m_n_u32): Likewise.
6304 (__arm_vshlq_m_n_u16): Likewise.
6305 (__arm_vshrq_m_n_s8): Likewise.
6306 (__arm_vshrq_m_n_s32): Likewise.
6307 (__arm_vshrq_m_n_s16): Likewise.
6308 (__arm_vshrq_m_n_u8): Likewise.
6309 (__arm_vshrq_m_n_u32): Likewise.
6310 (__arm_vshrq_m_n_u16): Likewise.
6311 (__arm_vsliq_m_n_s8): Likewise.
6312 (__arm_vsliq_m_n_s32): Likewise.
6313 (__arm_vsliq_m_n_s16): Likewise.
6314 (__arm_vsliq_m_n_u8): Likewise.
6315 (__arm_vsliq_m_n_u32): Likewise.
6316 (__arm_vsliq_m_n_u16): Likewise.
6317 (__arm_vsubq_m_n_s8): Likewise.
6318 (__arm_vsubq_m_n_s32): Likewise.
6319 (__arm_vsubq_m_n_s16): Likewise.
6320 (__arm_vsubq_m_n_u8): Likewise.
6321 (__arm_vsubq_m_n_u32): Likewise.
6322 (__arm_vsubq_m_n_u16): Likewise.
6323 (vqdmladhq_m): Define polymorphic variant.
6324 (vqdmladhxq_m): Likewise.
6325 (vqdmlsdhq_m): Likewise.
6326 (vqdmlsdhxq_m): Likewise.
6327 (vabdq_m): Likewise.
6328 (vandq_m): Likewise.
6329 (vbicq_m): Likewise.
6330 (vbrsrq_m_n): Likewise.
6331 (vcaddq_rot270_m): Likewise.
6332 (vcaddq_rot90_m): Likewise.
6333 (veorq_m): Likewise.
6334 (vmaxq_m): Likewise.
6335 (vminq_m): Likewise.
6336 (vmladavaq_p): Likewise.
6337 (vmlaq_m_n): Likewise.
6338 (vmlasq_m_n): Likewise.
6339 (vmulhq_m): Likewise.
6340 (vmullbq_int_m): Likewise.
6341 (vmulltq_int_m): Likewise.
6342 (vornq_m): Likewise.
6343 (vorrq_m): Likewise.
6344 (vqdmlahq_m_n): Likewise.
6345 (vqrdmlahq_m_n): Likewise.
6346 (vqrdmlashq_m_n): Likewise.
6347 (vqrshlq_m): Likewise.
6348 (vqshlq_m_n): Likewise.
6349 (vqshlq_m): Likewise.
6350 (vrhaddq_m): Likewise.
6351 (vrmulhq_m): Likewise.
6352 (vrshlq_m): Likewise.
6353 (vrshrq_m_n): Likewise.
6354 (vshlq_m_n): Likewise.
6355 (vshrq_m_n): Likewise.
6356 (vsliq_m): Likewise.
6357 (vaddq_m_n): Likewise.
6358 (vaddq_m): Likewise.
6359 (vhaddq_m_n): Likewise.
6360 (vhaddq_m): Likewise.
6361 (vhcaddq_rot270_m): Likewise.
6362 (vhcaddq_rot90_m): Likewise.
6363 (vhsubq_m): Likewise.
6364 (vhsubq_m_n): Likewise.
6365 (vmulq_m_n): Likewise.
6366 (vmulq_m): Likewise.
6367 (vqaddq_m_n): Likewise.
6368 (vqaddq_m): Likewise.
6369 (vqdmulhq_m_n): Likewise.
6370 (vqdmulhq_m): Likewise.
6371 (vsubq_m_n): Likewise.
6372 (vsliq_m_n): Likewise.
6373 (vqsubq_m_n): Likewise.
6374 (vqsubq_m): Likewise.
6375 (vqrdmulhq_m): Likewise.
6376 (vqrdmulhq_m_n): Likewise.
6377 (vqrdmlsdhxq_m): Likewise.
6378 (vqrdmlsdhq_m): Likewise.
6379 (vqrdmladhq_m): Likewise.
6380 (vqrdmladhxq_m): Likewise.
6381 (vmlsdavaxq_p): Likewise.
6382 (vmlsdavaq_p): Likewise.
6383 (vmladavaxq_p): Likewise.
6384 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
6386 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
6387 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
6388 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
6389 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
6390 * config/arm/mve.md (VHSUBQ_M): Define iterators.
6391 (VSLIQ_M_N): Likewise.
6392 (VQRDMLAHQ_M_N): Likewise.
6393 (VRSHLQ_M): Likewise.
6394 (VMINQ_M): Likewise.
6395 (VMULLBQ_INT_M): Likewise.
6396 (VMULHQ_M): Likewise.
6397 (VMULQ_M): Likewise.
6398 (VHSUBQ_M_N): Likewise.
6399 (VHADDQ_M_N): Likewise.
6400 (VORRQ_M): Likewise.
6401 (VRMULHQ_M): Likewise.
6402 (VQADDQ_M): Likewise.
6403 (VRSHRQ_M_N): Likewise.
6404 (VQSUBQ_M_N): Likewise.
6405 (VADDQ_M): Likewise.
6406 (VORNQ_M): Likewise.
6407 (VQDMLAHQ_M_N): Likewise.
6408 (VRHADDQ_M): Likewise.
6409 (VQSHLQ_M): Likewise.
6410 (VANDQ_M): Likewise.
6411 (VBICQ_M): Likewise.
6412 (VSHLQ_M_N): Likewise.
6413 (VCADDQ_ROT270_M): Likewise.
6414 (VQRSHLQ_M): Likewise.
6415 (VQADDQ_M_N): Likewise.
6416 (VADDQ_M_N): Likewise.
6417 (VMAXQ_M): Likewise.
6418 (VQSUBQ_M): Likewise.
6419 (VMLASQ_M_N): Likewise.
6420 (VMLADAVAQ_P): Likewise.
6421 (VBRSRQ_M_N): Likewise.
6422 (VMULQ_M_N): Likewise.
6423 (VCADDQ_ROT90_M): Likewise.
6424 (VMULLTQ_INT_M): Likewise.
6425 (VEORQ_M): Likewise.
6426 (VSHRQ_M_N): Likewise.
6427 (VSUBQ_M_N): Likewise.
6428 (VHADDQ_M): Likewise.
6429 (VABDQ_M): Likewise.
6430 (VQRDMLASHQ_M_N): Likewise.
6431 (VMLAQ_M_N): Likewise.
6432 (VQSHLQ_M_N): Likewise.
6433 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
6434 (mve_vaddq_m_n_<supf><mode>): Likewise.
6435 (mve_vaddq_m_<supf><mode>): Likewise.
6436 (mve_vandq_m_<supf><mode>): Likewise.
6437 (mve_vbicq_m_<supf><mode>): Likewise.
6438 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
6439 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
6440 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
6441 (mve_veorq_m_<supf><mode>): Likewise.
6442 (mve_vhaddq_m_n_<supf><mode>): Likewise.
6443 (mve_vhaddq_m_<supf><mode>): Likewise.
6444 (mve_vhsubq_m_n_<supf><mode>): Likewise.
6445 (mve_vhsubq_m_<supf><mode>): Likewise.
6446 (mve_vmaxq_m_<supf><mode>): Likewise.
6447 (mve_vminq_m_<supf><mode>): Likewise.
6448 (mve_vmladavaq_p_<supf><mode>): Likewise.
6449 (mve_vmlaq_m_n_<supf><mode>): Likewise.
6450 (mve_vmlasq_m_n_<supf><mode>): Likewise.
6451 (mve_vmulhq_m_<supf><mode>): Likewise.
6452 (mve_vmullbq_int_m_<supf><mode>): Likewise.
6453 (mve_vmulltq_int_m_<supf><mode>): Likewise.
6454 (mve_vmulq_m_n_<supf><mode>): Likewise.
6455 (mve_vmulq_m_<supf><mode>): Likewise.
6456 (mve_vornq_m_<supf><mode>): Likewise.
6457 (mve_vorrq_m_<supf><mode>): Likewise.
6458 (mve_vqaddq_m_n_<supf><mode>): Likewise.
6459 (mve_vqaddq_m_<supf><mode>): Likewise.
6460 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
6461 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
6462 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
6463 (mve_vqrshlq_m_<supf><mode>): Likewise.
6464 (mve_vqshlq_m_n_<supf><mode>): Likewise.
6465 (mve_vqshlq_m_<supf><mode>): Likewise.
6466 (mve_vqsubq_m_n_<supf><mode>): Likewise.
6467 (mve_vqsubq_m_<supf><mode>): Likewise.
6468 (mve_vrhaddq_m_<supf><mode>): Likewise.
6469 (mve_vrmulhq_m_<supf><mode>): Likewise.
6470 (mve_vrshlq_m_<supf><mode>): Likewise.
6471 (mve_vrshrq_m_n_<supf><mode>): Likewise.
6472 (mve_vshlq_m_n_<supf><mode>): Likewise.
6473 (mve_vshrq_m_n_<supf><mode>): Likewise.
6474 (mve_vsliq_m_n_<supf><mode>): Likewise.
6475 (mve_vsubq_m_n_<supf><mode>): Likewise.
6476 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
6477 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
6478 (mve_vmladavaxq_p_s<mode>): Likewise.
6479 (mve_vmlsdavaq_p_s<mode>): Likewise.
6480 (mve_vmlsdavaxq_p_s<mode>): Likewise.
6481 (mve_vqdmladhq_m_s<mode>): Likewise.
6482 (mve_vqdmladhxq_m_s<mode>): Likewise.
6483 (mve_vqdmlsdhq_m_s<mode>): Likewise.
6484 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
6485 (mve_vqdmulhq_m_n_s<mode>): Likewise.
6486 (mve_vqdmulhq_m_s<mode>): Likewise.
6487 (mve_vqrdmladhq_m_s<mode>): Likewise.
6488 (mve_vqrdmladhxq_m_s<mode>): Likewise.
6489 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
6490 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
6491 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
6492 (mve_vqrdmulhq_m_s<mode>): Likewise.
6494 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6495 Mihail Ionescu <mihail.ionescu@arm.com>
6496 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6498 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
6499 Define builtin qualifier.
6500 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6501 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6502 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6503 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6504 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6505 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6506 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6507 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
6508 (vsubq_m_s8): Likewise.
6509 (vcvtq_m_n_f16_u16): Likewise.
6510 (vqshluq_m_n_s8): Likewise.
6511 (vabavq_p_s8): Likewise.
6512 (vsriq_m_n_u8): Likewise.
6513 (vshlq_m_u8): Likewise.
6514 (vsubq_m_u8): Likewise.
6515 (vabavq_p_u8): Likewise.
6516 (vshlq_m_s8): Likewise.
6517 (vcvtq_m_n_f16_s16): Likewise.
6518 (vsriq_m_n_s16): Likewise.
6519 (vsubq_m_s16): Likewise.
6520 (vcvtq_m_n_f32_u32): Likewise.
6521 (vqshluq_m_n_s16): Likewise.
6522 (vabavq_p_s16): Likewise.
6523 (vsriq_m_n_u16): Likewise.
6524 (vshlq_m_u16): Likewise.
6525 (vsubq_m_u16): Likewise.
6526 (vabavq_p_u16): Likewise.
6527 (vshlq_m_s16): Likewise.
6528 (vcvtq_m_n_f32_s32): Likewise.
6529 (vsriq_m_n_s32): Likewise.
6530 (vsubq_m_s32): Likewise.
6531 (vqshluq_m_n_s32): Likewise.
6532 (vabavq_p_s32): Likewise.
6533 (vsriq_m_n_u32): Likewise.
6534 (vshlq_m_u32): Likewise.
6535 (vsubq_m_u32): Likewise.
6536 (vabavq_p_u32): Likewise.
6537 (vshlq_m_s32): Likewise.
6538 (__arm_vsriq_m_n_s8): Define intrinsic.
6539 (__arm_vsubq_m_s8): Likewise.
6540 (__arm_vqshluq_m_n_s8): Likewise.
6541 (__arm_vabavq_p_s8): Likewise.
6542 (__arm_vsriq_m_n_u8): Likewise.
6543 (__arm_vshlq_m_u8): Likewise.
6544 (__arm_vsubq_m_u8): Likewise.
6545 (__arm_vabavq_p_u8): Likewise.
6546 (__arm_vshlq_m_s8): Likewise.
6547 (__arm_vsriq_m_n_s16): Likewise.
6548 (__arm_vsubq_m_s16): Likewise.
6549 (__arm_vqshluq_m_n_s16): Likewise.
6550 (__arm_vabavq_p_s16): Likewise.
6551 (__arm_vsriq_m_n_u16): Likewise.
6552 (__arm_vshlq_m_u16): Likewise.
6553 (__arm_vsubq_m_u16): Likewise.
6554 (__arm_vabavq_p_u16): Likewise.
6555 (__arm_vshlq_m_s16): Likewise.
6556 (__arm_vsriq_m_n_s32): Likewise.
6557 (__arm_vsubq_m_s32): Likewise.
6558 (__arm_vqshluq_m_n_s32): Likewise.
6559 (__arm_vabavq_p_s32): Likewise.
6560 (__arm_vsriq_m_n_u32): Likewise.
6561 (__arm_vshlq_m_u32): Likewise.
6562 (__arm_vsubq_m_u32): Likewise.
6563 (__arm_vabavq_p_u32): Likewise.
6564 (__arm_vshlq_m_s32): Likewise.
6565 (__arm_vcvtq_m_n_f16_u16): Likewise.
6566 (__arm_vcvtq_m_n_f16_s16): Likewise.
6567 (__arm_vcvtq_m_n_f32_u32): Likewise.
6568 (__arm_vcvtq_m_n_f32_s32): Likewise.
6569 (vcvtq_m_n): Define polymorphic variant.
6570 (vqshluq_m_n): Likewise.
6571 (vshlq_m): Likewise.
6572 (vsriq_m_n): Likewise.
6573 (vsubq_m): Likewise.
6574 (vabavq_p): Likewise.
6575 * config/arm/arm_mve_builtins.def
6576 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
6577 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6578 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6579 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6580 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6581 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6582 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6583 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6584 * config/arm/mve.md (VABAVQ_P): Define iterator.
6585 (VSHLQ_M): Likewise.
6586 (VSRIQ_M_N): Likewise.
6587 (VSUBQ_M): Likewise.
6588 (VCVTQ_M_N_TO_F): Likewise.
6589 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
6590 (mve_vqshluq_m_n_s<mode>): Likewise.
6591 (mve_vshlq_m_<supf><mode>): Likewise.
6592 (mve_vsriq_m_n_<supf><mode>): Likewise.
6593 (mve_vsubq_m_<supf><mode>): Likewise.
6594 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
6596 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6597 Mihail Ionescu <mihail.ionescu@arm.com>
6598 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6600 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
6601 (vrmlsldavhaq_s32): Likewise.
6602 (vrmlsldavhaxq_s32): Likewise.
6603 (vaddlvaq_p_s32): Likewise.
6604 (vcvtbq_m_f16_f32): Likewise.
6605 (vcvtbq_m_f32_f16): Likewise.
6606 (vcvttq_m_f16_f32): Likewise.
6607 (vcvttq_m_f32_f16): Likewise.
6608 (vrev16q_m_s8): Likewise.
6609 (vrev32q_m_f16): Likewise.
6610 (vrmlaldavhq_p_s32): Likewise.
6611 (vrmlaldavhxq_p_s32): Likewise.
6612 (vrmlsldavhq_p_s32): Likewise.
6613 (vrmlsldavhxq_p_s32): Likewise.
6614 (vaddlvaq_p_u32): Likewise.
6615 (vrev16q_m_u8): Likewise.
6616 (vrmlaldavhq_p_u32): Likewise.
6617 (vmvnq_m_n_s16): Likewise.
6618 (vorrq_m_n_s16): Likewise.
6619 (vqrshrntq_n_s16): Likewise.
6620 (vqshrnbq_n_s16): Likewise.
6621 (vqshrntq_n_s16): Likewise.
6622 (vrshrnbq_n_s16): Likewise.
6623 (vrshrntq_n_s16): Likewise.
6624 (vshrnbq_n_s16): Likewise.
6625 (vshrntq_n_s16): Likewise.
6626 (vcmlaq_f16): Likewise.
6627 (vcmlaq_rot180_f16): Likewise.
6628 (vcmlaq_rot270_f16): Likewise.
6629 (vcmlaq_rot90_f16): Likewise.
6630 (vfmaq_f16): Likewise.
6631 (vfmaq_n_f16): Likewise.
6632 (vfmasq_n_f16): Likewise.
6633 (vfmsq_f16): Likewise.
6634 (vmlaldavaq_s16): Likewise.
6635 (vmlaldavaxq_s16): Likewise.
6636 (vmlsldavaq_s16): Likewise.
6637 (vmlsldavaxq_s16): Likewise.
6638 (vabsq_m_f16): Likewise.
6639 (vcvtmq_m_s16_f16): Likewise.
6640 (vcvtnq_m_s16_f16): Likewise.
6641 (vcvtpq_m_s16_f16): Likewise.
6642 (vcvtq_m_s16_f16): Likewise.
6643 (vdupq_m_n_f16): Likewise.
6644 (vmaxnmaq_m_f16): Likewise.
6645 (vmaxnmavq_p_f16): Likewise.
6646 (vmaxnmvq_p_f16): Likewise.
6647 (vminnmaq_m_f16): Likewise.
6648 (vminnmavq_p_f16): Likewise.
6649 (vminnmvq_p_f16): Likewise.
6650 (vmlaldavq_p_s16): Likewise.
6651 (vmlaldavxq_p_s16): Likewise.
6652 (vmlsldavq_p_s16): Likewise.
6653 (vmlsldavxq_p_s16): Likewise.
6654 (vmovlbq_m_s8): Likewise.
6655 (vmovltq_m_s8): Likewise.
6656 (vmovnbq_m_s16): Likewise.
6657 (vmovntq_m_s16): Likewise.
6658 (vnegq_m_f16): Likewise.
6659 (vpselq_f16): Likewise.
6660 (vqmovnbq_m_s16): Likewise.
6661 (vqmovntq_m_s16): Likewise.
6662 (vrev32q_m_s8): Likewise.
6663 (vrev64q_m_f16): Likewise.
6664 (vrndaq_m_f16): Likewise.
6665 (vrndmq_m_f16): Likewise.
6666 (vrndnq_m_f16): Likewise.
6667 (vrndpq_m_f16): Likewise.
6668 (vrndq_m_f16): Likewise.
6669 (vrndxq_m_f16): Likewise.
6670 (vcmpeqq_m_n_f16): Likewise.
6671 (vcmpgeq_m_f16): Likewise.
6672 (vcmpgeq_m_n_f16): Likewise.
6673 (vcmpgtq_m_f16): Likewise.
6674 (vcmpgtq_m_n_f16): Likewise.
6675 (vcmpleq_m_f16): Likewise.
6676 (vcmpleq_m_n_f16): Likewise.
6677 (vcmpltq_m_f16): Likewise.
6678 (vcmpltq_m_n_f16): Likewise.
6679 (vcmpneq_m_f16): Likewise.
6680 (vcmpneq_m_n_f16): Likewise.
6681 (vmvnq_m_n_u16): Likewise.
6682 (vorrq_m_n_u16): Likewise.
6683 (vqrshruntq_n_s16): Likewise.
6684 (vqshrunbq_n_s16): Likewise.
6685 (vqshruntq_n_s16): Likewise.
6686 (vcvtmq_m_u16_f16): Likewise.
6687 (vcvtnq_m_u16_f16): Likewise.
6688 (vcvtpq_m_u16_f16): Likewise.
6689 (vcvtq_m_u16_f16): Likewise.
6690 (vqmovunbq_m_s16): Likewise.
6691 (vqmovuntq_m_s16): Likewise.
6692 (vqrshrntq_n_u16): Likewise.
6693 (vqshrnbq_n_u16): Likewise.
6694 (vqshrntq_n_u16): Likewise.
6695 (vrshrnbq_n_u16): Likewise.
6696 (vrshrntq_n_u16): Likewise.
6697 (vshrnbq_n_u16): Likewise.
6698 (vshrntq_n_u16): Likewise.
6699 (vmlaldavaq_u16): Likewise.
6700 (vmlaldavaxq_u16): Likewise.
6701 (vmlaldavq_p_u16): Likewise.
6702 (vmlaldavxq_p_u16): Likewise.
6703 (vmovlbq_m_u8): Likewise.
6704 (vmovltq_m_u8): Likewise.
6705 (vmovnbq_m_u16): Likewise.
6706 (vmovntq_m_u16): Likewise.
6707 (vqmovnbq_m_u16): Likewise.
6708 (vqmovntq_m_u16): Likewise.
6709 (vrev32q_m_u8): Likewise.
6710 (vmvnq_m_n_s32): Likewise.
6711 (vorrq_m_n_s32): Likewise.
6712 (vqrshrntq_n_s32): Likewise.
6713 (vqshrnbq_n_s32): Likewise.
6714 (vqshrntq_n_s32): Likewise.
6715 (vrshrnbq_n_s32): Likewise.
6716 (vrshrntq_n_s32): Likewise.
6717 (vshrnbq_n_s32): Likewise.
6718 (vshrntq_n_s32): Likewise.
6719 (vcmlaq_f32): Likewise.
6720 (vcmlaq_rot180_f32): Likewise.
6721 (vcmlaq_rot270_f32): Likewise.
6722 (vcmlaq_rot90_f32): Likewise.
6723 (vfmaq_f32): Likewise.
6724 (vfmaq_n_f32): Likewise.
6725 (vfmasq_n_f32): Likewise.
6726 (vfmsq_f32): Likewise.
6727 (vmlaldavaq_s32): Likewise.
6728 (vmlaldavaxq_s32): Likewise.
6729 (vmlsldavaq_s32): Likewise.
6730 (vmlsldavaxq_s32): Likewise.
6731 (vabsq_m_f32): Likewise.
6732 (vcvtmq_m_s32_f32): Likewise.
6733 (vcvtnq_m_s32_f32): Likewise.
6734 (vcvtpq_m_s32_f32): Likewise.
6735 (vcvtq_m_s32_f32): Likewise.
6736 (vdupq_m_n_f32): Likewise.
6737 (vmaxnmaq_m_f32): Likewise.
6738 (vmaxnmavq_p_f32): Likewise.
6739 (vmaxnmvq_p_f32): Likewise.
6740 (vminnmaq_m_f32): Likewise.
6741 (vminnmavq_p_f32): Likewise.
6742 (vminnmvq_p_f32): Likewise.
6743 (vmlaldavq_p_s32): Likewise.
6744 (vmlaldavxq_p_s32): Likewise.
6745 (vmlsldavq_p_s32): Likewise.
6746 (vmlsldavxq_p_s32): Likewise.
6747 (vmovlbq_m_s16): Likewise.
6748 (vmovltq_m_s16): Likewise.
6749 (vmovnbq_m_s32): Likewise.
6750 (vmovntq_m_s32): Likewise.
6751 (vnegq_m_f32): Likewise.
6752 (vpselq_f32): Likewise.
6753 (vqmovnbq_m_s32): Likewise.
6754 (vqmovntq_m_s32): Likewise.
6755 (vrev32q_m_s16): Likewise.
6756 (vrev64q_m_f32): Likewise.
6757 (vrndaq_m_f32): Likewise.
6758 (vrndmq_m_f32): Likewise.
6759 (vrndnq_m_f32): Likewise.
6760 (vrndpq_m_f32): Likewise.
6761 (vrndq_m_f32): Likewise.
6762 (vrndxq_m_f32): Likewise.
6763 (vcmpeqq_m_n_f32): Likewise.
6764 (vcmpgeq_m_f32): Likewise.
6765 (vcmpgeq_m_n_f32): Likewise.
6766 (vcmpgtq_m_f32): Likewise.
6767 (vcmpgtq_m_n_f32): Likewise.
6768 (vcmpleq_m_f32): Likewise.
6769 (vcmpleq_m_n_f32): Likewise.
6770 (vcmpltq_m_f32): Likewise.
6771 (vcmpltq_m_n_f32): Likewise.
6772 (vcmpneq_m_f32): Likewise.
6773 (vcmpneq_m_n_f32): Likewise.
6774 (vmvnq_m_n_u32): Likewise.
6775 (vorrq_m_n_u32): Likewise.
6776 (vqrshruntq_n_s32): Likewise.
6777 (vqshrunbq_n_s32): Likewise.
6778 (vqshruntq_n_s32): Likewise.
6779 (vcvtmq_m_u32_f32): Likewise.
6780 (vcvtnq_m_u32_f32): Likewise.
6781 (vcvtpq_m_u32_f32): Likewise.
6782 (vcvtq_m_u32_f32): Likewise.
6783 (vqmovunbq_m_s32): Likewise.
6784 (vqmovuntq_m_s32): Likewise.
6785 (vqrshrntq_n_u32): Likewise.
6786 (vqshrnbq_n_u32): Likewise.
6787 (vqshrntq_n_u32): Likewise.
6788 (vrshrnbq_n_u32): Likewise.
6789 (vrshrntq_n_u32): Likewise.
6790 (vshrnbq_n_u32): Likewise.
6791 (vshrntq_n_u32): Likewise.
6792 (vmlaldavaq_u32): Likewise.
6793 (vmlaldavaxq_u32): Likewise.
6794 (vmlaldavq_p_u32): Likewise.
6795 (vmlaldavxq_p_u32): Likewise.
6796 (vmovlbq_m_u16): Likewise.
6797 (vmovltq_m_u16): Likewise.
6798 (vmovnbq_m_u32): Likewise.
6799 (vmovntq_m_u32): Likewise.
6800 (vqmovnbq_m_u32): Likewise.
6801 (vqmovntq_m_u32): Likewise.
6802 (vrev32q_m_u16): Likewise.
6803 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
6804 (__arm_vrmlsldavhaq_s32): Likewise.
6805 (__arm_vrmlsldavhaxq_s32): Likewise.
6806 (__arm_vaddlvaq_p_s32): Likewise.
6807 (__arm_vrev16q_m_s8): Likewise.
6808 (__arm_vrmlaldavhq_p_s32): Likewise.
6809 (__arm_vrmlaldavhxq_p_s32): Likewise.
6810 (__arm_vrmlsldavhq_p_s32): Likewise.
6811 (__arm_vrmlsldavhxq_p_s32): Likewise.
6812 (__arm_vaddlvaq_p_u32): Likewise.
6813 (__arm_vrev16q_m_u8): Likewise.
6814 (__arm_vrmlaldavhq_p_u32): Likewise.
6815 (__arm_vmvnq_m_n_s16): Likewise.
6816 (__arm_vorrq_m_n_s16): Likewise.
6817 (__arm_vqrshrntq_n_s16): Likewise.
6818 (__arm_vqshrnbq_n_s16): Likewise.
6819 (__arm_vqshrntq_n_s16): Likewise.
6820 (__arm_vrshrnbq_n_s16): Likewise.
6821 (__arm_vrshrntq_n_s16): Likewise.
6822 (__arm_vshrnbq_n_s16): Likewise.
6823 (__arm_vshrntq_n_s16): Likewise.
6824 (__arm_vmlaldavaq_s16): Likewise.
6825 (__arm_vmlaldavaxq_s16): Likewise.
6826 (__arm_vmlsldavaq_s16): Likewise.
6827 (__arm_vmlsldavaxq_s16): Likewise.
6828 (__arm_vmlaldavq_p_s16): Likewise.
6829 (__arm_vmlaldavxq_p_s16): Likewise.
6830 (__arm_vmlsldavq_p_s16): Likewise.
6831 (__arm_vmlsldavxq_p_s16): Likewise.
6832 (__arm_vmovlbq_m_s8): Likewise.
6833 (__arm_vmovltq_m_s8): Likewise.
6834 (__arm_vmovnbq_m_s16): Likewise.
6835 (__arm_vmovntq_m_s16): Likewise.
6836 (__arm_vqmovnbq_m_s16): Likewise.
6837 (__arm_vqmovntq_m_s16): Likewise.
6838 (__arm_vrev32q_m_s8): Likewise.
6839 (__arm_vmvnq_m_n_u16): Likewise.
6840 (__arm_vorrq_m_n_u16): Likewise.
6841 (__arm_vqrshruntq_n_s16): Likewise.
6842 (__arm_vqshrunbq_n_s16): Likewise.
6843 (__arm_vqshruntq_n_s16): Likewise.
6844 (__arm_vqmovunbq_m_s16): Likewise.
6845 (__arm_vqmovuntq_m_s16): Likewise.
6846 (__arm_vqrshrntq_n_u16): Likewise.
6847 (__arm_vqshrnbq_n_u16): Likewise.
6848 (__arm_vqshrntq_n_u16): Likewise.
6849 (__arm_vrshrnbq_n_u16): Likewise.
6850 (__arm_vrshrntq_n_u16): Likewise.
6851 (__arm_vshrnbq_n_u16): Likewise.
6852 (__arm_vshrntq_n_u16): Likewise.
6853 (__arm_vmlaldavaq_u16): Likewise.
6854 (__arm_vmlaldavaxq_u16): Likewise.
6855 (__arm_vmlaldavq_p_u16): Likewise.
6856 (__arm_vmlaldavxq_p_u16): Likewise.
6857 (__arm_vmovlbq_m_u8): Likewise.
6858 (__arm_vmovltq_m_u8): Likewise.
6859 (__arm_vmovnbq_m_u16): Likewise.
6860 (__arm_vmovntq_m_u16): Likewise.
6861 (__arm_vqmovnbq_m_u16): Likewise.
6862 (__arm_vqmovntq_m_u16): Likewise.
6863 (__arm_vrev32q_m_u8): Likewise.
6864 (__arm_vmvnq_m_n_s32): Likewise.
6865 (__arm_vorrq_m_n_s32): Likewise.
6866 (__arm_vqrshrntq_n_s32): Likewise.
6867 (__arm_vqshrnbq_n_s32): Likewise.
6868 (__arm_vqshrntq_n_s32): Likewise.
6869 (__arm_vrshrnbq_n_s32): Likewise.
6870 (__arm_vrshrntq_n_s32): Likewise.
6871 (__arm_vshrnbq_n_s32): Likewise.
6872 (__arm_vshrntq_n_s32): Likewise.
6873 (__arm_vmlaldavaq_s32): Likewise.
6874 (__arm_vmlaldavaxq_s32): Likewise.
6875 (__arm_vmlsldavaq_s32): Likewise.
6876 (__arm_vmlsldavaxq_s32): Likewise.
6877 (__arm_vmlaldavq_p_s32): Likewise.
6878 (__arm_vmlaldavxq_p_s32): Likewise.
6879 (__arm_vmlsldavq_p_s32): Likewise.
6880 (__arm_vmlsldavxq_p_s32): Likewise.
6881 (__arm_vmovlbq_m_s16): Likewise.
6882 (__arm_vmovltq_m_s16): Likewise.
6883 (__arm_vmovnbq_m_s32): Likewise.
6884 (__arm_vmovntq_m_s32): Likewise.
6885 (__arm_vqmovnbq_m_s32): Likewise.
6886 (__arm_vqmovntq_m_s32): Likewise.
6887 (__arm_vrev32q_m_s16): Likewise.
6888 (__arm_vmvnq_m_n_u32): Likewise.
6889 (__arm_vorrq_m_n_u32): Likewise.
6890 (__arm_vqrshruntq_n_s32): Likewise.
6891 (__arm_vqshrunbq_n_s32): Likewise.
6892 (__arm_vqshruntq_n_s32): Likewise.
6893 (__arm_vqmovunbq_m_s32): Likewise.
6894 (__arm_vqmovuntq_m_s32): Likewise.
6895 (__arm_vqrshrntq_n_u32): Likewise.
6896 (__arm_vqshrnbq_n_u32): Likewise.
6897 (__arm_vqshrntq_n_u32): Likewise.
6898 (__arm_vrshrnbq_n_u32): Likewise.
6899 (__arm_vrshrntq_n_u32): Likewise.
6900 (__arm_vshrnbq_n_u32): Likewise.
6901 (__arm_vshrntq_n_u32): Likewise.
6902 (__arm_vmlaldavaq_u32): Likewise.
6903 (__arm_vmlaldavaxq_u32): Likewise.
6904 (__arm_vmlaldavq_p_u32): Likewise.
6905 (__arm_vmlaldavxq_p_u32): Likewise.
6906 (__arm_vmovlbq_m_u16): Likewise.
6907 (__arm_vmovltq_m_u16): Likewise.
6908 (__arm_vmovnbq_m_u32): Likewise.
6909 (__arm_vmovntq_m_u32): Likewise.
6910 (__arm_vqmovnbq_m_u32): Likewise.
6911 (__arm_vqmovntq_m_u32): Likewise.
6912 (__arm_vrev32q_m_u16): Likewise.
6913 (__arm_vcvtbq_m_f16_f32): Likewise.
6914 (__arm_vcvtbq_m_f32_f16): Likewise.
6915 (__arm_vcvttq_m_f16_f32): Likewise.
6916 (__arm_vcvttq_m_f32_f16): Likewise.
6917 (__arm_vrev32q_m_f16): Likewise.
6918 (__arm_vcmlaq_f16): Likewise.
6919 (__arm_vcmlaq_rot180_f16): Likewise.
6920 (__arm_vcmlaq_rot270_f16): Likewise.
6921 (__arm_vcmlaq_rot90_f16): Likewise.
6922 (__arm_vfmaq_f16): Likewise.
6923 (__arm_vfmaq_n_f16): Likewise.
6924 (__arm_vfmasq_n_f16): Likewise.
6925 (__arm_vfmsq_f16): Likewise.
6926 (__arm_vabsq_m_f16): Likewise.
6927 (__arm_vcvtmq_m_s16_f16): Likewise.
6928 (__arm_vcvtnq_m_s16_f16): Likewise.
6929 (__arm_vcvtpq_m_s16_f16): Likewise.
6930 (__arm_vcvtq_m_s16_f16): Likewise.
6931 (__arm_vdupq_m_n_f16): Likewise.
6932 (__arm_vmaxnmaq_m_f16): Likewise.
6933 (__arm_vmaxnmavq_p_f16): Likewise.
6934 (__arm_vmaxnmvq_p_f16): Likewise.
6935 (__arm_vminnmaq_m_f16): Likewise.
6936 (__arm_vminnmavq_p_f16): Likewise.
6937 (__arm_vminnmvq_p_f16): Likewise.
6938 (__arm_vnegq_m_f16): Likewise.
6939 (__arm_vpselq_f16): Likewise.
6940 (__arm_vrev64q_m_f16): Likewise.
6941 (__arm_vrndaq_m_f16): Likewise.
6942 (__arm_vrndmq_m_f16): Likewise.
6943 (__arm_vrndnq_m_f16): Likewise.
6944 (__arm_vrndpq_m_f16): Likewise.
6945 (__arm_vrndq_m_f16): Likewise.
6946 (__arm_vrndxq_m_f16): Likewise.
6947 (__arm_vcmpeqq_m_n_f16): Likewise.
6948 (__arm_vcmpgeq_m_f16): Likewise.
6949 (__arm_vcmpgeq_m_n_f16): Likewise.
6950 (__arm_vcmpgtq_m_f16): Likewise.
6951 (__arm_vcmpgtq_m_n_f16): Likewise.
6952 (__arm_vcmpleq_m_f16): Likewise.
6953 (__arm_vcmpleq_m_n_f16): Likewise.
6954 (__arm_vcmpltq_m_f16): Likewise.
6955 (__arm_vcmpltq_m_n_f16): Likewise.
6956 (__arm_vcmpneq_m_f16): Likewise.
6957 (__arm_vcmpneq_m_n_f16): Likewise.
6958 (__arm_vcvtmq_m_u16_f16): Likewise.
6959 (__arm_vcvtnq_m_u16_f16): Likewise.
6960 (__arm_vcvtpq_m_u16_f16): Likewise.
6961 (__arm_vcvtq_m_u16_f16): Likewise.
6962 (__arm_vcmlaq_f32): Likewise.
6963 (__arm_vcmlaq_rot180_f32): Likewise.
6964 (__arm_vcmlaq_rot270_f32): Likewise.
6965 (__arm_vcmlaq_rot90_f32): Likewise.
6966 (__arm_vfmaq_f32): Likewise.
6967 (__arm_vfmaq_n_f32): Likewise.
6968 (__arm_vfmasq_n_f32): Likewise.
6969 (__arm_vfmsq_f32): Likewise.
6970 (__arm_vabsq_m_f32): Likewise.
6971 (__arm_vcvtmq_m_s32_f32): Likewise.
6972 (__arm_vcvtnq_m_s32_f32): Likewise.
6973 (__arm_vcvtpq_m_s32_f32): Likewise.
6974 (__arm_vcvtq_m_s32_f32): Likewise.
6975 (__arm_vdupq_m_n_f32): Likewise.
6976 (__arm_vmaxnmaq_m_f32): Likewise.
6977 (__arm_vmaxnmavq_p_f32): Likewise.
6978 (__arm_vmaxnmvq_p_f32): Likewise.
6979 (__arm_vminnmaq_m_f32): Likewise.
6980 (__arm_vminnmavq_p_f32): Likewise.
6981 (__arm_vminnmvq_p_f32): Likewise.
6982 (__arm_vnegq_m_f32): Likewise.
6983 (__arm_vpselq_f32): Likewise.
6984 (__arm_vrev64q_m_f32): Likewise.
6985 (__arm_vrndaq_m_f32): Likewise.
6986 (__arm_vrndmq_m_f32): Likewise.
6987 (__arm_vrndnq_m_f32): Likewise.
6988 (__arm_vrndpq_m_f32): Likewise.
6989 (__arm_vrndq_m_f32): Likewise.
6990 (__arm_vrndxq_m_f32): Likewise.
6991 (__arm_vcmpeqq_m_n_f32): Likewise.
6992 (__arm_vcmpgeq_m_f32): Likewise.
6993 (__arm_vcmpgeq_m_n_f32): Likewise.
6994 (__arm_vcmpgtq_m_f32): Likewise.
6995 (__arm_vcmpgtq_m_n_f32): Likewise.
6996 (__arm_vcmpleq_m_f32): Likewise.
6997 (__arm_vcmpleq_m_n_f32): Likewise.
6998 (__arm_vcmpltq_m_f32): Likewise.
6999 (__arm_vcmpltq_m_n_f32): Likewise.
7000 (__arm_vcmpneq_m_f32): Likewise.
7001 (__arm_vcmpneq_m_n_f32): Likewise.
7002 (__arm_vcvtmq_m_u32_f32): Likewise.
7003 (__arm_vcvtnq_m_u32_f32): Likewise.
7004 (__arm_vcvtpq_m_u32_f32): Likewise.
7005 (__arm_vcvtq_m_u32_f32): Likewise.
7006 (vcvtq_m): Define polymorphic variant.
7007 (vabsq_m): Likewise.
7009 (vcmlaq_rot180): Likewise.
7010 (vcmlaq_rot270): Likewise.
7011 (vcmlaq_rot90): Likewise.
7012 (vcmpeqq_m_n): Likewise.
7013 (vcmpgeq_m_n): Likewise.
7014 (vrndxq_m): Likewise.
7015 (vrndq_m): Likewise.
7016 (vrndpq_m): Likewise.
7017 (vcmpgtq_m_n): Likewise.
7018 (vcmpgtq_m): Likewise.
7019 (vcmpleq_m): Likewise.
7020 (vcmpleq_m_n): Likewise.
7021 (vcmpltq_m_n): Likewise.
7022 (vcmpltq_m): Likewise.
7023 (vcmpneq_m): Likewise.
7024 (vcmpneq_m_n): Likewise.
7025 (vcvtbq_m): Likewise.
7026 (vcvttq_m): Likewise.
7027 (vcvtmq_m): Likewise.
7028 (vcvtnq_m): Likewise.
7029 (vcvtpq_m): Likewise.
7030 (vdupq_m_n): Likewise.
7031 (vfmaq_n): Likewise.
7033 (vfmasq_n): Likewise.
7035 (vmaxnmaq_m): Likewise.
7036 (vmaxnmavq_m): Likewise.
7037 (vmaxnmvq_m): Likewise.
7038 (vmaxnmavq_p): Likewise.
7039 (vmaxnmvq_p): Likewise.
7040 (vminnmaq_m): Likewise.
7041 (vminnmavq_p): Likewise.
7042 (vminnmvq_p): Likewise.
7043 (vrndnq_m): Likewise.
7044 (vrndaq_m): Likewise.
7045 (vrndmq_m): Likewise.
7046 (vrev64q_m): Likewise.
7047 (vrev32q_m): Likewise.
7049 (vnegq_m): Likewise.
7050 (vcmpgeq_m): Likewise.
7051 (vshrntq_n): Likewise.
7052 (vrshrntq_n): Likewise.
7053 (vmovlbq_m): Likewise.
7054 (vmovnbq_m): Likewise.
7055 (vmovntq_m): Likewise.
7056 (vmvnq_m_n): Likewise.
7057 (vmvnq_m): Likewise.
7058 (vshrnbq_n): Likewise.
7059 (vrshrnbq_n): Likewise.
7060 (vqshruntq_n): Likewise.
7061 (vrev16q_m): Likewise.
7062 (vqshrunbq_n): Likewise.
7063 (vqshrntq_n): Likewise.
7064 (vqrshruntq_n): Likewise.
7065 (vqrshrntq_n): Likewise.
7066 (vqshrnbq_n): Likewise.
7067 (vqmovuntq_m): Likewise.
7068 (vqmovntq_m): Likewise.
7069 (vqmovnbq_m): Likewise.
7070 (vorrq_m_n): Likewise.
7071 (vmovltq_m): Likewise.
7072 (vqmovunbq_m): Likewise.
7073 (vaddlvaq_p): Likewise.
7074 (vmlaldavaq): Likewise.
7075 (vmlaldavaxq): Likewise.
7076 (vmlaldavq_p): Likewise.
7077 (vmlaldavxq_p): Likewise.
7078 (vmlsldavaq): Likewise.
7079 (vmlsldavaxq): Likewise.
7080 (vmlsldavq_p): Likewise.
7081 (vmlsldavxq_p): Likewise.
7082 (vrmlaldavhaxq): Likewise.
7083 (vrmlaldavhq_p): Likewise.
7084 (vrmlaldavhxq_p): Likewise.
7085 (vrmlsldavhaq): Likewise.
7086 (vrmlsldavhaxq): Likewise.
7087 (vrmlsldavhq_p): Likewise.
7088 (vrmlsldavhxq_p): Likewise.
7089 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
7091 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
7092 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7093 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7094 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7095 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
7096 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
7097 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7098 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7099 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7100 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
7101 (MVE_pred3): Likewise.
7102 (MVE_constraint1): Likewise.
7103 (MVE_pred1): Likewise.
7104 (VMLALDAVQ_P): Define iterator.
7105 (VQMOVNBQ_M): Likewise.
7106 (VMOVLTQ_M): Likewise.
7107 (VMOVNBQ_M): Likewise.
7108 (VRSHRNTQ_N): Likewise.
7109 (VORRQ_M_N): Likewise.
7110 (VREV32Q_M): Likewise.
7111 (VREV16Q_M): Likewise.
7112 (VQRSHRNTQ_N): Likewise.
7113 (VMOVNTQ_M): Likewise.
7114 (VMOVLBQ_M): Likewise.
7115 (VMLALDAVAQ): Likewise.
7116 (VQSHRNBQ_N): Likewise.
7117 (VSHRNBQ_N): Likewise.
7118 (VRSHRNBQ_N): Likewise.
7119 (VMLALDAVXQ_P): Likewise.
7120 (VQMOVNTQ_M): Likewise.
7121 (VMVNQ_M_N): Likewise.
7122 (VQSHRNTQ_N): Likewise.
7123 (VMLALDAVAXQ): Likewise.
7124 (VSHRNTQ_N): Likewise.
7125 (VCVTMQ_M): Likewise.
7126 (VCVTNQ_M): Likewise.
7127 (VCVTPQ_M): Likewise.
7128 (VCVTQ_M_N_FROM_F): Likewise.
7129 (VCVTQ_M_FROM_F): Likewise.
7130 (VRMLALDAVHQ_P): Likewise.
7131 (VADDLVAQ_P): Likewise.
7132 (mve_vrndq_m_f<mode>): Define RTL pattern.
7133 (mve_vabsq_m_f<mode>): Likewise.
7134 (mve_vaddlvaq_p_<supf>v4si): Likewise.
7135 (mve_vcmlaq_f<mode>): Likewise.
7136 (mve_vcmlaq_rot180_f<mode>): Likewise.
7137 (mve_vcmlaq_rot270_f<mode>): Likewise.
7138 (mve_vcmlaq_rot90_f<mode>): Likewise.
7139 (mve_vcmpeqq_m_n_f<mode>): Likewise.
7140 (mve_vcmpgeq_m_f<mode>): Likewise.
7141 (mve_vcmpgeq_m_n_f<mode>): Likewise.
7142 (mve_vcmpgtq_m_f<mode>): Likewise.
7143 (mve_vcmpgtq_m_n_f<mode>): Likewise.
7144 (mve_vcmpleq_m_f<mode>): Likewise.
7145 (mve_vcmpleq_m_n_f<mode>): Likewise.
7146 (mve_vcmpltq_m_f<mode>): Likewise.
7147 (mve_vcmpltq_m_n_f<mode>): Likewise.
7148 (mve_vcmpneq_m_f<mode>): Likewise.
7149 (mve_vcmpneq_m_n_f<mode>): Likewise.
7150 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
7151 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
7152 (mve_vcvttq_m_f16_f32v8hf): Likewise.
7153 (mve_vcvttq_m_f32_f16v4sf): Likewise.
7154 (mve_vdupq_m_n_f<mode>): Likewise.
7155 (mve_vfmaq_f<mode>): Likewise.
7156 (mve_vfmaq_n_f<mode>): Likewise.
7157 (mve_vfmasq_n_f<mode>): Likewise.
7158 (mve_vfmsq_f<mode>): Likewise.
7159 (mve_vmaxnmaq_m_f<mode>): Likewise.
7160 (mve_vmaxnmavq_p_f<mode>): Likewise.
7161 (mve_vmaxnmvq_p_f<mode>): Likewise.
7162 (mve_vminnmaq_m_f<mode>): Likewise.
7163 (mve_vminnmavq_p_f<mode>): Likewise.
7164 (mve_vminnmvq_p_f<mode>): Likewise.
7165 (mve_vmlaldavaq_<supf><mode>): Likewise.
7166 (mve_vmlaldavaxq_<supf><mode>): Likewise.
7167 (mve_vmlaldavq_p_<supf><mode>): Likewise.
7168 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
7169 (mve_vmlsldavaq_s<mode>): Likewise.
7170 (mve_vmlsldavaxq_s<mode>): Likewise.
7171 (mve_vmlsldavq_p_s<mode>): Likewise.
7172 (mve_vmlsldavxq_p_s<mode>): Likewise.
7173 (mve_vmovlbq_m_<supf><mode>): Likewise.
7174 (mve_vmovltq_m_<supf><mode>): Likewise.
7175 (mve_vmovnbq_m_<supf><mode>): Likewise.
7176 (mve_vmovntq_m_<supf><mode>): Likewise.
7177 (mve_vmvnq_m_n_<supf><mode>): Likewise.
7178 (mve_vnegq_m_f<mode>): Likewise.
7179 (mve_vorrq_m_n_<supf><mode>): Likewise.
7180 (mve_vpselq_f<mode>): Likewise.
7181 (mve_vqmovnbq_m_<supf><mode>): Likewise.
7182 (mve_vqmovntq_m_<supf><mode>): Likewise.
7183 (mve_vqmovunbq_m_s<mode>): Likewise.
7184 (mve_vqmovuntq_m_s<mode>): Likewise.
7185 (mve_vqrshrntq_n_<supf><mode>): Likewise.
7186 (mve_vqrshruntq_n_s<mode>): Likewise.
7187 (mve_vqshrnbq_n_<supf><mode>): Likewise.
7188 (mve_vqshrntq_n_<supf><mode>): Likewise.
7189 (mve_vqshrunbq_n_s<mode>): Likewise.
7190 (mve_vqshruntq_n_s<mode>): Likewise.
7191 (mve_vrev32q_m_fv8hf): Likewise.
7192 (mve_vrev32q_m_<supf><mode>): Likewise.
7193 (mve_vrev64q_m_f<mode>): Likewise.
7194 (mve_vrmlaldavhaxq_sv4si): Likewise.
7195 (mve_vrmlaldavhxq_p_sv4si): Likewise.
7196 (mve_vrmlsldavhaxq_sv4si): Likewise.
7197 (mve_vrmlsldavhq_p_sv4si): Likewise.
7198 (mve_vrmlsldavhxq_p_sv4si): Likewise.
7199 (mve_vrndaq_m_f<mode>): Likewise.
7200 (mve_vrndmq_m_f<mode>): Likewise.
7201 (mve_vrndnq_m_f<mode>): Likewise.
7202 (mve_vrndpq_m_f<mode>): Likewise.
7203 (mve_vrndxq_m_f<mode>): Likewise.
7204 (mve_vrshrnbq_n_<supf><mode>): Likewise.
7205 (mve_vrshrntq_n_<supf><mode>): Likewise.
7206 (mve_vshrnbq_n_<supf><mode>): Likewise.
7207 (mve_vshrntq_n_<supf><mode>): Likewise.
7208 (mve_vcvtmq_m_<supf><mode>): Likewise.
7209 (mve_vcvtpq_m_<supf><mode>): Likewise.
7210 (mve_vcvtnq_m_<supf><mode>): Likewise.
7211 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
7212 (mve_vrev16q_m_<supf>v16qi): Likewise.
7213 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
7214 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
7215 (mve_vrmlsldavhaq_sv4si): Likewise.
7217 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7218 Mihail Ionescu <mihail.ionescu@arm.com>
7219 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7221 * config/arm/arm_mve.h (vpselq_u8): Define macro.
7222 (vpselq_s8): Likewise.
7223 (vrev64q_m_u8): Likewise.
7224 (vqrdmlashq_n_u8): Likewise.
7225 (vqrdmlahq_n_u8): Likewise.
7226 (vqdmlahq_n_u8): Likewise.
7227 (vmvnq_m_u8): Likewise.
7228 (vmlasq_n_u8): Likewise.
7229 (vmlaq_n_u8): Likewise.
7230 (vmladavq_p_u8): Likewise.
7231 (vmladavaq_u8): Likewise.
7232 (vminvq_p_u8): Likewise.
7233 (vmaxvq_p_u8): Likewise.
7234 (vdupq_m_n_u8): Likewise.
7235 (vcmpneq_m_u8): Likewise.
7236 (vcmpneq_m_n_u8): Likewise.
7237 (vcmphiq_m_u8): Likewise.
7238 (vcmphiq_m_n_u8): Likewise.
7239 (vcmpeqq_m_u8): Likewise.
7240 (vcmpeqq_m_n_u8): Likewise.
7241 (vcmpcsq_m_u8): Likewise.
7242 (vcmpcsq_m_n_u8): Likewise.
7243 (vclzq_m_u8): Likewise.
7244 (vaddvaq_p_u8): Likewise.
7245 (vsriq_n_u8): Likewise.
7246 (vsliq_n_u8): Likewise.
7247 (vshlq_m_r_u8): Likewise.
7248 (vrshlq_m_n_u8): Likewise.
7249 (vqshlq_m_r_u8): Likewise.
7250 (vqrshlq_m_n_u8): Likewise.
7251 (vminavq_p_s8): Likewise.
7252 (vminaq_m_s8): Likewise.
7253 (vmaxavq_p_s8): Likewise.
7254 (vmaxaq_m_s8): Likewise.
7255 (vcmpneq_m_s8): Likewise.
7256 (vcmpneq_m_n_s8): Likewise.
7257 (vcmpltq_m_s8): Likewise.
7258 (vcmpltq_m_n_s8): Likewise.
7259 (vcmpleq_m_s8): Likewise.
7260 (vcmpleq_m_n_s8): Likewise.
7261 (vcmpgtq_m_s8): Likewise.
7262 (vcmpgtq_m_n_s8): Likewise.
7263 (vcmpgeq_m_s8): Likewise.
7264 (vcmpgeq_m_n_s8): Likewise.
7265 (vcmpeqq_m_s8): Likewise.
7266 (vcmpeqq_m_n_s8): Likewise.
7267 (vshlq_m_r_s8): Likewise.
7268 (vrshlq_m_n_s8): Likewise.
7269 (vrev64q_m_s8): Likewise.
7270 (vqshlq_m_r_s8): Likewise.
7271 (vqrshlq_m_n_s8): Likewise.
7272 (vqnegq_m_s8): Likewise.
7273 (vqabsq_m_s8): Likewise.
7274 (vnegq_m_s8): Likewise.
7275 (vmvnq_m_s8): Likewise.
7276 (vmlsdavxq_p_s8): Likewise.
7277 (vmlsdavq_p_s8): Likewise.
7278 (vmladavxq_p_s8): Likewise.
7279 (vmladavq_p_s8): Likewise.
7280 (vminvq_p_s8): Likewise.
7281 (vmaxvq_p_s8): Likewise.
7282 (vdupq_m_n_s8): Likewise.
7283 (vclzq_m_s8): Likewise.
7284 (vclsq_m_s8): Likewise.
7285 (vaddvaq_p_s8): Likewise.
7286 (vabsq_m_s8): Likewise.
7287 (vqrdmlsdhxq_s8): Likewise.
7288 (vqrdmlsdhq_s8): Likewise.
7289 (vqrdmlashq_n_s8): Likewise.
7290 (vqrdmlahq_n_s8): Likewise.
7291 (vqrdmladhxq_s8): Likewise.
7292 (vqrdmladhq_s8): Likewise.
7293 (vqdmlsdhxq_s8): Likewise.
7294 (vqdmlsdhq_s8): Likewise.
7295 (vqdmlahq_n_s8): Likewise.
7296 (vqdmladhxq_s8): Likewise.
7297 (vqdmladhq_s8): Likewise.
7298 (vmlsdavaxq_s8): Likewise.
7299 (vmlsdavaq_s8): Likewise.
7300 (vmlasq_n_s8): Likewise.
7301 (vmlaq_n_s8): Likewise.
7302 (vmladavaxq_s8): Likewise.
7303 (vmladavaq_s8): Likewise.
7304 (vsriq_n_s8): Likewise.
7305 (vsliq_n_s8): Likewise.
7306 (vpselq_u16): Likewise.
7307 (vpselq_s16): Likewise.
7308 (vrev64q_m_u16): Likewise.
7309 (vqrdmlashq_n_u16): Likewise.
7310 (vqrdmlahq_n_u16): Likewise.
7311 (vqdmlahq_n_u16): Likewise.
7312 (vmvnq_m_u16): Likewise.
7313 (vmlasq_n_u16): Likewise.
7314 (vmlaq_n_u16): Likewise.
7315 (vmladavq_p_u16): Likewise.
7316 (vmladavaq_u16): Likewise.
7317 (vminvq_p_u16): Likewise.
7318 (vmaxvq_p_u16): Likewise.
7319 (vdupq_m_n_u16): Likewise.
7320 (vcmpneq_m_u16): Likewise.
7321 (vcmpneq_m_n_u16): Likewise.
7322 (vcmphiq_m_u16): Likewise.
7323 (vcmphiq_m_n_u16): Likewise.
7324 (vcmpeqq_m_u16): Likewise.
7325 (vcmpeqq_m_n_u16): Likewise.
7326 (vcmpcsq_m_u16): Likewise.
7327 (vcmpcsq_m_n_u16): Likewise.
7328 (vclzq_m_u16): Likewise.
7329 (vaddvaq_p_u16): Likewise.
7330 (vsriq_n_u16): Likewise.
7331 (vsliq_n_u16): Likewise.
7332 (vshlq_m_r_u16): Likewise.
7333 (vrshlq_m_n_u16): Likewise.
7334 (vqshlq_m_r_u16): Likewise.
7335 (vqrshlq_m_n_u16): Likewise.
7336 (vminavq_p_s16): Likewise.
7337 (vminaq_m_s16): Likewise.
7338 (vmaxavq_p_s16): Likewise.
7339 (vmaxaq_m_s16): Likewise.
7340 (vcmpneq_m_s16): Likewise.
7341 (vcmpneq_m_n_s16): Likewise.
7342 (vcmpltq_m_s16): Likewise.
7343 (vcmpltq_m_n_s16): Likewise.
7344 (vcmpleq_m_s16): Likewise.
7345 (vcmpleq_m_n_s16): Likewise.
7346 (vcmpgtq_m_s16): Likewise.
7347 (vcmpgtq_m_n_s16): Likewise.
7348 (vcmpgeq_m_s16): Likewise.
7349 (vcmpgeq_m_n_s16): Likewise.
7350 (vcmpeqq_m_s16): Likewise.
7351 (vcmpeqq_m_n_s16): Likewise.
7352 (vshlq_m_r_s16): Likewise.
7353 (vrshlq_m_n_s16): Likewise.
7354 (vrev64q_m_s16): Likewise.
7355 (vqshlq_m_r_s16): Likewise.
7356 (vqrshlq_m_n_s16): Likewise.
7357 (vqnegq_m_s16): Likewise.
7358 (vqabsq_m_s16): Likewise.
7359 (vnegq_m_s16): Likewise.
7360 (vmvnq_m_s16): Likewise.
7361 (vmlsdavxq_p_s16): Likewise.
7362 (vmlsdavq_p_s16): Likewise.
7363 (vmladavxq_p_s16): Likewise.
7364 (vmladavq_p_s16): Likewise.
7365 (vminvq_p_s16): Likewise.
7366 (vmaxvq_p_s16): Likewise.
7367 (vdupq_m_n_s16): Likewise.
7368 (vclzq_m_s16): Likewise.
7369 (vclsq_m_s16): Likewise.
7370 (vaddvaq_p_s16): Likewise.
7371 (vabsq_m_s16): Likewise.
7372 (vqrdmlsdhxq_s16): Likewise.
7373 (vqrdmlsdhq_s16): Likewise.
7374 (vqrdmlashq_n_s16): Likewise.
7375 (vqrdmlahq_n_s16): Likewise.
7376 (vqrdmladhxq_s16): Likewise.
7377 (vqrdmladhq_s16): Likewise.
7378 (vqdmlsdhxq_s16): Likewise.
7379 (vqdmlsdhq_s16): Likewise.
7380 (vqdmlahq_n_s16): Likewise.
7381 (vqdmladhxq_s16): Likewise.
7382 (vqdmladhq_s16): Likewise.
7383 (vmlsdavaxq_s16): Likewise.
7384 (vmlsdavaq_s16): Likewise.
7385 (vmlasq_n_s16): Likewise.
7386 (vmlaq_n_s16): Likewise.
7387 (vmladavaxq_s16): Likewise.
7388 (vmladavaq_s16): Likewise.
7389 (vsriq_n_s16): Likewise.
7390 (vsliq_n_s16): Likewise.
7391 (vpselq_u32): Likewise.
7392 (vpselq_s32): Likewise.
7393 (vrev64q_m_u32): Likewise.
7394 (vqrdmlashq_n_u32): Likewise.
7395 (vqrdmlahq_n_u32): Likewise.
7396 (vqdmlahq_n_u32): Likewise.
7397 (vmvnq_m_u32): Likewise.
7398 (vmlasq_n_u32): Likewise.
7399 (vmlaq_n_u32): Likewise.
7400 (vmladavq_p_u32): Likewise.
7401 (vmladavaq_u32): Likewise.
7402 (vminvq_p_u32): Likewise.
7403 (vmaxvq_p_u32): Likewise.
7404 (vdupq_m_n_u32): Likewise.
7405 (vcmpneq_m_u32): Likewise.
7406 (vcmpneq_m_n_u32): Likewise.
7407 (vcmphiq_m_u32): Likewise.
7408 (vcmphiq_m_n_u32): Likewise.
7409 (vcmpeqq_m_u32): Likewise.
7410 (vcmpeqq_m_n_u32): Likewise.
7411 (vcmpcsq_m_u32): Likewise.
7412 (vcmpcsq_m_n_u32): Likewise.
7413 (vclzq_m_u32): Likewise.
7414 (vaddvaq_p_u32): Likewise.
7415 (vsriq_n_u32): Likewise.
7416 (vsliq_n_u32): Likewise.
7417 (vshlq_m_r_u32): Likewise.
7418 (vrshlq_m_n_u32): Likewise.
7419 (vqshlq_m_r_u32): Likewise.
7420 (vqrshlq_m_n_u32): Likewise.
7421 (vminavq_p_s32): Likewise.
7422 (vminaq_m_s32): Likewise.
7423 (vmaxavq_p_s32): Likewise.
7424 (vmaxaq_m_s32): Likewise.
7425 (vcmpneq_m_s32): Likewise.
7426 (vcmpneq_m_n_s32): Likewise.
7427 (vcmpltq_m_s32): Likewise.
7428 (vcmpltq_m_n_s32): Likewise.
7429 (vcmpleq_m_s32): Likewise.
7430 (vcmpleq_m_n_s32): Likewise.
7431 (vcmpgtq_m_s32): Likewise.
7432 (vcmpgtq_m_n_s32): Likewise.
7433 (vcmpgeq_m_s32): Likewise.
7434 (vcmpgeq_m_n_s32): Likewise.
7435 (vcmpeqq_m_s32): Likewise.
7436 (vcmpeqq_m_n_s32): Likewise.
7437 (vshlq_m_r_s32): Likewise.
7438 (vrshlq_m_n_s32): Likewise.
7439 (vrev64q_m_s32): Likewise.
7440 (vqshlq_m_r_s32): Likewise.
7441 (vqrshlq_m_n_s32): Likewise.
7442 (vqnegq_m_s32): Likewise.
7443 (vqabsq_m_s32): Likewise.
7444 (vnegq_m_s32): Likewise.
7445 (vmvnq_m_s32): Likewise.
7446 (vmlsdavxq_p_s32): Likewise.
7447 (vmlsdavq_p_s32): Likewise.
7448 (vmladavxq_p_s32): Likewise.
7449 (vmladavq_p_s32): Likewise.
7450 (vminvq_p_s32): Likewise.
7451 (vmaxvq_p_s32): Likewise.
7452 (vdupq_m_n_s32): Likewise.
7453 (vclzq_m_s32): Likewise.
7454 (vclsq_m_s32): Likewise.
7455 (vaddvaq_p_s32): Likewise.
7456 (vabsq_m_s32): Likewise.
7457 (vqrdmlsdhxq_s32): Likewise.
7458 (vqrdmlsdhq_s32): Likewise.
7459 (vqrdmlashq_n_s32): Likewise.
7460 (vqrdmlahq_n_s32): Likewise.
7461 (vqrdmladhxq_s32): Likewise.
7462 (vqrdmladhq_s32): Likewise.
7463 (vqdmlsdhxq_s32): Likewise.
7464 (vqdmlsdhq_s32): Likewise.
7465 (vqdmlahq_n_s32): Likewise.
7466 (vqdmladhxq_s32): Likewise.
7467 (vqdmladhq_s32): Likewise.
7468 (vmlsdavaxq_s32): Likewise.
7469 (vmlsdavaq_s32): Likewise.
7470 (vmlasq_n_s32): Likewise.
7471 (vmlaq_n_s32): Likewise.
7472 (vmladavaxq_s32): Likewise.
7473 (vmladavaq_s32): Likewise.
7474 (vsriq_n_s32): Likewise.
7475 (vsliq_n_s32): Likewise.
7476 (vpselq_u64): Likewise.
7477 (vpselq_s64): Likewise.
7478 (__arm_vpselq_u8): Define intrinsic.
7479 (__arm_vpselq_s8): Likewise.
7480 (__arm_vrev64q_m_u8): Likewise.
7481 (__arm_vqrdmlashq_n_u8): Likewise.
7482 (__arm_vqrdmlahq_n_u8): Likewise.
7483 (__arm_vqdmlahq_n_u8): Likewise.
7484 (__arm_vmvnq_m_u8): Likewise.
7485 (__arm_vmlasq_n_u8): Likewise.
7486 (__arm_vmlaq_n_u8): Likewise.
7487 (__arm_vmladavq_p_u8): Likewise.
7488 (__arm_vmladavaq_u8): Likewise.
7489 (__arm_vminvq_p_u8): Likewise.
7490 (__arm_vmaxvq_p_u8): Likewise.
7491 (__arm_vdupq_m_n_u8): Likewise.
7492 (__arm_vcmpneq_m_u8): Likewise.
7493 (__arm_vcmpneq_m_n_u8): Likewise.
7494 (__arm_vcmphiq_m_u8): Likewise.
7495 (__arm_vcmphiq_m_n_u8): Likewise.
7496 (__arm_vcmpeqq_m_u8): Likewise.
7497 (__arm_vcmpeqq_m_n_u8): Likewise.
7498 (__arm_vcmpcsq_m_u8): Likewise.
7499 (__arm_vcmpcsq_m_n_u8): Likewise.
7500 (__arm_vclzq_m_u8): Likewise.
7501 (__arm_vaddvaq_p_u8): Likewise.
7502 (__arm_vsriq_n_u8): Likewise.
7503 (__arm_vsliq_n_u8): Likewise.
7504 (__arm_vshlq_m_r_u8): Likewise.
7505 (__arm_vrshlq_m_n_u8): Likewise.
7506 (__arm_vqshlq_m_r_u8): Likewise.
7507 (__arm_vqrshlq_m_n_u8): Likewise.
7508 (__arm_vminavq_p_s8): Likewise.
7509 (__arm_vminaq_m_s8): Likewise.
7510 (__arm_vmaxavq_p_s8): Likewise.
7511 (__arm_vmaxaq_m_s8): Likewise.
7512 (__arm_vcmpneq_m_s8): Likewise.
7513 (__arm_vcmpneq_m_n_s8): Likewise.
7514 (__arm_vcmpltq_m_s8): Likewise.
7515 (__arm_vcmpltq_m_n_s8): Likewise.
7516 (__arm_vcmpleq_m_s8): Likewise.
7517 (__arm_vcmpleq_m_n_s8): Likewise.
7518 (__arm_vcmpgtq_m_s8): Likewise.
7519 (__arm_vcmpgtq_m_n_s8): Likewise.
7520 (__arm_vcmpgeq_m_s8): Likewise.
7521 (__arm_vcmpgeq_m_n_s8): Likewise.
7522 (__arm_vcmpeqq_m_s8): Likewise.
7523 (__arm_vcmpeqq_m_n_s8): Likewise.
7524 (__arm_vshlq_m_r_s8): Likewise.
7525 (__arm_vrshlq_m_n_s8): Likewise.
7526 (__arm_vrev64q_m_s8): Likewise.
7527 (__arm_vqshlq_m_r_s8): Likewise.
7528 (__arm_vqrshlq_m_n_s8): Likewise.
7529 (__arm_vqnegq_m_s8): Likewise.
7530 (__arm_vqabsq_m_s8): Likewise.
7531 (__arm_vnegq_m_s8): Likewise.
7532 (__arm_vmvnq_m_s8): Likewise.
7533 (__arm_vmlsdavxq_p_s8): Likewise.
7534 (__arm_vmlsdavq_p_s8): Likewise.
7535 (__arm_vmladavxq_p_s8): Likewise.
7536 (__arm_vmladavq_p_s8): Likewise.
7537 (__arm_vminvq_p_s8): Likewise.
7538 (__arm_vmaxvq_p_s8): Likewise.
7539 (__arm_vdupq_m_n_s8): Likewise.
7540 (__arm_vclzq_m_s8): Likewise.
7541 (__arm_vclsq_m_s8): Likewise.
7542 (__arm_vaddvaq_p_s8): Likewise.
7543 (__arm_vabsq_m_s8): Likewise.
7544 (__arm_vqrdmlsdhxq_s8): Likewise.
7545 (__arm_vqrdmlsdhq_s8): Likewise.
7546 (__arm_vqrdmlashq_n_s8): Likewise.
7547 (__arm_vqrdmlahq_n_s8): Likewise.
7548 (__arm_vqrdmladhxq_s8): Likewise.
7549 (__arm_vqrdmladhq_s8): Likewise.
7550 (__arm_vqdmlsdhxq_s8): Likewise.
7551 (__arm_vqdmlsdhq_s8): Likewise.
7552 (__arm_vqdmlahq_n_s8): Likewise.
7553 (__arm_vqdmladhxq_s8): Likewise.
7554 (__arm_vqdmladhq_s8): Likewise.
7555 (__arm_vmlsdavaxq_s8): Likewise.
7556 (__arm_vmlsdavaq_s8): Likewise.
7557 (__arm_vmlasq_n_s8): Likewise.
7558 (__arm_vmlaq_n_s8): Likewise.
7559 (__arm_vmladavaxq_s8): Likewise.
7560 (__arm_vmladavaq_s8): Likewise.
7561 (__arm_vsriq_n_s8): Likewise.
7562 (__arm_vsliq_n_s8): Likewise.
7563 (__arm_vpselq_u16): Likewise.
7564 (__arm_vpselq_s16): Likewise.
7565 (__arm_vrev64q_m_u16): Likewise.
7566 (__arm_vqrdmlashq_n_u16): Likewise.
7567 (__arm_vqrdmlahq_n_u16): Likewise.
7568 (__arm_vqdmlahq_n_u16): Likewise.
7569 (__arm_vmvnq_m_u16): Likewise.
7570 (__arm_vmlasq_n_u16): Likewise.
7571 (__arm_vmlaq_n_u16): Likewise.
7572 (__arm_vmladavq_p_u16): Likewise.
7573 (__arm_vmladavaq_u16): Likewise.
7574 (__arm_vminvq_p_u16): Likewise.
7575 (__arm_vmaxvq_p_u16): Likewise.
7576 (__arm_vdupq_m_n_u16): Likewise.
7577 (__arm_vcmpneq_m_u16): Likewise.
7578 (__arm_vcmpneq_m_n_u16): Likewise.
7579 (__arm_vcmphiq_m_u16): Likewise.
7580 (__arm_vcmphiq_m_n_u16): Likewise.
7581 (__arm_vcmpeqq_m_u16): Likewise.
7582 (__arm_vcmpeqq_m_n_u16): Likewise.
7583 (__arm_vcmpcsq_m_u16): Likewise.
7584 (__arm_vcmpcsq_m_n_u16): Likewise.
7585 (__arm_vclzq_m_u16): Likewise.
7586 (__arm_vaddvaq_p_u16): Likewise.
7587 (__arm_vsriq_n_u16): Likewise.
7588 (__arm_vsliq_n_u16): Likewise.
7589 (__arm_vshlq_m_r_u16): Likewise.
7590 (__arm_vrshlq_m_n_u16): Likewise.
7591 (__arm_vqshlq_m_r_u16): Likewise.
7592 (__arm_vqrshlq_m_n_u16): Likewise.
7593 (__arm_vminavq_p_s16): Likewise.
7594 (__arm_vminaq_m_s16): Likewise.
7595 (__arm_vmaxavq_p_s16): Likewise.
7596 (__arm_vmaxaq_m_s16): Likewise.
7597 (__arm_vcmpneq_m_s16): Likewise.
7598 (__arm_vcmpneq_m_n_s16): Likewise.
7599 (__arm_vcmpltq_m_s16): Likewise.
7600 (__arm_vcmpltq_m_n_s16): Likewise.
7601 (__arm_vcmpleq_m_s16): Likewise.
7602 (__arm_vcmpleq_m_n_s16): Likewise.
7603 (__arm_vcmpgtq_m_s16): Likewise.
7604 (__arm_vcmpgtq_m_n_s16): Likewise.
7605 (__arm_vcmpgeq_m_s16): Likewise.
7606 (__arm_vcmpgeq_m_n_s16): Likewise.
7607 (__arm_vcmpeqq_m_s16): Likewise.
7608 (__arm_vcmpeqq_m_n_s16): Likewise.
7609 (__arm_vshlq_m_r_s16): Likewise.
7610 (__arm_vrshlq_m_n_s16): Likewise.
7611 (__arm_vrev64q_m_s16): Likewise.
7612 (__arm_vqshlq_m_r_s16): Likewise.
7613 (__arm_vqrshlq_m_n_s16): Likewise.
7614 (__arm_vqnegq_m_s16): Likewise.
7615 (__arm_vqabsq_m_s16): Likewise.
7616 (__arm_vnegq_m_s16): Likewise.
7617 (__arm_vmvnq_m_s16): Likewise.
7618 (__arm_vmlsdavxq_p_s16): Likewise.
7619 (__arm_vmlsdavq_p_s16): Likewise.
7620 (__arm_vmladavxq_p_s16): Likewise.
7621 (__arm_vmladavq_p_s16): Likewise.
7622 (__arm_vminvq_p_s16): Likewise.
7623 (__arm_vmaxvq_p_s16): Likewise.
7624 (__arm_vdupq_m_n_s16): Likewise.
7625 (__arm_vclzq_m_s16): Likewise.
7626 (__arm_vclsq_m_s16): Likewise.
7627 (__arm_vaddvaq_p_s16): Likewise.
7628 (__arm_vabsq_m_s16): Likewise.
7629 (__arm_vqrdmlsdhxq_s16): Likewise.
7630 (__arm_vqrdmlsdhq_s16): Likewise.
7631 (__arm_vqrdmlashq_n_s16): Likewise.
7632 (__arm_vqrdmlahq_n_s16): Likewise.
7633 (__arm_vqrdmladhxq_s16): Likewise.
7634 (__arm_vqrdmladhq_s16): Likewise.
7635 (__arm_vqdmlsdhxq_s16): Likewise.
7636 (__arm_vqdmlsdhq_s16): Likewise.
7637 (__arm_vqdmlahq_n_s16): Likewise.
7638 (__arm_vqdmladhxq_s16): Likewise.
7639 (__arm_vqdmladhq_s16): Likewise.
7640 (__arm_vmlsdavaxq_s16): Likewise.
7641 (__arm_vmlsdavaq_s16): Likewise.
7642 (__arm_vmlasq_n_s16): Likewise.
7643 (__arm_vmlaq_n_s16): Likewise.
7644 (__arm_vmladavaxq_s16): Likewise.
7645 (__arm_vmladavaq_s16): Likewise.
7646 (__arm_vsriq_n_s16): Likewise.
7647 (__arm_vsliq_n_s16): Likewise.
7648 (__arm_vpselq_u32): Likewise.
7649 (__arm_vpselq_s32): Likewise.
7650 (__arm_vrev64q_m_u32): Likewise.
7651 (__arm_vqrdmlashq_n_u32): Likewise.
7652 (__arm_vqrdmlahq_n_u32): Likewise.
7653 (__arm_vqdmlahq_n_u32): Likewise.
7654 (__arm_vmvnq_m_u32): Likewise.
7655 (__arm_vmlasq_n_u32): Likewise.
7656 (__arm_vmlaq_n_u32): Likewise.
7657 (__arm_vmladavq_p_u32): Likewise.
7658 (__arm_vmladavaq_u32): Likewise.
7659 (__arm_vminvq_p_u32): Likewise.
7660 (__arm_vmaxvq_p_u32): Likewise.
7661 (__arm_vdupq_m_n_u32): Likewise.
7662 (__arm_vcmpneq_m_u32): Likewise.
7663 (__arm_vcmpneq_m_n_u32): Likewise.
7664 (__arm_vcmphiq_m_u32): Likewise.
7665 (__arm_vcmphiq_m_n_u32): Likewise.
7666 (__arm_vcmpeqq_m_u32): Likewise.
7667 (__arm_vcmpeqq_m_n_u32): Likewise.
7668 (__arm_vcmpcsq_m_u32): Likewise.
7669 (__arm_vcmpcsq_m_n_u32): Likewise.
7670 (__arm_vclzq_m_u32): Likewise.
7671 (__arm_vaddvaq_p_u32): Likewise.
7672 (__arm_vsriq_n_u32): Likewise.
7673 (__arm_vsliq_n_u32): Likewise.
7674 (__arm_vshlq_m_r_u32): Likewise.
7675 (__arm_vrshlq_m_n_u32): Likewise.
7676 (__arm_vqshlq_m_r_u32): Likewise.
7677 (__arm_vqrshlq_m_n_u32): Likewise.
7678 (__arm_vminavq_p_s32): Likewise.
7679 (__arm_vminaq_m_s32): Likewise.
7680 (__arm_vmaxavq_p_s32): Likewise.
7681 (__arm_vmaxaq_m_s32): Likewise.
7682 (__arm_vcmpneq_m_s32): Likewise.
7683 (__arm_vcmpneq_m_n_s32): Likewise.
7684 (__arm_vcmpltq_m_s32): Likewise.
7685 (__arm_vcmpltq_m_n_s32): Likewise.
7686 (__arm_vcmpleq_m_s32): Likewise.
7687 (__arm_vcmpleq_m_n_s32): Likewise.
7688 (__arm_vcmpgtq_m_s32): Likewise.
7689 (__arm_vcmpgtq_m_n_s32): Likewise.
7690 (__arm_vcmpgeq_m_s32): Likewise.
7691 (__arm_vcmpgeq_m_n_s32): Likewise.
7692 (__arm_vcmpeqq_m_s32): Likewise.
7693 (__arm_vcmpeqq_m_n_s32): Likewise.
7694 (__arm_vshlq_m_r_s32): Likewise.
7695 (__arm_vrshlq_m_n_s32): Likewise.
7696 (__arm_vrev64q_m_s32): Likewise.
7697 (__arm_vqshlq_m_r_s32): Likewise.
7698 (__arm_vqrshlq_m_n_s32): Likewise.
7699 (__arm_vqnegq_m_s32): Likewise.
7700 (__arm_vqabsq_m_s32): Likewise.
7701 (__arm_vnegq_m_s32): Likewise.
7702 (__arm_vmvnq_m_s32): Likewise.
7703 (__arm_vmlsdavxq_p_s32): Likewise.
7704 (__arm_vmlsdavq_p_s32): Likewise.
7705 (__arm_vmladavxq_p_s32): Likewise.
7706 (__arm_vmladavq_p_s32): Likewise.
7707 (__arm_vminvq_p_s32): Likewise.
7708 (__arm_vmaxvq_p_s32): Likewise.
7709 (__arm_vdupq_m_n_s32): Likewise.
7710 (__arm_vclzq_m_s32): Likewise.
7711 (__arm_vclsq_m_s32): Likewise.
7712 (__arm_vaddvaq_p_s32): Likewise.
7713 (__arm_vabsq_m_s32): Likewise.
7714 (__arm_vqrdmlsdhxq_s32): Likewise.
7715 (__arm_vqrdmlsdhq_s32): Likewise.
7716 (__arm_vqrdmlashq_n_s32): Likewise.
7717 (__arm_vqrdmlahq_n_s32): Likewise.
7718 (__arm_vqrdmladhxq_s32): Likewise.
7719 (__arm_vqrdmladhq_s32): Likewise.
7720 (__arm_vqdmlsdhxq_s32): Likewise.
7721 (__arm_vqdmlsdhq_s32): Likewise.
7722 (__arm_vqdmlahq_n_s32): Likewise.
7723 (__arm_vqdmladhxq_s32): Likewise.
7724 (__arm_vqdmladhq_s32): Likewise.
7725 (__arm_vmlsdavaxq_s32): Likewise.
7726 (__arm_vmlsdavaq_s32): Likewise.
7727 (__arm_vmlasq_n_s32): Likewise.
7728 (__arm_vmlaq_n_s32): Likewise.
7729 (__arm_vmladavaxq_s32): Likewise.
7730 (__arm_vmladavaq_s32): Likewise.
7731 (__arm_vsriq_n_s32): Likewise.
7732 (__arm_vsliq_n_s32): Likewise.
7733 (__arm_vpselq_u64): Likewise.
7734 (__arm_vpselq_s64): Likewise.
7735 (vcmpneq_m_n): Define polymorphic variant.
7736 (vcmpneq_m): Likewise.
7737 (vqrdmlsdhq): Likewise.
7738 (vqrdmlsdhxq): Likewise.
7739 (vqrshlq_m_n): Likewise.
7740 (vqshlq_m_r): Likewise.
7741 (vrev64q_m): Likewise.
7742 (vrshlq_m_n): Likewise.
7743 (vshlq_m_r): Likewise.
7744 (vsliq_n): Likewise.
7745 (vsriq_n): Likewise.
7746 (vqrdmlashq_n): Likewise.
7747 (vqrdmlahq): Likewise.
7748 (vqrdmladhxq): Likewise.
7749 (vqrdmladhq): Likewise.
7750 (vqnegq_m): Likewise.
7751 (vqdmlsdhxq): Likewise.
7752 (vabsq_m): Likewise.
7753 (vclsq_m): Likewise.
7754 (vclzq_m): Likewise.
7755 (vcmpgeq_m): Likewise.
7756 (vcmpgeq_m_n): Likewise.
7757 (vdupq_m_n): Likewise.
7758 (vmaxaq_m): Likewise.
7759 (vmlaq_n): Likewise.
7760 (vmlasq_n): Likewise.
7761 (vmvnq_m): Likewise.
7762 (vnegq_m): Likewise.
7764 (vqdmlahq_n): Likewise.
7765 (vqrdmlahq_n): Likewise.
7766 (vqdmlsdhq): Likewise.
7767 (vqdmladhq): Likewise.
7768 (vqabsq_m): Likewise.
7769 (vminaq_m): Likewise.
7770 (vrmlaldavhaq): Likewise.
7771 (vmlsdavxq_p): Likewise.
7772 (vmlsdavq_p): Likewise.
7773 (vmlsdavaxq): Likewise.
7774 (vmlsdavaq): Likewise.
7775 (vaddvaq_p): Likewise.
7776 (vcmpcsq_m_n): Likewise.
7777 (vcmpcsq_m): Likewise.
7778 (vcmpeqq_m_n): Likewise.
7779 (vcmpeqq_m): Likewise.
7780 (vmladavxq_p): Likewise.
7781 (vmladavq_p): Likewise.
7782 (vmladavaxq): Likewise.
7783 (vmladavaq): Likewise.
7784 (vminvq_p): Likewise.
7785 (vminavq_p): Likewise.
7786 (vmaxvq_p): Likewise.
7787 (vmaxavq_p): Likewise.
7788 (vcmpltq_m_n): Likewise.
7789 (vcmpltq_m): Likewise.
7790 (vcmpleq_m): Likewise.
7791 (vcmpleq_m_n): Likewise.
7792 (vcmphiq_m_n): Likewise.
7793 (vcmphiq_m): Likewise.
7794 (vcmpgtq_m_n): Likewise.
7795 (vcmpgtq_m): Likewise.
7796 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
7798 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7799 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7800 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7801 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7802 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7803 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7804 * config/arm/constraints.md (Rc): Define constraint to check constant is
7805 in the range of 0 to 15.
7806 (Re): Define constraint to check constant is in the range of 0 to 31.
7807 * config/arm/mve.md (VADDVAQ_P): Define iterator.
7808 (VCLZQ_M): Likewise.
7809 (VCMPEQQ_M_N): Likewise.
7810 (VCMPEQQ_M): Likewise.
7811 (VCMPNEQ_M_N): Likewise.
7812 (VCMPNEQ_M): Likewise.
7813 (VDUPQ_M_N): Likewise.
7814 (VMAXVQ_P): Likewise.
7815 (VMINVQ_P): Likewise.
7816 (VMLADAVAQ): Likewise.
7817 (VMLADAVQ_P): Likewise.
7818 (VMLAQ_N): Likewise.
7819 (VMLASQ_N): Likewise.
7820 (VMVNQ_M): Likewise.
7822 (VQDMLAHQ_N): Likewise.
7823 (VQRDMLAHQ_N): Likewise.
7824 (VQRDMLASHQ_N): Likewise.
7825 (VQRSHLQ_M_N): Likewise.
7826 (VQSHLQ_M_R): Likewise.
7827 (VREV64Q_M): Likewise.
7828 (VRSHLQ_M_N): Likewise.
7829 (VSHLQ_M_R): Likewise.
7830 (VSLIQ_N): Likewise.
7831 (VSRIQ_N): Likewise.
7832 (mve_vabsq_m_s<mode>): Define RTL pattern.
7833 (mve_vaddvaq_p_<supf><mode>): Likewise.
7834 (mve_vclsq_m_s<mode>): Likewise.
7835 (mve_vclzq_m_<supf><mode>): Likewise.
7836 (mve_vcmpcsq_m_n_u<mode>): Likewise.
7837 (mve_vcmpcsq_m_u<mode>): Likewise.
7838 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
7839 (mve_vcmpeqq_m_<supf><mode>): Likewise.
7840 (mve_vcmpgeq_m_n_s<mode>): Likewise.
7841 (mve_vcmpgeq_m_s<mode>): Likewise.
7842 (mve_vcmpgtq_m_n_s<mode>): Likewise.
7843 (mve_vcmpgtq_m_s<mode>): Likewise.
7844 (mve_vcmphiq_m_n_u<mode>): Likewise.
7845 (mve_vcmphiq_m_u<mode>): Likewise.
7846 (mve_vcmpleq_m_n_s<mode>): Likewise.
7847 (mve_vcmpleq_m_s<mode>): Likewise.
7848 (mve_vcmpltq_m_n_s<mode>): Likewise.
7849 (mve_vcmpltq_m_s<mode>): Likewise.
7850 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
7851 (mve_vcmpneq_m_<supf><mode>): Likewise.
7852 (mve_vdupq_m_n_<supf><mode>): Likewise.
7853 (mve_vmaxaq_m_s<mode>): Likewise.
7854 (mve_vmaxavq_p_s<mode>): Likewise.
7855 (mve_vmaxvq_p_<supf><mode>): Likewise.
7856 (mve_vminaq_m_s<mode>): Likewise.
7857 (mve_vminavq_p_s<mode>): Likewise.
7858 (mve_vminvq_p_<supf><mode>): Likewise.
7859 (mve_vmladavaq_<supf><mode>): Likewise.
7860 (mve_vmladavq_p_<supf><mode>): Likewise.
7861 (mve_vmladavxq_p_s<mode>): Likewise.
7862 (mve_vmlaq_n_<supf><mode>): Likewise.
7863 (mve_vmlasq_n_<supf><mode>): Likewise.
7864 (mve_vmlsdavq_p_s<mode>): Likewise.
7865 (mve_vmlsdavxq_p_s<mode>): Likewise.
7866 (mve_vmvnq_m_<supf><mode>): Likewise.
7867 (mve_vnegq_m_s<mode>): Likewise.
7868 (mve_vpselq_<supf><mode>): Likewise.
7869 (mve_vqabsq_m_s<mode>): Likewise.
7870 (mve_vqdmlahq_n_<supf><mode>): Likewise.
7871 (mve_vqnegq_m_s<mode>): Likewise.
7872 (mve_vqrdmladhq_s<mode>): Likewise.
7873 (mve_vqrdmladhxq_s<mode>): Likewise.
7874 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
7875 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
7876 (mve_vqrdmlsdhq_s<mode>): Likewise.
7877 (mve_vqrdmlsdhxq_s<mode>): Likewise.
7878 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
7879 (mve_vqshlq_m_r_<supf><mode>): Likewise.
7880 (mve_vrev64q_m_<supf><mode>): Likewise.
7881 (mve_vrshlq_m_n_<supf><mode>): Likewise.
7882 (mve_vshlq_m_r_<supf><mode>): Likewise.
7883 (mve_vsliq_n_<supf><mode>): Likewise.
7884 (mve_vsriq_n_<supf><mode>): Likewise.
7885 (mve_vqdmlsdhxq_s<mode>): Likewise.
7886 (mve_vqdmlsdhq_s<mode>): Likewise.
7887 (mve_vqdmladhxq_s<mode>): Likewise.
7888 (mve_vqdmladhq_s<mode>): Likewise.
7889 (mve_vmlsdavaxq_s<mode>): Likewise.
7890 (mve_vmlsdavaq_s<mode>): Likewise.
7891 (mve_vmladavaxq_s<mode>): Likewise.
7892 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
7893 matching constraint Rc.
7894 (mve_imm_31): Define predicate to check the matching constraint Re.
7896 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
7898 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
7899 (vec_cmp<mode>di_dup): Likewise.
7900 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
7902 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
7904 * config/gcn/gcn-valu.md (COND_MODE): Delete.
7905 (COND_INT_MODE): Delete.
7906 (cond_op): Add "mult".
7907 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
7908 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
7910 2020-03-18 Richard Biener <rguenther@suse.de>
7913 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
7914 partial int modes or not mode-precision integer types for
7917 2020-03-18 Jakub Jelinek <jakub@redhat.com>
7919 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
7921 * config/arc/arc.c (frame_stack_add): Likewise.
7922 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
7924 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
7925 * tree-ssa-strlen.h (handle_printf_call): Likewise.
7926 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
7927 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
7929 2020-03-18 Duan bo <duanbo3@huawei.com>
7932 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
7933 (@ldr_got_tiny_<mode>): New pattern.
7934 (ldr_got_tiny_sidi): Likewise.
7935 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
7936 them to handle SYMBOL_TINY_GOT for ILP32.
7938 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
7940 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
7941 call-preserved for SVE PCS functions.
7942 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
7943 Optimize the case in which there are no following vector save slots.
7945 2020-03-18 Richard Biener <rguenther@suse.de>
7948 * fold-const.c (build_fold_addr_expr): Convert address to
7950 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
7951 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
7952 to build the ADDR_EXPR which we don't really want to simplify.
7953 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
7954 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
7955 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
7956 (simplify_builtin_call): Strip useless type conversions.
7957 * tree-ssa-strlen.c (new_strinfo): Likewise.
7959 2020-03-17 Alexey Neyman <stilor@att.net>
7962 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
7963 the debug level is terse and the declaration is public. Do not
7965 (dwarf2out_decl): Same.
7966 (add_type_attribute): Return immediately if debug level is
7969 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
7971 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
7973 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
7974 Mihail Ionescu <mihail.ionescu@arm.com>
7975 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7977 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
7978 Define qualifier for ternary operands.
7979 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
7980 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7981 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7982 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
7983 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
7984 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
7985 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
7986 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
7987 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
7988 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
7989 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
7990 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
7991 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
7992 * config/arm/arm_mve.h (vabavq_s8): Define macro.
7993 (vabavq_s16): Likewise.
7994 (vabavq_s32): Likewise.
7995 (vbicq_m_n_s16): Likewise.
7996 (vbicq_m_n_s32): Likewise.
7997 (vbicq_m_n_u16): Likewise.
7998 (vbicq_m_n_u32): Likewise.
7999 (vcmpeqq_m_f16): Likewise.
8000 (vcmpeqq_m_f32): Likewise.
8001 (vcvtaq_m_s16_f16): Likewise.
8002 (vcvtaq_m_u16_f16): Likewise.
8003 (vcvtaq_m_s32_f32): Likewise.
8004 (vcvtaq_m_u32_f32): Likewise.
8005 (vcvtq_m_f16_s16): Likewise.
8006 (vcvtq_m_f16_u16): Likewise.
8007 (vcvtq_m_f32_s32): Likewise.
8008 (vcvtq_m_f32_u32): Likewise.
8009 (vqrshrnbq_n_s16): Likewise.
8010 (vqrshrnbq_n_u16): Likewise.
8011 (vqrshrnbq_n_s32): Likewise.
8012 (vqrshrnbq_n_u32): Likewise.
8013 (vqrshrunbq_n_s16): Likewise.
8014 (vqrshrunbq_n_s32): Likewise.
8015 (vrmlaldavhaq_s32): Likewise.
8016 (vrmlaldavhaq_u32): Likewise.
8017 (vshlcq_s8): Likewise.
8018 (vshlcq_u8): Likewise.
8019 (vshlcq_s16): Likewise.
8020 (vshlcq_u16): Likewise.
8021 (vshlcq_s32): Likewise.
8022 (vshlcq_u32): Likewise.
8023 (vabavq_u8): Likewise.
8024 (vabavq_u16): Likewise.
8025 (vabavq_u32): Likewise.
8026 (__arm_vabavq_s8): Define intrinsic.
8027 (__arm_vabavq_s16): Likewise.
8028 (__arm_vabavq_s32): Likewise.
8029 (__arm_vabavq_u8): Likewise.
8030 (__arm_vabavq_u16): Likewise.
8031 (__arm_vabavq_u32): Likewise.
8032 (__arm_vbicq_m_n_s16): Likewise.
8033 (__arm_vbicq_m_n_s32): Likewise.
8034 (__arm_vbicq_m_n_u16): Likewise.
8035 (__arm_vbicq_m_n_u32): Likewise.
8036 (__arm_vqrshrnbq_n_s16): Likewise.
8037 (__arm_vqrshrnbq_n_u16): Likewise.
8038 (__arm_vqrshrnbq_n_s32): Likewise.
8039 (__arm_vqrshrnbq_n_u32): Likewise.
8040 (__arm_vqrshrunbq_n_s16): Likewise.
8041 (__arm_vqrshrunbq_n_s32): Likewise.
8042 (__arm_vrmlaldavhaq_s32): Likewise.
8043 (__arm_vrmlaldavhaq_u32): Likewise.
8044 (__arm_vshlcq_s8): Likewise.
8045 (__arm_vshlcq_u8): Likewise.
8046 (__arm_vshlcq_s16): Likewise.
8047 (__arm_vshlcq_u16): Likewise.
8048 (__arm_vshlcq_s32): Likewise.
8049 (__arm_vshlcq_u32): Likewise.
8050 (__arm_vcmpeqq_m_f16): Likewise.
8051 (__arm_vcmpeqq_m_f32): Likewise.
8052 (__arm_vcvtaq_m_s16_f16): Likewise.
8053 (__arm_vcvtaq_m_u16_f16): Likewise.
8054 (__arm_vcvtaq_m_s32_f32): Likewise.
8055 (__arm_vcvtaq_m_u32_f32): Likewise.
8056 (__arm_vcvtq_m_f16_s16): Likewise.
8057 (__arm_vcvtq_m_f16_u16): Likewise.
8058 (__arm_vcvtq_m_f32_s32): Likewise.
8059 (__arm_vcvtq_m_f32_u32): Likewise.
8060 (vcvtaq_m): Define polymorphic variant.
8061 (vcvtq_m): Likewise.
8064 (vbicq_m_n): Likewise.
8065 (vqrshrnbq_n): Likewise.
8066 (vqrshrunbq_n): Likewise.
8067 * config/arm/arm_mve_builtins.def
8068 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
8069 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
8070 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8071 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8072 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
8073 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8074 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8075 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8076 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
8077 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8078 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8079 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
8080 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8081 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
8082 * config/arm/mve.md (VBICQ_M_N): Define iterator.
8083 (VCVTAQ_M): Likewise.
8084 (VCVTQ_M_TO_F): Likewise.
8085 (VQRSHRNBQ_N): Likewise.
8088 (VRMLALDAVHAQ): Likewise.
8089 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
8090 (mve_vcmpeqq_m_f<mode>): Likewise.
8091 (mve_vcvtaq_m_<supf><mode>): Likewise.
8092 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
8093 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
8094 (mve_vqrshrunbq_n_s<mode>): Likewise.
8095 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
8096 (mve_vabavq_<supf><mode>): Likewise.
8097 (mve_vshlcq_<supf><mode>): Likewise.
8098 (mve_vshlcq_<supf><mode>): Likewise.
8099 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
8100 (mve_vshlcq_carry_<supf><mode>): Likewise.
8102 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8103 Mihail Ionescu <mihail.ionescu@arm.com>
8104 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8106 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
8107 (vqmovnbq_u16): Likewise.
8108 (vmulltq_poly_p8): Likewise.
8109 (vmullbq_poly_p8): Likewise.
8110 (vmovntq_u16): Likewise.
8111 (vmovnbq_u16): Likewise.
8112 (vmlaldavxq_u16): Likewise.
8113 (vmlaldavq_u16): Likewise.
8114 (vqmovuntq_s16): Likewise.
8115 (vqmovunbq_s16): Likewise.
8116 (vshlltq_n_u8): Likewise.
8117 (vshllbq_n_u8): Likewise.
8118 (vorrq_n_u16): Likewise.
8119 (vbicq_n_u16): Likewise.
8120 (vcmpneq_n_f16): Likewise.
8121 (vcmpneq_f16): Likewise.
8122 (vcmpltq_n_f16): Likewise.
8123 (vcmpltq_f16): Likewise.
8124 (vcmpleq_n_f16): Likewise.
8125 (vcmpleq_f16): Likewise.
8126 (vcmpgtq_n_f16): Likewise.
8127 (vcmpgtq_f16): Likewise.
8128 (vcmpgeq_n_f16): Likewise.
8129 (vcmpgeq_f16): Likewise.
8130 (vcmpeqq_n_f16): Likewise.
8131 (vcmpeqq_f16): Likewise.
8132 (vsubq_f16): Likewise.
8133 (vqmovntq_s16): Likewise.
8134 (vqmovnbq_s16): Likewise.
8135 (vqdmulltq_s16): Likewise.
8136 (vqdmulltq_n_s16): Likewise.
8137 (vqdmullbq_s16): Likewise.
8138 (vqdmullbq_n_s16): Likewise.
8139 (vorrq_f16): Likewise.
8140 (vornq_f16): Likewise.
8141 (vmulq_n_f16): Likewise.
8142 (vmulq_f16): Likewise.
8143 (vmovntq_s16): Likewise.
8144 (vmovnbq_s16): Likewise.
8145 (vmlsldavxq_s16): Likewise.
8146 (vmlsldavq_s16): Likewise.
8147 (vmlaldavxq_s16): Likewise.
8148 (vmlaldavq_s16): Likewise.
8149 (vminnmvq_f16): Likewise.
8150 (vminnmq_f16): Likewise.
8151 (vminnmavq_f16): Likewise.
8152 (vminnmaq_f16): Likewise.
8153 (vmaxnmvq_f16): Likewise.
8154 (vmaxnmq_f16): Likewise.
8155 (vmaxnmavq_f16): Likewise.
8156 (vmaxnmaq_f16): Likewise.
8157 (veorq_f16): Likewise.
8158 (vcmulq_rot90_f16): Likewise.
8159 (vcmulq_rot270_f16): Likewise.
8160 (vcmulq_rot180_f16): Likewise.
8161 (vcmulq_f16): Likewise.
8162 (vcaddq_rot90_f16): Likewise.
8163 (vcaddq_rot270_f16): Likewise.
8164 (vbicq_f16): Likewise.
8165 (vandq_f16): Likewise.
8166 (vaddq_n_f16): Likewise.
8167 (vabdq_f16): Likewise.
8168 (vshlltq_n_s8): Likewise.
8169 (vshllbq_n_s8): Likewise.
8170 (vorrq_n_s16): Likewise.
8171 (vbicq_n_s16): Likewise.
8172 (vqmovntq_u32): Likewise.
8173 (vqmovnbq_u32): Likewise.
8174 (vmulltq_poly_p16): Likewise.
8175 (vmullbq_poly_p16): Likewise.
8176 (vmovntq_u32): Likewise.
8177 (vmovnbq_u32): Likewise.
8178 (vmlaldavxq_u32): Likewise.
8179 (vmlaldavq_u32): Likewise.
8180 (vqmovuntq_s32): Likewise.
8181 (vqmovunbq_s32): Likewise.
8182 (vshlltq_n_u16): Likewise.
8183 (vshllbq_n_u16): Likewise.
8184 (vorrq_n_u32): Likewise.
8185 (vbicq_n_u32): Likewise.
8186 (vcmpneq_n_f32): Likewise.
8187 (vcmpneq_f32): Likewise.
8188 (vcmpltq_n_f32): Likewise.
8189 (vcmpltq_f32): Likewise.
8190 (vcmpleq_n_f32): Likewise.
8191 (vcmpleq_f32): Likewise.
8192 (vcmpgtq_n_f32): Likewise.
8193 (vcmpgtq_f32): Likewise.
8194 (vcmpgeq_n_f32): Likewise.
8195 (vcmpgeq_f32): Likewise.
8196 (vcmpeqq_n_f32): Likewise.
8197 (vcmpeqq_f32): Likewise.
8198 (vsubq_f32): Likewise.
8199 (vqmovntq_s32): Likewise.
8200 (vqmovnbq_s32): Likewise.
8201 (vqdmulltq_s32): Likewise.
8202 (vqdmulltq_n_s32): Likewise.
8203 (vqdmullbq_s32): Likewise.
8204 (vqdmullbq_n_s32): Likewise.
8205 (vorrq_f32): Likewise.
8206 (vornq_f32): Likewise.
8207 (vmulq_n_f32): Likewise.
8208 (vmulq_f32): Likewise.
8209 (vmovntq_s32): Likewise.
8210 (vmovnbq_s32): Likewise.
8211 (vmlsldavxq_s32): Likewise.
8212 (vmlsldavq_s32): Likewise.
8213 (vmlaldavxq_s32): Likewise.
8214 (vmlaldavq_s32): Likewise.
8215 (vminnmvq_f32): Likewise.
8216 (vminnmq_f32): Likewise.
8217 (vminnmavq_f32): Likewise.
8218 (vminnmaq_f32): Likewise.
8219 (vmaxnmvq_f32): Likewise.
8220 (vmaxnmq_f32): Likewise.
8221 (vmaxnmavq_f32): Likewise.
8222 (vmaxnmaq_f32): Likewise.
8223 (veorq_f32): Likewise.
8224 (vcmulq_rot90_f32): Likewise.
8225 (vcmulq_rot270_f32): Likewise.
8226 (vcmulq_rot180_f32): Likewise.
8227 (vcmulq_f32): Likewise.
8228 (vcaddq_rot90_f32): Likewise.
8229 (vcaddq_rot270_f32): Likewise.
8230 (vbicq_f32): Likewise.
8231 (vandq_f32): Likewise.
8232 (vaddq_n_f32): Likewise.
8233 (vabdq_f32): Likewise.
8234 (vshlltq_n_s16): Likewise.
8235 (vshllbq_n_s16): Likewise.
8236 (vorrq_n_s32): Likewise.
8237 (vbicq_n_s32): Likewise.
8238 (vrmlaldavhq_u32): Likewise.
8239 (vctp8q_m): Likewise.
8240 (vctp64q_m): Likewise.
8241 (vctp32q_m): Likewise.
8242 (vctp16q_m): Likewise.
8243 (vaddlvaq_u32): Likewise.
8244 (vrmlsldavhxq_s32): Likewise.
8245 (vrmlsldavhq_s32): Likewise.
8246 (vrmlaldavhxq_s32): Likewise.
8247 (vrmlaldavhq_s32): Likewise.
8248 (vcvttq_f16_f32): Likewise.
8249 (vcvtbq_f16_f32): Likewise.
8250 (vaddlvaq_s32): Likewise.
8251 (__arm_vqmovntq_u16): Define intrinsic.
8252 (__arm_vqmovnbq_u16): Likewise.
8253 (__arm_vmulltq_poly_p8): Likewise.
8254 (__arm_vmullbq_poly_p8): Likewise.
8255 (__arm_vmovntq_u16): Likewise.
8256 (__arm_vmovnbq_u16): Likewise.
8257 (__arm_vmlaldavxq_u16): Likewise.
8258 (__arm_vmlaldavq_u16): Likewise.
8259 (__arm_vqmovuntq_s16): Likewise.
8260 (__arm_vqmovunbq_s16): Likewise.
8261 (__arm_vshlltq_n_u8): Likewise.
8262 (__arm_vshllbq_n_u8): Likewise.
8263 (__arm_vorrq_n_u16): Likewise.
8264 (__arm_vbicq_n_u16): Likewise.
8265 (__arm_vcmpneq_n_f16): Likewise.
8266 (__arm_vcmpneq_f16): Likewise.
8267 (__arm_vcmpltq_n_f16): Likewise.
8268 (__arm_vcmpltq_f16): Likewise.
8269 (__arm_vcmpleq_n_f16): Likewise.
8270 (__arm_vcmpleq_f16): Likewise.
8271 (__arm_vcmpgtq_n_f16): Likewise.
8272 (__arm_vcmpgtq_f16): Likewise.
8273 (__arm_vcmpgeq_n_f16): Likewise.
8274 (__arm_vcmpgeq_f16): Likewise.
8275 (__arm_vcmpeqq_n_f16): Likewise.
8276 (__arm_vcmpeqq_f16): Likewise.
8277 (__arm_vsubq_f16): Likewise.
8278 (__arm_vqmovntq_s16): Likewise.
8279 (__arm_vqmovnbq_s16): Likewise.
8280 (__arm_vqdmulltq_s16): Likewise.
8281 (__arm_vqdmulltq_n_s16): Likewise.
8282 (__arm_vqdmullbq_s16): Likewise.
8283 (__arm_vqdmullbq_n_s16): Likewise.
8284 (__arm_vorrq_f16): Likewise.
8285 (__arm_vornq_f16): Likewise.
8286 (__arm_vmulq_n_f16): Likewise.
8287 (__arm_vmulq_f16): Likewise.
8288 (__arm_vmovntq_s16): Likewise.
8289 (__arm_vmovnbq_s16): Likewise.
8290 (__arm_vmlsldavxq_s16): Likewise.
8291 (__arm_vmlsldavq_s16): Likewise.
8292 (__arm_vmlaldavxq_s16): Likewise.
8293 (__arm_vmlaldavq_s16): Likewise.
8294 (__arm_vminnmvq_f16): Likewise.
8295 (__arm_vminnmq_f16): Likewise.
8296 (__arm_vminnmavq_f16): Likewise.
8297 (__arm_vminnmaq_f16): Likewise.
8298 (__arm_vmaxnmvq_f16): Likewise.
8299 (__arm_vmaxnmq_f16): Likewise.
8300 (__arm_vmaxnmavq_f16): Likewise.
8301 (__arm_vmaxnmaq_f16): Likewise.
8302 (__arm_veorq_f16): Likewise.
8303 (__arm_vcmulq_rot90_f16): Likewise.
8304 (__arm_vcmulq_rot270_f16): Likewise.
8305 (__arm_vcmulq_rot180_f16): Likewise.
8306 (__arm_vcmulq_f16): Likewise.
8307 (__arm_vcaddq_rot90_f16): Likewise.
8308 (__arm_vcaddq_rot270_f16): Likewise.
8309 (__arm_vbicq_f16): Likewise.
8310 (__arm_vandq_f16): Likewise.
8311 (__arm_vaddq_n_f16): Likewise.
8312 (__arm_vabdq_f16): Likewise.
8313 (__arm_vshlltq_n_s8): Likewise.
8314 (__arm_vshllbq_n_s8): Likewise.
8315 (__arm_vorrq_n_s16): Likewise.
8316 (__arm_vbicq_n_s16): Likewise.
8317 (__arm_vqmovntq_u32): Likewise.
8318 (__arm_vqmovnbq_u32): Likewise.
8319 (__arm_vmulltq_poly_p16): Likewise.
8320 (__arm_vmullbq_poly_p16): Likewise.
8321 (__arm_vmovntq_u32): Likewise.
8322 (__arm_vmovnbq_u32): Likewise.
8323 (__arm_vmlaldavxq_u32): Likewise.
8324 (__arm_vmlaldavq_u32): Likewise.
8325 (__arm_vqmovuntq_s32): Likewise.
8326 (__arm_vqmovunbq_s32): Likewise.
8327 (__arm_vshlltq_n_u16): Likewise.
8328 (__arm_vshllbq_n_u16): Likewise.
8329 (__arm_vorrq_n_u32): Likewise.
8330 (__arm_vbicq_n_u32): Likewise.
8331 (__arm_vcmpneq_n_f32): Likewise.
8332 (__arm_vcmpneq_f32): Likewise.
8333 (__arm_vcmpltq_n_f32): Likewise.
8334 (__arm_vcmpltq_f32): Likewise.
8335 (__arm_vcmpleq_n_f32): Likewise.
8336 (__arm_vcmpleq_f32): Likewise.
8337 (__arm_vcmpgtq_n_f32): Likewise.
8338 (__arm_vcmpgtq_f32): Likewise.
8339 (__arm_vcmpgeq_n_f32): Likewise.
8340 (__arm_vcmpgeq_f32): Likewise.
8341 (__arm_vcmpeqq_n_f32): Likewise.
8342 (__arm_vcmpeqq_f32): Likewise.
8343 (__arm_vsubq_f32): Likewise.
8344 (__arm_vqmovntq_s32): Likewise.
8345 (__arm_vqmovnbq_s32): Likewise.
8346 (__arm_vqdmulltq_s32): Likewise.
8347 (__arm_vqdmulltq_n_s32): Likewise.
8348 (__arm_vqdmullbq_s32): Likewise.
8349 (__arm_vqdmullbq_n_s32): Likewise.
8350 (__arm_vorrq_f32): Likewise.
8351 (__arm_vornq_f32): Likewise.
8352 (__arm_vmulq_n_f32): Likewise.
8353 (__arm_vmulq_f32): Likewise.
8354 (__arm_vmovntq_s32): Likewise.
8355 (__arm_vmovnbq_s32): Likewise.
8356 (__arm_vmlsldavxq_s32): Likewise.
8357 (__arm_vmlsldavq_s32): Likewise.
8358 (__arm_vmlaldavxq_s32): Likewise.
8359 (__arm_vmlaldavq_s32): Likewise.
8360 (__arm_vminnmvq_f32): Likewise.
8361 (__arm_vminnmq_f32): Likewise.
8362 (__arm_vminnmavq_f32): Likewise.
8363 (__arm_vminnmaq_f32): Likewise.
8364 (__arm_vmaxnmvq_f32): Likewise.
8365 (__arm_vmaxnmq_f32): Likewise.
8366 (__arm_vmaxnmavq_f32): Likewise.
8367 (__arm_vmaxnmaq_f32): Likewise.
8368 (__arm_veorq_f32): Likewise.
8369 (__arm_vcmulq_rot90_f32): Likewise.
8370 (__arm_vcmulq_rot270_f32): Likewise.
8371 (__arm_vcmulq_rot180_f32): Likewise.
8372 (__arm_vcmulq_f32): Likewise.
8373 (__arm_vcaddq_rot90_f32): Likewise.
8374 (__arm_vcaddq_rot270_f32): Likewise.
8375 (__arm_vbicq_f32): Likewise.
8376 (__arm_vandq_f32): Likewise.
8377 (__arm_vaddq_n_f32): Likewise.
8378 (__arm_vabdq_f32): Likewise.
8379 (__arm_vshlltq_n_s16): Likewise.
8380 (__arm_vshllbq_n_s16): Likewise.
8381 (__arm_vorrq_n_s32): Likewise.
8382 (__arm_vbicq_n_s32): Likewise.
8383 (__arm_vrmlaldavhq_u32): Likewise.
8384 (__arm_vctp8q_m): Likewise.
8385 (__arm_vctp64q_m): Likewise.
8386 (__arm_vctp32q_m): Likewise.
8387 (__arm_vctp16q_m): Likewise.
8388 (__arm_vaddlvaq_u32): Likewise.
8389 (__arm_vrmlsldavhxq_s32): Likewise.
8390 (__arm_vrmlsldavhq_s32): Likewise.
8391 (__arm_vrmlaldavhxq_s32): Likewise.
8392 (__arm_vrmlaldavhq_s32): Likewise.
8393 (__arm_vcvttq_f16_f32): Likewise.
8394 (__arm_vcvtbq_f16_f32): Likewise.
8395 (__arm_vaddlvaq_s32): Likewise.
8396 (vst4q): Define polymorphic variant.
8403 (vrev64q): Likewise.
8405 (vdupq_n): Likewise.
8407 (vrev32q): Likewise.
8408 (vcvtbq_f32): Likewise.
8409 (vcvttq_f32): Likewise.
8411 (vsubq_n): Likewise.
8412 (vbrsrq_n): Likewise.
8413 (vcvtq_n): Likewise.
8417 (vaddq_n): Likewise.
8421 (vmulq_n): Likewise.
8423 (vcaddq_rot270): Likewise.
8424 (vcmpeqq_n): Likewise.
8425 (vcmpeqq): Likewise.
8426 (vcaddq_rot90): Likewise.
8427 (vcmpgeq_n): Likewise.
8428 (vcmpgeq): Likewise.
8429 (vcmpgtq_n): Likewise.
8430 (vcmpgtq): Likewise.
8431 (vcmpgtq): Likewise.
8432 (vcmpleq_n): Likewise.
8433 (vcmpleq_n): Likewise.
8434 (vcmpleq): Likewise.
8435 (vcmpleq): Likewise.
8436 (vcmpltq_n): Likewise.
8437 (vcmpltq_n): Likewise.
8438 (vcmpltq): Likewise.
8439 (vcmpltq): Likewise.
8440 (vcmpneq_n): Likewise.
8441 (vcmpneq_n): Likewise.
8442 (vcmpneq): Likewise.
8443 (vcmpneq): Likewise.
8446 (vcmulq_rot180): Likewise.
8447 (vcmulq_rot180): Likewise.
8448 (vcmulq_rot270): Likewise.
8449 (vcmulq_rot270): Likewise.
8450 (vcmulq_rot90): Likewise.
8451 (vcmulq_rot90): Likewise.
8454 (vmaxnmaq): Likewise.
8455 (vmaxnmaq): Likewise.
8456 (vmaxnmavq): Likewise.
8457 (vmaxnmavq): Likewise.
8458 (vmaxnmq): Likewise.
8459 (vmaxnmq): Likewise.
8460 (vmaxnmvq): Likewise.
8461 (vmaxnmvq): Likewise.
8462 (vminnmaq): Likewise.
8463 (vminnmaq): Likewise.
8464 (vminnmavq): Likewise.
8465 (vminnmavq): Likewise.
8466 (vminnmq): Likewise.
8467 (vminnmq): Likewise.
8468 (vminnmvq): Likewise.
8469 (vminnmvq): Likewise.
8470 (vbicq_n): Likewise.
8471 (vqmovntq): Likewise.
8472 (vqmovntq): Likewise.
8473 (vqmovnbq): Likewise.
8474 (vqmovnbq): Likewise.
8475 (vmulltq_poly): Likewise.
8476 (vmulltq_poly): Likewise.
8477 (vmullbq_poly): Likewise.
8478 (vmullbq_poly): Likewise.
8479 (vmovntq): Likewise.
8480 (vmovntq): Likewise.
8481 (vmovnbq): Likewise.
8482 (vmovnbq): Likewise.
8483 (vmlaldavxq): Likewise.
8484 (vmlaldavxq): Likewise.
8485 (vqmovuntq): Likewise.
8486 (vqmovuntq): Likewise.
8487 (vshlltq_n): Likewise.
8488 (vshlltq_n): Likewise.
8489 (vshllbq_n): Likewise.
8490 (vshllbq_n): Likewise.
8491 (vorrq_n): Likewise.
8492 (vorrq_n): Likewise.
8493 (vmlaldavq): Likewise.
8494 (vmlaldavq): Likewise.
8495 (vqmovunbq): Likewise.
8496 (vqmovunbq): Likewise.
8497 (vqdmulltq_n): Likewise.
8498 (vqdmulltq_n): Likewise.
8499 (vqdmulltq): Likewise.
8500 (vqdmulltq): Likewise.
8501 (vqdmullbq_n): Likewise.
8502 (vqdmullbq_n): Likewise.
8503 (vqdmullbq): Likewise.
8504 (vqdmullbq): Likewise.
8505 (vaddlvaq): Likewise.
8506 (vaddlvaq): Likewise.
8507 (vrmlaldavhq): Likewise.
8508 (vrmlaldavhq): Likewise.
8509 (vrmlaldavhxq): Likewise.
8510 (vrmlaldavhxq): Likewise.
8511 (vrmlsldavhq): Likewise.
8512 (vrmlsldavhq): Likewise.
8513 (vrmlsldavhxq): Likewise.
8514 (vrmlsldavhxq): Likewise.
8515 (vmlsldavxq): Likewise.
8516 (vmlsldavxq): Likewise.
8517 (vmlsldavq): Likewise.
8518 (vmlsldavq): Likewise.
8519 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
8520 (BINOP_NONE_NONE_NONE): Likewise.
8521 (BINOP_UNONE_NONE_NONE): Likewise.
8522 (BINOP_UNONE_UNONE_IMM): Likewise.
8523 (BINOP_UNONE_UNONE_NONE): Likewise.
8524 (BINOP_UNONE_UNONE_UNONE): Likewise.
8525 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
8526 (mve_vaddlvaq_<supf>v4si): Likewise.
8527 (mve_vaddq_n_f<mode>): Likewise.
8528 (mve_vandq_f<mode>): Likewise.
8529 (mve_vbicq_f<mode>): Likewise.
8530 (mve_vbicq_n_<supf><mode>): Likewise.
8531 (mve_vcaddq_rot270_f<mode>): Likewise.
8532 (mve_vcaddq_rot90_f<mode>): Likewise.
8533 (mve_vcmpeqq_f<mode>): Likewise.
8534 (mve_vcmpeqq_n_f<mode>): Likewise.
8535 (mve_vcmpgeq_f<mode>): Likewise.
8536 (mve_vcmpgeq_n_f<mode>): Likewise.
8537 (mve_vcmpgtq_f<mode>): Likewise.
8538 (mve_vcmpgtq_n_f<mode>): Likewise.
8539 (mve_vcmpleq_f<mode>): Likewise.
8540 (mve_vcmpleq_n_f<mode>): Likewise.
8541 (mve_vcmpltq_f<mode>): Likewise.
8542 (mve_vcmpltq_n_f<mode>): Likewise.
8543 (mve_vcmpneq_f<mode>): Likewise.
8544 (mve_vcmpneq_n_f<mode>): Likewise.
8545 (mve_vcmulq_f<mode>): Likewise.
8546 (mve_vcmulq_rot180_f<mode>): Likewise.
8547 (mve_vcmulq_rot270_f<mode>): Likewise.
8548 (mve_vcmulq_rot90_f<mode>): Likewise.
8549 (mve_vctp<mode1>q_mhi): Likewise.
8550 (mve_vcvtbq_f16_f32v8hf): Likewise.
8551 (mve_vcvttq_f16_f32v8hf): Likewise.
8552 (mve_veorq_f<mode>): Likewise.
8553 (mve_vmaxnmaq_f<mode>): Likewise.
8554 (mve_vmaxnmavq_f<mode>): Likewise.
8555 (mve_vmaxnmq_f<mode>): Likewise.
8556 (mve_vmaxnmvq_f<mode>): Likewise.
8557 (mve_vminnmaq_f<mode>): Likewise.
8558 (mve_vminnmavq_f<mode>): Likewise.
8559 (mve_vminnmq_f<mode>): Likewise.
8560 (mve_vminnmvq_f<mode>): Likewise.
8561 (mve_vmlaldavq_<supf><mode>): Likewise.
8562 (mve_vmlaldavxq_<supf><mode>): Likewise.
8563 (mve_vmlsldavq_s<mode>): Likewise.
8564 (mve_vmlsldavxq_s<mode>): Likewise.
8565 (mve_vmovnbq_<supf><mode>): Likewise.
8566 (mve_vmovntq_<supf><mode>): Likewise.
8567 (mve_vmulq_f<mode>): Likewise.
8568 (mve_vmulq_n_f<mode>): Likewise.
8569 (mve_vornq_f<mode>): Likewise.
8570 (mve_vorrq_f<mode>): Likewise.
8571 (mve_vorrq_n_<supf><mode>): Likewise.
8572 (mve_vqdmullbq_n_s<mode>): Likewise.
8573 (mve_vqdmullbq_s<mode>): Likewise.
8574 (mve_vqdmulltq_n_s<mode>): Likewise.
8575 (mve_vqdmulltq_s<mode>): Likewise.
8576 (mve_vqmovnbq_<supf><mode>): Likewise.
8577 (mve_vqmovntq_<supf><mode>): Likewise.
8578 (mve_vqmovunbq_s<mode>): Likewise.
8579 (mve_vqmovuntq_s<mode>): Likewise.
8580 (mve_vrmlaldavhxq_sv4si): Likewise.
8581 (mve_vrmlsldavhq_sv4si): Likewise.
8582 (mve_vrmlsldavhxq_sv4si): Likewise.
8583 (mve_vshllbq_n_<supf><mode>): Likewise.
8584 (mve_vshlltq_n_<supf><mode>): Likewise.
8585 (mve_vsubq_f<mode>): Likewise.
8586 (mve_vmulltq_poly_p<mode>): Likewise.
8587 (mve_vmullbq_poly_p<mode>): Likewise.
8588 (mve_vrmlaldavhq_<supf>v4si): Likewise.
8590 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8591 Mihail Ionescu <mihail.ionescu@arm.com>
8592 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8594 * config/arm/arm_mve.h (vsubq_u8): Define macro.
8595 (vsubq_n_u8): Likewise.
8596 (vrmulhq_u8): Likewise.
8597 (vrhaddq_u8): Likewise.
8598 (vqsubq_u8): Likewise.
8599 (vqsubq_n_u8): Likewise.
8600 (vqaddq_u8): Likewise.
8601 (vqaddq_n_u8): Likewise.
8602 (vorrq_u8): Likewise.
8603 (vornq_u8): Likewise.
8604 (vmulq_u8): Likewise.
8605 (vmulq_n_u8): Likewise.
8606 (vmulltq_int_u8): Likewise.
8607 (vmullbq_int_u8): Likewise.
8608 (vmulhq_u8): Likewise.
8609 (vmladavq_u8): Likewise.
8610 (vminvq_u8): Likewise.
8611 (vminq_u8): Likewise.
8612 (vmaxvq_u8): Likewise.
8613 (vmaxq_u8): Likewise.
8614 (vhsubq_u8): Likewise.
8615 (vhsubq_n_u8): Likewise.
8616 (vhaddq_u8): Likewise.
8617 (vhaddq_n_u8): Likewise.
8618 (veorq_u8): Likewise.
8619 (vcmpneq_n_u8): Likewise.
8620 (vcmphiq_u8): Likewise.
8621 (vcmphiq_n_u8): Likewise.
8622 (vcmpeqq_u8): Likewise.
8623 (vcmpeqq_n_u8): Likewise.
8624 (vcmpcsq_u8): Likewise.
8625 (vcmpcsq_n_u8): Likewise.
8626 (vcaddq_rot90_u8): Likewise.
8627 (vcaddq_rot270_u8): Likewise.
8628 (vbicq_u8): Likewise.
8629 (vandq_u8): Likewise.
8630 (vaddvq_p_u8): Likewise.
8631 (vaddvaq_u8): Likewise.
8632 (vaddq_n_u8): Likewise.
8633 (vabdq_u8): Likewise.
8634 (vshlq_r_u8): Likewise.
8635 (vrshlq_u8): Likewise.
8636 (vrshlq_n_u8): Likewise.
8637 (vqshlq_u8): Likewise.
8638 (vqshlq_r_u8): Likewise.
8639 (vqrshlq_u8): Likewise.
8640 (vqrshlq_n_u8): Likewise.
8641 (vminavq_s8): Likewise.
8642 (vminaq_s8): Likewise.
8643 (vmaxavq_s8): Likewise.
8644 (vmaxaq_s8): Likewise.
8645 (vbrsrq_n_u8): Likewise.
8646 (vshlq_n_u8): Likewise.
8647 (vrshrq_n_u8): Likewise.
8648 (vqshlq_n_u8): Likewise.
8649 (vcmpneq_n_s8): Likewise.
8650 (vcmpltq_s8): Likewise.
8651 (vcmpltq_n_s8): Likewise.
8652 (vcmpleq_s8): Likewise.
8653 (vcmpleq_n_s8): Likewise.
8654 (vcmpgtq_s8): Likewise.
8655 (vcmpgtq_n_s8): Likewise.
8656 (vcmpgeq_s8): Likewise.
8657 (vcmpgeq_n_s8): Likewise.
8658 (vcmpeqq_s8): Likewise.
8659 (vcmpeqq_n_s8): Likewise.
8660 (vqshluq_n_s8): Likewise.
8661 (vaddvq_p_s8): Likewise.
8662 (vsubq_s8): Likewise.
8663 (vsubq_n_s8): Likewise.
8664 (vshlq_r_s8): Likewise.
8665 (vrshlq_s8): Likewise.
8666 (vrshlq_n_s8): Likewise.
8667 (vrmulhq_s8): Likewise.
8668 (vrhaddq_s8): Likewise.
8669 (vqsubq_s8): Likewise.
8670 (vqsubq_n_s8): Likewise.
8671 (vqshlq_s8): Likewise.
8672 (vqshlq_r_s8): Likewise.
8673 (vqrshlq_s8): Likewise.
8674 (vqrshlq_n_s8): Likewise.
8675 (vqrdmulhq_s8): Likewise.
8676 (vqrdmulhq_n_s8): Likewise.
8677 (vqdmulhq_s8): Likewise.
8678 (vqdmulhq_n_s8): Likewise.
8679 (vqaddq_s8): Likewise.
8680 (vqaddq_n_s8): Likewise.
8681 (vorrq_s8): Likewise.
8682 (vornq_s8): Likewise.
8683 (vmulq_s8): Likewise.
8684 (vmulq_n_s8): Likewise.
8685 (vmulltq_int_s8): Likewise.
8686 (vmullbq_int_s8): Likewise.
8687 (vmulhq_s8): Likewise.
8688 (vmlsdavxq_s8): Likewise.
8689 (vmlsdavq_s8): Likewise.
8690 (vmladavxq_s8): Likewise.
8691 (vmladavq_s8): Likewise.
8692 (vminvq_s8): Likewise.
8693 (vminq_s8): Likewise.
8694 (vmaxvq_s8): Likewise.
8695 (vmaxq_s8): Likewise.
8696 (vhsubq_s8): Likewise.
8697 (vhsubq_n_s8): Likewise.
8698 (vhcaddq_rot90_s8): Likewise.
8699 (vhcaddq_rot270_s8): Likewise.
8700 (vhaddq_s8): Likewise.
8701 (vhaddq_n_s8): Likewise.
8702 (veorq_s8): Likewise.
8703 (vcaddq_rot90_s8): Likewise.
8704 (vcaddq_rot270_s8): Likewise.
8705 (vbrsrq_n_s8): Likewise.
8706 (vbicq_s8): Likewise.
8707 (vandq_s8): Likewise.
8708 (vaddvaq_s8): Likewise.
8709 (vaddq_n_s8): Likewise.
8710 (vabdq_s8): Likewise.
8711 (vshlq_n_s8): Likewise.
8712 (vrshrq_n_s8): Likewise.
8713 (vqshlq_n_s8): Likewise.
8714 (vsubq_u16): Likewise.
8715 (vsubq_n_u16): Likewise.
8716 (vrmulhq_u16): Likewise.
8717 (vrhaddq_u16): Likewise.
8718 (vqsubq_u16): Likewise.
8719 (vqsubq_n_u16): Likewise.
8720 (vqaddq_u16): Likewise.
8721 (vqaddq_n_u16): Likewise.
8722 (vorrq_u16): Likewise.
8723 (vornq_u16): Likewise.
8724 (vmulq_u16): Likewise.
8725 (vmulq_n_u16): Likewise.
8726 (vmulltq_int_u16): Likewise.
8727 (vmullbq_int_u16): Likewise.
8728 (vmulhq_u16): Likewise.
8729 (vmladavq_u16): Likewise.
8730 (vminvq_u16): Likewise.
8731 (vminq_u16): Likewise.
8732 (vmaxvq_u16): Likewise.
8733 (vmaxq_u16): Likewise.
8734 (vhsubq_u16): Likewise.
8735 (vhsubq_n_u16): Likewise.
8736 (vhaddq_u16): Likewise.
8737 (vhaddq_n_u16): Likewise.
8738 (veorq_u16): Likewise.
8739 (vcmpneq_n_u16): Likewise.
8740 (vcmphiq_u16): Likewise.
8741 (vcmphiq_n_u16): Likewise.
8742 (vcmpeqq_u16): Likewise.
8743 (vcmpeqq_n_u16): Likewise.
8744 (vcmpcsq_u16): Likewise.
8745 (vcmpcsq_n_u16): Likewise.
8746 (vcaddq_rot90_u16): Likewise.
8747 (vcaddq_rot270_u16): Likewise.
8748 (vbicq_u16): Likewise.
8749 (vandq_u16): Likewise.
8750 (vaddvq_p_u16): Likewise.
8751 (vaddvaq_u16): Likewise.
8752 (vaddq_n_u16): Likewise.
8753 (vabdq_u16): Likewise.
8754 (vshlq_r_u16): Likewise.
8755 (vrshlq_u16): Likewise.
8756 (vrshlq_n_u16): Likewise.
8757 (vqshlq_u16): Likewise.
8758 (vqshlq_r_u16): Likewise.
8759 (vqrshlq_u16): Likewise.
8760 (vqrshlq_n_u16): Likewise.
8761 (vminavq_s16): Likewise.
8762 (vminaq_s16): Likewise.
8763 (vmaxavq_s16): Likewise.
8764 (vmaxaq_s16): Likewise.
8765 (vbrsrq_n_u16): Likewise.
8766 (vshlq_n_u16): Likewise.
8767 (vrshrq_n_u16): Likewise.
8768 (vqshlq_n_u16): Likewise.
8769 (vcmpneq_n_s16): Likewise.
8770 (vcmpltq_s16): Likewise.
8771 (vcmpltq_n_s16): Likewise.
8772 (vcmpleq_s16): Likewise.
8773 (vcmpleq_n_s16): Likewise.
8774 (vcmpgtq_s16): Likewise.
8775 (vcmpgtq_n_s16): Likewise.
8776 (vcmpgeq_s16): Likewise.
8777 (vcmpgeq_n_s16): Likewise.
8778 (vcmpeqq_s16): Likewise.
8779 (vcmpeqq_n_s16): Likewise.
8780 (vqshluq_n_s16): Likewise.
8781 (vaddvq_p_s16): Likewise.
8782 (vsubq_s16): Likewise.
8783 (vsubq_n_s16): Likewise.
8784 (vshlq_r_s16): Likewise.
8785 (vrshlq_s16): Likewise.
8786 (vrshlq_n_s16): Likewise.
8787 (vrmulhq_s16): Likewise.
8788 (vrhaddq_s16): Likewise.
8789 (vqsubq_s16): Likewise.
8790 (vqsubq_n_s16): Likewise.
8791 (vqshlq_s16): Likewise.
8792 (vqshlq_r_s16): Likewise.
8793 (vqrshlq_s16): Likewise.
8794 (vqrshlq_n_s16): Likewise.
8795 (vqrdmulhq_s16): Likewise.
8796 (vqrdmulhq_n_s16): Likewise.
8797 (vqdmulhq_s16): Likewise.
8798 (vqdmulhq_n_s16): Likewise.
8799 (vqaddq_s16): Likewise.
8800 (vqaddq_n_s16): Likewise.
8801 (vorrq_s16): Likewise.
8802 (vornq_s16): Likewise.
8803 (vmulq_s16): Likewise.
8804 (vmulq_n_s16): Likewise.
8805 (vmulltq_int_s16): Likewise.
8806 (vmullbq_int_s16): Likewise.
8807 (vmulhq_s16): Likewise.
8808 (vmlsdavxq_s16): Likewise.
8809 (vmlsdavq_s16): Likewise.
8810 (vmladavxq_s16): Likewise.
8811 (vmladavq_s16): Likewise.
8812 (vminvq_s16): Likewise.
8813 (vminq_s16): Likewise.
8814 (vmaxvq_s16): Likewise.
8815 (vmaxq_s16): Likewise.
8816 (vhsubq_s16): Likewise.
8817 (vhsubq_n_s16): Likewise.
8818 (vhcaddq_rot90_s16): Likewise.
8819 (vhcaddq_rot270_s16): Likewise.
8820 (vhaddq_s16): Likewise.
8821 (vhaddq_n_s16): Likewise.
8822 (veorq_s16): Likewise.
8823 (vcaddq_rot90_s16): Likewise.
8824 (vcaddq_rot270_s16): Likewise.
8825 (vbrsrq_n_s16): Likewise.
8826 (vbicq_s16): Likewise.
8827 (vandq_s16): Likewise.
8828 (vaddvaq_s16): Likewise.
8829 (vaddq_n_s16): Likewise.
8830 (vabdq_s16): Likewise.
8831 (vshlq_n_s16): Likewise.
8832 (vrshrq_n_s16): Likewise.
8833 (vqshlq_n_s16): Likewise.
8834 (vsubq_u32): Likewise.
8835 (vsubq_n_u32): Likewise.
8836 (vrmulhq_u32): Likewise.
8837 (vrhaddq_u32): Likewise.
8838 (vqsubq_u32): Likewise.
8839 (vqsubq_n_u32): Likewise.
8840 (vqaddq_u32): Likewise.
8841 (vqaddq_n_u32): Likewise.
8842 (vorrq_u32): Likewise.
8843 (vornq_u32): Likewise.
8844 (vmulq_u32): Likewise.
8845 (vmulq_n_u32): Likewise.
8846 (vmulltq_int_u32): Likewise.
8847 (vmullbq_int_u32): Likewise.
8848 (vmulhq_u32): Likewise.
8849 (vmladavq_u32): Likewise.
8850 (vminvq_u32): Likewise.
8851 (vminq_u32): Likewise.
8852 (vmaxvq_u32): Likewise.
8853 (vmaxq_u32): Likewise.
8854 (vhsubq_u32): Likewise.
8855 (vhsubq_n_u32): Likewise.
8856 (vhaddq_u32): Likewise.
8857 (vhaddq_n_u32): Likewise.
8858 (veorq_u32): Likewise.
8859 (vcmpneq_n_u32): Likewise.
8860 (vcmphiq_u32): Likewise.
8861 (vcmphiq_n_u32): Likewise.
8862 (vcmpeqq_u32): Likewise.
8863 (vcmpeqq_n_u32): Likewise.
8864 (vcmpcsq_u32): Likewise.
8865 (vcmpcsq_n_u32): Likewise.
8866 (vcaddq_rot90_u32): Likewise.
8867 (vcaddq_rot270_u32): Likewise.
8868 (vbicq_u32): Likewise.
8869 (vandq_u32): Likewise.
8870 (vaddvq_p_u32): Likewise.
8871 (vaddvaq_u32): Likewise.
8872 (vaddq_n_u32): Likewise.
8873 (vabdq_u32): Likewise.
8874 (vshlq_r_u32): Likewise.
8875 (vrshlq_u32): Likewise.
8876 (vrshlq_n_u32): Likewise.
8877 (vqshlq_u32): Likewise.
8878 (vqshlq_r_u32): Likewise.
8879 (vqrshlq_u32): Likewise.
8880 (vqrshlq_n_u32): Likewise.
8881 (vminavq_s32): Likewise.
8882 (vminaq_s32): Likewise.
8883 (vmaxavq_s32): Likewise.
8884 (vmaxaq_s32): Likewise.
8885 (vbrsrq_n_u32): Likewise.
8886 (vshlq_n_u32): Likewise.
8887 (vrshrq_n_u32): Likewise.
8888 (vqshlq_n_u32): Likewise.
8889 (vcmpneq_n_s32): Likewise.
8890 (vcmpltq_s32): Likewise.
8891 (vcmpltq_n_s32): Likewise.
8892 (vcmpleq_s32): Likewise.
8893 (vcmpleq_n_s32): Likewise.
8894 (vcmpgtq_s32): Likewise.
8895 (vcmpgtq_n_s32): Likewise.
8896 (vcmpgeq_s32): Likewise.
8897 (vcmpgeq_n_s32): Likewise.
8898 (vcmpeqq_s32): Likewise.
8899 (vcmpeqq_n_s32): Likewise.
8900 (vqshluq_n_s32): Likewise.
8901 (vaddvq_p_s32): Likewise.
8902 (vsubq_s32): Likewise.
8903 (vsubq_n_s32): Likewise.
8904 (vshlq_r_s32): Likewise.
8905 (vrshlq_s32): Likewise.
8906 (vrshlq_n_s32): Likewise.
8907 (vrmulhq_s32): Likewise.
8908 (vrhaddq_s32): Likewise.
8909 (vqsubq_s32): Likewise.
8910 (vqsubq_n_s32): Likewise.
8911 (vqshlq_s32): Likewise.
8912 (vqshlq_r_s32): Likewise.
8913 (vqrshlq_s32): Likewise.
8914 (vqrshlq_n_s32): Likewise.
8915 (vqrdmulhq_s32): Likewise.
8916 (vqrdmulhq_n_s32): Likewise.
8917 (vqdmulhq_s32): Likewise.
8918 (vqdmulhq_n_s32): Likewise.
8919 (vqaddq_s32): Likewise.
8920 (vqaddq_n_s32): Likewise.
8921 (vorrq_s32): Likewise.
8922 (vornq_s32): Likewise.
8923 (vmulq_s32): Likewise.
8924 (vmulq_n_s32): Likewise.
8925 (vmulltq_int_s32): Likewise.
8926 (vmullbq_int_s32): Likewise.
8927 (vmulhq_s32): Likewise.
8928 (vmlsdavxq_s32): Likewise.
8929 (vmlsdavq_s32): Likewise.
8930 (vmladavxq_s32): Likewise.
8931 (vmladavq_s32): Likewise.
8932 (vminvq_s32): Likewise.
8933 (vminq_s32): Likewise.
8934 (vmaxvq_s32): Likewise.
8935 (vmaxq_s32): Likewise.
8936 (vhsubq_s32): Likewise.
8937 (vhsubq_n_s32): Likewise.
8938 (vhcaddq_rot90_s32): Likewise.
8939 (vhcaddq_rot270_s32): Likewise.
8940 (vhaddq_s32): Likewise.
8941 (vhaddq_n_s32): Likewise.
8942 (veorq_s32): Likewise.
8943 (vcaddq_rot90_s32): Likewise.
8944 (vcaddq_rot270_s32): Likewise.
8945 (vbrsrq_n_s32): Likewise.
8946 (vbicq_s32): Likewise.
8947 (vandq_s32): Likewise.
8948 (vaddvaq_s32): Likewise.
8949 (vaddq_n_s32): Likewise.
8950 (vabdq_s32): Likewise.
8951 (vshlq_n_s32): Likewise.
8952 (vrshrq_n_s32): Likewise.
8953 (vqshlq_n_s32): Likewise.
8954 (__arm_vsubq_u8): Define intrinsic.
8955 (__arm_vsubq_n_u8): Likewise.
8956 (__arm_vrmulhq_u8): Likewise.
8957 (__arm_vrhaddq_u8): Likewise.
8958 (__arm_vqsubq_u8): Likewise.
8959 (__arm_vqsubq_n_u8): Likewise.
8960 (__arm_vqaddq_u8): Likewise.
8961 (__arm_vqaddq_n_u8): Likewise.
8962 (__arm_vorrq_u8): Likewise.
8963 (__arm_vornq_u8): Likewise.
8964 (__arm_vmulq_u8): Likewise.
8965 (__arm_vmulq_n_u8): Likewise.
8966 (__arm_vmulltq_int_u8): Likewise.
8967 (__arm_vmullbq_int_u8): Likewise.
8968 (__arm_vmulhq_u8): Likewise.
8969 (__arm_vmladavq_u8): Likewise.
8970 (__arm_vminvq_u8): Likewise.
8971 (__arm_vminq_u8): Likewise.
8972 (__arm_vmaxvq_u8): Likewise.
8973 (__arm_vmaxq_u8): Likewise.
8974 (__arm_vhsubq_u8): Likewise.
8975 (__arm_vhsubq_n_u8): Likewise.
8976 (__arm_vhaddq_u8): Likewise.
8977 (__arm_vhaddq_n_u8): Likewise.
8978 (__arm_veorq_u8): Likewise.
8979 (__arm_vcmpneq_n_u8): Likewise.
8980 (__arm_vcmphiq_u8): Likewise.
8981 (__arm_vcmphiq_n_u8): Likewise.
8982 (__arm_vcmpeqq_u8): Likewise.
8983 (__arm_vcmpeqq_n_u8): Likewise.
8984 (__arm_vcmpcsq_u8): Likewise.
8985 (__arm_vcmpcsq_n_u8): Likewise.
8986 (__arm_vcaddq_rot90_u8): Likewise.
8987 (__arm_vcaddq_rot270_u8): Likewise.
8988 (__arm_vbicq_u8): Likewise.
8989 (__arm_vandq_u8): Likewise.
8990 (__arm_vaddvq_p_u8): Likewise.
8991 (__arm_vaddvaq_u8): Likewise.
8992 (__arm_vaddq_n_u8): Likewise.
8993 (__arm_vabdq_u8): Likewise.
8994 (__arm_vshlq_r_u8): Likewise.
8995 (__arm_vrshlq_u8): Likewise.
8996 (__arm_vrshlq_n_u8): Likewise.
8997 (__arm_vqshlq_u8): Likewise.
8998 (__arm_vqshlq_r_u8): Likewise.
8999 (__arm_vqrshlq_u8): Likewise.
9000 (__arm_vqrshlq_n_u8): Likewise.
9001 (__arm_vminavq_s8): Likewise.
9002 (__arm_vminaq_s8): Likewise.
9003 (__arm_vmaxavq_s8): Likewise.
9004 (__arm_vmaxaq_s8): Likewise.
9005 (__arm_vbrsrq_n_u8): Likewise.
9006 (__arm_vshlq_n_u8): Likewise.
9007 (__arm_vrshrq_n_u8): Likewise.
9008 (__arm_vqshlq_n_u8): Likewise.
9009 (__arm_vcmpneq_n_s8): Likewise.
9010 (__arm_vcmpltq_s8): Likewise.
9011 (__arm_vcmpltq_n_s8): Likewise.
9012 (__arm_vcmpleq_s8): Likewise.
9013 (__arm_vcmpleq_n_s8): Likewise.
9014 (__arm_vcmpgtq_s8): Likewise.
9015 (__arm_vcmpgtq_n_s8): Likewise.
9016 (__arm_vcmpgeq_s8): Likewise.
9017 (__arm_vcmpgeq_n_s8): Likewise.
9018 (__arm_vcmpeqq_s8): Likewise.
9019 (__arm_vcmpeqq_n_s8): Likewise.
9020 (__arm_vqshluq_n_s8): Likewise.
9021 (__arm_vaddvq_p_s8): Likewise.
9022 (__arm_vsubq_s8): Likewise.
9023 (__arm_vsubq_n_s8): Likewise.
9024 (__arm_vshlq_r_s8): Likewise.
9025 (__arm_vrshlq_s8): Likewise.
9026 (__arm_vrshlq_n_s8): Likewise.
9027 (__arm_vrmulhq_s8): Likewise.
9028 (__arm_vrhaddq_s8): Likewise.
9029 (__arm_vqsubq_s8): Likewise.
9030 (__arm_vqsubq_n_s8): Likewise.
9031 (__arm_vqshlq_s8): Likewise.
9032 (__arm_vqshlq_r_s8): Likewise.
9033 (__arm_vqrshlq_s8): Likewise.
9034 (__arm_vqrshlq_n_s8): Likewise.
9035 (__arm_vqrdmulhq_s8): Likewise.
9036 (__arm_vqrdmulhq_n_s8): Likewise.
9037 (__arm_vqdmulhq_s8): Likewise.
9038 (__arm_vqdmulhq_n_s8): Likewise.
9039 (__arm_vqaddq_s8): Likewise.
9040 (__arm_vqaddq_n_s8): Likewise.
9041 (__arm_vorrq_s8): Likewise.
9042 (__arm_vornq_s8): Likewise.
9043 (__arm_vmulq_s8): Likewise.
9044 (__arm_vmulq_n_s8): Likewise.
9045 (__arm_vmulltq_int_s8): Likewise.
9046 (__arm_vmullbq_int_s8): Likewise.
9047 (__arm_vmulhq_s8): Likewise.
9048 (__arm_vmlsdavxq_s8): Likewise.
9049 (__arm_vmlsdavq_s8): Likewise.
9050 (__arm_vmladavxq_s8): Likewise.
9051 (__arm_vmladavq_s8): Likewise.
9052 (__arm_vminvq_s8): Likewise.
9053 (__arm_vminq_s8): Likewise.
9054 (__arm_vmaxvq_s8): Likewise.
9055 (__arm_vmaxq_s8): Likewise.
9056 (__arm_vhsubq_s8): Likewise.
9057 (__arm_vhsubq_n_s8): Likewise.
9058 (__arm_vhcaddq_rot90_s8): Likewise.
9059 (__arm_vhcaddq_rot270_s8): Likewise.
9060 (__arm_vhaddq_s8): Likewise.
9061 (__arm_vhaddq_n_s8): Likewise.
9062 (__arm_veorq_s8): Likewise.
9063 (__arm_vcaddq_rot90_s8): Likewise.
9064 (__arm_vcaddq_rot270_s8): Likewise.
9065 (__arm_vbrsrq_n_s8): Likewise.
9066 (__arm_vbicq_s8): Likewise.
9067 (__arm_vandq_s8): Likewise.
9068 (__arm_vaddvaq_s8): Likewise.
9069 (__arm_vaddq_n_s8): Likewise.
9070 (__arm_vabdq_s8): Likewise.
9071 (__arm_vshlq_n_s8): Likewise.
9072 (__arm_vrshrq_n_s8): Likewise.
9073 (__arm_vqshlq_n_s8): Likewise.
9074 (__arm_vsubq_u16): Likewise.
9075 (__arm_vsubq_n_u16): Likewise.
9076 (__arm_vrmulhq_u16): Likewise.
9077 (__arm_vrhaddq_u16): Likewise.
9078 (__arm_vqsubq_u16): Likewise.
9079 (__arm_vqsubq_n_u16): Likewise.
9080 (__arm_vqaddq_u16): Likewise.
9081 (__arm_vqaddq_n_u16): Likewise.
9082 (__arm_vorrq_u16): Likewise.
9083 (__arm_vornq_u16): Likewise.
9084 (__arm_vmulq_u16): Likewise.
9085 (__arm_vmulq_n_u16): Likewise.
9086 (__arm_vmulltq_int_u16): Likewise.
9087 (__arm_vmullbq_int_u16): Likewise.
9088 (__arm_vmulhq_u16): Likewise.
9089 (__arm_vmladavq_u16): Likewise.
9090 (__arm_vminvq_u16): Likewise.
9091 (__arm_vminq_u16): Likewise.
9092 (__arm_vmaxvq_u16): Likewise.
9093 (__arm_vmaxq_u16): Likewise.
9094 (__arm_vhsubq_u16): Likewise.
9095 (__arm_vhsubq_n_u16): Likewise.
9096 (__arm_vhaddq_u16): Likewise.
9097 (__arm_vhaddq_n_u16): Likewise.
9098 (__arm_veorq_u16): Likewise.
9099 (__arm_vcmpneq_n_u16): Likewise.
9100 (__arm_vcmphiq_u16): Likewise.
9101 (__arm_vcmphiq_n_u16): Likewise.
9102 (__arm_vcmpeqq_u16): Likewise.
9103 (__arm_vcmpeqq_n_u16): Likewise.
9104 (__arm_vcmpcsq_u16): Likewise.
9105 (__arm_vcmpcsq_n_u16): Likewise.
9106 (__arm_vcaddq_rot90_u16): Likewise.
9107 (__arm_vcaddq_rot270_u16): Likewise.
9108 (__arm_vbicq_u16): Likewise.
9109 (__arm_vandq_u16): Likewise.
9110 (__arm_vaddvq_p_u16): Likewise.
9111 (__arm_vaddvaq_u16): Likewise.
9112 (__arm_vaddq_n_u16): Likewise.
9113 (__arm_vabdq_u16): Likewise.
9114 (__arm_vshlq_r_u16): Likewise.
9115 (__arm_vrshlq_u16): Likewise.
9116 (__arm_vrshlq_n_u16): Likewise.
9117 (__arm_vqshlq_u16): Likewise.
9118 (__arm_vqshlq_r_u16): Likewise.
9119 (__arm_vqrshlq_u16): Likewise.
9120 (__arm_vqrshlq_n_u16): Likewise.
9121 (__arm_vminavq_s16): Likewise.
9122 (__arm_vminaq_s16): Likewise.
9123 (__arm_vmaxavq_s16): Likewise.
9124 (__arm_vmaxaq_s16): Likewise.
9125 (__arm_vbrsrq_n_u16): Likewise.
9126 (__arm_vshlq_n_u16): Likewise.
9127 (__arm_vrshrq_n_u16): Likewise.
9128 (__arm_vqshlq_n_u16): Likewise.
9129 (__arm_vcmpneq_n_s16): Likewise.
9130 (__arm_vcmpltq_s16): Likewise.
9131 (__arm_vcmpltq_n_s16): Likewise.
9132 (__arm_vcmpleq_s16): Likewise.
9133 (__arm_vcmpleq_n_s16): Likewise.
9134 (__arm_vcmpgtq_s16): Likewise.
9135 (__arm_vcmpgtq_n_s16): Likewise.
9136 (__arm_vcmpgeq_s16): Likewise.
9137 (__arm_vcmpgeq_n_s16): Likewise.
9138 (__arm_vcmpeqq_s16): Likewise.
9139 (__arm_vcmpeqq_n_s16): Likewise.
9140 (__arm_vqshluq_n_s16): Likewise.
9141 (__arm_vaddvq_p_s16): Likewise.
9142 (__arm_vsubq_s16): Likewise.
9143 (__arm_vsubq_n_s16): Likewise.
9144 (__arm_vshlq_r_s16): Likewise.
9145 (__arm_vrshlq_s16): Likewise.
9146 (__arm_vrshlq_n_s16): Likewise.
9147 (__arm_vrmulhq_s16): Likewise.
9148 (__arm_vrhaddq_s16): Likewise.
9149 (__arm_vqsubq_s16): Likewise.
9150 (__arm_vqsubq_n_s16): Likewise.
9151 (__arm_vqshlq_s16): Likewise.
9152 (__arm_vqshlq_r_s16): Likewise.
9153 (__arm_vqrshlq_s16): Likewise.
9154 (__arm_vqrshlq_n_s16): Likewise.
9155 (__arm_vqrdmulhq_s16): Likewise.
9156 (__arm_vqrdmulhq_n_s16): Likewise.
9157 (__arm_vqdmulhq_s16): Likewise.
9158 (__arm_vqdmulhq_n_s16): Likewise.
9159 (__arm_vqaddq_s16): Likewise.
9160 (__arm_vqaddq_n_s16): Likewise.
9161 (__arm_vorrq_s16): Likewise.
9162 (__arm_vornq_s16): Likewise.
9163 (__arm_vmulq_s16): Likewise.
9164 (__arm_vmulq_n_s16): Likewise.
9165 (__arm_vmulltq_int_s16): Likewise.
9166 (__arm_vmullbq_int_s16): Likewise.
9167 (__arm_vmulhq_s16): Likewise.
9168 (__arm_vmlsdavxq_s16): Likewise.
9169 (__arm_vmlsdavq_s16): Likewise.
9170 (__arm_vmladavxq_s16): Likewise.
9171 (__arm_vmladavq_s16): Likewise.
9172 (__arm_vminvq_s16): Likewise.
9173 (__arm_vminq_s16): Likewise.
9174 (__arm_vmaxvq_s16): Likewise.
9175 (__arm_vmaxq_s16): Likewise.
9176 (__arm_vhsubq_s16): Likewise.
9177 (__arm_vhsubq_n_s16): Likewise.
9178 (__arm_vhcaddq_rot90_s16): Likewise.
9179 (__arm_vhcaddq_rot270_s16): Likewise.
9180 (__arm_vhaddq_s16): Likewise.
9181 (__arm_vhaddq_n_s16): Likewise.
9182 (__arm_veorq_s16): Likewise.
9183 (__arm_vcaddq_rot90_s16): Likewise.
9184 (__arm_vcaddq_rot270_s16): Likewise.
9185 (__arm_vbrsrq_n_s16): Likewise.
9186 (__arm_vbicq_s16): Likewise.
9187 (__arm_vandq_s16): Likewise.
9188 (__arm_vaddvaq_s16): Likewise.
9189 (__arm_vaddq_n_s16): Likewise.
9190 (__arm_vabdq_s16): Likewise.
9191 (__arm_vshlq_n_s16): Likewise.
9192 (__arm_vrshrq_n_s16): Likewise.
9193 (__arm_vqshlq_n_s16): Likewise.
9194 (__arm_vsubq_u32): Likewise.
9195 (__arm_vsubq_n_u32): Likewise.
9196 (__arm_vrmulhq_u32): Likewise.
9197 (__arm_vrhaddq_u32): Likewise.
9198 (__arm_vqsubq_u32): Likewise.
9199 (__arm_vqsubq_n_u32): Likewise.
9200 (__arm_vqaddq_u32): Likewise.
9201 (__arm_vqaddq_n_u32): Likewise.
9202 (__arm_vorrq_u32): Likewise.
9203 (__arm_vornq_u32): Likewise.
9204 (__arm_vmulq_u32): Likewise.
9205 (__arm_vmulq_n_u32): Likewise.
9206 (__arm_vmulltq_int_u32): Likewise.
9207 (__arm_vmullbq_int_u32): Likewise.
9208 (__arm_vmulhq_u32): Likewise.
9209 (__arm_vmladavq_u32): Likewise.
9210 (__arm_vminvq_u32): Likewise.
9211 (__arm_vminq_u32): Likewise.
9212 (__arm_vmaxvq_u32): Likewise.
9213 (__arm_vmaxq_u32): Likewise.
9214 (__arm_vhsubq_u32): Likewise.
9215 (__arm_vhsubq_n_u32): Likewise.
9216 (__arm_vhaddq_u32): Likewise.
9217 (__arm_vhaddq_n_u32): Likewise.
9218 (__arm_veorq_u32): Likewise.
9219 (__arm_vcmpneq_n_u32): Likewise.
9220 (__arm_vcmphiq_u32): Likewise.
9221 (__arm_vcmphiq_n_u32): Likewise.
9222 (__arm_vcmpeqq_u32): Likewise.
9223 (__arm_vcmpeqq_n_u32): Likewise.
9224 (__arm_vcmpcsq_u32): Likewise.
9225 (__arm_vcmpcsq_n_u32): Likewise.
9226 (__arm_vcaddq_rot90_u32): Likewise.
9227 (__arm_vcaddq_rot270_u32): Likewise.
9228 (__arm_vbicq_u32): Likewise.
9229 (__arm_vandq_u32): Likewise.
9230 (__arm_vaddvq_p_u32): Likewise.
9231 (__arm_vaddvaq_u32): Likewise.
9232 (__arm_vaddq_n_u32): Likewise.
9233 (__arm_vabdq_u32): Likewise.
9234 (__arm_vshlq_r_u32): Likewise.
9235 (__arm_vrshlq_u32): Likewise.
9236 (__arm_vrshlq_n_u32): Likewise.
9237 (__arm_vqshlq_u32): Likewise.
9238 (__arm_vqshlq_r_u32): Likewise.
9239 (__arm_vqrshlq_u32): Likewise.
9240 (__arm_vqrshlq_n_u32): Likewise.
9241 (__arm_vminavq_s32): Likewise.
9242 (__arm_vminaq_s32): Likewise.
9243 (__arm_vmaxavq_s32): Likewise.
9244 (__arm_vmaxaq_s32): Likewise.
9245 (__arm_vbrsrq_n_u32): Likewise.
9246 (__arm_vshlq_n_u32): Likewise.
9247 (__arm_vrshrq_n_u32): Likewise.
9248 (__arm_vqshlq_n_u32): Likewise.
9249 (__arm_vcmpneq_n_s32): Likewise.
9250 (__arm_vcmpltq_s32): Likewise.
9251 (__arm_vcmpltq_n_s32): Likewise.
9252 (__arm_vcmpleq_s32): Likewise.
9253 (__arm_vcmpleq_n_s32): Likewise.
9254 (__arm_vcmpgtq_s32): Likewise.
9255 (__arm_vcmpgtq_n_s32): Likewise.
9256 (__arm_vcmpgeq_s32): Likewise.
9257 (__arm_vcmpgeq_n_s32): Likewise.
9258 (__arm_vcmpeqq_s32): Likewise.
9259 (__arm_vcmpeqq_n_s32): Likewise.
9260 (__arm_vqshluq_n_s32): Likewise.
9261 (__arm_vaddvq_p_s32): Likewise.
9262 (__arm_vsubq_s32): Likewise.
9263 (__arm_vsubq_n_s32): Likewise.
9264 (__arm_vshlq_r_s32): Likewise.
9265 (__arm_vrshlq_s32): Likewise.
9266 (__arm_vrshlq_n_s32): Likewise.
9267 (__arm_vrmulhq_s32): Likewise.
9268 (__arm_vrhaddq_s32): Likewise.
9269 (__arm_vqsubq_s32): Likewise.
9270 (__arm_vqsubq_n_s32): Likewise.
9271 (__arm_vqshlq_s32): Likewise.
9272 (__arm_vqshlq_r_s32): Likewise.
9273 (__arm_vqrshlq_s32): Likewise.
9274 (__arm_vqrshlq_n_s32): Likewise.
9275 (__arm_vqrdmulhq_s32): Likewise.
9276 (__arm_vqrdmulhq_n_s32): Likewise.
9277 (__arm_vqdmulhq_s32): Likewise.
9278 (__arm_vqdmulhq_n_s32): Likewise.
9279 (__arm_vqaddq_s32): Likewise.
9280 (__arm_vqaddq_n_s32): Likewise.
9281 (__arm_vorrq_s32): Likewise.
9282 (__arm_vornq_s32): Likewise.
9283 (__arm_vmulq_s32): Likewise.
9284 (__arm_vmulq_n_s32): Likewise.
9285 (__arm_vmulltq_int_s32): Likewise.
9286 (__arm_vmullbq_int_s32): Likewise.
9287 (__arm_vmulhq_s32): Likewise.
9288 (__arm_vmlsdavxq_s32): Likewise.
9289 (__arm_vmlsdavq_s32): Likewise.
9290 (__arm_vmladavxq_s32): Likewise.
9291 (__arm_vmladavq_s32): Likewise.
9292 (__arm_vminvq_s32): Likewise.
9293 (__arm_vminq_s32): Likewise.
9294 (__arm_vmaxvq_s32): Likewise.
9295 (__arm_vmaxq_s32): Likewise.
9296 (__arm_vhsubq_s32): Likewise.
9297 (__arm_vhsubq_n_s32): Likewise.
9298 (__arm_vhcaddq_rot90_s32): Likewise.
9299 (__arm_vhcaddq_rot270_s32): Likewise.
9300 (__arm_vhaddq_s32): Likewise.
9301 (__arm_vhaddq_n_s32): Likewise.
9302 (__arm_veorq_s32): Likewise.
9303 (__arm_vcaddq_rot90_s32): Likewise.
9304 (__arm_vcaddq_rot270_s32): Likewise.
9305 (__arm_vbrsrq_n_s32): Likewise.
9306 (__arm_vbicq_s32): Likewise.
9307 (__arm_vandq_s32): Likewise.
9308 (__arm_vaddvaq_s32): Likewise.
9309 (__arm_vaddq_n_s32): Likewise.
9310 (__arm_vabdq_s32): Likewise.
9311 (__arm_vshlq_n_s32): Likewise.
9312 (__arm_vrshrq_n_s32): Likewise.
9313 (__arm_vqshlq_n_s32): Likewise.
9314 (vsubq): Define polymorphic variant.
9315 (vsubq_n): Likewise.
9316 (vshlq_r): Likewise.
9317 (vrshlq_n): Likewise.
9319 (vrmulhq): Likewise.
9320 (vrhaddq): Likewise.
9321 (vqsubq_n): Likewise.
9324 (vqshlq_r): Likewise.
9325 (vqshluq): Likewise.
9326 (vrshrq_n): Likewise.
9327 (vshlq_n): Likewise.
9328 (vqshluq_n): Likewise.
9329 (vqshlq_n): Likewise.
9330 (vqrshlq_n): Likewise.
9331 (vqrshlq): Likewise.
9332 (vqrdmulhq_n): Likewise.
9333 (vqrdmulhq): Likewise.
9334 (vqdmulhq_n): Likewise.
9335 (vqdmulhq): Likewise.
9336 (vqaddq_n): Likewise.
9338 (vorrq_n): Likewise.
9341 (vmulq_n): Likewise.
9343 (vmulltq_int): Likewise.
9344 (vmullbq_int): Likewise.
9350 (vhsubq_n): Likewise.
9352 (vhcaddq_rot90): Likewise.
9353 (vhcaddq_rot270): Likewise.
9354 (vhaddq_n): Likewise.
9357 (vcaddq_rot90): Likewise.
9358 (vcaddq_rot270): Likewise.
9359 (vbrsrq_n): Likewise.
9360 (vbicq_n): Likewise.
9363 (vaddq_n): Likewise.
9366 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
9367 (BINOP_NONE_NONE_NONE): Likewise.
9368 (BINOP_NONE_NONE_UNONE): Likewise.
9369 (BINOP_UNONE_NONE_IMM): Likewise.
9370 (BINOP_UNONE_NONE_NONE): Likewise.
9371 (BINOP_UNONE_UNONE_IMM): Likewise.
9372 (BINOP_UNONE_UNONE_NONE): Likewise.
9373 (BINOP_UNONE_UNONE_UNONE): Likewise.
9374 * config/arm/constraints.md (Ra): Define constraint to check constant is
9375 in the range of 0 to 7.
9376 (Rg): Define constriant to check the constant is one among 1, 2, 4
9378 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
9379 (mve_vaddq_n_<supf>): Likewise.
9380 (mve_vaddvaq_<supf>): Likewise.
9381 (mve_vaddvq_p_<supf>): Likewise.
9382 (mve_vandq_<supf>): Likewise.
9383 (mve_vbicq_<supf>): Likewise.
9384 (mve_vbrsrq_n_<supf>): Likewise.
9385 (mve_vcaddq_rot270_<supf>): Likewise.
9386 (mve_vcaddq_rot90_<supf>): Likewise.
9387 (mve_vcmpcsq_n_u): Likewise.
9388 (mve_vcmpcsq_u): Likewise.
9389 (mve_vcmpeqq_n_<supf>): Likewise.
9390 (mve_vcmpeqq_<supf>): Likewise.
9391 (mve_vcmpgeq_n_s): Likewise.
9392 (mve_vcmpgeq_s): Likewise.
9393 (mve_vcmpgtq_n_s): Likewise.
9394 (mve_vcmpgtq_s): Likewise.
9395 (mve_vcmphiq_n_u): Likewise.
9396 (mve_vcmphiq_u): Likewise.
9397 (mve_vcmpleq_n_s): Likewise.
9398 (mve_vcmpleq_s): Likewise.
9399 (mve_vcmpltq_n_s): Likewise.
9400 (mve_vcmpltq_s): Likewise.
9401 (mve_vcmpneq_n_<supf>): Likewise.
9402 (mve_vddupq_n_u): Likewise.
9403 (mve_veorq_<supf>): Likewise.
9404 (mve_vhaddq_n_<supf>): Likewise.
9405 (mve_vhaddq_<supf>): Likewise.
9406 (mve_vhcaddq_rot270_s): Likewise.
9407 (mve_vhcaddq_rot90_s): Likewise.
9408 (mve_vhsubq_n_<supf>): Likewise.
9409 (mve_vhsubq_<supf>): Likewise.
9410 (mve_vidupq_n_u): Likewise.
9411 (mve_vmaxaq_s): Likewise.
9412 (mve_vmaxavq_s): Likewise.
9413 (mve_vmaxq_<supf>): Likewise.
9414 (mve_vmaxvq_<supf>): Likewise.
9415 (mve_vminaq_s): Likewise.
9416 (mve_vminavq_s): Likewise.
9417 (mve_vminq_<supf>): Likewise.
9418 (mve_vminvq_<supf>): Likewise.
9419 (mve_vmladavq_<supf>): Likewise.
9420 (mve_vmladavxq_s): Likewise.
9421 (mve_vmlsdavq_s): Likewise.
9422 (mve_vmlsdavxq_s): Likewise.
9423 (mve_vmulhq_<supf>): Likewise.
9424 (mve_vmullbq_int_<supf>): Likewise.
9425 (mve_vmulltq_int_<supf>): Likewise.
9426 (mve_vmulq_n_<supf>): Likewise.
9427 (mve_vmulq_<supf>): Likewise.
9428 (mve_vornq_<supf>): Likewise.
9429 (mve_vorrq_<supf>): Likewise.
9430 (mve_vqaddq_n_<supf>): Likewise.
9431 (mve_vqaddq_<supf>): Likewise.
9432 (mve_vqdmulhq_n_s): Likewise.
9433 (mve_vqdmulhq_s): Likewise.
9434 (mve_vqrdmulhq_n_s): Likewise.
9435 (mve_vqrdmulhq_s): Likewise.
9436 (mve_vqrshlq_n_<supf>): Likewise.
9437 (mve_vqrshlq_<supf>): Likewise.
9438 (mve_vqshlq_n_<supf>): Likewise.
9439 (mve_vqshlq_r_<supf>): Likewise.
9440 (mve_vqshlq_<supf>): Likewise.
9441 (mve_vqshluq_n_s): Likewise.
9442 (mve_vqsubq_n_<supf>): Likewise.
9443 (mve_vqsubq_<supf>): Likewise.
9444 (mve_vrhaddq_<supf>): Likewise.
9445 (mve_vrmulhq_<supf>): Likewise.
9446 (mve_vrshlq_n_<supf>): Likewise.
9447 (mve_vrshlq_<supf>): Likewise.
9448 (mve_vrshrq_n_<supf>): Likewise.
9449 (mve_vshlq_n_<supf>): Likewise.
9450 (mve_vshlq_r_<supf>): Likewise.
9451 (mve_vsubq_n_<supf>): Likewise.
9452 (mve_vsubq_<supf>): Likewise.
9453 * config/arm/predicates.md (mve_imm_7): Define predicate to check
9454 the matching constraint Ra.
9455 (mve_imm_selective_upto_8): Define predicate to check the matching
9458 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9459 Mihail Ionescu <mihail.ionescu@arm.com>
9460 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9462 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
9463 qualifier for binary operands.
9464 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9465 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9466 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
9467 (vaddlvq_p_u32): Likewise.
9468 (vcmpneq_s8): Likewise.
9469 (vcmpneq_s16): Likewise.
9470 (vcmpneq_s32): Likewise.
9471 (vcmpneq_u8): Likewise.
9472 (vcmpneq_u16): Likewise.
9473 (vcmpneq_u32): Likewise.
9474 (vshlq_s8): Likewise.
9475 (vshlq_s16): Likewise.
9476 (vshlq_s32): Likewise.
9477 (vshlq_u8): Likewise.
9478 (vshlq_u16): Likewise.
9479 (vshlq_u32): Likewise.
9480 (__arm_vaddlvq_p_s32): Define intrinsic.
9481 (__arm_vaddlvq_p_u32): Likewise.
9482 (__arm_vcmpneq_s8): Likewise.
9483 (__arm_vcmpneq_s16): Likewise.
9484 (__arm_vcmpneq_s32): Likewise.
9485 (__arm_vcmpneq_u8): Likewise.
9486 (__arm_vcmpneq_u16): Likewise.
9487 (__arm_vcmpneq_u32): Likewise.
9488 (__arm_vshlq_s8): Likewise.
9489 (__arm_vshlq_s16): Likewise.
9490 (__arm_vshlq_s32): Likewise.
9491 (__arm_vshlq_u8): Likewise.
9492 (__arm_vshlq_u16): Likewise.
9493 (__arm_vshlq_u32): Likewise.
9494 (vaddlvq_p): Define polymorphic variant.
9495 (vcmpneq): Likewise.
9497 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
9499 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9500 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9501 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
9502 (mve_vcmpneq_<supf><mode>): Likewise.
9503 (mve_vshlq_<supf><mode>): Likewise.
9505 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9506 Mihail Ionescu <mihail.ionescu@arm.com>
9507 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9509 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
9510 qualifier for binary operands.
9511 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9512 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9513 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
9514 (vcvtq_n_s32_f32): Likewise.
9515 (vcvtq_n_u16_f16): Likewise.
9516 (vcvtq_n_u32_f32): Likewise.
9517 (vcreateq_u8): Likewise.
9518 (vcreateq_u16): Likewise.
9519 (vcreateq_u32): Likewise.
9520 (vcreateq_u64): Likewise.
9521 (vcreateq_s8): Likewise.
9522 (vcreateq_s16): Likewise.
9523 (vcreateq_s32): Likewise.
9524 (vcreateq_s64): Likewise.
9525 (vshrq_n_s8): Likewise.
9526 (vshrq_n_s16): Likewise.
9527 (vshrq_n_s32): Likewise.
9528 (vshrq_n_u8): Likewise.
9529 (vshrq_n_u16): Likewise.
9530 (vshrq_n_u32): Likewise.
9531 (__arm_vcreateq_u8): Define intrinsic.
9532 (__arm_vcreateq_u16): Likewise.
9533 (__arm_vcreateq_u32): Likewise.
9534 (__arm_vcreateq_u64): Likewise.
9535 (__arm_vcreateq_s8): Likewise.
9536 (__arm_vcreateq_s16): Likewise.
9537 (__arm_vcreateq_s32): Likewise.
9538 (__arm_vcreateq_s64): Likewise.
9539 (__arm_vshrq_n_s8): Likewise.
9540 (__arm_vshrq_n_s16): Likewise.
9541 (__arm_vshrq_n_s32): Likewise.
9542 (__arm_vshrq_n_u8): Likewise.
9543 (__arm_vshrq_n_u16): Likewise.
9544 (__arm_vshrq_n_u32): Likewise.
9545 (__arm_vcvtq_n_s16_f16): Likewise.
9546 (__arm_vcvtq_n_s32_f32): Likewise.
9547 (__arm_vcvtq_n_u16_f16): Likewise.
9548 (__arm_vcvtq_n_u32_f32): Likewise.
9549 (vshrq_n): Define polymorphic variant.
9550 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
9552 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9553 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9554 * config/arm/constraints.md (Rb): Define constraint to check constant is
9555 in the range of 1 to 8.
9556 (Rf): Define constraint to check constant is in the range of 1 to 32.
9557 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
9558 (mve_vshrq_n_<supf><mode>): Likewise.
9559 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
9560 * config/arm/predicates.md (mve_imm_8): Define predicate to check
9561 the matching constraint Rb.
9562 (mve_imm_32): Define predicate to check the matching constraint Rf.
9564 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9565 Mihail Ionescu <mihail.ionescu@arm.com>
9566 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9568 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
9569 qualifier for binary operands.
9570 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9571 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9572 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9573 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
9574 (vsubq_n_f32): Likewise.
9575 (vbrsrq_n_f16): Likewise.
9576 (vbrsrq_n_f32): Likewise.
9577 (vcvtq_n_f16_s16): Likewise.
9578 (vcvtq_n_f32_s32): Likewise.
9579 (vcvtq_n_f16_u16): Likewise.
9580 (vcvtq_n_f32_u32): Likewise.
9581 (vcreateq_f16): Likewise.
9582 (vcreateq_f32): Likewise.
9583 (__arm_vsubq_n_f16): Define intrinsic.
9584 (__arm_vsubq_n_f32): Likewise.
9585 (__arm_vbrsrq_n_f16): Likewise.
9586 (__arm_vbrsrq_n_f32): Likewise.
9587 (__arm_vcvtq_n_f16_s16): Likewise.
9588 (__arm_vcvtq_n_f32_s32): Likewise.
9589 (__arm_vcvtq_n_f16_u16): Likewise.
9590 (__arm_vcvtq_n_f32_u32): Likewise.
9591 (__arm_vcreateq_f16): Likewise.
9592 (__arm_vcreateq_f32): Likewise.
9593 (vsubq): Define polymorphic variant.
9595 (vcvtq_n): Likewise.
9596 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
9598 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9599 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9600 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9601 * config/arm/constraints.md (Rd): Define constraint to check constant is
9602 in the range of 1 to 16.
9603 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
9604 mve_vbrsrq_n_f<mode>: Likewise.
9605 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
9606 mve_vcreateq_f<mode>: Likewise.
9607 * config/arm/predicates.md (mve_imm_16): Define predicate to check
9608 the matching constraint Rd.
9610 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9611 Mihail Ionescu <mihail.ionescu@arm.com>
9612 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9614 * config/arm/arm-builtins.c (hi_UP): Define mode.
9615 * config/arm/arm.h (IS_VPR_REGNUM): Move.
9616 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
9617 (APSRQ_REGNUM): Modify.
9618 (APSRGE_REGNUM): Modify.
9619 * config/arm/arm_mve.h (vctp16q): Define macro.
9620 (vctp32q): Likewise.
9621 (vctp64q): Likewise.
9624 (__arm_vctp16q): Define intrinsic.
9625 (__arm_vctp32q): Likewise.
9626 (__arm_vctp64q): Likewise.
9627 (__arm_vctp8q): Likewise.
9628 (__arm_vpnot): Likewise.
9629 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
9631 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
9632 (mve_vpnothi): Likewise.
9634 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9635 Mihail Ionescu <mihail.ionescu@arm.com>
9636 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9638 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
9639 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
9640 (vdupq_n_s16): Likewise.
9641 (vdupq_n_s32): Likewise.
9642 (vabsq_s8): Likewise.
9643 (vabsq_s16): Likewise.
9644 (vabsq_s32): Likewise.
9645 (vclsq_s8): Likewise.
9646 (vclsq_s16): Likewise.
9647 (vclsq_s32): Likewise.
9648 (vclzq_s8): Likewise.
9649 (vclzq_s16): Likewise.
9650 (vclzq_s32): Likewise.
9651 (vnegq_s8): Likewise.
9652 (vnegq_s16): Likewise.
9653 (vnegq_s32): Likewise.
9654 (vaddlvq_s32): Likewise.
9655 (vaddvq_s8): Likewise.
9656 (vaddvq_s16): Likewise.
9657 (vaddvq_s32): Likewise.
9658 (vmovlbq_s8): Likewise.
9659 (vmovlbq_s16): Likewise.
9660 (vmovltq_s8): Likewise.
9661 (vmovltq_s16): Likewise.
9662 (vmvnq_s8): Likewise.
9663 (vmvnq_s16): Likewise.
9664 (vmvnq_s32): Likewise.
9665 (vrev16q_s8): Likewise.
9666 (vrev32q_s8): Likewise.
9667 (vrev32q_s16): Likewise.
9668 (vqabsq_s8): Likewise.
9669 (vqabsq_s16): Likewise.
9670 (vqabsq_s32): Likewise.
9671 (vqnegq_s8): Likewise.
9672 (vqnegq_s16): Likewise.
9673 (vqnegq_s32): Likewise.
9674 (vcvtaq_s16_f16): Likewise.
9675 (vcvtaq_s32_f32): Likewise.
9676 (vcvtnq_s16_f16): Likewise.
9677 (vcvtnq_s32_f32): Likewise.
9678 (vcvtpq_s16_f16): Likewise.
9679 (vcvtpq_s32_f32): Likewise.
9680 (vcvtmq_s16_f16): Likewise.
9681 (vcvtmq_s32_f32): Likewise.
9682 (vmvnq_u8): Likewise.
9683 (vmvnq_u16): Likewise.
9684 (vmvnq_u32): Likewise.
9685 (vdupq_n_u8): Likewise.
9686 (vdupq_n_u16): Likewise.
9687 (vdupq_n_u32): Likewise.
9688 (vclzq_u8): Likewise.
9689 (vclzq_u16): Likewise.
9690 (vclzq_u32): Likewise.
9691 (vaddvq_u8): Likewise.
9692 (vaddvq_u16): Likewise.
9693 (vaddvq_u32): Likewise.
9694 (vrev32q_u8): Likewise.
9695 (vrev32q_u16): Likewise.
9696 (vmovltq_u8): Likewise.
9697 (vmovltq_u16): Likewise.
9698 (vmovlbq_u8): Likewise.
9699 (vmovlbq_u16): Likewise.
9700 (vrev16q_u8): Likewise.
9701 (vaddlvq_u32): Likewise.
9702 (vcvtpq_u16_f16): Likewise.
9703 (vcvtpq_u32_f32): Likewise.
9704 (vcvtnq_u16_f16): Likewise.
9705 (vcvtmq_u16_f16): Likewise.
9706 (vcvtmq_u32_f32): Likewise.
9707 (vcvtaq_u16_f16): Likewise.
9708 (vcvtaq_u32_f32): Likewise.
9709 (__arm_vdupq_n_s8): Define intrinsic.
9710 (__arm_vdupq_n_s16): Likewise.
9711 (__arm_vdupq_n_s32): Likewise.
9712 (__arm_vabsq_s8): Likewise.
9713 (__arm_vabsq_s16): Likewise.
9714 (__arm_vabsq_s32): Likewise.
9715 (__arm_vclsq_s8): Likewise.
9716 (__arm_vclsq_s16): Likewise.
9717 (__arm_vclsq_s32): Likewise.
9718 (__arm_vclzq_s8): Likewise.
9719 (__arm_vclzq_s16): Likewise.
9720 (__arm_vclzq_s32): Likewise.
9721 (__arm_vnegq_s8): Likewise.
9722 (__arm_vnegq_s16): Likewise.
9723 (__arm_vnegq_s32): Likewise.
9724 (__arm_vaddlvq_s32): Likewise.
9725 (__arm_vaddvq_s8): Likewise.
9726 (__arm_vaddvq_s16): Likewise.
9727 (__arm_vaddvq_s32): Likewise.
9728 (__arm_vmovlbq_s8): Likewise.
9729 (__arm_vmovlbq_s16): Likewise.
9730 (__arm_vmovltq_s8): Likewise.
9731 (__arm_vmovltq_s16): Likewise.
9732 (__arm_vmvnq_s8): Likewise.
9733 (__arm_vmvnq_s16): Likewise.
9734 (__arm_vmvnq_s32): Likewise.
9735 (__arm_vrev16q_s8): Likewise.
9736 (__arm_vrev32q_s8): Likewise.
9737 (__arm_vrev32q_s16): Likewise.
9738 (__arm_vqabsq_s8): Likewise.
9739 (__arm_vqabsq_s16): Likewise.
9740 (__arm_vqabsq_s32): Likewise.
9741 (__arm_vqnegq_s8): Likewise.
9742 (__arm_vqnegq_s16): Likewise.
9743 (__arm_vqnegq_s32): Likewise.
9744 (__arm_vmvnq_u8): Likewise.
9745 (__arm_vmvnq_u16): Likewise.
9746 (__arm_vmvnq_u32): Likewise.
9747 (__arm_vdupq_n_u8): Likewise.
9748 (__arm_vdupq_n_u16): Likewise.
9749 (__arm_vdupq_n_u32): Likewise.
9750 (__arm_vclzq_u8): Likewise.
9751 (__arm_vclzq_u16): Likewise.
9752 (__arm_vclzq_u32): Likewise.
9753 (__arm_vaddvq_u8): Likewise.
9754 (__arm_vaddvq_u16): Likewise.
9755 (__arm_vaddvq_u32): Likewise.
9756 (__arm_vrev32q_u8): Likewise.
9757 (__arm_vrev32q_u16): Likewise.
9758 (__arm_vmovltq_u8): Likewise.
9759 (__arm_vmovltq_u16): Likewise.
9760 (__arm_vmovlbq_u8): Likewise.
9761 (__arm_vmovlbq_u16): Likewise.
9762 (__arm_vrev16q_u8): Likewise.
9763 (__arm_vaddlvq_u32): Likewise.
9764 (__arm_vcvtpq_u16_f16): Likewise.
9765 (__arm_vcvtpq_u32_f32): Likewise.
9766 (__arm_vcvtnq_u16_f16): Likewise.
9767 (__arm_vcvtmq_u16_f16): Likewise.
9768 (__arm_vcvtmq_u32_f32): Likewise.
9769 (__arm_vcvtaq_u16_f16): Likewise.
9770 (__arm_vcvtaq_u32_f32): Likewise.
9771 (__arm_vcvtaq_s16_f16): Likewise.
9772 (__arm_vcvtaq_s32_f32): Likewise.
9773 (__arm_vcvtnq_s16_f16): Likewise.
9774 (__arm_vcvtnq_s32_f32): Likewise.
9775 (__arm_vcvtpq_s16_f16): Likewise.
9776 (__arm_vcvtpq_s32_f32): Likewise.
9777 (__arm_vcvtmq_s16_f16): Likewise.
9778 (__arm_vcvtmq_s32_f32): Likewise.
9779 (vdupq_n): Define polymorphic variant.
9784 (vaddlvq): Likewise.
9786 (vmovlbq): Likewise.
9787 (vmovltq): Likewise.
9789 (vrev16q): Likewise.
9790 (vrev32q): Likewise.
9793 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
9794 (UNOP_SNONE_NONE): Likewise.
9795 (UNOP_UNONE_UNONE): Likewise.
9796 (UNOP_UNONE_NONE): Likewise.
9797 * config/arm/constraints.md (e): Define new constriant to allow only
9799 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
9800 (mve_vnegq_s<mode>): Likewise.
9801 (mve_vmvnq_<supf><mode>): Likewise.
9802 (mve_vdupq_n_<supf><mode>): Likewise.
9803 (mve_vclzq_<supf><mode>): Likewise.
9804 (mve_vclsq_s<mode>): Likewise.
9805 (mve_vaddvq_<supf><mode>): Likewise.
9806 (mve_vabsq_s<mode>): Likewise.
9807 (mve_vrev32q_<supf><mode>): Likewise.
9808 (mve_vmovltq_<supf><mode>): Likewise.
9809 (mve_vmovlbq_<supf><mode>): Likewise.
9810 (mve_vcvtpq_<supf><mode>): Likewise.
9811 (mve_vcvtnq_<supf><mode>): Likewise.
9812 (mve_vcvtmq_<supf><mode>): Likewise.
9813 (mve_vcvtaq_<supf><mode>): Likewise.
9814 (mve_vrev16q_<supf>v16qi): Likewise.
9815 (mve_vaddlvq_<supf>v4si): Likewise.
9817 2020-03-17 Jakub Jelinek <jakub@redhat.com>
9819 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
9821 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
9823 * read-rtl-function.c (find_param_by_name,
9824 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
9826 * spellcheck.c (get_edit_distance_cutoff): Likewise.
9827 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
9828 * tree.def (SWITCH_EXPR): Likewise.
9829 * selftest.c (assert_str_contains): Likewise.
9830 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
9832 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
9833 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
9834 * langhooks.h (struct lang_hooks_for_decls): Likewise.
9835 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
9836 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
9838 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
9839 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
9840 * tree.c (component_ref_size): Likewise.
9841 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
9842 * gimple-ssa-sprintf.c (get_string_length, format_string,
9843 format_directive): Likewise.
9844 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
9845 * input.c (string_concat_db::get_string_concatenation,
9846 test_lexer_string_locations_ucn4): Likewise.
9847 * cfgexpand.c (pass_expand::execute): Likewise.
9848 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
9849 maybe_diag_overlap): Likewise.
9850 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
9851 * shrink-wrap.c (spread_components): Likewise.
9852 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
9854 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
9856 * dwarf2out.c (dwarf2out_early_finish): Likewise.
9857 * gimple-ssa-store-merging.c: Likewise.
9858 * ira-costs.c (record_operand_costs): Likewise.
9859 * tree-vect-loop.c (vectorizable_reduction): Likewise.
9860 * target.def (dispatch): Likewise.
9861 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
9862 in documentation text.
9863 * doc/tm.texi: Regenerated.
9864 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
9865 duplicated word issue in a comment.
9866 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
9867 * config/i386/i386-features.c (remove_partial_avx_dependency):
9869 * config/msp430/msp430.c (msp430_select_section): Likewise.
9870 * config/gcn/gcn-run.c (load_image): Likewise.
9871 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
9872 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
9873 * config/aarch64/falkor-tag-collision-avoidance.c
9874 (single_dest_per_chain): Likewise.
9875 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
9876 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
9877 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
9878 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
9880 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
9881 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
9882 * config/rs6000/rs6000-logue.c
9883 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
9884 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
9885 Fix various other issues in the comment.
9887 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
9889 * config/arm/t-rmprofile: create new multilib for
9890 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
9893 2020-03-17 Jakub Jelinek <jakub@redhat.com>
9895 PR tree-optimization/94015
9896 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
9897 function where EXP is address of the bytes being stored rather than
9898 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
9899 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
9900 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
9901 calling native_encode_expr if host or target doesn't have 8-bit
9902 chars. Formatting fixes.
9903 (count_nonzero_bytes_addr): New function.
9905 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9906 Mihail Ionescu <mihail.ionescu@arm.com>
9907 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9909 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
9910 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
9911 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
9912 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
9913 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
9914 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
9915 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
9916 (vmvnq_n_s32): Likewise.
9917 (vrev64q_s8): Likewise.
9918 (vrev64q_s16): Likewise.
9919 (vrev64q_s32): Likewise.
9920 (vcvtq_s16_f16): Likewise.
9921 (vcvtq_s32_f32): Likewise.
9922 (vrev64q_u8): Likewise.
9923 (vrev64q_u16): Likewise.
9924 (vrev64q_u32): Likewise.
9925 (vmvnq_n_u16): Likewise.
9926 (vmvnq_n_u32): Likewise.
9927 (vcvtq_u16_f16): Likewise.
9928 (vcvtq_u32_f32): Likewise.
9929 (__arm_vmvnq_n_s16): Define intrinsic.
9930 (__arm_vmvnq_n_s32): Likewise.
9931 (__arm_vrev64q_s8): Likewise.
9932 (__arm_vrev64q_s16): Likewise.
9933 (__arm_vrev64q_s32): Likewise.
9934 (__arm_vrev64q_u8): Likewise.
9935 (__arm_vrev64q_u16): Likewise.
9936 (__arm_vrev64q_u32): Likewise.
9937 (__arm_vmvnq_n_u16): Likewise.
9938 (__arm_vmvnq_n_u32): Likewise.
9939 (__arm_vcvtq_s16_f16): Likewise.
9940 (__arm_vcvtq_s32_f32): Likewise.
9941 (__arm_vcvtq_u16_f16): Likewise.
9942 (__arm_vcvtq_u32_f32): Likewise.
9943 (vrev64q): Define polymorphic variant.
9944 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
9945 (UNOP_SNONE_NONE): Likewise.
9946 (UNOP_SNONE_IMM): Likewise.
9947 (UNOP_UNONE_UNONE): Likewise.
9948 (UNOP_UNONE_NONE): Likewise.
9949 (UNOP_UNONE_IMM): Likewise.
9950 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
9951 (mve_vcvtq_from_f_<supf><mode>): Likewise.
9952 (mve_vmvnq_n_<supf><mode>): Likewise.
9954 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9955 Mihail Ionescu <mihail.ionescu@arm.com>
9956 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9958 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
9959 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
9960 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
9961 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
9962 (vrndxq_f32): Likewise.
9963 (vrndq_f16) Likewise.
9964 (vrndq_f32): Likewise.
9965 (vrndpq_f16): Likewise.
9966 (vrndpq_f32): Likewise.
9967 (vrndnq_f16): Likewise.
9968 (vrndnq_f32): Likewise.
9969 (vrndmq_f16): Likewise.
9970 (vrndmq_f32): Likewise.
9971 (vrndaq_f16): Likewise.
9972 (vrndaq_f32): Likewise.
9973 (vrev64q_f16): Likewise.
9974 (vrev64q_f32): Likewise.
9975 (vnegq_f16): Likewise.
9976 (vnegq_f32): Likewise.
9977 (vdupq_n_f16): Likewise.
9978 (vdupq_n_f32): Likewise.
9979 (vabsq_f16): Likewise.
9980 (vabsq_f32): Likewise.
9981 (vrev32q_f16): Likewise.
9982 (vcvttq_f32_f16): Likewise.
9983 (vcvtbq_f32_f16): Likewise.
9984 (vcvtq_f16_s16): Likewise.
9985 (vcvtq_f32_s32): Likewise.
9986 (vcvtq_f16_u16): Likewise.
9987 (vcvtq_f32_u32): Likewise.
9988 (__arm_vrndxq_f16): Define intrinsic.
9989 (__arm_vrndxq_f32): Likewise.
9990 (__arm_vrndq_f16): Likewise.
9991 (__arm_vrndq_f32): Likewise.
9992 (__arm_vrndpq_f16): Likewise.
9993 (__arm_vrndpq_f32): Likewise.
9994 (__arm_vrndnq_f16): Likewise.
9995 (__arm_vrndnq_f32): Likewise.
9996 (__arm_vrndmq_f16): Likewise.
9997 (__arm_vrndmq_f32): Likewise.
9998 (__arm_vrndaq_f16): Likewise.
9999 (__arm_vrndaq_f32): Likewise.
10000 (__arm_vrev64q_f16): Likewise.
10001 (__arm_vrev64q_f32): Likewise.
10002 (__arm_vnegq_f16): Likewise.
10003 (__arm_vnegq_f32): Likewise.
10004 (__arm_vdupq_n_f16): Likewise.
10005 (__arm_vdupq_n_f32): Likewise.
10006 (__arm_vabsq_f16): Likewise.
10007 (__arm_vabsq_f32): Likewise.
10008 (__arm_vrev32q_f16): Likewise.
10009 (__arm_vcvttq_f32_f16): Likewise.
10010 (__arm_vcvtbq_f32_f16): Likewise.
10011 (__arm_vcvtq_f16_s16): Likewise.
10012 (__arm_vcvtq_f32_s32): Likewise.
10013 (__arm_vcvtq_f16_u16): Likewise.
10014 (__arm_vcvtq_f32_u32): Likewise.
10015 (vrndxq): Define polymorphic variants.
10017 (vrndpq): Likewise.
10018 (vrndnq): Likewise.
10019 (vrndmq): Likewise.
10020 (vrndaq): Likewise.
10021 (vrev64q): Likewise.
10024 (vrev32q): Likewise.
10025 (vcvtbq_f32): Likewise.
10026 (vcvttq_f32): Likewise.
10028 * config/arm/arm_mve_builtins.def (VAR2): Define.
10030 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
10031 (mve_vrndq_f<mode>): Likewise.
10032 (mve_vrndpq_f<mode>): Likewise.
10033 (mve_vrndnq_f<mode>): Likewise.
10034 (mve_vrndmq_f<mode>): Likewise.
10035 (mve_vrndaq_f<mode>): Likewise.
10036 (mve_vrev64q_f<mode>): Likewise.
10037 (mve_vnegq_f<mode>): Likewise.
10038 (mve_vdupq_n_f<mode>): Likewise.
10039 (mve_vabsq_f<mode>): Likewise.
10040 (mve_vrev32q_fv8hf): Likewise.
10041 (mve_vcvttq_f32_f16v4sf): Likewise.
10042 (mve_vcvtbq_f32_f16v4sf): Likewise.
10043 (mve_vcvtq_to_f_<supf><mode>): Likewise.
10045 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10046 Mihail Ionescu <mihail.ionescu@arm.com>
10047 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10049 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
10051 (ARM_BUILTIN_MVE_PATTERN_START): Define.
10052 (arm_init_mve_builtins): Define function.
10053 (arm_init_builtins): Add TARGET_HAVE_MVE check.
10054 (arm_expand_builtin_1): Check the range of fcode.
10055 (arm_expand_mve_builtin): Define function to expand MVE builtins.
10056 (arm_expand_builtin): Check the range of fcode.
10057 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
10059 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
10060 (vst4q_s8): Define macro.
10061 (vst4q_s16): Likewise.
10062 (vst4q_s32): Likewise.
10063 (vst4q_u8): Likewise.
10064 (vst4q_u16): Likewise.
10065 (vst4q_u32): Likewise.
10066 (vst4q_f16): Likewise.
10067 (vst4q_f32): Likewise.
10068 (__arm_vst4q_s8): Define inline builtin.
10069 (__arm_vst4q_s16): Likewise.
10070 (__arm_vst4q_s32): Likewise.
10071 (__arm_vst4q_u8): Likewise.
10072 (__arm_vst4q_u16): Likewise.
10073 (__arm_vst4q_u32): Likewise.
10074 (__arm_vst4q_f16): Likewise.
10075 (__arm_vst4q_f32): Likewise.
10076 (__ARM_mve_typeid): Define macro with MVE types.
10077 (__ARM_mve_coerce): Define macro with _Generic feature.
10078 (vst4q): Define polymorphic variant for different vst4q builtins.
10079 * config/arm/arm_mve_builtins.def: New file.
10080 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
10082 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
10083 (unspec): Define unspec.
10084 (mve_vst4q<mode>): Define RTL pattern.
10085 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
10087 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
10089 (define_split): Allow OI mode split for MVE after reload.
10090 (define_split): Allow XI mode split for MVE after reload.
10091 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
10092 (arm-builtins.o): Likewise.
10094 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
10096 * c-typeck.c (process_init_element): Handle constructor_type with
10097 type size represented by POLY_INT_CST.
10099 2020-03-17 Jakub Jelinek <jakub@redhat.com>
10101 PR tree-optimization/94187
10102 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
10103 nchars - offset < nbytes.
10105 PR middle-end/94189
10106 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
10107 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
10108 for code-generation.
10110 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
10113 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
10114 after changing memory subreg.
10116 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10117 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10119 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
10120 emulator calls for dobule precision arithmetic operations for MVE.
10122 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10123 Mihail Ionescu <mihail.ionescu@arm.com>
10124 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10126 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
10127 feature bit is on and -mfpu=auto is passed as compiler option, do not
10128 generate error on not finding any matching fpu. Because in this case
10129 fpu is not required.
10130 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
10131 enabled for MVE and also for all VFP extensions.
10132 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
10134 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
10135 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
10136 along with feature bits mve_float.
10137 (mve): Modify add options in armv8.1-m.main arch for MVE.
10138 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
10140 * config/arm/arm.c (use_return_insn): Replace the
10141 check with TARGET_VFP_BASE.
10142 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
10144 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10145 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
10147 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
10148 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
10150 (arm_compute_frame_layout): Likewise.
10151 (arm_save_coproc_regs): Likewise.
10152 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
10154 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10155 with equivalent macro TARGET_VFP_BASE.
10156 (arm_expand_epilogue_apcs_frame): Likewise.
10157 (arm_expand_epilogue): Likewise.
10158 (arm_conditional_register_usage): Likewise.
10159 (arm_declare_function_name): Add check to skip printing .fpu directive
10160 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
10162 * config/arm/arm.h (TARGET_VFP_BASE): Define.
10163 * config/arm/arm.md (arch): Add "mve" to arch.
10164 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
10165 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
10166 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
10167 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
10169 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
10170 to not allow for MVE.
10171 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
10173 (VUNSPEC_GET_FPSCR): Define.
10174 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
10175 instructions which move to general-purpose Register from Floating-point
10176 Special register and vice-versa.
10177 (thumb2_movhi_fp16): Likewise.
10178 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
10179 with MCR and MRC instructions which set and get Floating-point Status
10180 and Control Register (FPSCR).
10181 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
10183 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
10184 float move patterns in MVE.
10185 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
10186 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10187 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
10188 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10189 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
10190 TARGET_VFP_BASE check.
10191 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
10192 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10194 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
10195 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10199 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10200 Mihail Ionescu <mihail.ionescu@arm.com>
10201 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10203 * config.gcc (arm_mve.h): Include mve intrinsics header file.
10204 * config/arm/aout.h (p0): Add new register name for MVE predicated
10206 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
10207 common to Neon and MVE.
10208 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
10209 (arm_init_simd_builtin_types): Disable poly types for MVE.
10210 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
10211 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
10212 ARM_BUILTIN_NEON_LANE_CHECK.
10213 (mve_dereference_pointer): Add function.
10214 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
10216 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
10217 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
10218 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
10219 with floating point enabled.
10220 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
10221 simd_immediate_valid_for_move.
10222 (simd_immediate_valid_for_move): Renamed from
10223 neon_immediate_valid_for_move function.
10224 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
10225 error if vfpv2 feature bit is disabled and mve feature bit is also
10226 disabled for HARD_FLOAT_ABI.
10227 (use_return_insn): Check to not push VFP regs for MVE.
10228 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
10230 (aapcs_vfp_allocate_return_reg): Likewise.
10231 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
10232 address operand for MVE.
10233 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
10234 (neon_valid_immediate): Rename to simd_valid_immediate.
10235 (simd_valid_immediate): Rename from neon_valid_immediate.
10236 (simd_valid_immediate): MVE check on size of vector is 128 bits.
10237 (neon_immediate_valid_for_move): Rename to
10238 simd_immediate_valid_for_move.
10239 (simd_immediate_valid_for_move): Rename from
10240 neon_immediate_valid_for_move.
10241 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
10243 (neon_make_constant): Modify call to neon_valid_immediate function.
10244 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
10246 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
10247 (arm_compute_frame_layout): Calculate space for saved VFP registers for
10249 (arm_save_coproc_regs): Save coproc registers for MVE.
10250 (arm_print_operand): Add case 'E' to print memory operands for MVE.
10251 (arm_print_operand_address): Check to print register number for MVE.
10252 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
10253 (arm_modes_tieable_p): Check to allow structure mode for MVE.
10254 (arm_regno_class): Add VPR_REGNUM check.
10255 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
10257 (arm_expand_epilogue): MVE check for enabling pop instructions in
10259 (arm_print_asm_arch_directives): Modify function to disable print of
10260 .arch_extension "mve" and "fp" for cases where MVE is enabled with
10262 (arm_vector_mode_supported_p): Check for modes available in MVE interger
10263 and MVE floating point.
10264 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
10266 (arm_conditional_register_usage): Enable usage of conditional regsiter
10268 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
10269 (arm_declare_function_name): Modify function to disable print of
10270 .arch_extension "mve" and "fp" for cases where MVE is enabled with
10272 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
10273 when target general registers are required.
10274 (TARGET_HAVE_MVE_FLOAT): Likewise.
10275 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
10277 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
10278 which indicate this is not available for across function calls.
10279 (FIRST_PSEUDO_REGISTER): Modify.
10280 (VALID_MVE_MODE): Define valid MVE mode.
10281 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
10282 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
10283 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
10284 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
10286 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
10287 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
10288 (enum reg_class): Add VPR_REG entry.
10289 (REG_CLASS_NAMES): Add VPR_REG entry.
10290 * config/arm/arm.md (VPR_REGNUM): Define.
10291 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
10292 "unconditional" instructions.
10293 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
10294 (movdf_soft_insn): Modify RTL to not allow for MVE.
10295 (vfp_pop_multiple_with_writeback): Enable for MVE.
10296 (include "mve.md"): Include mve.md file.
10297 * config/arm/arm_mve.h: Add MVE intrinsics head file.
10298 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
10299 for vector predicated operands.
10300 * config/arm/iterators.md (VNIM1): Define.
10301 (VNINOTM1): Define.
10302 (VHFBF_split): Define
10303 * config/arm/mve.md: New file.
10304 (mve_mov<mode>): Define RTL for move, store and load in MVE.
10305 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
10307 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
10308 simd_immediate_valid_for_move.
10309 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
10310 is common to MVE and NEON to vec-common.md file.
10311 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
10312 * config/arm/predicates.md (vpr_register_operand): Define.
10313 * config/arm/t-arm: Add mve.md file.
10314 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
10316 (mve_store): Add MVE instructions mve_store to attribute "type".
10317 (mve_load): Add MVE instructions mve_load to attribute "type".
10318 (is_mve_type): Define attribute.
10319 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
10320 standard move patterns in MVE along with NEON and IWMMXT with mode
10322 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
10323 and IWMMXT with mode iterator V8HF.
10324 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
10326 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
10327 simd_immediate_valid_for_move.
10330 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
10333 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
10334 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
10336 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
10338 2020-03-16 Jakub Jelinek <jakub@redhat.com>
10341 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
10344 PR tree-optimization/94166
10345 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
10346 as secondary comparison key.
10348 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
10350 PR tree-optimization/94125
10351 * tree-loop-distribution.c
10352 (loop_distribution::break_alias_scc_partitions): Update post order
10353 number for merged scc.
10355 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
10358 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
10360 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
10361 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
10362 and ext_sse_reg_operand check.
10364 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
10366 * common.opt: Avoid redundancy in the help text.
10367 * config/arc/arc.opt: Likewise.
10368 * config/cr16/cr16.opt: Likewise.
10370 2020-03-14 Jakub Jelinek <jakub@redhat.com>
10372 PR middle-end/93566
10373 * tree-nested.c (convert_nonlocal_omp_clauses,
10374 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
10375 with C/C++ array sections.
10377 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
10380 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
10381 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
10384 2020-03-14 Jakub Jelinek <jakub@redhat.com>
10386 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
10387 "a an" to "an" in a comment.
10388 * hsa-common.h (is_a_helper): Likewise.
10389 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
10390 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
10391 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
10393 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
10396 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
10397 64-bit value by 64 bits (UB).
10399 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
10401 PR rtl-optimization/92303
10402 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
10404 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
10406 PR rtl-optimization/94148
10407 PR rtl-optimization/94042
10408 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
10409 (df_worklist_propagate_forward): New parameter last_change_age, use
10410 that instead of bb->aux.
10411 (df_worklist_propagate_backward): Ditto.
10412 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
10414 2020-03-13 Richard Biener <rguenther@suse.de>
10416 PR tree-optimization/94163
10417 * tree-ssa-pre.c (create_expression_by_pieces): Check
10418 whether alignment would be zero.
10420 2020-03-13 Martin Liska <mliska@suse.cz>
10423 * lto-wrapper.c (run_gcc): Use concat for appending
10424 to collect_gcc_options.
10426 2020-03-13 Jakub Jelinek <jakub@redhat.com>
10429 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
10430 instead of GEN_INT.
10432 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
10435 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
10436 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
10437 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
10438 TARGET_AVX512VL and ext_sse_reg_operand check.
10440 2020-03-13 Bu Le <bule1@huawei.com>
10443 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
10444 (-param=aarch64-double-recp-precision=): New options.
10445 * doc/invoke.texi: Document them.
10446 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
10447 instead of hard-coding the choice of 1 for float and 2 for double.
10449 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
10451 PR rtl-optimization/94119
10452 * resource.h (clear_hashed_info_until_next_barrier): Declare.
10453 * resource.c (clear_hashed_info_until_next_barrier): New function.
10454 * reorg.c (add_to_delay_list): Fix formatting.
10455 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
10456 the next instruction after removing a BARRIER.
10458 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
10460 PR middle-end/92071
10461 * expmed.c (store_integral_bit_field): For fields larger than a word,
10462 call extract_bit_field on the value if the mode is BLKmode. Remove
10463 specific path for big-endian targets and tidy things up a little bit.
10465 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
10467 PR rtl-optimization/90275
10468 * cse.c (cse_insn): Delete no-op register moves too.
10470 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
10472 * config/rx/rx.md (CTRLREG_CPEN): Remove.
10473 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
10475 2020-03-12 Richard Biener <rguenther@suse.de>
10477 PR tree-optimization/94103
10478 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
10479 punning when the mode precision is not sufficient.
10481 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
10484 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
10485 MODE_V1DF and MODE_V2SF.
10486 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
10487 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
10490 2020-03-12 Jakub Jelinek <jakub@redhat.com>
10492 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
10493 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
10494 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
10495 * doc/tm.texi: Regenerated.
10497 PR tree-optimization/94130
10498 * tree-ssa-dse.c: Include gimplify.h.
10499 (increment_start_addr): If stmt has lhs, drop the lhs from call and
10500 set it after the call to the original value of the first argument.
10502 (decrement_count): Formatting fix.
10504 2020-03-11 Delia Burduv <delia.burduv@arm.com>
10506 * config/arm/arm-builtins.c
10507 (arm_init_simd_builtin_scalar_types): New.
10508 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
10509 (vld2q_bf16): Used new builtin type.
10510 (vld3_bf16): Used new builtin type.
10511 (vld3q_bf16): Used new builtin type.
10512 (vld4_bf16): Used new builtin type.
10513 (vld4q_bf16): Used new builtin type.
10514 (vld2_dup_bf16): Used new builtin type.
10515 (vld2q_dup_bf16): Used new builtin type.
10516 (vld3_dup_bf16): Used new builtin type.
10517 (vld3q_dup_bf16): Used new builtin type.
10518 (vld4_dup_bf16): Used new builtin type.
10519 (vld4q_dup_bf16): Used new builtin type.
10521 2020-03-11 Jakub Jelinek <jakub@redhat.com>
10524 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
10525 at the start to switch to data section. Don't print extra newline if
10526 .globl directive has not been emitted.
10528 2020-03-11 Richard Biener <rguenther@suse.de>
10530 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
10533 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
10535 PR middle-end/93961
10536 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
10537 whose type is a qualified union.
10539 2020-03-11 Jakub Jelinek <jakub@redhat.com>
10542 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
10543 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
10546 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
10548 (get_nth_most_common_value): Use abs_hwi instead of abs.
10550 PR middle-end/94111
10551 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
10552 is rvc_normal, otherwise use real_to_decimal to print the number to
10555 PR tree-optimization/94114
10556 * tree-loop-distribution.c (generate_memset_builtin): Call
10557 rewrite_to_non_trapping_overflow even on mem.
10558 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
10561 2020-03-10 Jeff Law <law@redhat.com>
10563 * config/bfin/bfin.md (movsi_insv): Add length attribute.
10565 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
10568 * gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
10569 NAN and SIGNED_ZEROR for smax/smin.
10571 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
10574 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
10575 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
10577 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
10579 * loop-iv.c (find_simple_exit): Make it static.
10580 * cfgloop.h: Remove the corresponding prototype.
10582 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
10584 * ddg.c (create_ddg): Fix intendation.
10585 (set_recurrence_length): Likewise.
10586 (create_ddg_all_sccs): Likewise.
10588 2020-03-10 Jakub Jelinek <jakub@redhat.com>
10591 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
10592 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
10595 2020-03-09 Jason Merrill <jason@redhat.com>
10597 * gdbinit.in (pgs): Fix typo in documentation.
10599 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
10603 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
10605 PR rtl-optimization/93564
10606 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
10607 do not honor reg alloc order.
10609 2020-03-09 Andrew Pinski <apinski@marvell.com>
10611 PR inline-asm/94095
10612 * doc/extend.texi (x86 Operand Modifiers): Fix column
10615 2020-03-09 Martin Liska <mliska@suse.cz>
10618 * config/rs6000/rs6000.c (rs6000_option_override_internal):
10619 Remove set of str_align_loops and str_align_jumps as these
10620 should be set in previous 2 conditions in the function.
10622 2020-03-09 Jakub Jelinek <jakub@redhat.com>
10624 PR rtl-optimization/94045
10625 * params.opt (-param=max-find-base-term-values=): New option.
10626 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
10627 in a single toplevel find_base_term call.
10629 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
10632 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
10633 * config/aarch64/aarch64-simd.md
10634 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
10635 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
10636 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
10637 * config/aarch64/arm_neon.h:
10638 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
10639 (vmlal_lane_u16): Likewise.
10640 (vmlal_lane_s32): Likewise.
10641 (vmlal_lane_u32): Likewise.
10642 (vmlal_laneq_s16): Likewise.
10643 (vmlal_laneq_u16): Likewise.
10644 (vmlal_laneq_s32): Likewise.
10645 (vmlal_laneq_u32): Likewise.
10646 (vmull_lane_s16): Likewise.
10647 (vmull_lane_u16): Likewise.
10648 (vmull_lane_s32): Likewise.
10649 (vmull_lane_u32): Likewise.
10650 (vmull_laneq_s16): Likewise.
10651 (vmull_laneq_u16): Likewise.
10652 (vmull_laneq_s32): Likewise.
10653 (vmull_laneq_u32): Likewise.
10654 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
10657 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
10659 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
10660 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
10661 (aarch64_mls_elt<mode>): Likewise.
10662 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
10663 (aarch64_fma4_elt<mode>): Likewise.
10664 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
10665 (aarch64_fma4_elt_to_64v2df): Likewise.
10666 (aarch64_fnma4_elt<mode>): Likewise.
10667 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
10668 (aarch64_fnma4_elt_to_64v2df): Likewise.
10670 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10672 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
10673 Specify movprfx attribute.
10674 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
10676 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
10679 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
10681 (TARGET_NO_FP_IN_TOC): Same.
10682 * config/rs6000/aix71.h: Same.
10683 * config/rs6000/aix72.h: Same.
10685 2020-03-06 Andrew Pinski <apinski@marvell.com>
10686 Jeff Law <law@redhat.com>
10688 PR rtl-optimization/93996
10689 * haifa-sched.c (remove_notes): Be more careful when adding
10692 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10694 * config/arm/arm_neon.h (vld2_bf16): New.
10700 (vld2_dup_bf16): New.
10701 (vld2q_dup_bf16): New.
10702 (vld3_dup_bf16): New.
10703 (vld3q_dup_bf16): New.
10704 (vld4_dup_bf16): New.
10705 (vld4q_dup_bf16): New.
10706 * config/arm/arm_neon_builtins.def
10707 (vld2): Changed to VAR13 and added v4bf, v8bf
10708 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
10709 (vld3): Changed to VAR13 and added v4bf, v8bf
10710 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
10711 (vld4): Changed to VAR13 and added v4bf, v8bf
10712 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
10713 * config/arm/iterators.md (VDXBF2): New iterator.
10714 *config/arm/neon.md (neon_vld2): Use new iterators.
10715 (neon_vld2_dup<mode): Use new iterators.
10716 (neon_vld3<mode>): Likewise.
10717 (neon_vld3qa<mode>): Likewise.
10718 (neon_vld3qb<mode>): Likewise.
10719 (neon_vld3_dup<mode>): Likewise.
10720 (neon_vld4<mode>): Likewise.
10721 (neon_vld4qa<mode>): Likewise.
10722 (neon_vld4qb<mode>): Likewise.
10723 (neon_vld4_dup<mode>): Likewise.
10724 (neon_vld2_dupv8bf): New.
10725 (neon_vld3_dupv8bf): Likewise.
10726 (neon_vld4_dupv8bf): Likewise.
10728 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10730 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
10731 (bfloat16x8x2_t): New typedef.
10732 (bfloat16x4x3_t): New typedef.
10733 (bfloat16x8x3_t): New typedef.
10734 (bfloat16x4x4_t): New typedef.
10735 (bfloat16x8x4_t): New typedef.
10742 * config/arm/arm-builtins.c (v2bf_UP): Define.
10744 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
10745 * config/arm/arm-modes.def (V2BF): New mode.
10746 * config/arm/arm-simd-builtin-types.def
10747 (Bfloat16x2_t): New entry.
10748 * config/arm/arm_neon_builtins.def
10749 (vst2): Changed to VAR13 and added v4bf, v8bf
10750 (vst3): Changed to VAR13 and added v4bf, v8bf
10751 (vst4): Changed to VAR13 and added v4bf, v8bf
10752 * config/arm/iterators.md (VDXBF): New iterator.
10753 (VQ2BF): New iterator.
10754 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
10755 (neon_vst2<mode>): Used new iterators.
10756 (neon_vst3<mode>): Used new iterators.
10757 (neon_vst3<mode>): Used new iterators.
10758 (neon_vst3qa<mode>): Used new iterators.
10759 (neon_vst3qb<mode>): Used new iterators.
10760 (neon_vst4<mode>): Used new iterators.
10761 (neon_vst4<mode>): Used new iterators.
10762 (neon_vst4qa<mode>): Used new iterators.
10763 (neon_vst4qb<mode>): Used new iterators.
10765 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10767 * config/aarch64/aarch64-simd-builtins.def
10768 (bfcvtn): New built-in function.
10769 (bfcvtn_q): New built-in function.
10770 (bfcvtn2): New built-in function.
10771 (bfcvt): New built-in function.
10772 * config/aarch64/aarch64-simd.md
10773 (aarch64_bfcvtn<q><mode>): New pattern.
10774 (aarch64_bfcvtn2v8bf): New pattern.
10775 (aarch64_bfcvtbf): New pattern.
10776 * config/aarch64/arm_bf16.h (float32_t): New typedef.
10777 (vcvth_bf16_f32): New intrinsic.
10778 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
10779 (vcvtq_low_bf16_f32): New intrinsic.
10780 (vcvtq_high_bf16_f32): New intrinsic.
10781 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
10782 (UNSPEC_BFCVTN): New UNSPEC.
10783 (UNSPEC_BFCVTN2): New UNSPEC.
10784 (UNSPEC_BFCVT): New UNSPEC.
10785 * config/arm/types.md (bf_cvt): New type.
10787 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
10789 * config/s390/s390.md ("tabort"): Get rid of two consecutive
10790 blanks in format string.
10792 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
10796 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
10797 * config/i386/i386.c (ix86_get_ssemov): New function.
10798 (ix86_output_ssemov): Likewise.
10799 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
10800 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
10802 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
10803 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
10804 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
10805 (*movti_internal): Likewise.
10806 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
10808 2020-03-05 Jeff Law <law@redhat.com>
10810 PR tree-optimization/91890
10811 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
10812 Use gimple_or_expr_nonartificial_location.
10813 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
10814 Use gimple_or_expr_nonartificial_location.
10815 * gimple.c (gimple_or_expr_nonartificial_location): New function.
10816 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
10817 * tree-ssa-strlen.c (maybe_warn_overflow): Use
10818 gimple_or_expr_nonartificial_location.
10819 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
10820 (maybe_warn_pointless_strcmp): Likewise.
10822 2020-03-05 Jakub Jelinek <jakub@redhat.com>
10825 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
10826 SRC and MASK arguments to __m128 from __m128d.
10827 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
10829 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
10831 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
10832 argument to __m128i from __m128d.
10833 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
10835 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
10836 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
10839 2020-03-05 Delia Burduv <delia.burduv@arm.com>
10841 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
10842 (vbfmlalbq_f32): New.
10843 (vbfmlaltq_f32): New.
10844 (vbfmlalbq_lane_f32): New.
10845 (vbfmlaltq_lane_f32): New.
10846 (vbfmlalbq_laneq_f32): New.
10847 (vbfmlaltq_laneq_f32): New.
10848 * config/arm/arm_neon_builtins.def (vmmla): New.
10853 (vfmab_laneq): New.
10854 (vfmat_laneq): New.
10855 * config/arm/iterators.md (BF_MA): New int iterator.
10856 (bt): New int attribute.
10857 (VQXBF): Copy of VQX with V8BF.
10858 * config/arm/neon.md (neon_vmmlav8bf): New insn.
10859 (neon_vfma<bt>v8bf): New insn.
10860 (neon_vfma<bt>_lanev8bf): New insn.
10861 (neon_vfma<bt>_laneqv8bf): New expand.
10862 (neon_vget_high<mode>): Changed iterator to VQXBF.
10863 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
10864 (UNSPEC_BFMAB): New UNSPEC.
10865 (UNSPEC_BFMAT): New UNSPEC.
10867 2020-03-05 Jakub Jelinek <jakub@redhat.com>
10869 PR middle-end/93399
10870 * tree-pretty-print.h (pretty_print_string): Declare.
10871 * tree-pretty-print.c (pretty_print_string): Remove forward
10872 declaration, no longer static. Change nbytes parameter type
10873 from unsigned to size_t.
10874 * print-rtl.c (print_value) <case CONST_STRING>: Use
10875 pretty_print_string and for shrink way too long strings.
10877 2020-03-05 Richard Biener <rguenther@suse.de>
10878 Jakub Jelinek <jakub@redhat.com>
10880 PR tree-optimization/93582
10881 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
10882 last operand as signed when looking for memset offset. Formatting
10885 2020-03-04 Andrew Pinski <apinski@marvell.com>
10888 * value-prof.c (dump_histogram_value): Use std::abs.
10890 2020-03-04 Martin Sebor <msebor@redhat.com>
10892 PR tree-optimization/93986
10893 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
10894 operands to the same precision widest_int to avoid ICEs.
10896 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
10899 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
10900 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
10901 for OPTION_MASK_ALTIVEC.
10903 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
10905 * config.gcc: Include the glibc-stdint.h header for zTPF.
10907 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
10909 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
10910 direct FPR-GPR copies.
10911 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
10914 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
10916 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
10917 operands to the prologue_tpf expander.
10918 (s390_emit_epilogue): Likewise.
10919 (s390_option_override_internal): Do error checking and setup for
10921 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
10922 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
10923 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
10924 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
10925 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
10926 operands for the check flag and the branch target.
10927 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
10928 ("mtpf-trace-hook-prologue-target")
10929 ("mtpf-trace-hook-epilogue-check")
10930 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
10932 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
10933 options are for debugging purposes and will not be documented
10936 2020-03-04 Jakub Jelinek <jakub@redhat.com>
10939 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
10941 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
10942 argument. Change pd argument so that it can be modified. Turn
10943 constant non-CONSTRUCTOR store into non-constant if it is too large.
10944 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
10946 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
10949 2020-02-04 Richard Biener <rguenther@suse.de>
10951 PR tree-optimization/93964
10952 * graphite-isl-ast-to-gimple.c
10953 (gcc_expression_from_isl_ast_expr_id): Add intermediate
10954 conversion for pointer to integer converts.
10955 * graphite-scop-detection.c (assign_parameter_index_in_region):
10958 2020-03-04 Martin Liska <mliska@suse.cz>
10962 * doc/invoke.texi: Clarify --help=language and --help=common
10965 2020-03-04 Jakub Jelinek <jakub@redhat.com>
10967 PR tree-optimization/94001
10968 * tree-tailcall.c (process_assignment): Before comparing op1 to
10969 *ass_var, verify *ass_var is non-NULL.
10971 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
10974 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
10977 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
10979 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
10980 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
10981 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
10982 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
10983 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
10984 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
10985 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
10986 (V_bf_low, V_bf_cvt_m): New mode attributes.
10987 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
10988 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
10989 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
10990 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
10991 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
10993 2020-03-03 Jakub Jelinek <jakub@redhat.com>
10995 PR tree-optimization/93582
10996 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
10997 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
10998 members, initialize them in the constructor and if mask is non-NULL,
10999 artificially push_partial_def {} for the portions of the mask that
11001 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
11002 val and return (void *)-1. Formatting fix.
11003 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
11005 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
11006 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
11008 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
11010 (visit_stmt): Formatting fix.
11012 2020-03-03 Richard Biener <rguenther@suse.de>
11014 PR tree-optimization/93946
11015 * alias.h (refs_same_for_tbaa_p): Declare.
11016 * alias.c (refs_same_for_tbaa_p): New function.
11017 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
11019 * tree-ssa-scopedtables.h
11020 (avail_exprs_stack::lookup_avail_expr): Add output argument
11021 giving access to the hashtable entry.
11022 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
11024 * tree-ssa-dom.c: Include alias.h.
11025 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
11026 removing redundant store.
11027 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
11028 (ao_ref_init_from_vn_reference): Adjust prototype.
11029 (vn_reference_lookup_pieces): Likewise.
11030 (vn_reference_insert_pieces): Likewise.
11031 * tree-ssa-sccvn.c: Track base alias set in addition to alias
11033 (eliminate_dom_walker::eliminate_stmt): Also check base alias
11034 set when removing redundant stores.
11035 (visit_reference_op_store): Likewise.
11036 * dse.c (record_store): Adjust valdity check for redundant
11039 2020-03-03 Jakub Jelinek <jakub@redhat.com>
11042 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
11044 PR rtl-optimization/94002
11045 * explow.c (plus_constant): Punt if cst has VOIDmode and
11046 get_pool_mode is different from mode.
11048 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11050 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
11051 address has an offset which fits the scalling constraint for a
11052 load/store operation.
11053 (legitimate_scaled_address_p): Update use
11054 leigitimate_small_data_address_p.
11055 (arc_print_operand): Likewise.
11056 (arc_legitimate_address_p): Likewise.
11057 (legitimate_small_data_address_p): Likewise.
11059 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11061 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
11062 (fnmasf4_fpu): Likewise.
11064 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11066 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
11068 (subdi3): Likewise.
11069 (adddi3_i): Remove pattern.
11070 (subdi3_i): Likewise.
11072 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11074 * config/arc/arc.md (eh_return): Add length info.
11076 2020-03-02 David Malcolm <dmalcolm@redhat.com>
11078 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
11080 2020-03-02 David Malcolm <dmalcolm@redhat.com>
11082 * doc/invoke.texi (Static Analyzer Options): Add
11083 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
11086 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
11089 * config/i386/i386.md (movstrict<mode>): Allow only
11090 registers with VALID_INT_MODE_P modes.
11092 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
11094 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
11095 (reduc_insn): Use 'U' and 'B' operand codes.
11096 (reduc_<reduc_op>_scal_<mode>): Allow all types.
11097 (reduc_<reduc_op>_scal_v64di): Delete.
11098 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
11099 (*plus_carry_dpp_shr_v64si): Change to ...
11100 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
11101 (mov_from_lane63_v64di): Change to ...
11102 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
11103 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
11104 Support UNSPEC_MOV_DPP_SHR output formats.
11105 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
11106 Add "use_extends" reductions.
11107 (print_operand_address): Add 'I' and 'U' codes.
11108 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
11110 2020-03-02 Martin Liska <mliska@suse.cz>
11112 * lto-wrapper.c: Fix typo in comment about
11113 C++ standard version.
11115 2020-03-01 Martin Sebor <msebor@redhat.com>
11118 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
11120 2020-03-01 Martin Sebor <msebor@redhat.com>
11122 PR middle-end/93829
11123 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
11124 of a pointer in the outermost ADDR_EXPRs.
11126 2020-02-28 Jeff Law <law@redhat.com>
11128 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
11129 * config/v850/v850.c (v850_asm_trampoline_template): Update
11132 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
11135 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
11138 2020-02-28 Martin Liska <mliska@suse.cz>
11141 * configure.ac: Improve detection of ld_date by requiring
11142 either two dashes or none.
11143 * configure: Regenerate.
11145 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
11147 PR rtl-optimization/93564
11148 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
11149 do not honor reg alloc order.
11151 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
11154 * config/aarch64/aarch64.c (aarch64_override_options): Fix
11155 misleading warning string.
11157 2020-02-27 Martin Sebor <msebor@redhat.com>
11159 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
11161 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
11164 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
11165 Split the insn into two parts. This insn only does variable
11166 extract from a register.
11167 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
11168 variable extract from memory.
11169 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
11170 only does variable extract from a register.
11171 (vsx_extract_v4sf_var_load): New insn, do variable extract from
11173 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
11174 into two parts. This insn only does variable extract from a
11176 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
11177 do variable extract from memory.
11179 2020-02-27 Martin Jambor <mjambor@suse.cz>
11180 Feng Xue <fxue@os.amperecomputing.com>
11183 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
11184 new function calls_same_node_or_its_all_contexts_clone_p.
11185 (cgraph_edge_brings_value_p): Use it.
11186 (cgraph_edge_brings_value_p): Likewise.
11187 (self_recursive_pass_through_p): Return false if caller is a clone.
11188 (self_recursive_agg_pass_through_p): Likewise.
11190 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
11192 PR middle-end/92152
11193 * alias.c (ends_tbaa_access_path_p): Break out from ...
11194 (component_uses_parent_alias_set_from): ... here.
11195 * alias.h (ends_tbaa_access_path_p): Declare.
11196 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
11197 handle trailing arrays past end of tbaa access path.
11198 (aliasing_component_refs_p): ... here; likewise.
11199 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
11200 path; disambiguate also past end of it.
11201 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
11204 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
11206 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
11207 beginning of the file.
11208 (vcreate_bf16, vcombine_bf16): New.
11209 (vdup_n_bf16, vdupq_n_bf16): New.
11210 (vdup_lane_bf16, vdup_laneq_bf16): New.
11211 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11212 (vduph_lane_bf16, vduph_laneq_bf16): New.
11213 (vset_lane_bf16, vsetq_lane_bf16): New.
11214 (vget_lane_bf16, vgetq_lane_bf16): New.
11215 (vget_high_bf16, vget_low_bf16): New.
11216 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11217 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11218 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11219 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11220 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11221 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11222 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11223 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11224 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11225 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11226 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
11227 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11228 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11229 (vreinterpretq_bf16_p128): New.
11230 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11231 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11232 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11233 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11234 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11235 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11236 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11237 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11238 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11239 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11240 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11241 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11242 (vreinterpretq_p128_bf16): New.
11243 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
11244 (V_elem): Likewise.
11245 (V_elem_l): Likewise.
11246 (VD_LANE): Likewise.
11248 (V_DOUBLE): Likewise.
11249 (VDQX): Add V4BF and V8BF.
11250 (V_two_elem, V_three_elem, V_four_elem): Likewise.
11252 (V_HALF): Likewise.
11253 (V_double_vector_mode): Likewise.
11254 (V_cmp_result): Likewise.
11255 (V_uf_sclr): Likewise.
11256 (V_sz_elem): Likewise.
11257 (Is_d_reg): Likewise.
11258 (V_mode_nunits): Likewise.
11259 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
11261 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
11263 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
11264 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
11265 (<expander><mode>3<exec>): Likewise.
11266 (<expander><mode>3): New.
11267 (v<expander><mode>3): New.
11268 (<expander><mode>3): New.
11269 (<expander><mode>3<exec>): Rename to ...
11270 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
11271 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
11273 2020-02-27 Alexandre Oliva <oliva@adacore.com>
11275 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
11278 2020-02-27 Richard Biener <rguenther@suse.de>
11280 PR tree-optimization/93508
11281 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
11282 non-_CHK variants. Valueize their length arguments.
11284 2020-02-27 Richard Biener <rguenther@suse.de>
11286 PR tree-optimization/93953
11287 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
11288 to the hash-map entry.
11290 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
11292 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
11294 2020-02-27 Mark Williams <mwilliams@fb.com>
11296 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
11297 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
11298 -ffile-prefix-map and -fmacro-prefix-map.
11299 * lto-streamer-out.c: Include file-prefix-map.h.
11300 (lto_output_location): Remap the file part of locations.
11302 2020-02-27 Jakub Jelinek <jakub@redhat.com>
11305 * gimplify.c (gimplify_init_constructor): Don't promote readonly
11306 DECL_REGISTER variables to TREE_STATIC.
11308 PR tree-optimization/93582
11309 PR tree-optimization/93945
11310 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
11311 non-zero INTEGER_CST second argument and ref->offset or ref->size
11312 not a multiple of BITS_PER_UNIT.
11314 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
11316 * doc/install.texi (Binaries): Update description of BullFreeware.
11318 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
11322 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
11323 C++ Language Options, Warning Options, and Static Analyzer
11324 Options lists. Document negative form of options enabled by
11325 default. Move some things around to more accurately sort
11326 warnings by category.
11327 (C++ Dialect Options, Warning Options, Static Analyzer
11328 Options): Document negative form of options when enabled by
11329 default. Move some things around to more accurately sort
11330 warnings by category. Add some missing index entries.
11331 Light copy-editing.
11333 2020-02-26 Carl Love <cel@us.ibm.com>
11336 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
11337 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
11338 for the vector unsigned short arguments. It is also listed as the
11339 name of the built-in for arguments vector unsigned short,
11340 vector unsigned int and vector unsigned long long built-ins. The
11341 name of the builtins for these arguments should be:
11342 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
11343 __builtin_crypto_vpmsumd respectively.
11345 2020-02-26 Richard Biener <rguenther@suse.de>
11347 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
11348 and load permutation.
11350 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
11352 PR middle-end/93843
11353 * optabs-tree.c (supportable_convert_operation): Reject types with
11356 2020-02-26 David Malcolm <dmalcolm@redhat.com>
11358 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
11360 2020-02-26 Jakub Jelinek <jakub@redhat.com>
11362 PR tree-optimization/93820
11363 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
11364 argument to ALL_INTEGER_CST_P boolean.
11365 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
11366 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
11367 adjacent INTEGER_CST store into merged_store->only_constants like
11370 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11373 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
11375 * cfghooks.c (verify_flow_info): Likewise.
11376 * predict.c (combine_predictions_for_bb): Likewise.
11377 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
11378 sucessor -> successor.
11379 (find_traces_1_round): Fix comment typo, destinarion -> destination.
11380 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
11382 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
11383 message typo, sucessors -> successors.
11385 2020-02-25 Martin Sebor <msebor@redhat.com>
11387 * doc/extend.texi (attribute access): Correct an example.
11389 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
11391 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
11393 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
11394 (VAR15, VAR16): New.
11395 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
11396 (VD): Enable for V4BF.
11398 (VQ): Enable for V8BF.
11400 (VQ_NO2E): Likewise.
11401 (VDBL, Vdbl): Add V4BF.
11402 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
11403 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
11404 (bfloat16x8x2_t): Likewise.
11405 (bfloat16x4x3_t): Likewise.
11406 (bfloat16x8x3_t): Likewise.
11407 (bfloat16x4x4_t): Likewise.
11408 (bfloat16x8x4_t): Likewise.
11409 (vcombine_bf16): New.
11410 (vld1_bf16, vld1_bf16_x2): New.
11411 (vld1_bf16_x3, vld1_bf16_x4): New.
11412 (vld1q_bf16, vld1q_bf16_x2): New.
11413 (vld1q_bf16_x3, vld1q_bf16_x4): New.
11414 (vld1_lane_bf16): New.
11415 (vld1q_lane_bf16): New.
11416 (vld1_dup_bf16): New.
11417 (vld1q_dup_bf16): New.
11420 (vld2_dup_bf16): New.
11421 (vld2q_dup_bf16): New.
11424 (vld3_dup_bf16): New.
11425 (vld3q_dup_bf16): New.
11428 (vld4_dup_bf16): New.
11429 (vld4q_dup_bf16): New.
11430 (vst1_bf16, vst1_bf16_x2): New.
11431 (vst1_bf16_x3, vst1_bf16_x4): New.
11432 (vst1q_bf16, vst1q_bf16_x2): New.
11433 (vst1q_bf16_x3, vst1q_bf16_x4): New.
11434 (vst1_lane_bf16): New.
11435 (vst1q_lane_bf16): New.
11443 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
11445 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
11446 (VALL_F16): Likewise.
11447 (VALLDI_F16): Likewise.
11449 (Vetype): Likewise.
11450 (vswap_width_name): Likewise.
11451 (VSWAP_WIDTH): Likewise.
11455 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
11456 (vget_lane_bf16, vgetq_lane_bf16): New.
11457 (vcreate_bf16): New.
11458 (vdup_n_bf16, vdupq_n_bf16): New.
11459 (vdup_lane_bf16, vdup_laneq_bf16): New.
11460 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11461 (vduph_lane_bf16, vduph_laneq_bf16): New.
11462 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11463 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11464 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11465 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11466 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11467 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11468 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11469 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11470 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11471 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11472 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
11473 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
11474 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11475 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11476 (vreinterpretq_bf16_p128): New.
11477 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11478 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11479 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11480 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11481 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11482 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11483 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11484 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11485 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11486 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11487 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11488 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11489 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
11490 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
11491 (vreinterpretq_p128_bf16): New.
11493 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
11495 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
11496 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
11497 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
11498 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
11499 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
11500 * config/arm/iterators.md (VSF2BF): New attribute.
11501 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
11502 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
11503 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
11505 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
11507 * config/arm/arm.md (required_for_purecode): New attribute.
11508 (enabled): Handle required_for_purecode.
11509 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
11510 work with -mpure-code.
11512 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11514 PR rtl-optimization/93908
11515 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
11518 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
11520 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
11522 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
11524 * doc/install.texi (--enable-checking): Adjust wording.
11526 2020-02-25 Richard Biener <rguenther@suse.de>
11528 PR tree-optimization/93868
11529 * tree-vect-slp.c (slp_copy_subtree): New function.
11530 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
11531 re-arranging stmts in it.
11533 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11535 PR middle-end/93874
11536 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
11537 dummy function and remove it at the end.
11539 PR translation/93864
11540 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
11541 paramter -> parameter.
11542 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
11543 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
11545 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
11547 * doc/install.texi (--enable-checking): Properly document current
11549 (--enable-stage1-checking): Minor clarification about bootstrap.
11551 2020-02-24 David Malcolm <dmalcolm@redhat.com>
11554 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
11555 -fanalyzer-checker=taint is also required.
11556 (-fanalyzer-checker=): Note that providing this option enables the
11557 given checker, and doing so may be required for checkers that are
11558 disabled by default.
11560 2020-02-24 David Malcolm <dmalcolm@redhat.com>
11562 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
11563 significant control flow events; add a "3" which shows all
11564 control flow events; the old "3" becomes "4".
11566 2020-02-24 Jakub Jelinek <jakub@redhat.com>
11568 PR tree-optimization/93582
11569 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
11570 pd.offset and pd.size to be counted in bits rather than bytes, add
11571 support for maxsizei that is not a multiple of BITS_PER_UNIT and
11572 handle bitfield stores and loads.
11573 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
11574 uncomparable quantities - bytes vs. bits. Allow push_partial_def
11575 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
11576 pd.offset/pd.size to be counted in bits rather than bytes.
11577 Formatting fix. Rename shadowed len variable to buflen.
11579 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
11580 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
11583 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
11584 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
11585 * opts-common.c (parse_options_from_collect_gcc_options): New function.
11586 (prepend_xassembler_to_collect_as_options): Likewise.
11587 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
11588 (prepend_xassembler_to_collect_as_options): Likewise.
11589 * lto-opts.c (lto_write_options): Stream assembler options
11590 in COLLECT_AS_OPTIONS.
11591 * lto-wrapper.c (xassembler_options_error): New static variable.
11592 (get_options_from_collect_gcc_options): Move parsing options code to
11593 parse_options_from_collect_gcc_options and call it.
11594 (merge_and_complain): Validate -Xassembler options.
11595 (append_compiler_options): Handle OPT_Xassembler.
11596 (run_gcc): Append command line -Xassembler options to
11597 collect_gcc_options.
11598 * doc/invoke.texi: Add documentation about using Xassembler
11601 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
11603 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
11605 (riscv_rtx_costs): Update cost model for LTGT.
11607 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
11609 PR rtl-optimization/93564
11610 * ira-color.c (struct update_cost_queue_elem): New member start.
11611 (queue_update_cost, get_next_update_cost): Add new arg start.
11612 (allocnos_conflict_p): New function.
11613 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
11614 Add checking conflicts with allocnos_conflict_p.
11615 (update_costs_from_prefs, restore_costs_from_copies): Adjust
11616 update_costs_from_allocno calls.
11617 (update_conflict_hard_regno_costs): Add checking conflicts with
11618 allocnos_conflict_p. Adjust calls of queue_update_cost and
11619 get_next_update_cost.
11620 (assign_hard_reg): Adjust calls of queue_update_cost. Add
11622 (bucket_allocno_compare_func): Restore previous version.
11624 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
11626 * gcc/config/pa/pa.c (pa_function_value): Fix check for word and
11627 double-word size when handling aggregate return values.
11628 * gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
11629 that homogeneous SFmode and DFmode aggregates are passed and returned
11630 in general registers.
11632 2020-02-21 Jakub Jelinek <jakub@redhat.com>
11634 PR translation/93759
11635 * opts.c (print_filtered_help): Translate help before appending
11636 messages to it rather than after that.
11638 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
11640 PR rtl-optimization/PR92989
11641 * lra-lives.c (process_bb_lives): Restore the original order
11642 of the bb liveness update. Call make_hard_regno_dead for each
11643 register clobbered at the start of an EH receiver.
11645 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
11648 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
11649 self-recursively generated.
11651 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
11654 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
11657 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
11659 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
11660 Document new target supports option.
11662 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
11664 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
11665 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
11666 * config/arm/iterators.md (MATMUL): New iterator.
11667 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
11668 (mmla_sfx): New attribute.
11669 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
11670 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
11671 (UNSPEC_MATMUL_US): New.
11673 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
11675 * config/arm/arm.md: Prevent scalar shifts from being used when big
11678 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
11679 Richard Biener <rguenther@suse.de>
11681 PR tree-optimization/93586
11682 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
11683 after mismatched array refs; do not sure type size information to
11684 recover from unmatched referneces with !flag_strict_aliasing_p.
11686 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11688 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
11689 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
11690 (scatter_store<mode>): Rename to ...
11691 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
11692 (scatter<mode>_exec): Delete. Move contents ...
11693 (mask_scatter_store<mode>): ... here, and rename that to ...
11694 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
11695 Remove mode conversion.
11696 (mask_gather_load<mode>): Rename to ...
11697 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
11698 Remove mode conversion.
11699 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
11701 2020-02-21 Martin Jambor <mjambor@suse.cz>
11703 PR tree-optimization/93845
11704 * tree-sra.c (verify_sra_access_forest): Only test access size of
11707 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11709 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
11710 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
11711 (addv64di3_exec): Likewise.
11712 (subv64di3): Likewise.
11713 (subv64di3_exec): Likewise.
11714 (addv64di3_zext): Likewise.
11715 (addv64di3_zext_exec): Likewise.
11716 (addv64di3_zext_dup): Likewise.
11717 (addv64di3_zext_dup_exec): Likewise.
11718 (addv64di3_zext_dup2): Likewise.
11719 (addv64di3_zext_dup2_exec): Likewise.
11720 (addv64di3_sext_dup2): Likewise.
11721 (addv64di3_sext_dup2_exec): Likewise.
11722 (<expander>v64di3): Likewise.
11723 (<expander>v64di3_exec): Likewise.
11724 (*<reduc_op>_dpp_shr_v64di): Likewise.
11725 (*plus_carry_dpp_shr_v64di): Likewise.
11726 * config/gcn/gcn.md (adddi3): Likewise.
11727 (addptrdi3): Likewise.
11728 (<expander>di3): Likewise.
11730 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11732 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
11734 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11736 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
11737 support. Use aarch64_emit_mult instead of emitting multiplication
11738 instructions directly.
11739 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
11740 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
11742 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11744 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
11745 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
11746 instead of emitting multiplication instructions directly.
11747 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
11748 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
11749 (@aarch64_frecps<mode>): New expanders.
11751 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11753 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
11754 on and produce uint64_ts rather than ints.
11755 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
11756 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
11758 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11760 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
11761 an unused xmsk register when handling approximate rsqrt.
11763 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11765 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
11766 flag_finite_math_only condition.
11768 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
11771 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
11772 to destination operand for shufps alternative.
11773 (*vec_extractv2si_1): Ditto.
11775 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
11778 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
11781 2020-02-20 Martin Liska <mliska@suse.cz>
11783 PR translation/93831
11784 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
11786 2020-02-20 Martin Liska <mliska@suse.cz>
11788 PR translation/93830
11789 * common/config/avr/avr-common.c: Remote trailing "|".
11791 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
11793 * collect2.c (maybe_run_lto_and_relink): Fix typo in
11796 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
11798 PR tree-optimization/93767
11799 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
11800 access-size bias from the offset calculations for negative strides.
11802 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
11804 * collect2.c (c_file, o_file): Make const again.
11805 (ldout,lderrout, dump_ld_file): Remove.
11806 (tool_cleanup): Avoid calling not signal-safe functions.
11807 (maybe_run_lto_and_relink): Avoid possible signal handler
11808 access to unintialzed memory (lto_o_files).
11809 (main): Avoid leaking temp files in $TMPDIR.
11810 Initialize c_file/o_file with concat, which avoids exposing
11811 uninitialized memory to signal handler, which calls unlink(!).
11812 Avoid calling maybe_unlink when the main function returns,
11813 since the atexit handler is already doing this.
11814 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
11816 2020-02-19 Martin Jambor <mjambor@suse.cz>
11818 PR tree-optimization/93776
11819 * tree-sra.c (create_access): Do not create zero size accesses.
11820 (get_access_for_expr): Do not search for zero sized accesses.
11822 2020-02-19 Martin Jambor <mjambor@suse.cz>
11824 PR tree-optimization/93667
11825 * tree-sra.c (scalarizable_type_p): Return false if record fields
11826 do not follow wach other.
11828 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
11830 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
11831 rather than fmv.x.s/fmv.s.x.
11833 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
11835 * config/aarch64/aarch64-simd-builtins.def
11836 (intrinsic_vec_smult_lo_): New.
11837 (intrinsic_vec_umult_lo_): Likewise.
11838 (vec_widen_smult_hi_): Likewise.
11839 (vec_widen_umult_hi_): Likewise.
11840 * config/aarch64/aarch64-simd.md
11841 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
11842 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
11843 (vmull_high_s16): Likewise.
11844 (vmull_high_s32): Likewise.
11845 (vmull_high_u8): Likewise.
11846 (vmull_high_u16): Likewise.
11847 (vmull_high_u32): Likewise.
11848 (vmull_s8): Likewise.
11849 (vmull_s16): Likewise.
11850 (vmull_s32): Likewise.
11851 (vmull_u8): Likewise.
11852 (vmull_u16): Likewise.
11853 (vmull_u32): Likewise.
11855 2020-02-18 Martin Liska <mliska@suse.cz>
11857 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
11858 bootstrap by missing removal of invalid sanity check.
11860 2020-02-18 Martin Liska <mliska@suse.cz>
11863 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
11864 Always compare LHS of gimple_assign.
11866 2020-02-18 Martin Liska <mliska@suse.cz>
11869 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
11870 and return type of functions.
11871 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
11872 Drop MALLOC attribute for void functions.
11873 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
11874 malloc_state for a new VOID clone.
11876 2020-02-18 Martin Liska <mliska@suse.cz>
11879 * common.opt: Add -fprofile-reproducibility.
11880 * doc/invoke.texi: Document it.
11881 * value-prof.c (dump_histogram_value):
11882 Document and support behavior for counters[0]
11883 being a negative value.
11884 (get_nth_most_common_value): Handle negative
11885 counters[0] in respect to flag_profile_reproducible.
11887 2020-02-18 Jakub Jelinek <jakub@redhat.com>
11890 * cgraph.c (verify_speculative_call): Use speculative_id instead of
11891 speculative_uid in messages. Remove trailing whitespace from error
11892 message. Use num_speculative_call_targets instead of
11893 num_speculative_targets in a message.
11894 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
11895 edge messages and stmt instead of cal_stmt in reference message.
11897 PR tree-optimization/93780
11898 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
11899 before calling build_vector_type.
11900 (execute_update_addresses_taken): Likewise.
11903 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
11904 typo, functoin -> function.
11905 * tree.c (free_lang_data_in_decl): Fix comment typo,
11906 functoin -> function.
11907 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
11909 2020-02-17 David Malcolm <dmalcolm@redhat.com>
11911 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
11913 (print_option_information): Don't call get_option_url if URLs
11916 2020-02-17 Alexandre Oliva <oliva@adacore.com>
11918 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
11919 handling of register_common-less targets.
11921 2020-02-17 Martin Liska <mliska@suse.cz>
11924 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
11926 2020-02-17 Martin Liska <mliska@suse.cz>
11928 PR translation/93755
11929 * config/rs6000/rs6000.c (rs6000_option_override_internal):
11932 2020-02-17 Martin Liska <mliska@suse.cz>
11935 * config/rx/elf.opt: Fix typo.
11937 2020-02-17 Richard Biener <rguenther@suse.de>
11940 * opts-global.c (print_ignored_options): Use inform and
11943 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
11946 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
11948 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
11951 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
11952 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
11954 2020-02-15 Jason Merrill <jason@redhat.com>
11956 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
11958 2020-02-15 Jakub Jelinek <jakub@redhat.com>
11960 PR tree-optimization/93744
11961 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
11962 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
11963 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
11964 sure @2 in the first and @1 in the other patterns has no side-effects.
11966 2020-02-15 David Malcolm <dmalcolm@redhat.com>
11967 Bernd Edlinger <bernd.edlinger@hotmail.de>
11971 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
11972 * configure.ac (--with-diagnostics-urls): New configuration
11973 option, based on --with-diagnostics-color.
11974 (DIAGNOSTICS_URLS_DEFAULT): New define.
11975 * config.h: Regenerate.
11976 * configure: Regenerate.
11977 * diagnostic.c (diagnostic_urls_init): Handle -1 for
11978 DIAGNOSTICS_URLS_DEFAULT from configure-time
11979 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
11980 and TERM_URLS environment variable.
11981 * diagnostic-url.h (diagnostic_url_format): New enum type.
11982 (diagnostic_urls_enabled_p): rename to...
11983 (determine_url_format): ... this, and change return type.
11984 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
11985 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
11986 the linux console, and mingw.
11987 (diagnostic_urls_enabled_p): rename to...
11988 (determine_url_format): ... this, and adjust.
11989 * pretty-print.h (pretty_printer::show_urls): rename to...
11990 (pretty_printer::url_format): ... this, and change to enum.
11991 * pretty-print.c (pretty_printer::pretty_printer,
11992 pp_begin_url, pp_end_url, test_urls): Adjust.
11993 * doc/install.texi (--with-diagnostics-urls): Document the new
11994 configuration option.
11995 (--with-diagnostics-color): Document the existing interaction
11996 with GCC_COLORS better.
11997 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
11998 vindex reference. Update description of defaults based on the above.
11999 (-fdiagnostics-color): Update description of how -fdiagnostics-color
12000 interacts with GCC_COLORS.
12002 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
12005 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
12006 conjunction with TARGET_GNU_TLS in early return.
12008 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
12010 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
12011 the mode is not wider than UNITS_PER_WORD.
12013 2020-02-14 Martin Jambor <mjambor@suse.cz>
12015 PR tree-optimization/93516
12016 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
12017 access of the same type as the parent.
12018 (propagate_subaccesses_from_lhs): Likewise.
12020 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
12023 * config/i386/avx512vbmi2intrin.h
12024 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
12025 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
12026 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
12027 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
12028 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
12029 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
12030 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
12031 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
12032 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
12033 of lacking a closing parenthesis.
12034 * config/i386/avx512vbmi2vlintrin.h
12035 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
12036 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
12037 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
12038 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
12039 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
12040 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
12041 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
12042 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
12043 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
12044 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
12045 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
12046 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
12047 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
12048 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
12049 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
12050 _mm_shldi_epi32, _mm_mask_shldi_epi32,
12051 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
12052 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
12054 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
12057 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
12058 the target function entry.
12060 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12062 * common/config/arc/arc-common.c (arc_option_optimization_table):
12063 Disable if-conversion step when optimized for size.
12065 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12067 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
12068 R12-R15 are always in ARCOMPACT16_REGS register class.
12069 * config/arc/arc.opt (mq-class): Deprecate.
12070 * config/arc/constraint.md ("q"): Remove dependency on mq-class
12072 * doc/invoke.texi (mq-class): Update text.
12073 * common/config/arc/arc-common.c (arc_option_optimization_table):
12076 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12078 * config/arc/arc.c (arc_insn_cost): New function.
12079 (TARGET_INSN_COST): Define.
12080 * config/arc/arc.md (cost): New attribute.
12081 (add_n): Use arc_nonmemory_operand.
12082 (ashlsi3_insn): Likewise, also update constraints.
12083 (ashrsi3_insn): Likewise.
12084 (rotrsi3): Likewise.
12085 (add_shift): Likewise.
12086 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
12088 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12090 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
12092 (umulsidi_600): Likewise.
12094 2020-02-13 Jakub Jelinek <jakub@redhat.com>
12097 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
12098 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
12099 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
12100 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
12101 pass __A to the builtin followed by __W instead of __A followed by
12103 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
12104 _mm512_mask_popcnt_epi64): Likewise.
12105 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
12106 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
12107 _mm256_mask_popcnt_epi64): Likewise.
12109 PR tree-optimization/93582
12110 * fold-const.h (shift_bytes_in_array_left,
12111 shift_bytes_in_array_right): Declare.
12112 * fold-const.c (shift_bytes_in_array_left,
12113 shift_bytes_in_array_right): New function, moved from
12114 gimple-ssa-store-merging.c, no longer static.
12115 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
12116 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
12117 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
12118 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
12119 shift_bytes_in_array.
12120 (verify_shift_bytes_in_array): Rename to ...
12121 (verify_shift_bytes_in_array_left): ... this. Use
12122 shift_bytes_in_array_left instead of shift_bytes_in_array.
12123 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
12124 instead of verify_shift_bytes_in_array.
12125 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
12126 / native_interpret_expr where the store covers all needed bits,
12127 punt on PDP-endian, otherwise allow all involved offsets and sizes
12128 not to be byte-aligned.
12131 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
12132 use const_0_to_255_operand predicate instead of immediate_operand.
12133 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
12134 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
12135 vgf2p8affineinvqb_<mode><mask_name>,
12136 vgf2p8affineqb_<mode><mask_name>): Drop mode from
12137 const_0_to_255_operand predicated operands.
12139 2020-02-12 Jeff Law <law@redhat.com>
12141 * config/h8300/h8300.md (comparison shortening peepholes): Use
12142 a mode iterator to merge the HImode and SImode peepholes.
12144 2020-02-12 Jakub Jelinek <jakub@redhat.com>
12146 PR middle-end/93663
12147 * real.c (is_even): Make static. Function comment fix.
12148 (is_halfway_below): Make static, don't assert R is not inf/nan,
12149 instead return false for those. Small formatting fixes.
12151 2020-02-12 Martin Sebor <msebor@redhat.com>
12153 PR middle-end/93646
12154 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
12155 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
12156 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
12157 (strlen_check_and_optimize_call): Adjust callee name.
12159 2020-02-12 Jeff Law <law@redhat.com>
12161 * config/h8300/h8300.md (comparison shortening peepholes): Drop
12162 (and (xor)) variant. Combine other two into single peephole.
12164 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
12166 PR rtl-optimization/93565
12167 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
12169 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
12171 * config/aarch64/aarch64-simd.md
12172 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
12173 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
12174 generating separate ADDV and zero_extend patterns.
12175 * config/aarch64/iterators.md (VDQV_E): New iterator.
12177 2020-02-12 Jeff Law <law@redhat.com>
12179 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
12180 expanders, splits, etc.
12181 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
12182 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
12183 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
12184 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
12185 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
12186 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
12187 function prototype.
12188 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
12190 2020-02-12 Jakub Jelinek <jakub@redhat.com>
12193 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
12194 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
12195 TARGET_AVX512DQ from condition.
12196 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
12197 instead of <mask_mode512bit_condition> in condition. If
12198 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
12200 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
12203 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
12206 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
12208 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
12210 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
12211 where strlen is more legible.
12212 (rs6000_builtin_vectorized_libmass): Ditto.
12213 (rs6000_print_options_internal): Ditto.
12215 2020-02-11 Martin Sebor <msebor@redhat.com>
12217 PR tree-optimization/93683
12218 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
12220 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
12222 * config/rs6000/predicates.md (cint34_operand): Rename the
12223 -mprefixed-addr option to be -mprefixed.
12224 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
12225 the -mprefixed-addr option to be -mprefixed.
12226 (OTHER_FUTURE_MASKS): Likewise.
12227 (POWERPC_MASKS): Likewise.
12228 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
12229 the -mprefixed-addr option to be -mprefixed. Change error
12230 messages to refer to -mprefixed.
12231 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
12233 (rs6000_legitimate_offset_address_p): Likewise.
12234 (rs6000_mode_dependent_address): Likewise.
12235 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
12236 "-mprefixed" for target attributes and pragmas.
12237 (address_to_insn_form): Rename the -mprefixed-addr option to be
12239 (rs6000_adjust_insn_length): Likewise.
12240 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
12241 -mprefixed-addr option to be -mprefixed.
12242 (ASM_OUTPUT_OPCODE): Likewise.
12243 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
12244 -mprefixed-addr option to be -mprefixed.
12245 * config/rs6000/rs6000.opt (-mprefixed): Rename the
12246 -mprefixed-addr option to be prefixed. Change the option from
12247 being undocumented to being documented.
12248 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
12249 -mprefixed option. Update the -mpcrel documentation to mention
12252 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
12254 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
12255 including FIRST_PSEUDO_REGISTER - 1.
12256 * ira-color.c (print_hard_reg_set): Ditto.
12258 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12260 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
12261 (USTERNOP_QUALIFIERS): New define.
12262 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
12263 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
12264 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
12265 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
12266 * config/arm/arm_neon.h (vusdot_s32): New.
12267 (vusdot_lane_s32): New.
12268 (vusdotq_lane_s32): New.
12269 (vsudot_lane_s32): New.
12270 (vsudotq_lane_s32): New.
12271 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
12272 * config/arm/iterators.md (DOTPROD_I8MM): New.
12273 (sup, opsuffix): Add <us/su>.
12274 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
12275 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
12277 2020-02-11 Richard Biener <rguenther@suse.de>
12279 PR tree-optimization/93661
12280 PR tree-optimization/93662
12281 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
12282 tree_to_poly_int64.
12283 * tree-sra.c (get_access_for_expr): Likewise.
12285 2020-02-10 Jakub Jelinek <jakub@redhat.com>
12288 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
12289 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
12290 Change condition from TARGET_AVX2 to TARGET_AVX.
12292 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
12295 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
12296 argument of strncmp.
12298 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
12300 Try to generate zero-based comparisons.
12301 * config/cris/cris.c (cris_reduce_compare): New function.
12302 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
12303 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
12304 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
12306 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
12309 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
12310 in Thumb state and also as a destination in Arm state. Add T16
12313 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
12315 * md.texi (Define Subst): Match closing paren in example.
12317 2020-02-10 Jakub Jelinek <jakub@redhat.com>
12321 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
12322 arguments of strncmp.
12324 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
12327 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
12328 but different source value.
12329 (adjust_callers_for_value_intersection): New function.
12330 (gather_edges_for_value): Adjust order of callers to let a
12331 non-self-recursive caller be the first element.
12332 (self_recursive_pass_through_p): Add a new parameter "simple", and
12333 check generalized self-recursive pass-through jump function.
12334 (self_recursive_agg_pass_through_p): Likewise.
12335 (find_more_scalar_values_for_callers_subset): Compute value from
12336 pass-through jump function for self-recursive.
12337 (intersect_with_plats): Cleanup previous implementation code for value
12338 itersection with self-recursive call edge.
12339 (intersect_with_agg_replacements): Likewise.
12340 (intersect_aggregates_with_edge): Deduce value from pass-through jump
12341 function for self-recursive call edge. Cleanup previous implementation
12342 code for value intersection with self-recursive call edge.
12343 (decide_whether_version_node): Remove dead callers and adjust order
12344 to let a non-self-recursive caller be the first element.
12346 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
12348 * recog.c: Move pass_split_before_sched2 code in front of
12349 pass_split_before_regstack.
12350 (pass_data_split_before_sched2): Rename pass to split3 from split4.
12351 (pass_data_split_before_regstack): Rename pass to split4 from split3.
12352 (rest_of_handle_split_before_sched2): Remove.
12353 (pass_split_before_sched2::execute): Unconditionally call
12355 (enable_split_before_sched2): New function.
12356 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
12357 (pass_split_before_regstack::gate): Ditto.
12358 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
12359 Update name check for renamed split4 pass.
12360 * config/sh/sh.c (register_sh_passes): Update pass insertion
12361 point for renamed split4 pass.
12363 2020-02-09 Jakub Jelinek <jakub@redhat.com>
12365 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
12366 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
12367 copying them around between host and target.
12369 2020-02-08 Andrew Pinski <apinski@marvell.com>
12372 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
12373 STRICT_ALIGNMENT also.
12375 2020-02-08 Jim Wilson <jimw@sifive.com>
12378 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
12380 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
12381 Jakub Jelinek <jakub@redhat.com>
12384 * config/i386/i386.h (CALL_USED_REGISTERS): Make
12385 xmm16-xmm31 call-used even in 64-bit ms-abi.
12387 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
12389 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
12390 (simd_ummla, simd_usmmla): Likewise.
12391 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
12392 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
12393 (vusmmlaq_s32): New.
12395 2020-02-07 Richard Biener <rguenther@suse.de>
12397 PR middle-end/93519
12398 * tree-inline.c (fold_marked_statements): Do a PRE walk,
12399 skipping unreachable regions.
12400 (optimize_inline_calls): Skip folding stmts when we didn't
12403 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
12406 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
12407 Don't return aggregates with only SFmode and DFmode in SSE
12409 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
12411 2020-02-07 Jakub Jelinek <jakub@redhat.com>
12414 * config/rs6000/rs6000-logue.c
12415 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
12416 if it fails, move rs into end_addr and retry. Add
12417 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
12418 the insn pattern doesn't describe well what exactly happens to
12422 * config/i386/predicates.md (avx_identity_operand): Remove.
12423 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
12424 (avx_<castmode><avxsizesuffix>_<castmode>,
12425 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
12426 a VEC_CONCAT of the operand and UNSPEC_CAST.
12427 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
12428 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
12432 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
12433 recog_data.insn if distance_non_agu_define changed it.
12435 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
12438 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
12439 we only had X-FORM (reg+reg) addressing for vectors. Also before
12440 ISA 3.0, we only had X-FORM addressing for scalars in the
12441 traditional Altivec registers.
12443 2020-02-06 <zhongyunde@huawei.com>
12444 Vladimir Makarov <vmakarov@redhat.com>
12446 PR rtl-optimization/93561
12447 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
12448 hard register range.
12450 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12452 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
12455 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
12457 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
12458 where the low and the high 32 bits are equal to each other specially,
12459 with an rldimi instruction.
12461 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
12463 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
12465 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
12467 * config/arm/arm-tables.opt: Regenerate.
12469 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12472 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
12473 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
12474 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
12476 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12478 PR rtl-optimization/87763
12479 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
12481 2020-02-06 Delia Burduv <delia.burduv@arm.com>
12483 * config/aarch64/aarch64-simd-builtins.def
12484 (bfmlaq): New built-in function.
12485 (bfmlalb): New built-in function.
12486 (bfmlalt): New built-in function.
12487 (bfmlalb_lane): New built-in function.
12488 (bfmlalt_lane): New built-in function.
12489 * config/aarch64/aarch64-simd.md
12490 (aarch64_bfmmlaqv4sf): New pattern.
12491 (aarch64_bfmlal<bt>v4sf): New pattern.
12492 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
12493 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
12494 (vbfmlalbq_f32): New intrinsic.
12495 (vbfmlaltq_f32): New intrinsic.
12496 (vbfmlalbq_lane_f32): New intrinsic.
12497 (vbfmlaltq_lane_f32): New intrinsic.
12498 (vbfmlalbq_laneq_f32): New intrinsic.
12499 (vbfmlaltq_laneq_f32): New intrinsic.
12500 * config/aarch64/iterators.md (BF_MLA): New int iterator.
12501 (bt): New int attribute.
12503 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
12505 * config/i386/i386.md (*pushtf): Emit "#" instead of
12506 calling gcc_unreachable in insn output.
12509 (*pushsf_rex64): Ditto for alternatives other than 1.
12510 (*pushsf): Ditto for alternatives other than 1.
12512 2020-02-06 Martin Liska <mliska@suse.cz>
12514 PR gcov-profile/91971
12515 PR gcov-profile/93466
12516 * coverage.c (coverage_init): Revert mangling of
12517 path into filename. It can lead to huge filename length.
12518 Creation of subfolders seem more natural.
12520 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12523 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
12524 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
12525 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
12527 2020-02-06 Jakub Jelinek <jakub@redhat.com>
12530 * config/i386/predicates.md (avx_identity_operand): New predicate.
12531 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
12532 define_insn_and_split.
12535 * omp-low.c (use_pointer_for_field): For nested constructs, also
12536 look for map clauses on target construct.
12537 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
12538 taskreg_nesting_level.
12541 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
12542 shared clause, call omp_notice_variable on outer context if any.
12544 2020-02-05 Jason Merrill <jason@redhat.com>
12547 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
12548 non-zero address even if weak and not yet defined.
12550 2020-02-05 Martin Sebor <msebor@redhat.com>
12552 PR tree-optimization/92765
12553 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
12554 * tree-ssa-strlen.c (compute_string_length): Remove.
12555 (determine_min_objsize): Remove.
12556 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
12557 Avoid using type size as the upper bound on string length.
12558 (handle_builtin_string_cmp): Add an argument. Adjust.
12559 (strlen_check_and_optimize_call): Pass additional argument to
12560 handle_builtin_string_cmp.
12562 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
12564 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
12565 (*pushdi2_rex64 peephole2): Unconditionally split after
12566 epilogue_completed.
12567 (*ashl<mode>3_doubleword): Ditto.
12568 (*<shift_insn><mode>3_doubleword): Ditto.
12570 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
12573 * config/rs6000/rs6000.c (get_vector_offset): Fix
12575 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
12577 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
12579 2020-02-05 David Malcolm <dmalcolm@redhat.com>
12581 * doc/analyzer.texi
12582 (Special Functions for Debugging the Analyzer): Update description
12583 of __analyzer_dump_exploded_nodes.
12585 2020-02-05 Jakub Jelinek <jakub@redhat.com>
12588 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
12589 include sets and not clobbers in the vzeroupper pattern.
12590 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
12591 the parallel has 17 (64-bit) or 9 (32-bit) elts.
12592 (*avx_vzeroupper_1): New define_insn_and_split.
12595 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
12596 don't run when !optimize.
12597 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
12600 2020-02-05 Richard Biener <rguenther@suse.de>
12602 PR middle-end/90648
12603 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
12604 checks before matching calls.
12606 2020-02-05 Jakub Jelinek <jakub@redhat.com>
12608 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
12609 function comment typo.
12611 PR middle-end/93555
12612 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
12613 simd_clone_create failed when i == 0, adjust clone->nargs by
12616 2020-02-05 Martin Liska <mliska@suse.cz>
12619 * doc/invoke.texi: Document that one should
12620 not combine ASLR and -fpch.
12622 2020-02-04 Richard Biener <rguenther@suse.de>
12624 PR tree-optimization/93538
12625 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
12627 2020-02-04 Richard Biener <rguenther@suse.de>
12629 PR tree-optimization/91123
12630 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
12631 (vn_walk_cb_data::last_vuse): New member.
12632 (vn_walk_cb_data::saved_operands): Likewsie.
12633 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
12634 (vn_walk_cb_data::push_partial_def): Use finish.
12635 (vn_reference_lookup_2): Update last_vuse and use finish if
12636 we've saved operands.
12637 (vn_reference_lookup_3): Use finish and update calls to
12638 push_partial_defs everywhere. When translating through
12639 memcpy or aggregate copies save off operands and alias-set.
12640 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
12641 operation for redundant store removal.
12643 2020-02-04 Richard Biener <rguenther@suse.de>
12645 PR tree-optimization/92819
12646 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
12647 generating more stmts than before.
12649 2020-02-04 Martin Liska <mliska@suse.cz>
12651 * config/arm/arm.c (arm_gen_far_branch): Move the function
12652 outside of selftests.
12654 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12656 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
12657 function to adjust PC-relative vector addresses.
12658 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
12659 handle vectors with PC-relative addresses.
12661 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12663 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
12665 (hard_reg_and_mode_to_addr_mask): Delete.
12666 (rs6000_adjust_vec_address): If the original vector address
12667 was REG+REG or REG+OFFSET and the element is not zero, do the add
12668 of the elements in the original address before adding the offset
12669 for the vector element. Use address_to_insn_form to validate the
12670 address using the register being loaded, rather than guessing
12671 whether the address is a DS-FORM or DQ-FORM address.
12673 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12675 * config/rs6000/rs6000.c (get_vector_offset): New helper function
12676 to calculate the offset in memory from the start of a vector of a
12677 particular element. Add code to keep the element number in
12678 bounds if the element number is variable.
12679 (rs6000_adjust_vec_address): Move calculation of offset of the
12680 vector element to get_vector_offset.
12681 (rs6000_split_vec_extract_var): Do not do the initial AND of
12682 element here, move the code to get_vector_offset.
12684 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12686 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
12689 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
12691 * config/rs6000/constraints.md: Improve documentation.
12693 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
12696 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
12697 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
12699 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
12701 * config.gcc: Remove "carrizo" support.
12702 * config/gcn/gcn-opts.h (processor_type): Likewise.
12703 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
12704 * config/gcn/gcn.opt (gpu_type): Likewise.
12705 * config/gcn/t-omp-device: Likewise.
12707 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12710 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
12711 * config/arm/arm.c (arm_gen_far_branch): New function
12712 arm_gen_far_branch.
12713 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
12715 2020-02-03 Julian Brown <julian@codesourcery.com>
12716 Tobias Burnus <tobias@codesourcery.com>
12718 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
12720 2020-02-03 Jakub Jelinek <jakub@redhat.com>
12723 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
12724 valid RTL to sum up the lowest and second lowest bytes of the popcnt
12727 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
12729 PR rtl-optimization/91333
12730 * ira-color.c (struct allocno_color_data): Add member
12732 (init_allocno_threads): Set the member up.
12733 (bucket_allocno_compare_func): Add compare hard reg
12736 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
12738 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
12740 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12741 * config.in: Regenerated.
12742 * configure: Regenerated.
12743 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
12744 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12745 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
12747 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
12749 * configure: Regenerate.
12751 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
12753 PR rtl-optimization/91333
12754 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
12755 reg preferences comparison up.
12757 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
12759 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
12760 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
12761 aarch64-sve-builtins-base.h.
12762 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
12763 aarch64-sve-builtins-base.cc.
12764 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
12765 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12766 (svcvtnt): Declare.
12767 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
12768 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12769 (svcvtnt): New functions.
12770 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
12771 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12772 (svcvtnt): New functions.
12773 (svcvt): Add a form that converts f32 to bf16.
12774 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
12775 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
12777 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
12778 Treat B as bfloat16_t.
12779 (ternary_bfloat_lane_base): New class.
12780 (ternary_bfloat_def): Likewise.
12781 (ternary_bfloat): New shape.
12782 (ternary_bfloat_lane_def): New class.
12783 (ternary_bfloat_lane): New shape.
12784 (ternary_bfloat_lanex2_def): New class.
12785 (ternary_bfloat_lanex2): New shape.
12786 (ternary_bfloat_opt_n_def): New class.
12787 (ternary_bfloat_opt_n): New shape.
12788 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
12789 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
12790 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
12791 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
12792 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12793 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12794 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
12795 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
12796 the pattern off the narrow mode instead of the wider one.
12797 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
12798 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
12799 (sve_fp_op): Handle them.
12800 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
12801 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
12803 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
12805 * config/aarch64/arm_sve.h: Include arm_bf16.h.
12806 * config/aarch64/aarch64-modes.def (BF): Move definition before
12807 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
12808 (SVE_MODES): Handle BF modes.
12809 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
12811 (aarch64_full_sve_mode): Likewise.
12812 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
12814 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
12815 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
12816 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
12817 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
12819 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
12821 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
12822 (TYPES_all_data): Add bf16.
12823 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
12824 (register_tuple_type): Increase buffer size.
12825 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
12826 (bf16): New type suffix.
12827 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
12828 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
12829 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
12830 Change type from all_data to all_arith.
12831 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
12832 (svminp): Likewise.
12834 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
12835 Matthew Malcomson <matthew.malcomson@arm.com>
12836 Richard Sandiford <richard.sandiford@arm.com>
12838 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
12839 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
12840 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
12841 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
12842 __ARM_FEATURE_MATMUL_FP64.
12843 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
12844 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
12845 be disabled at the same time.
12846 (f32mm): New extension.
12847 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
12848 (AARCH64_FL_F64MM): Bump to the next bit up.
12849 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
12850 (TARGET_SVE_F64MM): New macros.
12851 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
12852 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
12853 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
12854 (UNSPEC_ZIP2Q): New unspeccs.
12855 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
12856 (optab, sur, perm_insn): Handle the new unspecs.
12857 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
12858 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
12859 TARGET_SVE_F64MM instead of separate tests.
12860 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
12861 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
12862 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
12863 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
12864 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
12865 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
12866 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
12867 (TYPES_s_signed): New macro.
12868 (TYPES_s_integer): Use it.
12869 (TYPES_d_float): New macro.
12870 (TYPES_d_data): Use it.
12871 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
12872 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
12873 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
12874 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
12875 (svmmla): New shape.
12876 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
12877 template parameters.
12878 (ternary_resize2_lane_base): Likewise.
12879 (ternary_resize2_base): New class.
12880 (ternary_qq_lane_base): Likewise.
12881 (ternary_intq_uintq_lane_def): Likewise.
12882 (ternary_intq_uintq_lane): New shape.
12883 (ternary_intq_uintq_opt_n_def): New class
12884 (ternary_intq_uintq_opt_n): New shape.
12885 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
12886 (ternary_uintq_intq_def): New class.
12887 (ternary_uintq_intq): New shape.
12888 (ternary_uintq_intq_lane_def): New class.
12889 (ternary_uintq_intq_lane): New shape.
12890 (ternary_uintq_intq_opt_n_def): New class.
12891 (ternary_uintq_intq_opt_n): New shape.
12892 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
12893 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
12894 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
12895 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
12897 (svdotprod_lane_impl): ...this new class.
12898 (svmmla_impl, svusdot_impl): New classes.
12899 (svdot_lane): Update to use svdotprod_lane_impl.
12900 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
12901 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
12903 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
12904 function, with no types defined.
12905 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
12906 AARCH64_FL_I8MM functions.
12907 (svmmla): New AARCH64_FL_F32MM function.
12908 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
12909 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
12910 AARCH64_FL_F64MM function.
12911 (REQUIRED_EXTENSIONS):
12913 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
12915 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
12918 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
12920 * config/i386/i386.md (*movoi_internal_avx): Do not check for
12921 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
12922 (*movti_internal): Do not check for
12923 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
12924 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
12925 just after check for TARGET_AVX.
12926 (*movdf_internal): Ditto.
12927 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
12928 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
12929 * config/i386/sse.md (mov<mode>_internal): Only check
12930 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
12931 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
12932 (<sse>_andnot<mode>3<mask_name>): Move check for
12933 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
12934 (<code><mode>3<mask_name>): Ditto.
12935 (*andnot<mode>3): Ditto.
12936 (*andnottf3): Ditto.
12937 (*<code><mode>3): Ditto.
12938 (*<code>tf3): Ditto.
12939 (*andnot<VI:mode>3): Remove
12940 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
12941 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
12942 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
12943 (sse4_1_blendv<ssemodesuffix>): Ditto.
12944 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
12945 Explain that tune applies to 128bit instructions only.
12947 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
12949 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
12950 to definition of hsa_kernel_description. Parse assembly to find SGPR
12951 and VGPR count of kernel and store in hsa_kernel_description.
12953 2020-01-31 Tamar Christina <tamar.christina@arm.com>
12955 PR rtl-optimization/91838
12956 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
12957 to truncate if allowed or reject combination.
12959 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
12961 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
12962 (find_inv_vars_cb): Likewise.
12964 2020-01-31 David Malcolm <dmalcolm@redhat.com>
12966 * calls.c (special_function_p): Split out the check for DECL_NAME
12967 being non-NULL and fndecl being extern at file scope into a
12968 new maybe_special_function_p and call it. Drop check for fndecl
12969 being non-NULL that was after a usage of DECL_NAME (fndecl).
12970 * tree.h (maybe_special_function_p): New inline function.
12972 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
12974 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
12975 (mask_gather_load<mode>): ... here, and zero-initialize the
12977 (maskload<mode>di): Zero-initialize the destination.
12978 * config/gcn/gcn.c:
12980 2020-01-30 David Malcolm <dmalcolm@redhat.com>
12983 * doc/analyzer.texi (Limitations): Note that constraints on
12984 floating-point values are currently ignored.
12986 2020-01-30 Jakub Jelinek <jakub@redhat.com>
12989 * symtab.c (symtab_node::noninterposable_alias): If localalias
12990 already exists, but is not usable, append numbers after it until
12991 a unique name is found. Formatting fix.
12993 PR middle-end/93505
12994 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
12997 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
12999 * config/gcn/gcn.c (print_operand): Handle LTGT.
13000 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
13002 2020-01-30 Richard Biener <rguenther@suse.de>
13004 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
13005 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
13007 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
13009 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
13010 without a DECL in .data.rel.ro.local.
13012 2020-01-30 Jakub Jelinek <jakub@redhat.com>
13015 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
13019 * config/i386/sse.md
13020 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
13021 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
13022 any_extend code iterator instead of always zero_extend.
13023 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
13024 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
13025 Use any_extend code iterator instead of always zero_extend.
13026 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
13027 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
13028 Use any_extend code iterator instead of always zero_extend.
13029 (*sse2_pmovmskb_ext): New define_insn.
13030 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
13033 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
13034 (*popcountsi2_zext_falsedep): New define_insn.
13036 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13038 * config.in: Regenerated.
13039 * configure: Regenerated.
13041 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
13044 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
13045 LLVM's assembler changed the default in version 9.
13047 2020-01-24 Jeff Law <law@redhat.com>
13049 PR tree-optimization/89689
13050 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
13052 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
13056 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13058 PR rtl-optimization/87763
13059 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13060 simplification to handle subregs as well as bare regs.
13061 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13063 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
13066 * ira.c (ira): Revert use of simplified LRA algorithm.
13068 2020-01-29 Martin Jambor <mjambor@suse.cz>
13070 PR tree-optimization/92706
13071 * tree-sra.c (struct access): Fields first_link, last_link,
13072 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
13073 next_rhs_queued and grp_rhs_queued respectively, new fields
13074 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
13075 (struct assign_link): Field next renamed to next_rhs, new field
13076 next_lhs. Updated comment.
13077 (work_queue_head): Renamed to rhs_work_queue_head.
13078 (lhs_work_queue_head): New variable.
13079 (add_link_to_lhs): New function.
13080 (relink_to_new_repr): Also relink LHS lists.
13081 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
13082 (add_access_to_lhs_work_queue): New function.
13083 (pop_access_from_work_queue): Renamed to
13084 pop_access_from_rhs_work_queue.
13085 (pop_access_from_lhs_work_queue): New function.
13086 (build_accesses_from_assign): Also add links to LHS lists and to LHS
13088 (child_would_conflict_in_lacc): Renamed to
13089 child_would_conflict_in_acc. Adjusted parameter names.
13090 (create_artificial_child_access): New parameter set_grp_read, use it.
13091 (subtree_mark_written_and_enqueue): Renamed to
13092 subtree_mark_written_and_rhs_enqueue.
13093 (propagate_subaccesses_across_link): Renamed to
13094 propagate_subaccesses_from_rhs.
13095 (propagate_subaccesses_from_lhs): New function.
13096 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
13099 2020-01-29 Martin Jambor <mjambor@suse.cz>
13101 PR tree-optimization/92706
13102 * tree-sra.c (struct access): Adjust comment of
13103 grp_total_scalarization.
13104 (find_access_in_subtree): Look for single children spanning an entire
13106 (scalarizable_type_p): Allow register accesses, adjust callers.
13107 (completely_scalarize): Remove function.
13108 (scalarize_elem): Likewise.
13109 (create_total_scalarization_access): Likewise.
13110 (sort_and_splice_var_accesses): Do not track total scalarization
13112 (analyze_access_subtree): New parameter totally, adjust to new meaning
13113 of grp_total_scalarization.
13114 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
13115 (can_totally_scalarize_forest_p): New function.
13116 (create_total_scalarization_access): Likewise.
13117 (create_total_access_and_reshape): Likewise.
13118 (total_should_skip_creating_access): Likewise.
13119 (totally_scalarize_subtree): Likewise.
13120 (analyze_all_variable_accesses): Perform total scalarization after
13121 subaccess propagation using the new functions above.
13122 (initialize_constant_pool_replacements): Output initializers by
13123 traversing the access tree.
13125 2020-01-29 Martin Jambor <mjambor@suse.cz>
13127 * tree-sra.c (verify_sra_access_forest): New function.
13128 (verify_all_sra_access_forests): Likewise.
13129 (create_artificial_child_access): Set parent.
13130 (analyze_all_variable_accesses): Call the verifier.
13132 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13134 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
13135 if called on indirect edge.
13136 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
13137 speculative call if needed.
13139 2020-01-29 Richard Biener <rguenther@suse.de>
13141 PR tree-optimization/93428
13142 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
13143 permutation when the load node is created.
13144 (vect_analyze_slp_instance): Re-use it here.
13146 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13148 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
13150 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
13152 PR rtl-optimization/93272
13153 * ira-lives.c (process_out_of_region_eh_regs): New function.
13154 (process_bb_node_lives): Call it.
13156 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13158 * coverage.c (read_counts_file): Make error message lowercase.
13160 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13162 * profile-count.c (profile_quality_display_names): Fix ordering.
13164 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13167 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
13168 hash only when edge is first within the sequence.
13169 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
13170 (symbol_table::create_edge): Do not set target_prob.
13171 (cgraph_edge::remove_caller): Watch for speculative calls when updating
13172 the call site hash.
13173 (cgraph_edge::make_speculative): Drop target_prob parameter.
13174 (cgraph_edge::speculative_call_info): Remove.
13175 (cgraph_edge::first_speculative_call_target): New member function.
13176 (update_call_stmt_hash_for_removing_direct_edge): New function.
13177 (cgraph_edge::resolve_speculation): Rewrite to new API.
13178 (cgraph_edge::speculative_call_for_target): New member function.
13179 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
13180 multiple speculation targets.
13181 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
13183 (verify_speculative_call): Verify that targets form an interval.
13184 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
13185 (cgraph_edge::first_speculative_call_target): New member function.
13186 (cgraph_edge::next_speculative_call_target): New member function.
13187 (cgraph_edge::speculative_call_target_ref): New member function.
13188 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
13189 (cgraph_edge): Remove target_prob.
13190 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
13191 Fix handling of speculative calls.
13192 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
13193 * ipa-fnsummary.c (analyze_function_body): Likewise.
13194 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
13195 * ipa-profile.c (dump_histogram): Fix formating.
13196 (ipa_profile_generate_summary): Watch for overflows.
13197 (ipa_profile): Do not require probablity to be 1/2; update to new API.
13198 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
13199 (update_indirect_edges_after_inlining): Update to new API.
13200 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
13202 * profile-count.h: (profile_probability::adjusted): New.
13203 * tree-inline.c (copy_bb): Update to new speculative call API; fix
13204 updating of profile.
13205 * value-prof.c (gimple_ic_transform): Rename to ...
13206 (dump_ic_profile): ... this one; update dumping.
13207 (stream_in_histogram_value): Fix formating.
13208 (gimple_value_profile_transformations): Update.
13210 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
13213 * config/i386/i386.md (*movoi_internal_avx): Remove
13214 TARGET_SSE_TYPELESS_STORES check.
13215 (*movti_internal): Prefer TARGET_AVX over
13216 TARGET_SSE_TYPELESS_STORES.
13217 (*movtf_internal): Likewise.
13218 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
13219 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
13220 from TARGET_SSE_TYPELESS_STORES.
13222 2020-01-28 David Malcolm <dmalcolm@redhat.com>
13224 * diagnostic-core.h (warning_at): Rename overload to...
13225 (warning_meta): ...this.
13226 (emit_diagnostic_valist): Delete decl of overload taking
13227 diagnostic_metadata.
13228 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
13229 (warning_at): Rename overload taking diagnostic_metadata to...
13230 (warning_meta): ...this.
13232 2020-01-28 Richard Biener <rguenther@suse.de>
13234 PR tree-optimization/93439
13235 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
13236 * tree-cfg.c (move_sese_region_to_fn): ... here.
13237 (verify_types_in_gimple_reference): Verify used cliques are
13240 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
13243 * config/i386/i386-options.c (set_ix86_tune_features): Add an
13244 argument of a pointer to struct gcc_options and pass it to
13245 parse_mtune_ctrl_str.
13246 (ix86_function_specific_restore): Pass opts to
13247 set_ix86_tune_features.
13248 (ix86_option_override_internal): Likewise.
13249 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
13250 gcc_options and use it for x_ix86_tune_ctrl_string.
13252 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13254 PR rtl-optimization/87763
13255 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13256 simplification to handle subregs as well as bare regs.
13257 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13259 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13261 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
13262 for reduction chains that (now) include a call.
13264 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13266 PR tree-optimization/92822
13267 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
13268 out the don't-care elements of a vector whose significant elements
13269 are duplicates, make the don't-care elements duplicates too.
13271 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13273 PR tree-optimization/93434
13274 * tree-predcom.c (split_data_refs_to_components): Record which
13275 components have had aliasing loads removed. Prevent store-store
13276 commoning for all such components.
13278 2020-01-28 Jakub Jelinek <jakub@redhat.com>
13281 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
13282 -1 or is_vshift is true, use new_vector with number of elts npatterns
13283 rather than new_unary_operation.
13285 PR tree-optimization/93454
13286 * gimple-fold.c (fold_array_ctor_reference): Perform
13287 elt_size.to_uhwi () just once, instead of calling it in every
13288 iteration. Punt if that value is above size of the temporary
13289 buffer. Decrease third native_encode_expr argument when
13290 bufoff + elt_sz is above size of buf.
13292 2020-01-27 Joseph Myers <joseph@codesourcery.com>
13294 * config/mips/mips.c (mips_declare_object_name)
13295 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
13297 2020-01-27 Martin Liska <mliska@suse.cz>
13299 PR gcov-profile/93403
13300 * tree-profile.c (gimple_init_gcov_profiler): Generate
13301 both __gcov_indirect_call_profiler_v4 and
13302 __gcov_indirect_call_profiler_v4_atomic.
13304 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13307 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
13309 (@aarch64_split_simd_mov<mode>): Use it.
13310 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
13311 Leave the vec_extract patterns to handle 2-element vectors.
13312 (aarch64_simd_mov_from_<mode>high): Likewise.
13313 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
13314 (vec_extractv2dfv1df): Likewise.
13316 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13318 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
13319 jump conditions for *compare_condjump<GPI:mode>.
13321 2020-01-27 David Malcolm <dmalcolm@redhat.com>
13324 * digraph.cc (test_edge::test_edge): Specify template for base
13327 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13329 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
13331 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13333 * config/arc/arc-protos.h (gen_mlo): Remove.
13334 (gen_mhi): Likewise.
13335 * config/arc/arc.c (AUX_MULHI): Define.
13336 (arc_must_save_reister): Special handling for r58/59.
13337 (arc_compute_frame_size): Consider mlo/mhi registers.
13338 (arc_save_callee_saves): Emit fp/sp move only when emit_move
13340 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
13341 mlo/mhi name selection.
13342 (arc_restore_callee_saves): Don't early restore blink when ISR.
13343 (arc_expand_prologue): Add mlo/mhi saving.
13344 (arc_expand_epilogue): Add mlo/mhi restoring.
13347 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
13348 numbering when MUL64 option is used.
13349 (DWARF2_FRAME_REG_OUT): Define.
13350 * config/arc/arc.md (arc600_stall): New pattern.
13351 (VUNSPEC_ARC_ARC600_STALL): Define.
13352 (mulsi64): Use correct mlo/mhi registers.
13353 (mulsi_600): Clean it up.
13354 * config/arc/predicates.md (mlo_operand): Remove any dependency on
13356 (mhi_operand): Likewise.
13358 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13359 Petro Karashchenko <petro.karashchenko@ring.com>
13361 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
13362 attributes if needed.
13363 (prepare_move_operands): Generate special unspec instruction for
13365 (arc_isuncached_mem_p): Propagate uncached attribute to each
13367 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
13368 (VUNSPEC_ARC_STDI): Likewise.
13369 (ALLI): New mode iterator.
13370 (mALLI): New mode attribute.
13371 (lddi): New instruction pattern.
13373 (stdidi_split): Split instruction for architectures which are not
13374 supporting ll64 option.
13375 (lddidi_split): Likewise.
13377 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13379 PR rtl-optimization/92989
13380 * lra-lives.c (process_bb_lives): Update the live-in set before
13381 processing additional clobbers.
13383 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13385 PR rtl-optimization/93170
13386 * cselib.c (cselib_invalidate_regno_val): New function, split out
13388 (cselib_invalidate_regno): ...here.
13389 (cselib_invalidated_by_call_p): New function.
13390 (cselib_process_insn): Iterate over all the hard-register entries in
13391 REG_VALUES and invalidate any that cross call-clobbered registers.
13393 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13395 * dojump.c (split_comparison): Use HONOR_NANS rather than
13396 HONOR_SNANS when splitting LTGT.
13398 2020-01-27 Martin Liska <mliska@suse.cz>
13401 * opts.c (print_filtered_help): Exclude language-specific
13402 options from --help=common unless enabled in all FEs.
13404 2020-01-27 Martin Liska <mliska@suse.cz>
13406 * opts.c (print_help): Exclude params from
13407 all except --help=param.
13409 2020-01-27 Martin Liska <mliska@suse.cz>
13412 * config/i386/i386-features.c (make_resolver_func):
13413 Align the code with ppc64 target implementation.
13414 Do not generate a unique name for resolver function.
13416 2020-01-27 Richard Biener <rguenther@suse.de>
13418 PR tree-optimization/93397
13419 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
13420 converted reduction chain SLP graph adjustment.
13422 2020-01-26 Marek Polacek <polacek@redhat.com>
13425 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
13428 2020-01-26 Jason Merrill <jason@redhat.com>
13431 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
13434 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
13436 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
13437 (rx_setmem): Likewise.
13439 2020-01-26 Jakub Jelinek <jakub@redhat.com>
13442 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
13443 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
13444 drop <di> from constraint of last operand.
13447 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
13448 TARGET_AVX2 and V4DFmode not in the split condition, but in the
13449 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
13451 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
13454 * ipa-cp.c (get_info_about_necessary_edges): Remove value
13457 2020-01-24 Jeff Law <law@redhat.com>
13459 PR tree-optimization/92788
13460 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
13463 2020-01-24 Jakub Jelinek <jakub@redhat.com>
13466 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
13467 *avx_vperm_broadcast_<mode>,
13468 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
13469 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
13470 Move before avx2_perm<mode>/avx512f_perm<mode>.
13473 * simplify-rtx.c (simplify_const_unary_operation,
13474 simplify_const_binary_operation): Punt for mode precision above
13475 MAX_BITSIZE_MODE_ANY_INT.
13477 2020-01-24 Andrew Pinski <apinski@marvell.com>
13479 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
13480 alu.shift_reg to 0.
13482 2020-01-24 Jeff Law <law@redhat.com>
13485 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
13486 for REGs. Call output_operand_lossage to get more reasonable
13489 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
13491 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
13492 gcn_fp_compare_operator.
13493 (vec_cmpu<mode>di): Use gcn_compare_operator.
13494 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
13495 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
13496 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
13497 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
13498 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
13499 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
13500 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
13501 gcn_fp_compare_operator.
13502 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
13503 gcn_fp_compare_operator.
13504 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
13505 gcn_fp_compare_operator.
13506 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
13507 gcn_fp_compare_operator.
13509 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
13511 * doc/install.texi (Cross-Compiler-Specific Options): Document
13512 `--with-toolexeclibdir' option.
13514 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
13516 * target.def (flags_regnum): Also mention effect on delay slot filling.
13517 * doc/tm.texi: Regenerate.
13519 2020-01-23 Jeff Law <law@redhat.com>
13521 PR translation/90162
13522 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
13524 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
13527 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
13530 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13532 PR rtl-optimization/93402
13533 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
13536 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13538 * config.in: Regenerated.
13539 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
13540 for TARGET_LIBC_GNUSTACK.
13541 * configure: Regenerated.
13542 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
13543 found to be 2.31 or greater.
13545 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13547 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
13549 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
13550 (mips_asm_file_end): New function. Delegate to
13551 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
13552 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
13554 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13557 * config/i386/i386-modes.def (POImode): New mode.
13558 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
13559 * config/i386/i386.md (DPWI): New mode attribute.
13560 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
13561 (QWI): Rename to...
13562 (QPWI): ... this. Use POI instead of OI for TImode.
13563 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
13564 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
13567 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13570 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
13572 (speculation_tracker_rev): New pattern.
13573 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
13574 Use speculation_tracker_rev to track the inverse condition.
13576 2020-01-23 Richard Biener <rguenther@suse.de>
13578 PR tree-optimization/93381
13579 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
13580 alias-set of the def as argument and record the first one.
13581 (vn_walk_cb_data::first_set): New member.
13582 (vn_reference_lookup_3): Pass the alias-set of the current def
13583 to push_partial_def. Fix alias-set used in the aggregate copy
13585 (vn_reference_lookup): Consistently set *last_vuse_ptr.
13586 * real.c (clear_significand_below): Fix out-of-bound access.
13588 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13591 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
13592 New define_insn patterns.
13594 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13596 * doc/sourcebuild.texi (check-function-bodies): Add an
13597 optional target/xfail selector.
13599 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13601 PR rtl-optimization/93124
13602 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
13603 bare USE and CLOBBER insns.
13605 2020-01-22 Andrew Pinski <apinski@marvell.com>
13607 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
13609 2020-01-22 David Malcolm <dmalcolm@redhat.com>
13612 * gdbinit.in (break-on-saved-diagnostic): Update for move of
13613 diagnostic_manager into "ana" namespace.
13614 * selftest-run-tests.c (selftest::run_tests): Update for move of
13615 selftest::run_analyzer_selftests to
13616 ana::selftest::run_analyzer_selftests.
13618 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
13620 * cfgexpand.c (union_stack_vars): Update the size.
13622 2020-01-22 Richard Biener <rguenther@suse.de>
13624 PR tree-optimization/93381
13625 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
13626 throughout, handle all conversions the same.
13628 2020-01-22 Jakub Jelinek <jakub@redhat.com>
13631 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
13632 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
13633 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
13634 Call force_reg on high_in2 unconditionally.
13636 2020-01-22 Martin Liska <mliska@suse.cz>
13638 PR tree-optimization/92924
13639 * profile.c (compute_value_histograms): Divide
13640 all counter values.
13642 2020-01-22 Jakub Jelinek <jakub@redhat.com>
13645 * output.h (assemble_name_resolve): Declare.
13646 * varasm.c (assemble_name_resolve): New function.
13647 (assemble_name): Use it.
13648 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
13650 2020-01-22 Joseph Myers <joseph@codesourcery.com>
13652 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
13653 update_web_docs_git instead of update_web_docs_svn.
13655 2020-01-21 Andrew Pinski <apinski@marvell.com>
13658 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
13659 as PTR mode. Have operand 1 as being modeless, it can be P mode.
13660 (*tlsgd_small_<mode>): Likewise.
13661 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
13662 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
13663 register. Convert that register back to dest using convert_mode.
13665 2020-01-21 Jim Wilson <jimw@sifive.com>
13667 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
13670 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
13671 Uros Bizjak <ubizjak@gmail.com>
13674 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
13676 (legitimize_tls_address): Do GNU2 TLS address computation in
13677 ptr_mode and zero-extend result to Pmode.
13678 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
13679 :P with :PTR and Pmode with ptr_mode.
13680 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
13681 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
13682 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
13684 2020-01-21 Jakub Jelinek <jakub@redhat.com>
13687 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
13688 the last two operands are CONST_INT_P before using them as such.
13690 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
13692 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
13693 to get the integer element types.
13695 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
13697 * config/aarch64/aarch64-sve-builtins.h
13698 (function_expander::convert_to_pmode): Declare.
13699 * config/aarch64/aarch64-sve-builtins.cc
13700 (function_expander::convert_to_pmode): New function.
13701 (function_expander::get_contiguous_base): Use it.
13702 (function_expander::prepare_gather_address_operands): Likewise.
13703 * config/aarch64/aarch64-sve-builtins-sve2.cc
13704 (svwhilerw_svwhilewr_impl::expand): Likewise.
13706 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
13709 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
13710 cfun->machine->label_is_assembled.
13711 (aarch64_print_patchable_function_entry): New.
13712 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
13713 * config/aarch64/aarch64.h (struct machine_function): New field,
13714 label_is_assembled.
13716 2020-01-21 David Malcolm <dmalcolm@redhat.com>
13719 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
13722 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13725 * cgraph.c (cgraph_edge::resolve_speculation,
13726 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
13727 call_stmt_site_hash.
13729 2020-01-21 Martin Liska <mliska@suse.cz>
13731 * config/rs6000/rs6000.c (common_mode_defined): Remove
13734 2020-01-21 Richard Biener <rguenther@suse.de>
13736 PR tree-optimization/92328
13737 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
13738 type when value-numbering same-sized store by inserting a
13740 (eliminate_dom_walker::eliminate_stmt): When eliminating
13741 a redundant store handle bit-reinterpretation of the same value.
13743 2020-01-21 Andrew Pinski <apinski@marvel.com>
13746 * tree-into-ssa.c (prepare_block_for_update_1): Split out
13748 (prepare_block_for_update): This. Use a worklist instead of
13751 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13753 * gcc/config/arm/arm.c (clear_operation_p):
13754 Initialise last_regno, skip first iteration
13755 based on the first_set value and use ints instead
13756 of the unnecessary HOST_WIDE_INTs.
13758 2020-01-21 Jakub Jelinek <jakub@redhat.com>
13761 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
13762 compare_mode other than SFmode or DFmode.
13764 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
13767 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
13768 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
13769 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
13771 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
13773 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
13775 2020-01-20 Andrew Pinski <apinski@marvell.com>
13777 PR middle-end/93242
13778 * targhooks.c (default_print_patchable_function_entry): Use
13779 output_asm_insn to emit the nop instruction.
13781 2020-01-20 Fangrui Song <maskray@google.com>
13783 PR middle-end/93194
13784 * targhooks.c (default_print_patchable_function_entry): Align to
13787 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
13790 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
13791 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
13792 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
13793 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
13794 (*tls_dynamic_gnu2_lea_64): Renamed to ...
13795 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
13796 Remove the {q} suffix from lea.
13797 (*tls_dynamic_gnu2_call_64): Renamed to ...
13798 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
13799 (*tls_dynamic_gnu2_combine_64): Renamed to ...
13800 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
13801 Pass Pmode to gen_tls_dynamic_gnu2_64.
13803 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
13805 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
13807 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
13809 * config/aarch64/aarch64-sve-builtins-base.cc
13810 (svld1ro_impl::memory_vector_mode): Remove parameter name.
13812 2020-01-20 Richard Biener <rguenther@suse.de>
13815 * dwarf2out.c (prune_unused_types): Unconditionally mark
13816 called function DIEs.
13818 2020-01-20 Martin Liska <mliska@suse.cz>
13820 PR tree-optimization/93199
13821 * tree-eh.c (struct leh_state): Add
13822 new field outer_non_cleanup.
13823 (cleanup_is_dead_in): Pass leh_state instead
13824 of eh_region. Add a checking that state->outer_non_cleanup
13825 points to outer non-clean up region.
13826 (lower_try_finally): Record outer_non_cleanup
13828 (lower_catch): Likewise.
13829 (lower_eh_filter): Likewise.
13830 (lower_eh_must_not_throw): Likewise.
13831 (lower_cleanup): Likewise.
13833 2020-01-20 Richard Biener <rguenther@suse.de>
13835 PR tree-optimization/93094
13836 * tree-vectorizer.h (vect_loop_versioning): Adjust.
13837 (vect_transform_loop): Likewise.
13838 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
13839 loop_vectorized_call to vect_transform_loop.
13840 * tree-vect-loop.c (vect_transform_loop): Pass down
13841 loop_vectorized_call to vect_loop_versioning.
13842 * tree-vect-loop-manip.c (vect_loop_versioning): Use
13843 the earlier discovered loop_vectorized_call.
13845 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
13847 * doc/contribute.texi: Update for SVN -> Git transition.
13848 * doc/install.texi: Likewise.
13850 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13853 * cgraph.c (cgraph_edge::make_speculative): Increase number of
13854 speculative targets.
13855 (verify_speculative_call): New function
13856 (cgraph_node::verify_node): Use it.
13857 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
13860 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13863 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
13864 (cgraph_edge::make_direct): Remove all indirect targets.
13865 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
13866 (cgraph_node::verify_node): Verify that only one call_stmt or
13867 lto_stmt_uid is set.
13868 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
13870 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
13871 (lto_output_ref): Simplify streaming of stmt.
13872 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
13874 2020-01-18 Tamar Christina <tamar.christina@arm.com>
13876 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
13877 Mark parameter unused.
13879 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
13881 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
13883 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
13885 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
13887 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
13889 * Makefile.in: Add coroutine-passes.o.
13890 * builtin-types.def (BT_CONST_SIZE): New.
13891 (BT_FN_BOOL_PTR): New.
13892 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
13893 * builtins.def (DEF_COROUTINE_BUILTIN): New.
13894 * coroutine-builtins.def: New file.
13895 * coroutine-passes.cc: New file.
13896 * function.h (struct GTY function): Add a bit to indicate that the
13897 function is a coroutine component.
13898 * internal-fn.c (expand_CO_FRAME): New.
13899 (expand_CO_YIELD): New.
13900 (expand_CO_SUSPN): New.
13901 (expand_CO_ACTOR): New.
13902 * internal-fn.def (CO_ACTOR): New.
13906 * passes.def: Add pass_coroutine_lower_builtins,
13907 pass_coroutine_early_expand_ifns.
13908 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
13909 (make_pass_coroutine_early_expand_ifns): New.
13910 * doc/invoke.texi: Document the fcoroutines command line
13913 2020-01-18 Jakub Jelinek <jakub@redhat.com>
13915 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
13918 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
13919 after checking the argument is a REG. Don't use REGNO (reg)
13920 again to set last_regno, reuse regno variable instead.
13922 2020-01-17 David Malcolm <dmalcolm@redhat.com>
13924 * doc/analyzer.texi (Limitations): Add note about NaN.
13926 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13927 Sudakshina Das <sudi.das@arm.com>
13929 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
13930 and valid immediate.
13931 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
13932 (lshrdi3): Generate thumb2_lsrl for valid immediates.
13933 * config/arm/constraints.md (Pg): New.
13934 * config/arm/predicates.md (long_shift_imm): New.
13935 (arm_reg_or_long_shift_imm): Likewise.
13936 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
13937 (thumb2_lsll): Likewise.
13938 (thumb2_lsrl): New.
13940 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13941 Sudakshina Das <sudi.das@arm.com>
13943 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
13944 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
13945 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
13946 register pairs for doubleword quantities for ARMv8.1M-Mainline.
13947 * config/arm/thumb2.md (thumb2_asrl): New.
13948 (thumb2_lsll): Likewise.
13950 2020-01-17 Jakub Jelinek <jakub@redhat.com>
13952 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
13955 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
13957 * gdbinit.in (help-gcc-hooks): New command.
13958 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
13959 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
13962 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
13964 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
13965 correct target macro.
13967 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
13969 * config/aarch64/aarch64-protos.h
13970 (aarch64_sve_ld1ro_operand_p): New.
13971 * config/aarch64/aarch64-sve-builtins-base.cc
13972 (class load_replicate): New.
13973 (class svld1ro_impl): New.
13974 (class svld1rq_impl): Change to inherit from load_replicate.
13975 (svld1ro): New sve intrinsic function base.
13976 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
13977 New DEF_SVE_FUNCTION.
13978 * config/aarch64/aarch64-sve-builtins-base.h
13979 (svld1ro): New decl.
13980 * config/aarch64/aarch64-sve-builtins.cc
13981 (function_expander::add_mem_operand): Modify assert to allow
13983 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
13985 * config/aarch64/aarch64.c
13986 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
13987 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
13988 (aarch64_sve_ld1ro_operand_p): New.
13989 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
13990 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
13991 * config/aarch64/predicates.md
13992 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
13994 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
13996 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
13997 Introduce this ACLE specified predefined macro.
13998 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
13999 (fp): Disabling this disables f64mm.
14000 (simd): Disabling this disables f64mm.
14001 (fp16): Disabling this disables f64mm.
14002 (sve): Disabling this disables f64mm.
14003 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
14004 (AARCH64_ISA_F64MM): New.
14005 (TARGET_F64MM): New.
14006 * doc/invoke.texi (f64mm): Document new option.
14008 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
14010 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
14011 (neoversen1_tunings): Likewise.
14013 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
14016 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
14017 Add assert to ensure prolog has been emitted.
14018 (aarch64_split_atomic_op): Likewise.
14019 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
14020 Use epilogue_completed rather than reload_completed.
14021 (aarch64_atomic_exchange<mode>): Likewise.
14022 (aarch64_atomic_<atomic_optab><mode>): Likewise.
14023 (atomic_nand<mode>): Likewise.
14024 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
14025 (atomic_fetch_nand<mode>): Likewise.
14026 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
14027 (atomic_nand_fetch<mode>): Likewise.
14029 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
14032 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
14034 (REVERSE_CONDITION): Delete.
14035 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
14036 (CCFP_CCFPE): Likewise.
14037 (e): New mode attribute.
14038 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
14039 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
14040 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
14041 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
14042 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
14043 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
14044 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
14045 name of generator from gen_ccmpdi to gen_ccmpccdi.
14046 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
14047 the previous comparison but aren't able to, use the new ccmp_rev
14050 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
14052 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
14053 than testing directly for INTEGER_CST.
14054 (gimplify_target_expr, gimplify_omp_depend): Likewise.
14056 2020-01-17 Jakub Jelinek <jakub@redhat.com>
14058 PR tree-optimization/93292
14059 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
14060 get_vectype_for_scalar_type returns NULL.
14062 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
14064 * params.opt (-param=max-predicted-iterations): Increase range from 0.
14065 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
14067 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
14069 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
14071 * params.opt: (max-predicted-iterations): Set bounds.
14072 * predict.c (real_almost_one, real_br_prob_base,
14073 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
14074 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
14075 probabilities; do not truncate to reg_br_prob_bases.
14076 (estimate_loops_at_level): Pass max_cyclic_prob.
14077 (estimate_loops): Compute max_cyclic_prob.
14078 (estimate_bb_frequencies): Do not initialize real_*; update calculation
14080 * profile-count.c (profile_probability::to_sreal): New.
14081 * profile-count.h (class sreal): Move up in file.
14082 (profile_probability::to_sreal): Declare.
14084 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14087 (arm_invalid_conversion): New function for target hook.
14088 (arm_invalid_unary_op): New function for target hook.
14089 (arm_invalid_binary_op): New function for target hook.
14091 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14093 * config.gcc: Add arm_bf16.h.
14094 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
14095 (arm_simd_builtin_std_type): Add BFmode.
14096 (arm_init_simd_builtin_types): Define element types for vector types.
14097 (arm_init_bf16_types): New function.
14098 (arm_init_builtins): Add arm_init_bf16_types function call.
14099 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
14100 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
14101 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
14102 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
14103 (arm_vector_mode_supported_p): Add V4BF, V8BF.
14104 (arm_mangle_type): Add __bf16.
14105 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
14106 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
14107 arm_bf16_ptr_type_node.
14108 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
14109 define_split between ARM registers.
14110 * config/arm/arm_bf16.h: New file.
14111 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14112 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
14113 (VQXMOV): Add V8BF.
14114 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
14115 * config/arm/vfp.md: Add BFmode to movhf patterns.
14117 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
14118 Andre Vieira <andre.simoesdiasvieira@arm.com>
14120 * config/arm/arm-cpus.in (mve, mve_float): New features.
14121 (dsp, mve, mve.fp): New options.
14122 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
14123 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
14124 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
14126 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14127 Thomas Preud'homme <thomas.preudhomme@arm.com>
14129 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
14131 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
14132 error for using -mcmse when targeting Armv8.1-M Mainline.
14134 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14135 Thomas Preud'homme <thomas.preudhomme@arm.com>
14137 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
14138 address in r4 when targeting Armv8.1-M Mainline.
14139 (nonsecure_call_value_internal): Likewise.
14140 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
14141 a register match_operand again. Emit BLXNS when targeting
14142 Armv8.1-M Mainline.
14143 (nonsecure_call_value_reg_thumb2): Likewise.
14145 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14146 Thomas Preud'homme <thomas.preudhomme@arm.com>
14148 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
14149 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
14150 variable as true when floating-point ABI is not hard. Replace
14151 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
14152 Generate VLSTM and VLLDM instruction respectively before and
14153 after a function call to cmse_nonsecure_call function.
14154 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
14155 (VUNSPEC_VLLDM): Likewise.
14156 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
14157 (lazy_load_multiple_insn): Likewise.
14159 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14160 Thomas Preud'homme <thomas.preudhomme@arm.com>
14162 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
14163 (arm_emit_vfp_multi_reg_pop): Likewise.
14164 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
14165 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
14166 restore callee-saved VFP registers.
14168 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14169 Thomas Preud'homme <thomas.preudhomme@arm.com>
14171 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
14172 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
14173 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
14174 callee-saved GPRs as well as clear ip register before doing a nonsecure
14175 call then restore callee-saved GPRs after it when targeting
14176 Armv8.1-M Mainline.
14177 (arm_reorg): Adapt to function rename.
14179 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14180 Thomas Preud'homme <thomas.preudhomme@arm.com>
14182 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
14183 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
14184 clear_vfp_multiple pattern based on a new vfp parameter.
14185 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
14186 targeting Armv8.1-M Mainline.
14187 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
14188 unconditionally when targeting Armv8.1-M Mainline architecture. Check
14189 whether VFP registers are available before looking call_used_regs for a
14191 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
14192 of prototype of clear_operation_p.
14193 (clear_vfp_multiple_operation): New predicate.
14194 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
14195 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
14197 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14198 Thomas Preud'homme <thomas.preudhomme@arm.com>
14200 * config/arm/arm-protos.h (clear_operation_p): Declare.
14201 * config/arm/arm.c (clear_operation_p): New function.
14202 (cmse_clear_registers): Generate clear_multiple instruction pattern if
14203 targeting Armv8.1-M Mainline or successor.
14204 (output_return_instruction): Only output APSR register clearing if
14205 Armv8.1-M Mainline instructions not available.
14206 (thumb_exit): Likewise.
14207 * config/arm/predicates.md (clear_multiple_operation): New predicate.
14208 * config/arm/thumb2.md (clear_apsr): New define_insn.
14209 (clear_multiple): Likewise.
14210 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
14212 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14213 Thomas Preud'homme <thomas.preudhomme@arm.com>
14215 * config/arm/arm.c (fp_sysreg_names): Declare and define.
14216 (use_return_insn): Also return false for Armv8.1-M Mainline.
14217 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
14218 Mainline instructions are available.
14219 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
14220 when targeting Armv8.1-M Mainline Security Extensions.
14221 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
14222 Mainline entry function.
14223 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
14224 targeting Armv8.1-M Mainline or successor.
14225 (arm_expand_epilogue): Fix indentation of caller-saved register
14226 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
14228 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
14229 (FP_SYSREGS): Likewise.
14230 (enum vfp_sysregs_encoding): Define enum.
14231 (fp_sysreg_names): Declare.
14232 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
14233 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
14234 (pop_fpsysreg_insn): Likewise.
14236 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14237 Thomas Preud'homme <thomas.preudhomme@arm.com>
14239 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
14240 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
14241 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
14242 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
14243 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
14244 (ARMv8_1m_main): New feature group.
14245 (armv8.1-m.main): New architecture.
14246 * config/arm/arm-tables.opt: Regenerate.
14247 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
14248 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
14249 (arm_options_perform_arch_sanity_checks): Error out when targeting
14250 Armv8.1-M Mainline Security Extensions.
14251 * config/arm/arm.h (arm_arch8_1m_main): Declare.
14253 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14255 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
14256 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
14257 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
14258 aarch64_bfdot_laneq): New.
14259 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
14260 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
14261 vbfdotq_laneq_f32): New.
14262 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
14263 VBFMLA_W, VBF): New.
14264 (isquadop): Add V4BF, V8BF.
14266 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14268 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
14269 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
14270 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
14271 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
14272 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
14273 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
14274 usdot_laneq, sudot_lane,sudot_laneq): New.
14275 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
14276 (aarch64_<sur>dot_lane): New.
14277 * config/aarch64/arm_neon.h (vusdot_s32): New.
14278 (vusdotq_s32): New.
14279 (vusdot_lane_s32): New.
14280 (vsudot_lane_s32): New.
14281 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
14282 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
14284 2020-01-16 Martin Liska <mliska@suse.cz>
14286 * value-prof.c (dump_histogram_value): Fix
14287 obvious spacing issue.
14289 2020-01-16 Andrew Pinski <apinski@marvell.com>
14291 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
14292 !storage_order_barrier_p.
14294 2020-01-16 Andrew Pinski <apinski@marvell.com>
14296 * sched-int.h (_dep): Add unused bit-field field for the padding.
14297 * sched-deps.c (init_dep_1): Init unused field.
14299 2020-01-16 Andrew Pinski <apinski@marvell.com>
14301 * optabs.h (create_expand_operand): Initialize target field also.
14303 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14305 PR tree-optimization/92429
14306 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
14307 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
14309 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
14312 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
14314 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
14315 aarch64_sve_int_mode to each mode.
14317 2020-01-15 David Malcolm <dmalcolm@redhat.com>
14319 * doc/analyzer.texi (Overview): Add note about
14320 -fdump-ipa-analyzer.
14322 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
14324 PR tree-optimization/93231
14325 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
14326 input_type is unsigned. Use tree_to_shwi for shift constant.
14327 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
14328 (simplify_count_trailing_zeroes): Add test to handle known non-zero
14329 inputs more efficiently.
14331 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
14333 * config/i386/i386.md (*movsf_internal): Do not require
14334 SSE2 ISA for alternatives 14 and 15.
14336 2020-01-15 Richard Biener <rguenther@suse.de>
14338 PR middle-end/93273
14339 * tree-eh.c (sink_clobbers): If we already visited the destination
14340 block do not defer insertion.
14341 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
14342 the purpose of defered insertion.
14344 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14346 * BASE-VER: Bump to 10.0.1.
14348 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
14350 PR tree-optimization/93247
14351 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
14352 type of the stmt that we're going to vectorize.
14354 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
14356 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
14357 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
14360 2020-01-15 Martin Liska <mliska@suse.cz>
14362 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
14363 2 calls of streamer_read_hwi in a function call.
14365 2020-01-15 Richard Biener <rguenther@suse.de>
14367 * alias.c (record_alias_subset): Avoid redundant work when
14368 subset is already recorded.
14370 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14372 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
14373 the analyzer options provide CWE identifiers.
14375 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14377 * tree-diagnostic-path.cc (path_summary::event_range::print):
14378 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
14379 using get_pure_location.
14381 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14383 PR tree-optimization/93262
14384 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
14385 perform head trimming only if the last argument is constant,
14386 either all ones, or larger or equal to head trim, in the latter
14387 case decrease the last argument by head_trim.
14389 PR tree-optimization/93249
14390 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
14391 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
14392 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
14393 perform head trim unless we can prove there are no '\0' chars
14394 from the source among the first head_trim chars.
14396 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14398 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
14400 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14403 * config/i386/sse.md
14404 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
14405 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
14406 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
14407 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
14408 just a single alternative instead of two, make operands 1 and 2
14411 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
14414 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
14417 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14419 * Makefile.in (lang_opt_files): Add analyzer.opt.
14420 (ANALYZER_OBJS): New.
14421 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
14422 tristate.o and ANALYZER_OBJS.
14423 (TEXI_GCCINT_FILES): Add analyzer.texi.
14424 * common.opt (-fanalyzer): New driver option.
14425 * config.in: Regenerate.
14426 * configure: Regenerate.
14427 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
14428 (gccdepdir): Also create depdir for "analyzer" subdir.
14429 * digraph.cc: New file.
14430 * digraph.h: New file.
14431 * doc/analyzer.texi: New file.
14432 * doc/gccint.texi ("Static Analyzer") New menu item.
14433 (analyzer.texi): Include it.
14434 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
14435 ("Warning Options"): Add static analysis warnings to the list.
14436 (-Wno-analyzer-double-fclose): New option.
14437 (-Wno-analyzer-double-free): New option.
14438 (-Wno-analyzer-exposure-through-output-file): New option.
14439 (-Wno-analyzer-file-leak): New option.
14440 (-Wno-analyzer-free-of-non-heap): New option.
14441 (-Wno-analyzer-malloc-leak): New option.
14442 (-Wno-analyzer-possible-null-argument): New option.
14443 (-Wno-analyzer-possible-null-dereference): New option.
14444 (-Wno-analyzer-null-argument): New option.
14445 (-Wno-analyzer-null-dereference): New option.
14446 (-Wno-analyzer-stale-setjmp-buffer): New option.
14447 (-Wno-analyzer-tainted-array-index): New option.
14448 (-Wno-analyzer-use-after-free): New option.
14449 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
14450 (-Wno-analyzer-use-of-uninitialized-value): New option.
14451 (-Wanalyzer-too-complex): New option.
14452 (-fanalyzer-call-summaries): New warning.
14453 (-fanalyzer-checker=): New warning.
14454 (-fanalyzer-fine-grained): New warning.
14455 (-fno-analyzer-state-merge): New warning.
14456 (-fno-analyzer-state-purge): New warning.
14457 (-fanalyzer-transitivity): New warning.
14458 (-fanalyzer-verbose-edges): New warning.
14459 (-fanalyzer-verbose-state-changes): New warning.
14460 (-fanalyzer-verbosity=): New warning.
14461 (-fdump-analyzer): New warning.
14462 (-fdump-analyzer-callgraph): New warning.
14463 (-fdump-analyzer-exploded-graph): New warning.
14464 (-fdump-analyzer-exploded-nodes): New warning.
14465 (-fdump-analyzer-exploded-nodes-2): New warning.
14466 (-fdump-analyzer-exploded-nodes-3): New warning.
14467 (-fdump-analyzer-supergraph): New warning.
14468 * doc/sourcebuild.texi (dg-require-dot): New.
14469 (dg-check-dot): New.
14470 * gdbinit.in (break-on-saved-diagnostic): New command.
14471 * graphviz.cc: New file.
14472 * graphviz.h: New file.
14473 * ordered-hash-map-tests.cc: New file.
14474 * ordered-hash-map.h: New file.
14475 * passes.def (pass_analyzer): Add before
14476 pass_ipa_whole_program_visibility.
14477 * selftest-run-tests.c (selftest::run_tests): Call
14478 selftest::ordered_hash_map_tests_cc_tests.
14479 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
14481 * shortest-paths.h: New file.
14482 * timevar.def (TV_ANALYZER): New timevar.
14483 (TV_ANALYZER_SUPERGRAPH): Likewise.
14484 (TV_ANALYZER_STATE_PURGE): Likewise.
14485 (TV_ANALYZER_PLAN): Likewise.
14486 (TV_ANALYZER_SCC): Likewise.
14487 (TV_ANALYZER_WORKLIST): Likewise.
14488 (TV_ANALYZER_DUMP): Likewise.
14489 (TV_ANALYZER_DIAGNOSTICS): Likewise.
14490 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
14491 * tree-pass.h (make_pass_analyzer): New decl.
14492 * tristate.cc: New file.
14493 * tristate.h: New file.
14495 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
14498 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
14499 alternatives 9 and 10.
14501 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14503 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
14504 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
14505 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
14506 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
14507 (selftest::hash_map_tests_c_tests): Call it.
14508 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
14509 New static constant, using the value of = H::empty_zero_p.
14510 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
14511 from default_hash_traits <Value>.
14512 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
14514 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
14515 * hash-table.h (hash_table::alloc_entries): Guard the loop of
14516 calls to mark_empty with !Descriptor::empty_zero_p.
14517 (hash_table::empty_slow): Conditionalize the memset call with a
14518 check that Descriptor::empty_zero_p; otherwise, loop through the
14519 entries calling mark_empty on them.
14520 * hash-traits.h (int_hash::empty_zero_p): New static constant.
14521 (pointer_hash::empty_zero_p): Likewise.
14522 (pair_hash::empty_zero_p): Likewise.
14523 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
14525 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
14526 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
14527 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
14528 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
14529 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
14530 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
14531 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
14532 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
14533 * tree-vectorizer.h
14534 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
14537 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
14539 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
14540 fix typo on return value.
14542 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
14545 * cgraph.c (symbol_table::create_edge): Init speculative_id and
14547 (cgraph_edge::make_speculative): Add param for setting speculative_id
14549 (cgraph_edge::speculative_call_info): Update comments and find reference
14550 by speculative_id for multiple indirect targets.
14551 (cgraph_edge::resolve_speculation): Decrease the speculations
14552 for indirect edge, drop it's speculative if not direct target
14553 left. Update comments.
14554 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
14555 (cgraph_node::dump): Print num_speculative_call_targets.
14556 (cgraph_node::verify_node): Don't report error if speculative
14557 edge not include statement.
14558 (cgraph_edge::num_speculative_call_targets_p): New function.
14559 * cgraph.h (int common_target_id): Remove.
14560 (int common_target_probability): Remove.
14561 (num_speculative_call_targets): New variable.
14562 (make_speculative): Add param for setting speculative_id.
14563 (cgraph_edge::num_speculative_call_targets_p): New declare.
14564 (target_prob): New variable.
14565 (speculative_id): New variable.
14566 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
14567 call summaries for multiple speculative call targets.
14568 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
14569 * ipa-profile.c (struct speculative_call_target): New struct.
14570 (class speculative_call_summary): New class.
14571 (class speculative_call_summaries): New class.
14572 (call_sums): New variable.
14573 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
14574 (ipa_profile_write_edge_summary): New function.
14575 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
14576 (ipa_profile_dump_all_summaries): New function.
14577 (ipa_profile_read_edge_summary): New function.
14578 (ipa_profile_read_summary_section): New function.
14579 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
14580 (ipa_profile): Generate num_speculative_call_targets from
14582 * ipa-ref.h (speculative_id): New variable.
14583 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
14584 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
14585 common_target_probability. Stream out speculative_id and
14586 num_speculative_call_targets.
14587 (input_edge): Likewise.
14588 * predict.c (dump_prediction): Remove edges count assert to be
14590 * symtab.c (symtab_node::create_reference): Init speculative_id.
14591 (symtab_node::clone_references): Clone speculative_id.
14592 (symtab_node::clone_referring): Clone speculative_id.
14593 (symtab_node::clone_reference): Clone speculative_id.
14594 (symtab_node::clear_stmts_in_references): Clear speculative_id.
14595 * tree-inline.c (copy_bb): Duplicate all the speculative edges
14596 if indirect call contains multiple speculative targets.
14597 * value-prof.h (check_ic_target): Remove.
14598 * value-prof.c (gimple_value_profile_transformations):
14599 Use void function gimple_ic_transform.
14600 * value-prof.c (gimple_ic_transform): Handle topn case.
14601 Fix comment typos. Change it to a void function.
14603 2020-01-13 Andrew Pinski <apinski@marvell.com>
14605 * config/aarch64/aarch64-cores.def (octeontx2): New define.
14606 (octeontx2t98): New define.
14607 (octeontx2t96): New define.
14608 (octeontx2t93): New define.
14609 (octeontx2f95): New define.
14610 (octeontx2f95n): New define.
14611 (octeontx2f95mm): New define.
14612 * config/aarch64/aarch64-tune.md: Regenerate.
14613 * doc/invoke.texi (-mcpu=): Document the new cpu types.
14615 2020-01-13 Jason Merrill <jason@redhat.com>
14617 PR c++/33799 - destroy return value if local cleanup throws.
14618 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
14620 2020-01-13 Martin Liska <mliska@suse.cz>
14622 * ipa-cp.c (get_max_overall_size): Use newly
14623 renamed param param_ipa_cp_unit_growth.
14624 * params.opt: Remove legacy param name.
14626 2020-01-13 Martin Sebor <msebor@redhat.com>
14628 PR tree-optimization/93213
14629 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
14630 stores to be eliminated.
14632 2020-01-13 Martin Liska <mliska@suse.cz>
14634 * opts.c (print_help): Do not print CL_PARAM
14635 and CL_WARNING for CL_OPTIMIZATION.
14637 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
14640 * doc/invoke.texi (Warning Options): Add caveat about some warnings
14641 depending on optimization settings.
14643 2020-01-13 Jakub Jelinek <jakub@redhat.com>
14645 PR tree-optimization/90838
14646 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14647 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
14648 argument rather than to initialize temporary for targets that
14649 don't use the mode argument at all. Initialize ctzval to avoid
14652 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
14654 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
14655 * tree-core.h: Document it.
14656 * gimplify.c (gimplify_omp_workshare): Set it.
14657 * omp-low.c (lower_omp_target): Use it.
14658 * tree-pretty-print.c (dump_omp_clause): Print it.
14660 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
14661 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
14663 2020-01-10 David Malcolm <dmalcolm@redhat.com>
14665 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
14666 * common.opt (fdiagnostics-path-format=): New option.
14667 (diagnostic_path_format): New enum.
14668 (fdiagnostics-show-path-depths): New option.
14669 * coretypes.h (diagnostic_event_id_t): New forward decl.
14670 * diagnostic-color.c (color_dict): Add "path".
14671 * diagnostic-event-id.h: New file.
14672 * diagnostic-format-json.cc (json_from_expanded_location): Make
14674 (json_end_diagnostic): Call context->make_json_for_path if it
14675 exists and the diagnostic has a path.
14676 (diagnostic_output_format_init): Clear context->print_path.
14677 * diagnostic-path.h: New file.
14678 * diagnostic-show-locus.c (colorizer::set_range): Special-case
14679 when printing a run of events in a diagnostic_path so that they
14680 all get the same color.
14681 (layout::m_diagnostic_path_p): New field.
14682 (layout::layout): Initialize it.
14683 (layout::print_any_labels): Don't colorize the label text for an
14684 event in a diagnostic_path.
14685 (gcc_rich_location::add_location_if_nearby): Add
14686 "restrict_to_current_line_spans" and "label" params. Pass the
14687 former to layout.maybe_add_location_range; pass the latter
14688 when calling add_range.
14689 * diagnostic.c: Include "diagnostic-path.h".
14690 (diagnostic_initialize): Initialize context->path_format and
14691 context->show_path_depths.
14692 (diagnostic_show_any_path): New function.
14693 (diagnostic_path::interprocedural_p): New function.
14694 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
14695 (simple_diagnostic_path::num_events): New function.
14696 (simple_diagnostic_path::get_event): New function.
14697 (simple_diagnostic_path::add_event): New function.
14698 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
14699 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
14700 (debug): New overload taking a diagnostic_path *.
14701 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
14702 * diagnostic.h (enum diagnostic_path_format): New enum.
14703 (json::value): New forward decl.
14704 (diagnostic_context::path_format): New field.
14705 (diagnostic_context::show_path_depths): New field.
14706 (diagnostic_context::print_path): New callback field.
14707 (diagnostic_context::make_json_for_path): New callback field.
14708 (diagnostic_show_any_path): New decl.
14709 (json_from_expanded_location): New decl.
14710 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
14711 (-fdiagnostics-show-path-depths): New option.
14712 (-fdiagnostics-color): Add "path" to description of default
14713 GCC_COLORS; describe it.
14714 (-fdiagnostics-format=json): Document how diagnostic paths are
14715 represented in the JSON output format.
14716 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
14717 Add optional params "restrict_to_current_line_spans" and "label".
14718 * opts.c (common_handle_option): Handle
14719 OPT_fdiagnostics_path_format_ and
14720 OPT_fdiagnostics_show_path_depths.
14721 * pretty-print.c: Include "diagnostic-event-id.h".
14722 (pp_format): Implement "%@" format code for printing
14723 diagnostic_event_id_t *.
14724 (selftest::test_pp_format): Add tests for "%@".
14725 * selftest-run-tests.c (selftest::run_tests): Call
14726 selftest::tree_diagnostic_path_cc_tests.
14727 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
14728 * toplev.c (general_init): Initialize global_dc->path_format and
14729 global_dc->show_path_depths.
14730 * tree-diagnostic-path.cc: New file.
14731 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
14732 non-static. Drop "diagnostic" param in favor of storing the
14733 original value of "where" and re-using it.
14734 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
14735 maybe_unwind_expanded_macro_loc.
14736 (tree_diagnostics_defaults): Initialize context->print_path and
14737 context->make_json_for_path.
14738 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
14740 (default_tree_make_json_for_path): New decl.
14741 (maybe_unwind_expanded_macro_loc): New decl.
14743 2020-01-10 Jakub Jelinek <jakub@redhat.com>
14745 PR tree-optimization/93210
14746 * fold-const.h (native_encode_initializer,
14747 can_native_interpret_type_p): Declare.
14748 * fold-const.c (native_encode_string): Fix up handling with off != -1,
14750 (native_encode_initializer): New function, moved from dwarf2out.c.
14751 Adjust to native_encode_expr compatible arguments, including dry-run
14752 and partial extraction modes. Don't handle STRING_CST.
14753 (can_native_interpret_type_p): No longer static.
14754 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
14755 offset / BITS_PER_UNIT fits into int and don't call it if
14756 can_native_interpret_type_p fails. If suboff is NULL and for
14757 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
14758 native_encode_initializer.
14759 (fold_const_aggregate_ref_1): Formatting fix.
14760 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
14761 (tree_add_const_value_attribute): Adjust caller.
14763 PR tree-optimization/90838
14764 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14765 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
14766 CTZ_DEFINED_VALUE_AT_ZERO.
14768 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
14770 PR inline-asm/93027
14771 * lra-constraints.c (match_reload): Permit input operands have the
14772 same mode as output while other input operands have a different
14775 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
14777 PR tree-optimization/90838
14778 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
14779 (check_ctz_string): Likewise.
14780 (optimize_count_trailing_zeroes): Likewise.
14781 (simplify_count_trailing_zeroes): Likewise.
14782 (pass_forwprop::execute): Try ctz simplification.
14783 * match.pd: Add matching for ctz idioms.
14785 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14787 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
14789 (aarch64_invalid_unary_op): New function for target hook.
14790 (aarch64_invalid_binary_op): New function for target hook.
14792 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14794 * config.gcc: Add arm_bf16.h.
14795 * config/aarch64/aarch64-builtins.c
14796 (aarch64_simd_builtin_std_type): Add BFmode.
14797 (aarch64_init_simd_builtin_types): Define element types for vector
14799 (aarch64_init_bf16_types): New function.
14800 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
14801 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
14803 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
14804 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
14806 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
14807 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
14808 * config/aarch64/aarch64.c
14809 (aarch64_classify_vector_mode): Add support for BF types.
14810 (aarch64_gimplify_va_arg_expr): Add support for BF types.
14811 (aarch64_vq_mode): Add support for BF types.
14812 (aarch64_simd_container_mode): Add support for BF types.
14813 (aarch64_mangle_type): Add support for BF scalar type.
14814 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
14815 * config/aarch64/arm_bf16.h: New file.
14816 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14817 * config/aarch64/iterators.md: Add BF types to mode attributes.
14818 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
14820 2020-01-10 Jason Merrill <jason@redhat.com>
14822 PR c++/93173 - incorrect tree sharing.
14823 * gimplify.c (copy_if_shared): No longer static.
14824 * gimplify.h: Declare it.
14826 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14828 * doc/invoke.texi (-msve-vector-bits=): Document that
14829 -msve-vector-bits=128 now generates VL-specific code for
14830 little-endian targets.
14831 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
14832 build_vector_type_for_mode to construct the data vector types.
14833 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
14834 VL-specific code for -msve-vector-bits=128 on little-endian targets.
14835 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
14836 for 128-bit vectors.
14838 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14840 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
14843 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14845 * config/aarch64/aarch64-builtins.c
14846 (aarch64_builtin_vectorized_function): Check for specific vector modes,
14847 rather than checking the number of elements and the element mode.
14849 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14851 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
14852 get_related_vectype_for_scalar_type rather than build_vector_type
14853 to create the index type for a conditional reduction.
14855 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14857 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
14858 for any type of gather or scatter, including strided accesses.
14860 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
14862 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
14865 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
14867 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
14868 get_dr_vinfo_offset
14869 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
14870 parameter and its use to reset DR_OFFSET's.
14871 (vect_transform_loop): Remove orig_drs_init argument.
14872 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
14873 member of dr_vec_info rather than the offset of the associated
14874 data_reference's innermost_loop_behavior.
14875 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
14876 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
14877 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
14878 get_dr_vinfo_offset.
14879 (vectorizable_store): Likewise.
14880 (vectorizable_load): Likewise.
14882 2020-01-10 Richard Biener <rguenther@suse.de>
14884 * gimple-ssa-store-merging
14885 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
14887 2020-01-10 Martin Liska <mliska@suse.cz>
14890 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
14891 encapsulation that was there before r280040.
14893 2020-01-10 Richard Biener <rguenther@suse.de>
14895 PR middle-end/93199
14896 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
14897 sequences to avoid walking them again for secondary opportunities.
14898 (pass_lower_eh_dispatch::execute): Instead actually insert
14901 2020-01-10 Richard Biener <rguenther@suse.de>
14903 PR middle-end/93199
14904 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
14905 (cleanup_all_empty_eh): Walk landing pads in reverse order to
14906 avoid quadraticness.
14908 2020-01-10 Martin Jambor <mjambor@suse.cz>
14910 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
14911 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
14912 to get param_ipa_sra_max_replacements.
14913 (param_splitting_across_edge): Pass the caller to
14914 pull_accesses_from_callee.
14916 2020-01-10 Martin Jambor <mjambor@suse.cz>
14918 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
14919 * ipa-cp.c (max_new_size): Removed.
14920 (orig_overall_size): New variable.
14921 (get_max_overall_size): New function.
14922 (estimate_local_effects): Use it. Adjust dump.
14923 (decide_about_value): Likewise.
14924 (ipcp_propagate_stage): Do not calculate max_new_size, just store
14925 orig_overall_size. Adjust dump.
14926 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
14928 2020-01-10 Martin Jambor <mjambor@suse.cz>
14930 * params.opt (param_ipa_max_agg_items): Mark as Optimization
14931 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
14932 instead of param_ipa_max_agg_items.
14933 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
14934 optimization info for the callee.
14936 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
14938 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
14939 markers if debug_inline_points is false.
14941 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
14943 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
14945 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
14946 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
14947 aarch64-sve-builtins-sve2.h.
14948 (aarch64-sve-builtins-sve2.o): New rule.
14949 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
14950 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
14951 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
14952 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
14953 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
14954 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
14956 * config/aarch64/aarch64-sve.md: Update comments with SVE2
14957 instructions that are handled here.
14958 (@cond_asrd<mode>): Generalize to...
14959 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
14960 (*cond_asrd<mode>_2): Generalize to...
14961 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
14962 (*cond_asrd<mode>_z): Generalize to...
14963 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
14964 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
14965 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
14966 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
14967 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
14969 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
14970 (@aarch64_scatter_stnt<mode>): Likewise.
14971 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
14972 (@aarch64_mul_lane_<mode>): Likewise.
14973 (@aarch64_sve_suqadd<mode>_const): Likewise.
14974 (*<sur>h<addsub><mode>): Generalize to...
14975 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
14977 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
14978 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
14979 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
14980 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
14981 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
14982 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
14983 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
14984 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
14985 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
14986 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
14987 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
14988 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
14989 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
14990 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
14991 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
14992 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
14993 (@aarch64_sve2_xar<mode>): Likewise.
14994 (@aarch64_sve2_bcax<mode>): Likewise.
14995 (*aarch64_sve2_eor3<mode>): Rename to...
14996 (@aarch64_sve2_eor3<mode>): ...this.
14997 (@aarch64_sve2_bsl<mode>): New expander.
14998 (@aarch64_sve2_nbsl<mode>): Likewise.
14999 (@aarch64_sve2_bsl1n<mode>): Likewise.
15000 (@aarch64_sve2_bsl2n<mode>): Likewise.
15001 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
15002 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
15003 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
15004 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
15005 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
15006 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
15007 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
15008 (<su>mull<bt><Vwide>): Generalize to...
15009 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
15011 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
15012 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
15013 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
15014 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15015 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
15016 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15017 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
15018 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15019 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
15020 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15021 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
15022 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
15023 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
15024 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
15025 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
15026 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
15027 (<SHRNB:r>shrnb<mode>): Generalize to...
15028 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
15030 (<SHRNT:r>shrnt<mode>): Generalize to...
15031 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
15033 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
15034 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
15035 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
15036 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
15037 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
15038 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
15039 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
15040 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
15041 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
15042 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
15043 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
15044 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
15045 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
15046 (@aarch64_sve2_cvtnt<mode>): Likewise.
15047 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
15048 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
15049 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
15050 (@aarch64_sve2_cvtxnt<mode>): Likewise.
15051 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
15052 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
15053 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
15054 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
15055 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
15056 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
15057 (@aarch64_sve2_pmul<mode>): Likewise.
15058 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
15059 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
15060 (@aarch64_sve2_tbl2<mode>): Likewise.
15061 (@aarch64_sve2_tbx<mode>): Likewise.
15062 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
15063 (@aarch64_sve2_histcnt<mode>): Likewise.
15064 (@aarch64_sve2_histseg<mode>): Likewise.
15065 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
15066 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
15067 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
15068 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
15069 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
15070 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
15071 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
15072 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
15073 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
15074 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
15075 (SVE2_PMULL_PAIR_I): New mode iterators.
15076 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
15077 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
15078 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
15079 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
15080 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
15081 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
15082 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
15083 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
15084 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
15085 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
15086 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
15087 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
15088 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
15089 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
15090 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
15091 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
15092 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
15093 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
15094 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
15095 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
15096 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
15097 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
15098 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
15099 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
15100 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
15101 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
15102 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
15103 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
15104 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
15105 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
15106 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
15108 (VNARROW, Ventype): New mode attributes.
15109 (Vewtype): Handle VNx2DI. Fix typo in comment.
15110 (VDOUBLE): New mode attribute.
15111 (sve_lane_con): Handle VNx8HI.
15112 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
15113 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
15114 (sve_int_op, sve_int_op_rev): Handle the above codes.
15115 (sve_pred_int_rhs2_operand): Likewise.
15116 (MULLBT, SHRNB, SHRNT): Delete.
15117 (SVE_INT_SHIFT_IMM): New int iterator.
15118 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
15119 and UNSPEC_WHILEHS for TARGET_SVE2.
15120 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
15121 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
15122 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
15123 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
15124 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
15125 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
15126 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
15127 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
15128 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
15129 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
15130 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
15131 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
15132 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
15133 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
15134 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
15135 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
15136 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
15137 (optab): Handle the new unspecs.
15138 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
15140 (lr): Handle the new unspecs.
15142 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
15143 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
15144 (sve_int_qsub_op): New int attributes.
15145 (sve_fp_op, rot): Handle the new unspecs.
15146 * config/aarch64/aarch64-sve-builtins.h
15147 (function_resolver::require_matching_pointer_type): Declare.
15148 (function_resolver::resolve_unary): Add an optional boolean argument.
15149 (function_resolver::finish_opt_n_resolution): Add an optional
15150 type_suffix_index argument.
15151 (gimple_folder::redirect_call): Declare.
15152 (gimple_expander::prepare_gather_address_operands): Add an optional
15154 * config/aarch64/aarch64-sve-builtins.cc: Include
15155 aarch64-sve-builtins-sve2.h.
15156 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
15157 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
15158 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
15159 (TYPES_hsd_integer): Use TYPES_hsd_signed.
15160 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
15161 (TYPES_s_unsigned): Likewise.
15162 (TYPES_s_integer): Use TYPES_s_unsigned.
15163 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
15164 (TYPES_sd_integer): Use them.
15165 (TYPES_d_unsigned): New macro.
15166 (TYPES_d_integer): Use it.
15167 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
15168 (TYPES_cvt_narrow): Likewise.
15169 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
15170 (preds_mx): New variable.
15171 (function_builder::add_overloaded_function): Allow the new feature
15172 set to be more restrictive than the original one.
15173 (function_resolver::infer_pointer_type): Remove qualifiers from
15174 the pointer type before printing it.
15175 (function_resolver::require_matching_pointer_type): New function.
15176 (function_resolver::resolve_sv_displacement): Handle functions
15177 that don't support 32-bit vector indices or svint32_t vector offsets.
15178 (function_resolver::finish_opt_n_resolution): Take the inferred type
15179 as a separate argument.
15180 (function_resolver::resolve_unary): Optionally treat all forms in
15181 the same way as normal merging functions.
15182 (gimple_folder::redirect_call): New function.
15183 (function_expander::prepare_gather_address_operands): Add an argument
15184 that says whether scaled forms are available. If they aren't,
15185 handle scaling of vector indices and don't add the extension and
15187 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
15188 fall back to using cond_* instead.
15189 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
15190 Split out the member variables into...
15191 (rtx_code_function_base): ...this new base class.
15192 (rtx_code_function_rotated): Inherit rtx_code_function_base.
15193 (unspec_based_function): Split out the member variables into...
15194 (unspec_based_function_base): ...this new base class.
15195 (unspec_based_function_rotated): Inherit unspec_based_function_base.
15196 (unspec_based_function_exact_insn): New class.
15197 (unspec_based_add_function, unspec_based_add_lane_function)
15198 (unspec_based_lane_function, unspec_based_pred_function)
15199 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
15200 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
15201 (unspec_based_sub_function, unspec_based_sub_lane_function): New
15203 (unspec_based_fused_function): New class.
15204 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
15205 (unspec_based_fused_lane_function): New class.
15206 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
15208 (CODE_FOR_MODE1): New macro.
15209 (fixed_insn_function): New class.
15210 (while_comparison): Likewise.
15211 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
15212 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
15213 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
15214 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
15215 (load_gather_sv_restricted, shift_left_imm_long): Declare.
15216 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
15217 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
15218 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
15219 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
15220 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
15221 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
15222 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
15223 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
15224 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
15225 Also add an initial argument for unary_convert_narrowt, regardless
15226 of the predication type.
15227 (build_32_64): Allow loads and stores to specify MODE_none.
15228 (build_sv_index64, build_sv_uint_offset): New functions.
15229 (long_type_suffix): New function.
15230 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
15231 (binary_imm_long_base, load_gather_sv_base): Likewise.
15232 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
15233 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
15234 (unary_narrowb_base, unary_narrowt_base): Likewise.
15235 (binary_long_lane_def, binary_long_lane): New shape.
15236 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
15237 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
15238 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
15239 (binary_to_uint_def, binary_to_uint): Likewise.
15240 (binary_wide_def, binary_wide): Likewise.
15241 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
15242 (compare_def, compare): Likewise.
15243 (compare_ptr_def, compare_ptr): Likewise.
15244 (load_ext_gather_index_restricted_def,
15245 load_ext_gather_index_restricted): Likewise.
15246 (load_ext_gather_offset_restricted_def,
15247 load_ext_gather_offset_restricted): Likewise.
15248 (load_gather_sv_def): Inherit from load_gather_sv_base.
15249 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
15250 (shift_left_imm_def, shift_left_imm): Likewise.
15251 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
15252 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
15253 (store_scatter_index_restricted_def,
15254 store_scatter_index_restricted): Likewise.
15255 (store_scatter_offset_restricted_def,
15256 store_scatter_offset_restricted): Likewise.
15257 (tbl_tuple_def, tbl_tuple): Likewise.
15258 (ternary_long_lane_def, ternary_long_lane): Likewise.
15259 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
15260 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
15261 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
15262 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
15263 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
15264 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
15265 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
15266 (ternary_uint_def, ternary_uint): Likewise.
15267 (unary_convert): Fix typo in comment.
15268 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
15269 (unary_long_def, unary_long): Likewise.
15270 (unary_narrowb_def, unary_narrowb): Likewise.
15271 (unary_narrowt_def, unary_narrowt): Likewise.
15272 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
15273 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
15274 (unary_to_int_def, unary_to_int): Likewise.
15275 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
15276 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
15277 (svasrd_impl): Delete.
15278 (svcadd_impl::expand): Handle integer operations too.
15279 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
15280 new functions to derive the unspec numbers.
15281 (svmla_svmls_lane_impl): Replace with...
15282 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
15283 integer operations too.
15284 (svwhile_impl): Rename to...
15285 (svwhilelx_impl): ...this and inherit from while_comparison.
15286 (svasrd): Use unspec_based_function.
15287 (svmla_lane): Use svmla_lane_impl.
15288 (svmls_lane): Use svmls_lane_impl.
15289 (svrecpe, svrsqrte): Handle unsigned integer operations too.
15290 (svwhilele, svwhilelt): Use svwhilelx_impl.
15291 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
15292 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
15293 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
15294 * config/aarch64/aarch64-sve-builtins.def: Include
15295 aarch64-sve-builtins-sve2.def.
15297 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15299 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
15300 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
15301 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
15302 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
15303 immediates as well as vector ones.
15304 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
15305 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
15306 (aarch64_sve_qsub_immediate): Update calls accordingly.
15308 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15310 * config/aarch64/aarch64-sve2.md: Add banner comments.
15311 (<su>mulh<r>s<mode>3): Move further up file.
15312 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
15313 (*aarch64_sve2_sra<mode>): Move further down file.
15314 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
15316 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15318 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
15319 and UNSPEC_WHILEWR.
15320 (while_optab_cmp): Handle them.
15321 * config/aarch64/aarch64-sve.md
15322 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
15323 and add a "@" marker.
15324 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
15325 instead of gen_aarch64_sve2_while_ptest.
15326 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
15328 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15330 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
15331 (UNSPEC_WHILELE): ...this.
15332 (UNSPEC_WHILE_LO): Rename to...
15333 (UNSPEC_WHILELO): ...this.
15334 (UNSPEC_WHILE_LS): Rename to...
15335 (UNSPEC_WHILELS): ...this.
15336 (UNSPEC_WHILE_LT): Rename to...
15337 (UNSPEC_WHILELT): ...this.
15338 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
15339 (cmp_op, while_optab_cmp): Likewise.
15340 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
15341 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
15342 (svwhilelt): Likewise.
15344 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15346 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
15347 (unary_to_uint): Define.
15348 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
15349 (unary_count): Rename to...
15350 (unary_to_uint_def, unary_to_uint): ...this.
15351 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
15353 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15355 * config/aarch64/aarch64-sve-builtins-functions.h
15356 (code_for_mode_function): New class.
15357 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
15358 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
15359 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
15360 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
15361 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
15363 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15365 * config/aarch64/iterators.md (addsub): New code attribute.
15366 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
15368 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
15369 in the asm string and attributes. Fix indentation.
15370 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
15372 (@aarch64_sve_<optab><mode>): ...this.
15373 * config/aarch64/aarch64-sve-builtins.h
15374 (function_expander::expand_signed_unpred_op): Delete.
15375 * config/aarch64/aarch64-sve-builtins.cc
15376 (function_expander::expand_signed_unpred_op): Likewise.
15377 (function_expander::map_to_rtx_codes): If the optab isn't defined,
15378 try using code_for_aarch64_sve instead.
15379 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
15380 (svqsub_impl): Likewise.
15381 (svqadd, svqsub): Use rtx_code_function instead.
15383 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15385 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
15386 (HADDSUB, sur, addsub): Remove them.
15388 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15390 * tree-nrv.c (pass_return_slot::execute): Handle all internal
15391 functions the same way, rather than singling out those that
15392 aren't mapped directly to optabs.
15394 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15396 * target.def (compatible_vector_types_p): New target hook.
15397 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
15398 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
15399 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
15400 * doc/tm.texi: Regenerate.
15401 * gimple-expr.c: Include target.h.
15402 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
15403 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
15405 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
15406 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
15407 Use the original predicate if it already has a suitable type.
15409 2020-01-09 Martin Jambor <mjambor@suse.cz>
15411 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
15412 resolve_speculation and redirect_call_stmt_to_callee static. Change
15413 return type of set_call_stmt to cgraph_edge *.
15414 * auto-profile.c (afdo_indirect_call): Adjust call to
15415 redirect_call_stmt_to_callee.
15416 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
15417 make the this pointer explicit, adjust self-recursive calls and the
15418 call top make_direct. Return the resulting edge.
15419 (cgraph_edge::remove): Make this pointer explicit.
15420 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
15421 (cgraph_edge::make_direct): Likewise, adjust call to
15422 resolve_speculation.
15423 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
15424 call to set_call_stmt.
15425 (cgraph_update_edges_for_call_stmt_node): Update call to
15426 set_call_stmt and remove.
15427 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15428 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
15429 (cgraph_node::create_edge_including_clones): Moved "first" definition
15430 of edge to the block where it was used. Adjusted calls to
15432 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
15433 cgraph_edge::remove.
15434 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
15435 make_direct and redirect_call_stmt_to_callee.
15436 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
15437 resolve_speculation and make_direct.
15438 * ipa-inline-transform.c (inline_transform): Adjust call to
15439 redirect_call_stmt_to_callee.
15440 (check_speculations_1):: Adjust call to resolve_speculation.
15441 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
15442 resolve-speculation.
15443 (inline_small_functions): Adjust call to resolve_speculation.
15444 (ipa_inline): Likewise.
15445 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
15447 * ipa-visibility.c (function_and_variable_visibility): Make iteration
15448 safe with regards to edge removal, adjust calls to
15449 redirect_call_stmt_to_callee.
15450 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
15451 and redirect_call_stmt_to_callee.
15452 * multiple_target.c (create_dispatcher_calls): Adjust call to
15453 redirect_call_stmt_to_callee
15454 (redirect_to_specific_clone): Likewise.
15455 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
15456 Adjust calls to cgraph_edge::remove.
15457 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
15458 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
15459 (expand_call_inline): Adjust call to cgraph_edge::remove.
15461 2020-01-09 Martin Liska <mliska@suse.cz>
15463 * params.opt: Set Optimization for
15464 param_max_speculative_devirt_maydefs.
15466 2020-01-09 Martin Sebor <msebor@redhat.com>
15468 PR middle-end/93200
15470 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
15472 2020-01-09 Martin Liska <mliska@suse.cz>
15474 * auto-profile.c (auto_profile): Use opt_for_fn
15476 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
15477 (propagate_vals_across_arith_jfunc): Likewise.
15478 (hint_time_bonus): Likewise.
15479 (incorporate_penalties): Likewise.
15480 (good_cloning_opportunity_p): Likewise.
15481 (perform_estimation_of_a_value): Likewise.
15482 (estimate_local_effects): Likewise.
15483 (ipcp_propagate_stage): Likewise.
15484 * ipa-fnsummary.c (decompose_param_expr): Likewise.
15485 (set_switch_stmt_execution_predicate): Likewise.
15486 (analyze_function_body): Likewise.
15487 * ipa-inline-analysis.c (offline_size): Likewise.
15488 * ipa-inline.c (early_inliner): Likewise.
15489 * ipa-prop.c (ipa_analyze_node): Likewise.
15490 (ipcp_transform_function): Likewise.
15491 * ipa-sra.c (process_scan_results): Likewise.
15492 (ipa_sra_summarize_function): Likewise.
15493 * params.opt: Rename ipcp-unit-growth to
15494 ipa-cp-unit-growth. Add Optimization for various
15495 IPA-related parameters.
15497 2020-01-09 Richard Biener <rguenther@suse.de>
15499 PR middle-end/93054
15500 * gimplify.c (gimplify_expr): Deal with NOP definitions.
15502 2020-01-09 Richard Biener <rguenther@suse.de>
15504 PR tree-optimization/93040
15505 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
15507 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
15509 * common/config/avr/avr-common.c (avr_option_optimization_table)
15510 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
15512 2020-01-09 Martin Liska <mliska@suse.cz>
15514 * cgraphclones.c (symbol_table::materialize_all_clones):
15515 Use cgraph_node::dump_name.
15517 2020-01-09 Jakub Jelinek <jakub@redhat.com>
15519 PR inline-asm/93202
15520 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
15521 output_operand_lossage instead of gcc_unreachable.
15522 * doc/md.texi (riscv f constraint): Fix typo.
15525 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
15526 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
15527 CONST_SCALAR_INT_P instead of CONST_INT_P.
15528 (*subv<mode>4_1): Rename to ...
15529 (subv<mode>4_1): ... this.
15530 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
15531 define_insn_and_split patterns.
15532 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
15535 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15537 * vec.c (class selftest::count_dtor): New class.
15538 (selftest::test_auto_delete_vec): New test.
15539 (selftest::vec_c_tests): Call it.
15540 * vec.h (class auto_delete_vec): New class template.
15541 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
15543 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15545 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
15547 2020-01-08 Jim Wilson <jimw@sifive.com>
15549 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
15550 use of TLS_MODEL_LOCAL_EXEC when not pic.
15552 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15554 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
15557 2020-01-08 Jakub Jelinek <jakub@redhat.com>
15560 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
15561 *stack_protect_set_3 peephole2): Also check that the second
15562 insns source is general_operand.
15565 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
15566 predicate for output operand instead of register_operand.
15567 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
15568 memory destination and non-memory operands[2].
15570 2020-01-08 Martin Liska <mliska@suse.cz>
15572 * cgraph.c (cgraph_node::dump): Use ::dump_name or
15573 ::dump_asm_name instead of (::name or ::asm_name).
15574 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
15575 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
15576 (analyze_functions): Likewise.
15577 (expand_all_functions): Likewise.
15578 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
15579 (propagate_bits_across_jump_function): Likewise.
15580 (dump_profile_updates): Likewise.
15581 (ipcp_store_bits_results): Likewise.
15582 (ipcp_store_vr_results): Likewise.
15583 * ipa-devirt.c (dump_targets): Likewise.
15584 * ipa-fnsummary.c (analyze_function_body): Likewise.
15585 * ipa-hsa.c (check_warn_node_versionable): Likewise.
15586 (process_hsa_functions): Likewise.
15587 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
15588 (set_alias_uids): Likewise.
15589 * ipa-inline-transform.c (save_inline_function_body): Likewise.
15590 * ipa-inline.c (recursive_inlining): Likewise.
15591 (inline_to_all_callers_1): Likewise.
15592 (ipa_inline): Likewise.
15593 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
15594 (ipa_propagate_frequency): Likewise.
15595 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
15596 (remove_described_reference): Likewise.
15597 * ipa-pure-const.c (worse_state): Likewise.
15598 (check_retval_uses): Likewise.
15599 (analyze_function): Likewise.
15600 (propagate_pure_const): Likewise.
15601 (propagate_nothrow): Likewise.
15602 (dump_malloc_lattice): Likewise.
15603 (propagate_malloc): Likewise.
15604 (pass_local_pure_const::execute): Likewise.
15605 * ipa-visibility.c (optimize_weakref): Likewise.
15606 (function_and_variable_visibility): Likewise.
15607 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
15608 (ipa_discover_variable_flags): Likewise.
15609 * lto-streamer-out.c (output_function): Likewise.
15610 (output_constructor): Likewise.
15611 * tree-inline.c (copy_bb): Likewise.
15612 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
15613 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
15615 2020-01-08 Richard Biener <rguenther@suse.de>
15617 PR middle-end/93199
15618 * tree-eh.c (sink_clobbers): Update virtual operands for
15619 the first and last stmt only. Add a dry-run capability.
15620 (pass_lower_eh_dispatch::execute): Perform clobber sinking
15621 after CFG manipulations and in RPO order to catch all
15622 secondary opportunities reliably.
15624 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15627 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15629 2019-01-08 Richard Biener <rguenther@suse.de>
15631 PR middle-end/93199
15632 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
15633 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
15634 virtual operand, also updating SSA use.
15635 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
15636 Update stmt after resetting virtual operand.
15637 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
15638 * gimple-iterator.c (gsi_remove): When not removing the stmt
15639 permanently do not delink immediate uses or mark the stmt modified.
15641 2020-01-08 Martin Liska <mliska@suse.cz>
15643 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
15644 (ipa_call_context::estimate_size_and_time): Likewise.
15645 (inline_analyze_function): Likewise.
15647 2020-01-08 Martin Liska <mliska@suse.cz>
15649 * cgraph.c (cgraph_node::dump): Use systematically
15652 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15654 Add -nodevicespecs option for avr.
15657 * config/avr/avr.opt (-nodevicespecs): New driver option.
15658 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
15659 "-specs=device-specs/..." if that option is not set.
15660 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15662 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15664 Implement 64-bit double functions for avr.
15667 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
15668 --with-double-comparison.
15669 * doc/install.texi: Document them.
15670 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
15671 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
15672 <WITH_DOUBLE_COMPARISON>: New built-in defines.
15673 * doc/invoke.texi (AVR Built-in Macros): Document them.
15674 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
15675 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
15676 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
15678 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
15681 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
15682 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
15683 when only building rm-profile multilibs.
15685 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
15688 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
15689 lattice for a value to check.
15690 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
15691 finite propagation in self-recursive scc.
15693 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
15695 * ipa-inline.c (caller_growth_limits): Restore the AND.
15697 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
15699 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
15700 (VEC_ALLREG_ALT): New iterator.
15701 (VEC_ALLREG_INT_MODE): New iterator.
15702 (VCMP_MODE): New iterator.
15703 (VCMP_MODE_INT): New iterator.
15704 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
15705 (vec_cmp<u>v64qidi): New define_expand.
15706 (vec_cmp<mode>di_exec): Use VCMP_MODE.
15707 (vec_cmpu<mode>di_exec): New define_expand.
15708 (vec_cmp<u>v64qidi_exec): New define_expand.
15709 (vec_cmp<mode>di_dup): Use VCMP_MODE.
15710 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
15711 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
15712 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
15713 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
15714 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
15715 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
15716 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
15717 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
15718 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
15720 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
15721 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
15723 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
15725 * config/gcn/constraints.md (DA): Update description and match.
15727 (Db): New constraint.
15728 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
15730 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
15731 Implement 'Db' mixed immediate type.
15732 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
15733 (addcv64si3_dup<exec_vcc>): Delete.
15734 (subcv64si3<exec_vcc>): Rework constraints.
15735 (addv64di3): Rework constraints.
15736 (addv64di3_exec): Rework constraints.
15737 (subv64di3): Rework constraints.
15738 (addv64di3_dup): Delete.
15739 (addv64di3_dup_exec): Delete.
15740 (addv64di3_zext): Rework constraints.
15741 (addv64di3_zext_exec): Rework constraints.
15742 (addv64di3_zext_dup): Rework constraints.
15743 (addv64di3_zext_dup_exec): Rework constraints.
15744 (addv64di3_zext_dup2): Rework constraints.
15745 (addv64di3_zext_dup2_exec): Rework constraints.
15746 (addv64di3_sext_dup2): Rework constraints.
15747 (addv64di3_sext_dup2_exec): Rework constraints.
15749 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
15751 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
15752 existing target checks.
15754 2020-01-07 Richard Biener <rguenther@suse.de>
15756 * doc/install.texi: Bump minimal supported MPC version.
15758 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
15760 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
15761 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
15762 * langhooks.c: Include stor-layout.h.
15763 (lhd_simulate_enum_decl): New function.
15764 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
15765 handle_arm_sve_h for the LTO frontend.
15766 (register_vector_type): Cope with null returns from pushdecl.
15768 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
15770 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
15771 (aarch64_sve::nvectors_if_data_type): Replace with...
15772 (aarch64_sve::builtin_type_p): ...this.
15773 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
15774 (find_vector_type): Delete.
15775 (add_sve_type_attribute): New function.
15776 (lookup_sve_type_attribute): Likewise.
15777 (register_builtin_types): Add an "SVE type" attribute to each type.
15778 (register_tuple_type): Likewise.
15779 (svbool_type_p, nvectors_if_data_type): Delete.
15780 (mangle_builtin_type): Use lookup_sve_type_attribute.
15781 (builtin_type_p): Likewise. Add an overload that returns the
15782 number of constituent vector and predicate registers.
15783 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
15784 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
15785 instead of aarch64_sve_argument_p.
15786 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
15787 (aarch64_pass_by_reference): Likewise.
15788 (aarch64_function_value_1): Likewise.
15789 (aarch64_return_in_memory): Likewise.
15790 (aarch64_layout_arg): Likewise.
15792 2020-01-07 Jakub Jelinek <jakub@redhat.com>
15794 PR tree-optimization/93156
15795 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
15796 least significant bit is always clear.
15798 PR tree-optimization/93118
15799 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
15800 simplifier with two intermediate conversions.
15802 2020-01-07 Martin Liska <mliska@suse.cz>
15804 * params.opt: Add Optimization for various parameters.
15806 2020-01-07 Martin Liska <mliska@suse.cz>
15809 * doc/extend.texi: Explain cloning for target_clone
15812 2020-01-07 Martin Liska <mliska@suse.cz>
15814 PR tree-optimization/92860
15815 * common.opt: Make in Optimization option
15816 as it is affected by -O0, which is an Optimization
15818 * tree-inline.c (tree_inlinable_function_p):
15819 Use opt_for_fn for warn_inline.
15820 (expand_call_inline): Likewise.
15822 2020-01-07 Martin Liska <mliska@suse.cz>
15824 PR tree-optimization/92860
15825 * common.opt: Make flag_ree as optimization
15828 2020-01-07 Martin Liska <mliska@suse.cz>
15830 PR optimization/92860
15831 * params.opt: Mark param_min_crossjump_insns with Optimization
15834 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
15836 * ipa-inline-analysis.c (estimate_growth): Fix typo.
15837 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
15839 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
15841 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
15842 helper function to return the valid addressing formats for a given
15843 hard register and mode.
15844 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
15846 * config/rs6000/constraints.md (Q constraint): Update
15848 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
15851 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15852 Use 'Q' for doing vector extract from memory.
15853 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
15855 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
15856 doing vector extract from memory.
15857 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
15858 extract from memory.
15860 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
15861 for the offset being 34-bits when -mcpu=future is used.
15863 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
15865 * config/pa/pa.md: Revert change to use ordered_comparison_operator
15866 instead of cmpib_comparison_operator in cmpib patterns.
15867 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
15868 of cmpib_comparison_operator. Revise comment.
15870 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15872 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
15873 in an IFN_DIV_POW2 node to be equal.
15875 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15877 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
15878 (vect_check_scalar_mask): ...this.
15879 (vectorizable_store, vectorizable_load): Update call accordingly.
15880 (vectorizable_call): Use vect_check_scalar_mask to check the mask
15881 argument in calls to conditional internal functions.
15883 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
15885 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
15886 '0' matching inputs.
15887 (subv64di3_exec): Likewise.
15889 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
15891 * config/mips/mips.c (vr4130_align_insns): Fix typo.
15892 * doc/md.texi (movstr): Likewise.
15894 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
15896 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
15899 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15901 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
15903 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
15904 to a temporary file and use move-if-change to update the real
15905 file where necessary.
15907 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15909 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
15910 rather than Upa for CPY /M.
15912 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
15914 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
15917 2020-01-06 Martin Liska <mliska@suse.cz>
15919 PR tree-optimization/92860
15920 * params.opt: Mark param_max_combine_insns with Optimization
15923 2020-01-05 Jakub Jelinek <jakub@redhat.com>
15926 * config/i386/i386.md (SWIDWI): New mode iterator.
15927 (DWI, dwi): Add TImode variants.
15928 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
15929 <general_hilo_operand> instead of <general_operand>. Use
15930 CONST_SCALAR_INT_P instead of CONST_INT_P.
15931 (*addv<mode>4_1): Rename to ...
15932 (addv<mode>4_1): ... this.
15933 (QWI): New mode attribute.
15934 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
15935 define_insn_and_split patterns.
15936 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
15938 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
15939 <general_hilo_operand> instead of <general_operand>.
15940 (*addcarry<mode>_1): New define_insn.
15941 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
15943 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
15945 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
15946 Use "call" instead of "set".
15948 2020-01-03 Martin Jambor <mjambor@suse.cz>
15951 * ipa-cp.c (print_all_lattices): Skip functions without info.
15953 2020-01-03 Jakub Jelinek <jakub@redhat.com>
15956 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
15957 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
15958 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
15959 for 'e' simd clones.
15962 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
15964 (mprefer-vector-width=): Add Save.
15965 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
15966 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
15967 (ix86_debug_options, ix86_function_specific_print): Adjust
15968 ix86_target_string callers.
15969 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
15970 (ix86_valid_target_attribute_tree): Likewise.
15971 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
15972 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
15973 ix86_target_string caller.
15976 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
15977 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
15978 instead of gen_int_shift_amount + convert_modes.
15980 PR rtl-optimization/93088
15981 * loop-iv.c (find_single_def_src): Punt after looking through
15982 128 reg copies for regs with single definitions. Move definitions
15985 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
15987 * config/arm/arm-c.c (arm_cpu_builtins): Define
15988 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
15989 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
15990 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
15991 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
15992 * config/arm/arm-tables.opt: Regenerated.
15993 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
15994 arm_arch_i8mm and arm_arch_bf16 when enabled.
15995 * config/arm/arm.h (TARGET_I8MM): New macro.
15996 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
15997 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
15998 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
15999 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
16000 (v8_6_a_simd_variants): New.
16001 (v8_*_a_simd_variants): Add i8mm and bf16.
16002 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
16004 2020-01-02 Jakub Jelinek <jakub@redhat.com>
16007 * predict.c (compute_function_frequency): Don't call
16008 warn_function_cold on functions that already have cold attribute.
16010 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
16013 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
16014 COMDAT group function labels in .data.rel.ro.local section.
16015 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
16018 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
16019 comparison_operator in B and S integer comparisons. Likewise, use
16020 ordered_comparison_operator instead of cmpib_comparison_operator in
16022 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
16024 2020-01-01 Jakub Jelinek <jakub@redhat.com>
16026 Update copyright years.
16028 * gcc.c (process_command): Update copyright notice dates.
16029 * gcov-dump.c (print_version): Ditto.
16030 * gcov.c (print_version): Ditto.
16031 * gcov-tool.c (print_version): Ditto.
16032 * gengtype.c (create_file): Ditto.
16033 * doc/cpp.texi: Bump @copying's copyright year.
16034 * doc/cppinternals.texi: Ditto.
16035 * doc/gcc.texi: Ditto.
16036 * doc/gccint.texi: Ditto.
16037 * doc/gcov.texi: Ditto.
16038 * doc/install.texi: Ditto.
16039 * doc/invoke.texi: Ditto.
16041 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
16043 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
16046 2020-01-01 Jakub Jelinek <jakub@redhat.com>
16048 PR tree-optimization/93098
16049 * match.pd (popcount): For shift amounts, use integer_onep
16050 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
16051 tests. Make sure that precision is power of two larger than or equal
16052 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
16053 instead of ULL suffixed constants. Formatting fixes.
16055 Copyright (C) 2020 Free Software Foundation, Inc.
16057 Copying and distribution of this file, with or without modification,
16058 are permitted in any medium without royalty provided the copyright
16059 notice and this notice are preserved.