gcc/config/aarch64/tuning_models/ampere1b.h

   1 /* Tuning model description for the Ampere1B core.
   2    Copyright (C) 2023-2024 Free Software Foundation, Inc.
   3
   4    This file is part of GCC.
   5
   6    GCC is free software; you can redistribute it and/or modify it
   7    under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    GCC is distributed in the hope that it will be useful, but
  12    WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GCC; see the file COPYING3.  If not see
  18    <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef GCC_AARCH64_H_AMPERE1B
  21 #define GCC_AARCH64_H_AMPERE1B
  22
  23 #include "generic.h"
  24
  25 static const cpu_prefetch_tune ampere1b_prefetch_tune =
  26 {
  27   48,                   /* num_slots  */
  28   64,                   /* l1_cache_size  */
  29   64,                   /* l1_cache_line_size  */
  30   2048,                 /* l2_cache_size  */
  31   true,                 /* prefetch_dynamic_strides */
  32   -1,                   /* minimum_stride */
  33   -1                    /* default_opt_level  */
  34 };
  35
  36 static const advsimd_vec_cost ampere1b_advsimd_vector_cost =
  37 {
  38   1, /* int_stmt_cost  */
  39   3, /* fp_stmt_cost  */
  40   0, /* ld2_st2_permute_cost  */
  41   0, /* ld3_st3_permute_cost  */
  42   0, /* ld4_st4_permute_cost  */
  43   2, /* permute_cost  */
  44   8, /* reduc_i8_cost  */
  45   6, /* reduc_i16_cost  */
  46   4, /* reduc_i32_cost  */
  47   2, /* reduc_i64_cost  */
  48   9, /* reduc_f16_cost  */
  49   6, /* reduc_f32_cost  */
  50   3, /* reduc_f64_cost  */
  51   5, /* store_elt_extra_cost  */
  52   5, /* vec_to_scalar_cost  */
  53   5, /* scalar_to_vec_cost  */
  54   4, /* align_load_cost  */
  55   4, /* unalign_load_cost  */
  56   1, /* unalign_store_cost  */
  57   1  /* store_cost  */
  58 };
  59
  60 /* Ampere-1B costs for vector insn classes.  */
  61 static const struct cpu_vector_cost ampere1b_vector_cost =
  62 {
  63   1, /* scalar_int_stmt_cost  */
  64   3, /* scalar_fp_stmt_cost  */
  65   4, /* scalar_load_cost  */
  66   1, /* scalar_store_cost  */
  67   1, /* cond_taken_branch_cost  */
  68   1, /* cond_not_taken_branch_cost  */
  69   &ampere1b_advsimd_vector_cost, /* advsimd  */
  70   nullptr, /* sve  */
  71   nullptr  /* issue_info  */
  72 };
  73
  74 static const struct tune_params ampere1b_tunings =
  75 {
  76   &ampere1b_extra_costs,
  77   &generic_addrcost_table,
  78   &generic_regmove_cost,
  79   &ampere1b_vector_cost,
  80   &generic_branch_cost,
  81   &generic_approx_modes,
  82   SVE_NOT_IMPLEMENTED, /* sve_width  */
  83   { 3, /* load_int.  */
  84     1, /* store_int.  */
  85     4, /* load_fp.  */
  86     4, /* store_fp.  */
  87     4, /* load_pred.  */
  88     4 /* store_pred.  */
  89   }, /* memmov_cost.  */
  90   4, /* issue_rate  */
  91   (AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_AES_AESMC |
  92    AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK |
  93    AARCH64_FUSE_ALU_BRANCH /* adds, ands, bics, ccmp, ccmn */ |
  94    AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_ALU_CBZ |
  95    AARCH64_FUSE_ADDSUB_2REG_CONST1),
  96   /* fusible_ops  */
  97   "32",         /* function_align.  */
  98   "4",          /* jump_align.  */
  99   "32:16",      /* loop_align.  */
 100   2,    /* int_reassoc_width.  */
 101   4,    /* fp_reassoc_width.  */
 102   4,    /* fma_reassoc_width.  */
 103   2,    /* vec_reassoc_width.  */
 104   2,    /* min_div_recip_mul_sf.  */
 105   2,    /* min_div_recip_mul_df.  */
 106   0,    /* max_case_values.  */
 107   tune_params::AUTOPREFETCHER_STRONG,   /* autoprefetcher_model.  */
 108   (AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND
 109    | AARCH64_EXTRA_TUNE_AVOID_CROSS_LOOP_FMA
 110    | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA), /* tune_flags.  */
 111   &ampere1b_prefetch_tune,
 112   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
 113   AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
 114 };
 115
 116 #endif /* GCC_AARCH64_H_AMPERE1B */