gcc/config/arm/cortex-a9-neon.md

   1 ;; ARM Cortex-A9 pipeline description
   2 ;; Copyright (C) 2010-2021 Free Software Foundation, Inc.
   3 ;;
   4 ;; Neon pipeline description contributed by ARM Ltd.
   5 ;;
   6 ;; This file is part of GCC.
   7 ;;
   8 ;; GCC is free software; you can redistribute it and/or modify it
   9 ;; under the terms of the GNU General Public License as published by
  10 ;; the Free Software Foundation; either version 3, or (at your option)
  11 ;; any later version.
  12 ;;
  13 ;; GCC is distributed in the hope that it will be useful, but
  14 ;; WITHOUT ANY WARRANTY; without even the implied warranty of
  15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 ;; General Public License for more details.
  17 ;;
  18 ;; You should have received a copy of the GNU General Public License
  19 ;; along with GCC; see the file COPYING3.  If not see
  20 ;; <http://www.gnu.org/licenses/>.
  21
  22 (define_attr "cortex_a9_neon_type"
  23    "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs,
  24    neon_bit_ops_q,
  25    neon_vaba,neon_vaba_qqq, neon_vmov,
  26    neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32,
  27    neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,
  28    neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16,
  29    neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,
  30    neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar,
  31    neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,
  32    neon_shift_1,neon_shift_2,neon_shift_3,
  33    neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd,
  34    neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd,
  35    neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar,
  36    neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd,
  37    neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle,
  38    neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs,
  39    neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4,
  40    neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs,
  41    neon_vst2_4_regs_vst3_vst4,neon_vld1_vld2_lane,
  42    neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane,
  43    neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc,
  44    neon_ldm_2,neon_stm_2,none,unknown"
  45   (cond [
  46           (eq_attr "type" "neon_logic, neon_logic_q,\
  47                            neon_bsl, neon_cls, neon_cnt,\
  48                            neon_add, neon_add_q")
  49                           (const_string "neon_int_1")
  50           (eq_attr "type" "neon_add_widen, neon_sub_widen,\
  51                            neon_sub, neon_sub_q")
  52                           (const_string "neon_int_2")
  53           (eq_attr "type" "neon_neg, neon_neg_q,\
  54                            neon_reduc_add, neon_reduc_add_q,\
  55                            neon_reduc_add_long,\
  56                            neon_add_long, neon_sub_long")
  57                           (const_string "neon_int_3")
  58           (eq_attr "type" "neon_abs, neon_abs_q,
  59                            neon_compare_zero, neon_compare_zero_q,\
  60                            neon_add_halve_narrow_q,\
  61                            neon_sub_halve_narrow_q,\
  62                            neon_add_halve, neon_add_halve_q,\
  63                            neon_qadd, neon_qadd_q,\
  64                            neon_tst, neon_tst_q")
  65                           (const_string "neon_int_4")
  66           (eq_attr "type" "neon_abd_long, neon_sub_halve, neon_sub_halve_q,\
  67                            neon_qsub, neon_qsub_q,\
  68                            neon_abd, neon_abd_q,\
  69                            neon_compare, neon_compare_q,\
  70                            neon_minmax, neon_minmax_q, neon_reduc_minmax,\
  71                            neon_reduc_minmax_q")
  72                           (const_string "neon_int_5")
  73           (eq_attr "type" "neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q")
  74                            (const_string "neon_vqneg_vqabs")
  75           (eq_attr "type" "neon_move, neon_move_q")
  76                            (const_string "neon_vmov")
  77           (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q")
  78                            (const_string "neon_bit_ops_q")
  79           (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc")
  80                           (const_string "neon_vaba")
  81           (eq_attr "type" "neon_arith_acc_q")
  82                           (const_string "neon_vaba_qqq")
  83           (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\
  84                            neon_shift_imm_long, neon_shift_imm_narrow_q,\
  85                            neon_shift_reg")
  86                            (const_string "neon_shift_1")
  87           (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,
  88                            neon_sat_shift_imm_narrow_q,\
  89                            neon_sat_shift_reg")
  90                            (const_string "neon_shift_2")
  91           (eq_attr "type" "neon_shift_reg_q")
  92                            (const_string "neon_shift_3")
  93           (eq_attr "type" "neon_sat_shift_reg_q")
  94                            (const_string "neon_vqshl_vrshl_vqrshl_qqq")
  95           (eq_attr "type" "neon_shift_acc, neon_shift_acc_q")
  96                            (const_string "neon_vsra_vrsra")
  97           (eq_attr "type" "neon_mul_b, neon_mul_h,\
  98                            neon_mul_b_long, neon_mul_h_long,\
  99                            neon_sat_mul_b, neon_sat_mul_h,\
 100                            neon_sat_mul_b_long, neon_sat_mul_h_long")
 101                            (const_string
 102                             "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")
 103           (eq_attr "type" "neon_mul_b_q, neon_mul_h_q,\
 104                            neon_sat_mul_b_q, neon_sat_mul_h_q")
 105                            (const_string "neon_mul_qqq_8_16_32_ddd_32")
 106           (eq_attr "type" "neon_mul_s, neon_mul_s_long,\
 107                            neon_sat_mul_s, neon_sat_mul_s_long,\
 108                            neon_mul_h_scalar_q, neon_sat_mul_h_scalar_q,\
 109                            neon_mul_s_scalar, neon_sat_mul_s_scalar,\
 110                            neon_mul_s_scalar_long,\
 111                            neon_sat_mul_s_scalar_long")
 112                            (const_string
 113              "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")
 114           (eq_attr "type" "neon_mla_b, neon_mla_h,\
 115                            neon_mla_b_long, neon_mla_h_long,\
 116                            neon_sat_mla_b_long, neon_sat_mla_h_long,\
 117                            neon_sat_mla_h_scalar_long")
 118                            (const_string
 119                              "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")
 120           (eq_attr "type" "neon_mla_b_q, neon_mla_h_q")
 121                            (const_string "neon_mla_qqq_8_16")
 122           (eq_attr "type" "neon_mla_s, neon_mla_s_long,\
 123                            neon_sat_mla_s_long,\
 124                            neon_mla_h_scalar_q, neon_mla_s_scalar,\
 125                            neon_mla_s_scalar_long,\
 126                            neon_sat_mla_s_scalar_long")
 127                            (const_string
 128  "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")
 129           (eq_attr "type" "neon_mla_s_q, neon_mla_s_scalar_q")
 130                            (const_string "neon_mla_qqq_32_qqd_32_scalar")
 131           (eq_attr "type" "neon_mul_h_scalar, neon_sat_mul_h_scalar,\
 132                            neon_mul_h_scalar_long,\
 133                            neon_sat_mul_h_scalar_long")
 134                           (const_string
 135                             "neon_mul_ddd_16_scalar_32_16_long_scalar")
 136           (eq_attr "type" "neon_mul_s_q, neon_sat_mul_s_q,\
 137                            neon_mul_s_scalar_q")
 138                            (const_string "neon_mul_qqd_32_scalar")
 139           (eq_attr "type" "neon_mla_h_scalar, neon_mla_h_scalar_long")
 140                            (const_string
 141                              "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")
 142           (eq_attr "type" "neon_fp_abd_s, neon_fp_abs_s, neon_fp_neg_s,\
 143                            neon_fp_addsub_s, neon_fp_compare_s,\
 144                            neon_fp_minmax_s, neon_fp_mul_s,\
 145                            neon_fp_recpe_s, neon_fp_rsqrte_s,\
 146                            neon_fp_to_int_s, neon_int_to_fp_s")
 147                            (const_string "neon_fp_vadd_ddd_vabs_dd")
 148           (eq_attr "type" "neon_fp_abd_s_q, neon_fp_abs_s_q,\
 149                            neon_fp_neg_s_q,\
 150                            neon_fp_addsub_s_q, neon_fp_compare_s_q,\
 151                            neon_fp_minmax_s_q, neon_fp_mul_s_q,\
 152                            neon_fp_recpe_s_q, neon_fp_rsqrte_s_q,\
 153                            neon_fp_to_int_s_q, neon_int_to_fp_s_q")
 154                            (const_string "neon_fp_vadd_qqq_vabs_qq")
 155           (eq_attr "type" "neon_fp_reduc_add_s, neon_fp_reduc_minmax_s,\
 156                            neon_fp_reduc_add_s_q, neon_fp_reduc_minmax_s_q")
 157                            (const_string "neon_fp_vsum")
 158           (eq_attr "type" "neon_fp_mul_s_scalar")
 159                            (const_string "neon_fp_vmul_ddd")
 160           (eq_attr "type" "neon_fp_mul_s_scalar_q")
 161                            (const_string "neon_fp_vmul_qqd")
 162           (eq_attr "type" "neon_fp_mla_s")
 163                            (const_string "neon_fp_vmla_ddd")
 164           (eq_attr "type" "neon_fp_mla_s_q")
 165                            (const_string "neon_fp_vmla_qqq")
 166           (eq_attr "type" "neon_fp_mla_s_scalar")
 167                            (const_string "neon_fp_vmla_ddd_scalar")
 168           (eq_attr "type" "neon_fp_mla_s_scalar_q")
 169                            (const_string "neon_fp_vmla_qqq_scalar")
 170           (eq_attr "type" "neon_fp_recps_s, neon_fp_rsqrts_s")
 171                            (const_string "neon_fp_vrecps_vrsqrts_ddd")
 172           (eq_attr "type" "neon_fp_recps_s_q, neon_fp_rsqrts_s_q")
 173                            (const_string "neon_fp_vrecps_vrsqrts_qqq")
 174           (eq_attr "type" "neon_move_narrow_q, neon_dup,\
 175                            neon_dup_q, neon_permute, neon_zip,\
 176                            neon_ext, neon_rev, neon_rev_q")
 177                            (const_string "neon_bp_simple")
 178           (eq_attr "type" "neon_permute_q, neon_ext_q, neon_tbl1, neon_tbl2")
 179                            (const_string "neon_bp_2cycle")
 180           (eq_attr "type" "neon_zip_q, neon_tbl3, neon_tbl4")
 181                            (const_string "neon_bp_3cycle")
 182           (eq_attr "type" "neon_ldr")
 183                            (const_string "neon_ldr")
 184           (eq_attr "type" "neon_str")
 185                            (const_string "neon_str")
 186           (eq_attr "type" "neon_load1_1reg, neon_load1_1reg_q,\
 187                            neon_load1_2reg, neon_load1_2reg_q,\
 188                            neon_load2_2reg, neon_load2_2reg_q")
 189                            (const_string "neon_vld1_1_2_regs")
 190           (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\
 191                            neon_load1_4reg, neon_load1_4reg_q")
 192                            (const_string "neon_vld1_3_4_regs")
 193           (eq_attr "type" "neon_load1_all_lanes, neon_load1_all_lanes_q,\
 194                            neon_load2_all_lanes, neon_load2_all_lanes_q")
 195                            (const_string
 196                               "neon_vld2_2_regs_vld1_vld2_all_lanes")
 197           (eq_attr "type" "neon_load3_all_lanes, neon_load3_all_lanes_q,\
 198                            neon_load4_all_lanes, neon_load4_all_lanes_q,\
 199                            neon_load2_4reg, neon_load2_4reg_q")
 200                            (const_string "neon_vld2_4_regs")
 201           (eq_attr "type" "neon_load3_3reg, neon_load3_3reg_q,\
 202                            neon_load4_4reg, neon_load4_4reg_q")
 203                            (const_string "neon_vld3_vld4")
 204           (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\
 205                            neon_load2_one_lane, neon_load2_one_lane_q")
 206                            (const_string "neon_vld1_vld2_lane")
 207           (eq_attr "type" "neon_load3_one_lane, neon_load3_one_lane_q,\
 208                            neon_load4_one_lane, neon_load4_one_lane_q")
 209                            (const_string "neon_vld3_vld4_lane")
 210           (eq_attr "type" "neon_store1_1reg, neon_store1_1reg_q,\
 211                            neon_store1_2reg, neon_store1_2reg_q,\
 212                            neon_store2_2reg, neon_store2_2reg_q")
 213                            (const_string "neon_vst1_1_2_regs_vst2_2_regs")
 214           (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\
 215                            neon_store1_4reg, neon_store1_4reg_q")
 216                            (const_string "neon_vst1_3_4_regs")
 217           (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\
 218                            neon_store3_3reg, neon_store3_3reg_q,\
 219                            neon_store4_4reg, neon_store4_4reg_q")
 220                            (const_string "neon_vst2_4_regs_vst3_vst4")
 221           (eq_attr "type" "neon_store1_one_lane, neon_store1_one_lane_q,\
 222                            neon_store2_one_lane, neon_store2_one_lane_q")
 223                            (const_string "neon_vst1_vst2_lane")
 224           (eq_attr "type" "neon_store3_one_lane, neon_store3_one_lane_q,\
 225                            neon_store4_one_lane, neon_store4_one_lane_q")
 226                            (const_string "neon_vst3_vst4_lane")
 227           (eq_attr "type" "neon_from_gp")
 228                            (const_string "neon_mcr")
 229           (eq_attr "type" "neon_from_gp_q")
 230                            (const_string "neon_mcr_2_mcrr")
 231           (eq_attr "type" "neon_to_gp")
 232                            (const_string "neon_mrc")
 233           (eq_attr "type" "neon_to_gp_q")
 234                            (const_string "neon_mrrc")]
 235           (const_string "unknown")))
 236
 237 (define_automaton "cortex_a9_neon")
 238
 239 ;; Only one instruction can be issued per cycle.
 240 (define_cpu_unit "cortex_a9_neon_issue_perm" "cortex_a9_neon")
 241
 242 ;; Only one data-processing instruction can be issued per cycle.
 243 (define_cpu_unit "cortex_a9_neon_issue_dp" "cortex_a9_neon")
 244
 245 ;; We need a special mutual exclusion (to be used in addition to
 246 ;; cortex_a9_neon_issue_dp) for the case when an instruction such as
 247 ;; vmla.f is forwarded from E5 of the floating-point multiply pipeline to
 248 ;; E2 of the floating-point add pipeline.  On the cycle previous to that
 249 ;; forward we must prevent issue of any instruction to the floating-point
 250 ;; add pipeline, but still allow issue of a data-processing instruction
 251 ;; to any of the other pipelines.
 252 (define_cpu_unit "cortex_a9_neon_issue_fadd" "cortex_a9_neon")
 253 (define_cpu_unit "cortex_a9_neon_mcr" "cortex_a9_neon")
 254
 255
 256 ;; Patterns of reservation.
 257 ;; We model the NEON issue units as running in parallel with the core ones.
 258 ;; We assume that multi-cycle NEON instructions get decomposed into
 259 ;; micro-ops as they are issued into the NEON pipeline.
 260
 261 (define_reservation "cortex_a9_neon_dp"
 262                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp")
 263 (define_reservation "cortex_a9_neon_dp_2"
 264                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
 265                      cortex_a9_neon_issue_dp")
 266 (define_reservation "cortex_a9_neon_dp_4"
 267                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
 268                      cortex_a9_neon_issue_dp + cortex_a9_neon_issue_perm,\
 269                      cortex_a9_neon_issue_dp + cortex_a9_neon_issue_perm,\
 270                      cortex_a9_neon_issue_dp")
 271
 272 (define_reservation "cortex_a9_neon_fadd"
 273                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp +  \
 274                      cortex_a9_neon_issue_fadd")
 275 (define_reservation "cortex_a9_neon_fadd_2"
 276                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
 277                      cortex_a9_neon_issue_fadd,\
 278                      cortex_a9_neon_issue_dp")
 279
 280 (define_reservation "cortex_a9_neon_perm"
 281                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm")
 282 (define_reservation "cortex_a9_neon_perm_2"
 283                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,  \
 284                      cortex_a9_neon_issue_perm")
 285 (define_reservation "cortex_a9_neon_perm_3"
 286                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
 287                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 288                      cortex_a9_neon_issue_perm")
 289
 290 (define_reservation "cortex_a9_neon_ls"
 291                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm+cortex_a9_ls")
 292 (define_reservation "cortex_a9_neon_ls_2"
 293                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
 294                      cortex_a9_neon_issue_perm")
 295 (define_reservation "cortex_a9_neon_ls_3"
 296                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
 297                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 298                      cortex_a9_neon_issue_perm")
 299 (define_reservation "cortex_a9_neon_ls_4"
 300                     "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
 301                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 302                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 303                      cortex_a9_neon_issue_perm")
 304 (define_reservation "cortex_a9_neon_ls_5"
 305                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_perm,\
 306                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 307                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 308                      cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
 309                      cortex_a9_neon_issue_perm")
 310
 311 (define_reservation "cortex_a9_neon_fmul_then_fadd"
 312                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
 313                      nothing*3,\
 314                      cortex_a9_neon_issue_fadd")
 315 (define_reservation "cortex_a9_neon_fmul_then_fadd_2"
 316                     "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
 317                      cortex_a9_neon_issue_dp,\
 318                      nothing*2,\
 319                      cortex_a9_neon_issue_fadd,\
 320                      cortex_a9_neon_issue_fadd")
 321
 322 ;; NEON -> core transfers.
 323 (define_insn_reservation "ca9_neon_mrc" 1
 324   (and (eq_attr "tune" "cortexa9")
 325        (eq_attr "cortex_a9_neon_type" "neon_mrc"))
 326   "ca9_issue_vfp_neon + cortex_a9_neon_mcr")
 327
 328 (define_insn_reservation "ca9_neon_mrrc" 1
 329   (and (eq_attr "tune" "cortexa9")
 330        (eq_attr "cortex_a9_neon_type" "neon_mrrc"))
 331   "ca9_issue_vfp_neon + cortex_a9_neon_mcr")
 332
 333 ;; Instructions using this reservation read their source operands at N2, and
 334 ;; produce a result at N3.
 335 (define_insn_reservation "cortex_a9_neon_int_1" 3
 336   (and (eq_attr "tune" "cortexa9")
 337        (eq_attr "cortex_a9_neon_type" "neon_int_1"))
 338   "cortex_a9_neon_dp")
 339
 340 ;; Instructions using this reservation read their (D|Q)m operands at N1,
 341 ;; their (D|Q)n operands at N2, and produce a result at N3.
 342 (define_insn_reservation "cortex_a9_neon_int_2" 3
 343   (and (eq_attr "tune" "cortexa9")
 344        (eq_attr "cortex_a9_neon_type" "neon_int_2"))
 345   "cortex_a9_neon_dp")
 346
 347 ;; Instructions using this reservation read their source operands at N1, and
 348 ;; produce a result at N3.
 349 (define_insn_reservation "cortex_a9_neon_int_3" 3
 350   (and (eq_attr "tune" "cortexa9")
 351        (eq_attr "cortex_a9_neon_type" "neon_int_3"))
 352    "cortex_a9_neon_dp")
 353
 354 ;; Instructions using this reservation read their source operands at N2, and
 355 ;; produce a result at N4.
 356 (define_insn_reservation "cortex_a9_neon_int_4" 4
 357   (and (eq_attr "tune" "cortexa9")
 358        (eq_attr "cortex_a9_neon_type" "neon_int_4"))
 359   "cortex_a9_neon_dp")
 360
 361 ;; Instructions using this reservation read their (D|Q)m operands at N1,
 362 ;; their (D|Q)n operands at N2, and produce a result at N4.
 363 (define_insn_reservation "cortex_a9_neon_int_5" 4
 364   (and (eq_attr "tune" "cortexa9")
 365        (eq_attr "cortex_a9_neon_type" "neon_int_5"))
 366   "cortex_a9_neon_dp")
 367
 368 ;; Instructions using this reservation read their source operands at N1, and
 369 ;; produce a result at N4.
 370 (define_insn_reservation "cortex_a9_neon_vqneg_vqabs" 4
 371   (and (eq_attr "tune" "cortexa9")
 372        (eq_attr "cortex_a9_neon_type" "neon_vqneg_vqabs"))
 373    "cortex_a9_neon_dp")
 374
 375 ;; Instructions using this reservation produce a result at N3.
 376 (define_insn_reservation "cortex_a9_neon_vmov" 3
 377   (and (eq_attr "tune" "cortexa9")
 378        (eq_attr "cortex_a9_neon_type" "neon_vmov"))
 379   "cortex_a9_neon_dp")
 380
 381 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 382 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 383 ;; produce a result at N6.
 384 (define_insn_reservation "cortex_a9_neon_vaba" 6
 385   (and (eq_attr "tune" "cortexa9")
 386        (eq_attr "cortex_a9_neon_type" "neon_vaba"))
 387   "cortex_a9_neon_dp")
 388
 389 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 390 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 391 ;; produce a result at N6 on cycle 2.
 392 (define_insn_reservation "cortex_a9_neon_vaba_qqq" 7
 393   (and (eq_attr "tune" "cortexa9")
 394        (eq_attr "cortex_a9_neon_type" "neon_vaba_qqq"))
 395   "cortex_a9_neon_dp_2")
 396
 397 ;; Instructions using this reservation read their source operands at N2, and
 398 ;; produce a result at N3 on cycle 2.
 399 (define_insn_reservation "cortex_a9_neon_bit_ops_q" 4
 400   (and (eq_attr "tune" "cortexa9")
 401        (eq_attr "cortex_a9_neon_type" "neon_bit_ops_q"))
 402   "cortex_a9_neon_dp_2")
 403
 404 ;; Instructions using this reservation read their source operands at N2, and
 405 ;; produce a result at N6.
 406 (define_insn_reservation "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6
 407   (and (eq_attr "tune" "cortexa9")
 408        (eq_attr "cortex_a9_neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"))
 409   "cortex_a9_neon_dp")
 410
 411 ;; Instructions using this reservation read their source operands at N2, and
 412 ;; produce a result at N6 on cycle 2.
 413 (define_insn_reservation "cortex_a9_neon_mul_qqq_8_16_32_ddd_32" 7
 414   (and (eq_attr "tune" "cortexa9")
 415        (eq_attr "cortex_a9_neon_type" "neon_mul_qqq_8_16_32_ddd_32"))
 416   "cortex_a9_neon_dp_2")
 417
 418 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 419 ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 2.
 420 (define_insn_reservation "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7
 421   (and (eq_attr "tune" "cortexa9")
 422        (eq_attr "cortex_a9_neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"))
 423   "cortex_a9_neon_dp_2")
 424
 425 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 426 ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
 427 ;; produce a result at N6.
 428 (define_insn_reservation "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6
 429   (and (eq_attr "tune" "cortexa9")
 430        (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"))
 431   "cortex_a9_neon_dp")
 432
 433 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 434 ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
 435 ;; produce a result at N6 on cycle 2.
 436 (define_insn_reservation "cortex_a9_neon_mla_qqq_8_16" 7
 437   (and (eq_attr "tune" "cortexa9")
 438        (eq_attr "cortex_a9_neon_type" "neon_mla_qqq_8_16"))
 439   "cortex_a9_neon_dp_2")
 440
 441 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 442 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 443 ;; produce a result at N6 on cycle 2.
 444 (define_insn_reservation "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7
 445   (and (eq_attr "tune" "cortexa9")
 446        (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))
 447   "cortex_a9_neon_dp_2")
 448
 449 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 450 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 451 ;; produce a result at N6 on cycle 4.
 452 (define_insn_reservation "cortex_a9_neon_mla_qqq_32_qqd_32_scalar" 9
 453   (and (eq_attr "tune" "cortexa9")
 454        (eq_attr "cortex_a9_neon_type" "neon_mla_qqq_32_qqd_32_scalar"))
 455   "cortex_a9_neon_dp_4")
 456
 457 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 458 ;; their (D|Q)m operands at N1, and produce a result at N6.
 459 (define_insn_reservation "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar" 6
 460   (and (eq_attr "tune" "cortexa9")
 461        (eq_attr "cortex_a9_neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar"))
 462   "cortex_a9_neon_dp")
 463
 464 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 465 ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 4.
 466 (define_insn_reservation "cortex_a9_neon_mul_qqd_32_scalar" 9
 467   (and (eq_attr "tune" "cortexa9")
 468        (eq_attr "cortex_a9_neon_type" "neon_mul_qqd_32_scalar"))
 469   "cortex_a9_neon_dp_4")
 470
 471 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 472 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 473 ;; produce a result at N6.
 474 (define_insn_reservation "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6
 475   (and (eq_attr "tune" "cortexa9")
 476        (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"))
 477   "cortex_a9_neon_dp")
 478
 479 ;; Instructions using this reservation read their source operands at N1, and
 480 ;; produce a result at N3.
 481 (define_insn_reservation "cortex_a9_neon_shift_1" 3
 482   (and (eq_attr "tune" "cortexa9")
 483        (eq_attr "cortex_a9_neon_type" "neon_shift_1"))
 484   "cortex_a9_neon_dp")
 485
 486 ;; Instructions using this reservation read their source operands at N1, and
 487 ;; produce a result at N4.
 488 (define_insn_reservation "cortex_a9_neon_shift_2" 4
 489   (and (eq_attr "tune" "cortexa9")
 490        (eq_attr "cortex_a9_neon_type" "neon_shift_2"))
 491   "cortex_a9_neon_dp")
 492
 493 ;; Instructions using this reservation read their source operands at N1, and
 494 ;; produce a result at N3 on cycle 2.
 495 (define_insn_reservation "cortex_a9_neon_shift_3" 4
 496   (and (eq_attr "tune" "cortexa9")
 497        (eq_attr "cortex_a9_neon_type" "neon_shift_3"))
 498   "cortex_a9_neon_dp_2")
 499
 500 ;; Instructions using this reservation read their source operands at N1, and
 501 ;; produce a result at N4 on cycle 2.
 502 (define_insn_reservation "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq" 5
 503   (and (eq_attr "tune" "cortexa9")
 504        (eq_attr "cortex_a9_neon_type" "neon_vqshl_vrshl_vqrshl_qqq"))
 505   "cortex_a9_neon_dp_2")
 506
 507 ;; Instructions using this reservation read their (D|Q)m operands at N1,
 508 ;; their (D|Q)d operands at N3, and produce a result at N6.
 509 (define_insn_reservation "cortex_a9_neon_vsra_vrsra" 6
 510   (and (eq_attr "tune" "cortexa9")
 511        (eq_attr "cortex_a9_neon_type" "neon_vsra_vrsra"))
 512   "cortex_a9_neon_dp")
 513
 514 ;; Instructions using this reservation read their source operands at N2, and
 515 ;; produce a result at N5.
 516 (define_insn_reservation "cortex_a9_neon_fp_vadd_ddd_vabs_dd" 5
 517   (and (eq_attr "tune" "cortexa9")
 518        (eq_attr "cortex_a9_neon_type" "neon_fp_vadd_ddd_vabs_dd"))
 519   "cortex_a9_neon_fadd")
 520
 521 ;; Instructions using this reservation read their source operands at N2, and
 522 ;; produce a result at N5 on cycle 2.
 523 (define_insn_reservation "cortex_a9_neon_fp_vadd_qqq_vabs_qq" 6
 524   (and (eq_attr "tune" "cortexa9")
 525        (eq_attr "cortex_a9_neon_type" "neon_fp_vadd_qqq_vabs_qq"))
 526   "cortex_a9_neon_fadd_2")
 527
 528 ;; Instructions using this reservation read their source operands at N1, and
 529 ;; produce a result at N5.
 530 (define_insn_reservation "cortex_a9_neon_fp_vsum" 5
 531   (and (eq_attr "tune" "cortexa9")
 532        (eq_attr "cortex_a9_neon_type" "neon_fp_vsum"))
 533   "cortex_a9_neon_fadd")
 534
 535 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 536 ;; their (D|Q)m operands at N1, and produce a result at N5.
 537 (define_insn_reservation "cortex_a9_neon_fp_vmul_ddd" 5
 538   (and (eq_attr "tune" "cortexa9")
 539        (eq_attr "cortex_a9_neon_type" "neon_fp_vmul_ddd"))
 540   "cortex_a9_neon_dp")
 541
 542 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 543 ;; their (D|Q)m operands at N1, and produce a result at N5 on cycle 2.
 544 (define_insn_reservation "cortex_a9_neon_fp_vmul_qqd" 6
 545   (and (eq_attr "tune" "cortexa9")
 546        (eq_attr "cortex_a9_neon_type" "neon_fp_vmul_qqd"))
 547   "cortex_a9_neon_dp_2")
 548
 549 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 550 ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
 551 ;; produce a result at N9.
 552 (define_insn_reservation "cortex_a9_neon_fp_vmla_ddd" 9
 553   (and (eq_attr "tune" "cortexa9")
 554        (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_ddd"))
 555   "cortex_a9_neon_fmul_then_fadd")
 556
 557 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 558 ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
 559 ;; produce a result at N9 on cycle 2.
 560 (define_insn_reservation "cortex_a9_neon_fp_vmla_qqq" 10
 561   (and (eq_attr "tune" "cortexa9")
 562        (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_qqq"))
 563   "cortex_a9_neon_fmul_then_fadd_2")
 564
 565 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 566 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 567 ;; produce a result at N9.
 568 (define_insn_reservation "cortex_a9_neon_fp_vmla_ddd_scalar" 9
 569   (and (eq_attr "tune" "cortexa9")
 570        (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_ddd_scalar"))
 571   "cortex_a9_neon_fmul_then_fadd")
 572
 573 ;; Instructions using this reservation read their (D|Q)n operands at N2,
 574 ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
 575 ;; produce a result at N9 on cycle 2.
 576 (define_insn_reservation "cortex_a9_neon_fp_vmla_qqq_scalar" 10
 577   (and (eq_attr "tune" "cortexa9")
 578        (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_qqq_scalar"))
 579   "cortex_a9_neon_fmul_then_fadd_2")
 580
 581 ;; Instructions using this reservation read their source operands at N2, and
 582 ;; produce a result at N9.
 583 (define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_ddd" 9
 584   (and (eq_attr "tune" "cortexa9")
 585        (eq_attr "cortex_a9_neon_type" "neon_fp_vrecps_vrsqrts_ddd"))
 586   "cortex_a9_neon_fmul_then_fadd")
 587
 588 ;; Instructions using this reservation read their source operands at N2, and
 589 ;; produce a result at N9 on cycle 2.
 590 (define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_qqq" 10
 591   (and (eq_attr "tune" "cortexa9")
 592        (eq_attr "cortex_a9_neon_type" "neon_fp_vrecps_vrsqrts_qqq"))
 593   "cortex_a9_neon_fmul_then_fadd_2")
 594
 595 ;; Instructions using this reservation read their source operands at N1, and
 596 ;; produce a result at N2.
 597 (define_insn_reservation "cortex_a9_neon_bp_simple" 2
 598   (and (eq_attr "tune" "cortexa9")
 599        (eq_attr "cortex_a9_neon_type" "neon_bp_simple"))
 600   "cortex_a9_neon_perm")
 601
 602 ;; Instructions using this reservation read their source operands at N1, and
 603 ;; produce a result at N2 on cycle 2.
 604 (define_insn_reservation "cortex_a9_neon_bp_2cycle" 3
 605   (and (eq_attr "tune" "cortexa9")
 606        (eq_attr "cortex_a9_neon_type" "neon_bp_2cycle"))
 607   "cortex_a9_neon_perm_2")
 608
 609 ;; Instructions using this reservation read their source operands at N1, and
 610 ;; produce a result at N2 on cycle 3.
 611 (define_insn_reservation "cortex_a9_neon_bp_3cycle" 4
 612   (and (eq_attr "tune" "cortexa9")
 613        (eq_attr "cortex_a9_neon_type" "neon_bp_3cycle"))
 614   "cortex_a9_neon_perm_3")
 615
 616 ;; Instructions using this reservation produce a result at N1.
 617 (define_insn_reservation "cortex_a9_neon_ldr" 1
 618   (and (eq_attr "tune" "cortexa9")
 619        (eq_attr "cortex_a9_neon_type" "neon_ldr"))
 620   "cortex_a9_neon_ls")
 621
 622 ;; Instructions using this reservation read their source operands at N1.
 623 (define_insn_reservation "cortex_a9_neon_str" 0
 624   (and (eq_attr "tune" "cortexa9")
 625        (eq_attr "cortex_a9_neon_type" "neon_str"))
 626   "cortex_a9_neon_ls")
 627
 628 ;; Instructions using this reservation produce a result at N1 on cycle 2.
 629 (define_insn_reservation "cortex_a9_neon_vld1_1_2_regs" 2
 630   (and (eq_attr "tune" "cortexa9")
 631        (eq_attr "cortex_a9_neon_type" "neon_vld1_1_2_regs"))
 632   "cortex_a9_neon_ls_2")
 633
 634 ;; Instructions using this reservation produce a result at N1 on cycle 3.
 635 (define_insn_reservation "cortex_a9_neon_vld1_3_4_regs" 3
 636   (and (eq_attr "tune" "cortexa9")
 637        (eq_attr "cortex_a9_neon_type" "neon_vld1_3_4_regs"))
 638   "cortex_a9_neon_ls_3")
 639
 640 ;; Instructions using this reservation produce a result at N2 on cycle 2.
 641 (define_insn_reservation "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes" 3
 642   (and (eq_attr "tune" "cortexa9")
 643        (eq_attr "cortex_a9_neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes"))
 644   "cortex_a9_neon_ls_2")
 645
 646 ;; Instructions using this reservation produce a result at N2 on cycle 3.
 647 (define_insn_reservation "cortex_a9_neon_vld2_4_regs" 4
 648   (and (eq_attr "tune" "cortexa9")
 649        (eq_attr "cortex_a9_neon_type" "neon_vld2_4_regs"))
 650   "cortex_a9_neon_ls_3")
 651
 652 ;; Instructions using this reservation produce a result at N2 on cycle 4.
 653 (define_insn_reservation "cortex_a9_neon_vld3_vld4" 5
 654   (and (eq_attr "tune" "cortexa9")
 655        (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4"))
 656   "cortex_a9_neon_ls_4")
 657
 658 ;; Instructions using this reservation read their source operands at N1.
 659 (define_insn_reservation "cortex_a9_neon_vst1_1_2_regs_vst2_2_regs" 0
 660   (and (eq_attr "tune" "cortexa9")
 661        (eq_attr "cortex_a9_neon_type" "neon_vst1_1_2_regs_vst2_2_regs"))
 662   "cortex_a9_neon_ls_2")
 663
 664 ;; Instructions using this reservation read their source operands at N1.
 665 (define_insn_reservation "cortex_a9_neon_vst1_3_4_regs" 0
 666   (and (eq_attr "tune" "cortexa9")
 667        (eq_attr "cortex_a9_neon_type" "neon_vst1_3_4_regs"))
 668   "cortex_a9_neon_ls_3")
 669
 670 ;; Instructions using this reservation read their source operands at N1.
 671 (define_insn_reservation "cortex_a9_neon_vst2_4_regs_vst3_vst4" 0
 672   (and (eq_attr "tune" "cortexa9")
 673        (eq_attr "cortex_a9_neon_type" "neon_vst2_4_regs_vst3_vst4"))
 674   "cortex_a9_neon_ls_4")
 675
 676 ;; Instructions using this reservation read their source operands at N1, and
 677 ;; produce a result at N2 on cycle 3.
 678 (define_insn_reservation "cortex_a9_neon_vld1_vld2_lane" 4
 679   (and (eq_attr "tune" "cortexa9")
 680        (eq_attr "cortex_a9_neon_type" "neon_vld1_vld2_lane"))
 681   "cortex_a9_neon_ls_3")
 682
 683 ;; Instructions using this reservation read their source operands at N1, and
 684 ;; produce a result at N2 on cycle 5.
 685 (define_insn_reservation "cortex_a9_neon_vld3_vld4_lane" 6
 686   (and (eq_attr "tune" "cortexa9")
 687        (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4_lane"))
 688   "cortex_a9_neon_ls_5")
 689
 690 ;; Instructions using this reservation read their source operands at N1.
 691 (define_insn_reservation "cortex_a9_neon_vst1_vst2_lane" 0
 692   (and (eq_attr "tune" "cortexa9")
 693        (eq_attr "cortex_a9_neon_type" "neon_vst1_vst2_lane"))
 694   "cortex_a9_neon_ls_2")
 695
 696 ;; Instructions using this reservation read their source operands at N1.
 697 (define_insn_reservation "cortex_a9_neon_vst3_vst4_lane" 0
 698   (and (eq_attr "tune" "cortexa9")
 699        (eq_attr "cortex_a9_neon_type" "neon_vst3_vst4_lane"))
 700   "cortex_a9_neon_ls_3")
 701
 702 ;; Instructions using this reservation produce a result at N2 on cycle 2.
 703 (define_insn_reservation "cortex_a9_neon_vld3_vld4_all_lanes" 3
 704   (and (eq_attr "tune" "cortexa9")
 705        (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4_all_lanes"))
 706   "cortex_a9_neon_ls_3")
 707
 708 ;; Instructions using this reservation produce a result at N2.
 709 (define_insn_reservation "cortex_a9_neon_mcr" 2
 710   (and (eq_attr "tune" "cortexa9")
 711        (eq_attr "cortex_a9_neon_type" "neon_mcr"))
 712   "cortex_a9_neon_perm")
 713
 714 ;; Instructions using this reservation produce a result at N2.
 715 (define_insn_reservation "cortex_a9_neon_mcr_2_mcrr" 2
 716   (and (eq_attr "tune" "cortexa9")
 717        (eq_attr "cortex_a9_neon_type" "neon_mcr_2_mcrr"))
 718   "cortex_a9_neon_perm_2")
 719
 720 ;; Exceptions to the default latencies.
 721
 722 (define_bypass 1 "cortex_a9_neon_mcr_2_mcrr"
 723                "cortex_a9_neon_int_1,\
 724                cortex_a9_neon_int_4,\
 725                cortex_a9_neon_bit_ops_q,\
 726                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 727                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 728                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 729                cortex_a9_neon_mla_qqq_8_16,\
 730                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 731                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 732                cortex_a9_neon_fp_vmla_ddd,\
 733                cortex_a9_neon_fp_vmla_qqq,\
 734                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 735                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 736
 737 (define_bypass 1 "cortex_a9_neon_mcr"
 738                "cortex_a9_neon_int_1,\
 739                cortex_a9_neon_int_4,\
 740                cortex_a9_neon_bit_ops_q,\
 741                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 742                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 743                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 744                cortex_a9_neon_mla_qqq_8_16,\
 745                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 746                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 747                cortex_a9_neon_fp_vmla_ddd,\
 748                cortex_a9_neon_fp_vmla_qqq,\
 749                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 750                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 751
 752 (define_bypass 2 "cortex_a9_neon_vld3_vld4_all_lanes"
 753                "cortex_a9_neon_int_1,\
 754                cortex_a9_neon_int_4,\
 755                cortex_a9_neon_bit_ops_q,\
 756                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 757                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 758                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 759                cortex_a9_neon_mla_qqq_8_16,\
 760                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 761                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 762                cortex_a9_neon_fp_vmla_ddd,\
 763                cortex_a9_neon_fp_vmla_qqq,\
 764                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 765                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 766
 767 (define_bypass 5 "cortex_a9_neon_vld3_vld4_lane"
 768                "cortex_a9_neon_int_1,\
 769                cortex_a9_neon_int_4,\
 770                cortex_a9_neon_bit_ops_q,\
 771                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 772                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 773                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 774                cortex_a9_neon_mla_qqq_8_16,\
 775                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 776                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 777                cortex_a9_neon_fp_vmla_ddd,\
 778                cortex_a9_neon_fp_vmla_qqq,\
 779                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 780                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 781
 782 (define_bypass 3 "cortex_a9_neon_vld1_vld2_lane"
 783                "cortex_a9_neon_int_1,\
 784                cortex_a9_neon_int_4,\
 785                cortex_a9_neon_bit_ops_q,\
 786                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 787                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 788                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 789                cortex_a9_neon_mla_qqq_8_16,\
 790                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 791                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 792                cortex_a9_neon_fp_vmla_ddd,\
 793                cortex_a9_neon_fp_vmla_qqq,\
 794                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 795                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 796
 797 (define_bypass 4 "cortex_a9_neon_vld3_vld4"
 798                "cortex_a9_neon_int_1,\
 799                cortex_a9_neon_int_4,\
 800                cortex_a9_neon_bit_ops_q,\
 801                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 802                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 803                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 804                cortex_a9_neon_mla_qqq_8_16,\
 805                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 806                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 807                cortex_a9_neon_fp_vmla_ddd,\
 808                cortex_a9_neon_fp_vmla_qqq,\
 809                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 810                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 811
 812 (define_bypass 3 "cortex_a9_neon_vld2_4_regs"
 813                "cortex_a9_neon_int_1,\
 814                cortex_a9_neon_int_4,\
 815                cortex_a9_neon_bit_ops_q,\
 816                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 817                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 818                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 819                cortex_a9_neon_mla_qqq_8_16,\
 820                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 821                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 822                cortex_a9_neon_fp_vmla_ddd,\
 823                cortex_a9_neon_fp_vmla_qqq,\
 824                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 825                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 826
 827 (define_bypass 2 "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes"
 828                "cortex_a9_neon_int_1,\
 829                cortex_a9_neon_int_4,\
 830                cortex_a9_neon_bit_ops_q,\
 831                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 832                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 833                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 834                cortex_a9_neon_mla_qqq_8_16,\
 835                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 836                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 837                cortex_a9_neon_fp_vmla_ddd,\
 838                cortex_a9_neon_fp_vmla_qqq,\
 839                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 840                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 841
 842 (define_bypass 2 "cortex_a9_neon_vld1_3_4_regs"
 843                "cortex_a9_neon_int_1,\
 844                cortex_a9_neon_int_4,\
 845                cortex_a9_neon_bit_ops_q,\
 846                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 847                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 848                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 849                cortex_a9_neon_mla_qqq_8_16,\
 850                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 851                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 852                cortex_a9_neon_fp_vmla_ddd,\
 853                cortex_a9_neon_fp_vmla_qqq,\
 854                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 855                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 856
 857 (define_bypass 1 "cortex_a9_neon_vld1_1_2_regs"
 858                "cortex_a9_neon_int_1,\
 859                cortex_a9_neon_int_4,\
 860                cortex_a9_neon_bit_ops_q,\
 861                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 862                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 863                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 864                cortex_a9_neon_mla_qqq_8_16,\
 865                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 866                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 867                cortex_a9_neon_fp_vmla_ddd,\
 868                cortex_a9_neon_fp_vmla_qqq,\
 869                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 870                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 871
 872 (define_bypass 0 "cortex_a9_neon_ldr"
 873                "cortex_a9_neon_int_1,\
 874                cortex_a9_neon_int_4,\
 875                cortex_a9_neon_bit_ops_q,\
 876                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 877                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 878                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 879                cortex_a9_neon_mla_qqq_8_16,\
 880                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 881                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 882                cortex_a9_neon_fp_vmla_ddd,\
 883                cortex_a9_neon_fp_vmla_qqq,\
 884                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 885                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 886
 887 (define_bypass 3 "cortex_a9_neon_bp_3cycle"
 888                "cortex_a9_neon_int_1,\
 889                cortex_a9_neon_int_4,\
 890                cortex_a9_neon_bit_ops_q,\
 891                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 892                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 893                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 894                cortex_a9_neon_mla_qqq_8_16,\
 895                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 896                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 897                cortex_a9_neon_fp_vmla_ddd,\
 898                cortex_a9_neon_fp_vmla_qqq,\
 899                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 900                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 901
 902 (define_bypass 2 "cortex_a9_neon_bp_2cycle"
 903                "cortex_a9_neon_int_1,\
 904                cortex_a9_neon_int_4,\
 905                cortex_a9_neon_bit_ops_q,\
 906                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 907                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 908                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 909                cortex_a9_neon_mla_qqq_8_16,\
 910                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 911                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 912                cortex_a9_neon_fp_vmla_ddd,\
 913                cortex_a9_neon_fp_vmla_qqq,\
 914                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 915                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 916
 917 (define_bypass 1 "cortex_a9_neon_bp_simple"
 918                "cortex_a9_neon_int_1,\
 919                cortex_a9_neon_int_4,\
 920                cortex_a9_neon_bit_ops_q,\
 921                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 922                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 923                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 924                cortex_a9_neon_mla_qqq_8_16,\
 925                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 926                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 927                cortex_a9_neon_fp_vmla_ddd,\
 928                cortex_a9_neon_fp_vmla_qqq,\
 929                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 930                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 931
 932 (define_bypass 9 "cortex_a9_neon_fp_vrecps_vrsqrts_qqq"
 933                "cortex_a9_neon_int_1,\
 934                cortex_a9_neon_int_4,\
 935                cortex_a9_neon_bit_ops_q,\
 936                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 937                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 938                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 939                cortex_a9_neon_mla_qqq_8_16,\
 940                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 941                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 942                cortex_a9_neon_fp_vmla_ddd,\
 943                cortex_a9_neon_fp_vmla_qqq,\
 944                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 945                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 946
 947 (define_bypass 8 "cortex_a9_neon_fp_vrecps_vrsqrts_ddd"
 948                "cortex_a9_neon_int_1,\
 949                cortex_a9_neon_int_4,\
 950                cortex_a9_neon_bit_ops_q,\
 951                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 952                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 953                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 954                cortex_a9_neon_mla_qqq_8_16,\
 955                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 956                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 957                cortex_a9_neon_fp_vmla_ddd,\
 958                cortex_a9_neon_fp_vmla_qqq,\
 959                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 960                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 961
 962 (define_bypass 9 "cortex_a9_neon_fp_vmla_qqq_scalar"
 963                "cortex_a9_neon_int_1,\
 964                cortex_a9_neon_int_4,\
 965                cortex_a9_neon_bit_ops_q,\
 966                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 967                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 968                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 969                cortex_a9_neon_mla_qqq_8_16,\
 970                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 971                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 972                cortex_a9_neon_fp_vmla_ddd,\
 973                cortex_a9_neon_fp_vmla_qqq,\
 974                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 975                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 976
 977 (define_bypass 8 "cortex_a9_neon_fp_vmla_ddd_scalar"
 978                "cortex_a9_neon_int_1,\
 979                cortex_a9_neon_int_4,\
 980                cortex_a9_neon_bit_ops_q,\
 981                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 982                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 983                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 984                cortex_a9_neon_mla_qqq_8_16,\
 985                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
 986                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
 987                cortex_a9_neon_fp_vmla_ddd,\
 988                cortex_a9_neon_fp_vmla_qqq,\
 989                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
 990                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
 991
 992 (define_bypass 9 "cortex_a9_neon_fp_vmla_qqq"
 993                "cortex_a9_neon_int_1,\
 994                cortex_a9_neon_int_4,\
 995                cortex_a9_neon_bit_ops_q,\
 996                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
 997                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
 998                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
 999                cortex_a9_neon_mla_qqq_8_16,\
1000                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1001                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1002                cortex_a9_neon_fp_vmla_ddd,\
1003                cortex_a9_neon_fp_vmla_qqq,\
1004                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1005                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1006
1007 (define_bypass 8 "cortex_a9_neon_fp_vmla_ddd"
1008                "cortex_a9_neon_int_1,\
1009                cortex_a9_neon_int_4,\
1010                cortex_a9_neon_bit_ops_q,\
1011                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1012                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1013                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1014                cortex_a9_neon_mla_qqq_8_16,\
1015                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1016                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1017                cortex_a9_neon_fp_vmla_ddd,\
1018                cortex_a9_neon_fp_vmla_qqq,\
1019                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1020                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1021
1022 (define_bypass 5 "cortex_a9_neon_fp_vmul_qqd"
1023                "cortex_a9_neon_int_1,\
1024                cortex_a9_neon_int_4,\
1025                cortex_a9_neon_bit_ops_q,\
1026                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1027                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1028                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1029                cortex_a9_neon_mla_qqq_8_16,\
1030                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1031                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1032                cortex_a9_neon_fp_vmla_ddd,\
1033                cortex_a9_neon_fp_vmla_qqq,\
1034                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1035                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1036
1037 (define_bypass 4 "cortex_a9_neon_fp_vmul_ddd"
1038                "cortex_a9_neon_int_1,\
1039                cortex_a9_neon_int_4,\
1040                cortex_a9_neon_bit_ops_q,\
1041                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1042                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1043                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1044                cortex_a9_neon_mla_qqq_8_16,\
1045                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1046                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1047                cortex_a9_neon_fp_vmla_ddd,\
1048                cortex_a9_neon_fp_vmla_qqq,\
1049                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1050                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1051
1052 (define_bypass 4 "cortex_a9_neon_fp_vsum"
1053                "cortex_a9_neon_int_1,\
1054                cortex_a9_neon_int_4,\
1055                cortex_a9_neon_bit_ops_q,\
1056                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1057                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1058                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1059                cortex_a9_neon_mla_qqq_8_16,\
1060                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1061                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1062                cortex_a9_neon_fp_vmla_ddd,\
1063                cortex_a9_neon_fp_vmla_qqq,\
1064                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1065                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1066
1067 (define_bypass 5 "cortex_a9_neon_fp_vadd_qqq_vabs_qq"
1068                "cortex_a9_neon_int_1,\
1069                cortex_a9_neon_int_4,\
1070                cortex_a9_neon_bit_ops_q,\
1071                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1072                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1073                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1074                cortex_a9_neon_mla_qqq_8_16,\
1075                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1076                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1077                cortex_a9_neon_fp_vmla_ddd,\
1078                cortex_a9_neon_fp_vmla_qqq,\
1079                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1080                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1081
1082 (define_bypass 4 "cortex_a9_neon_fp_vadd_ddd_vabs_dd"
1083                "cortex_a9_neon_int_1,\
1084                cortex_a9_neon_int_4,\
1085                cortex_a9_neon_bit_ops_q,\
1086                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1087                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1088                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1089                cortex_a9_neon_mla_qqq_8_16,\
1090                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1091                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1092                cortex_a9_neon_fp_vmla_ddd,\
1093                cortex_a9_neon_fp_vmla_qqq,\
1094                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1095                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1096
1097 (define_bypass 5 "cortex_a9_neon_vsra_vrsra"
1098                "cortex_a9_neon_int_1,\
1099                cortex_a9_neon_int_4,\
1100                cortex_a9_neon_bit_ops_q,\
1101                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1102                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1103                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1104                cortex_a9_neon_mla_qqq_8_16,\
1105                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1106                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1107                cortex_a9_neon_fp_vmla_ddd,\
1108                cortex_a9_neon_fp_vmla_qqq,\
1109                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1110                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1111
1112 (define_bypass 4 "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq"
1113                "cortex_a9_neon_int_1,\
1114                cortex_a9_neon_int_4,\
1115                cortex_a9_neon_bit_ops_q,\
1116                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1117                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1118                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1119                cortex_a9_neon_mla_qqq_8_16,\
1120                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1121                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1122                cortex_a9_neon_fp_vmla_ddd,\
1123                cortex_a9_neon_fp_vmla_qqq,\
1124                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1125                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1126
1127 (define_bypass 3 "cortex_a9_neon_shift_3"
1128                "cortex_a9_neon_int_1,\
1129                cortex_a9_neon_int_4,\
1130                cortex_a9_neon_bit_ops_q,\
1131                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1132                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1133                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1134                cortex_a9_neon_mla_qqq_8_16,\
1135                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1136                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1137                cortex_a9_neon_fp_vmla_ddd,\
1138                cortex_a9_neon_fp_vmla_qqq,\
1139                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1140                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1141
1142 (define_bypass 3 "cortex_a9_neon_shift_2"
1143                "cortex_a9_neon_int_1,\
1144                cortex_a9_neon_int_4,\
1145                cortex_a9_neon_bit_ops_q,\
1146                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1147                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1148                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1149                cortex_a9_neon_mla_qqq_8_16,\
1150                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1151                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1152                cortex_a9_neon_fp_vmla_ddd,\
1153                cortex_a9_neon_fp_vmla_qqq,\
1154                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1155                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1156
1157 (define_bypass 2 "cortex_a9_neon_shift_1"
1158                "cortex_a9_neon_int_1,\
1159                cortex_a9_neon_int_4,\
1160                cortex_a9_neon_bit_ops_q,\
1161                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1162                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1163                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1164                cortex_a9_neon_mla_qqq_8_16,\
1165                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1166                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1167                cortex_a9_neon_fp_vmla_ddd,\
1168                cortex_a9_neon_fp_vmla_qqq,\
1169                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1170                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1171
1172 (define_bypass 5 "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"
1173                "cortex_a9_neon_int_1,\
1174                cortex_a9_neon_int_4,\
1175                cortex_a9_neon_bit_ops_q,\
1176                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1177                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1178                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1179                cortex_a9_neon_mla_qqq_8_16,\
1180                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1181                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1182                cortex_a9_neon_fp_vmla_ddd,\
1183                cortex_a9_neon_fp_vmla_qqq,\
1184                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1185                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1186
1187 (define_bypass 8 "cortex_a9_neon_mul_qqd_32_scalar"
1188                "cortex_a9_neon_int_1,\
1189                cortex_a9_neon_int_4,\
1190                cortex_a9_neon_bit_ops_q,\
1191                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1192                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1193                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1194                cortex_a9_neon_mla_qqq_8_16,\
1195                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1196                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1197                cortex_a9_neon_fp_vmla_ddd,\
1198                cortex_a9_neon_fp_vmla_qqq,\
1199                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1200                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1201
1202 (define_bypass 5 "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar"
1203                "cortex_a9_neon_int_1,\
1204                cortex_a9_neon_int_4,\
1205                cortex_a9_neon_bit_ops_q,\
1206                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1207                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1208                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1209                cortex_a9_neon_mla_qqq_8_16,\
1210                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1211                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1212                cortex_a9_neon_fp_vmla_ddd,\
1213                cortex_a9_neon_fp_vmla_qqq,\
1214                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1215                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1216
1217 (define_bypass 8 "cortex_a9_neon_mla_qqq_32_qqd_32_scalar"
1218                "cortex_a9_neon_int_1,\
1219                cortex_a9_neon_int_4,\
1220                cortex_a9_neon_bit_ops_q,\
1221                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1222                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1223                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1224                cortex_a9_neon_mla_qqq_8_16,\
1225                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1226                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1227                cortex_a9_neon_fp_vmla_ddd,\
1228                cortex_a9_neon_fp_vmla_qqq,\
1229                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1230                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1231
1232 (define_bypass 6 "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"
1233                "cortex_a9_neon_int_1,\
1234                cortex_a9_neon_int_4,\
1235                cortex_a9_neon_bit_ops_q,\
1236                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1237                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1238                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1239                cortex_a9_neon_mla_qqq_8_16,\
1240                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1241                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1242                cortex_a9_neon_fp_vmla_ddd,\
1243                cortex_a9_neon_fp_vmla_qqq,\
1244                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1245                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1246
1247 (define_bypass 6 "cortex_a9_neon_mla_qqq_8_16"
1248                "cortex_a9_neon_int_1,\
1249                cortex_a9_neon_int_4,\
1250                cortex_a9_neon_bit_ops_q,\
1251                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1252                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1253                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1254                cortex_a9_neon_mla_qqq_8_16,\
1255                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1256                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1257                cortex_a9_neon_fp_vmla_ddd,\
1258                cortex_a9_neon_fp_vmla_qqq,\
1259                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1260                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1261
1262 (define_bypass 5 "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"
1263                "cortex_a9_neon_int_1,\
1264                cortex_a9_neon_int_4,\
1265                cortex_a9_neon_bit_ops_q,\
1266                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1267                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1268                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1269                cortex_a9_neon_mla_qqq_8_16,\
1270                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1271                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1272                cortex_a9_neon_fp_vmla_ddd,\
1273                cortex_a9_neon_fp_vmla_qqq,\
1274                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1275                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1276
1277 (define_bypass 6 "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"
1278                "cortex_a9_neon_int_1,\
1279                cortex_a9_neon_int_4,\
1280                cortex_a9_neon_bit_ops_q,\
1281                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1282                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1283                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1284                cortex_a9_neon_mla_qqq_8_16,\
1285                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1286                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1287                cortex_a9_neon_fp_vmla_ddd,\
1288                cortex_a9_neon_fp_vmla_qqq,\
1289                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1290                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1291
1292 (define_bypass 6 "cortex_a9_neon_mul_qqq_8_16_32_ddd_32"
1293                "cortex_a9_neon_int_1,\
1294                cortex_a9_neon_int_4,\
1295                cortex_a9_neon_bit_ops_q,\
1296                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1297                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1298                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1299                cortex_a9_neon_mla_qqq_8_16,\
1300                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1301                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1302                cortex_a9_neon_fp_vmla_ddd,\
1303                cortex_a9_neon_fp_vmla_qqq,\
1304                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1305                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1306
1307 (define_bypass 5 "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"
1308                "cortex_a9_neon_int_1,\
1309                cortex_a9_neon_int_4,\
1310                cortex_a9_neon_bit_ops_q,\
1311                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1312                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1313                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1314                cortex_a9_neon_mla_qqq_8_16,\
1315                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1316                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1317                cortex_a9_neon_fp_vmla_ddd,\
1318                cortex_a9_neon_fp_vmla_qqq,\
1319                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1320                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1321
1322 (define_bypass 6 "cortex_a9_neon_vaba_qqq"
1323                "cortex_a9_neon_int_1,\
1324                cortex_a9_neon_int_4,\
1325                cortex_a9_neon_bit_ops_q,\
1326                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1327                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1328                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1329                cortex_a9_neon_mla_qqq_8_16,\
1330                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1331                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1332                cortex_a9_neon_fp_vmla_ddd,\
1333                cortex_a9_neon_fp_vmla_qqq,\
1334                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1335                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1336
1337 (define_bypass 5 "cortex_a9_neon_vaba"
1338                "cortex_a9_neon_int_1,\
1339                cortex_a9_neon_int_4,\
1340                cortex_a9_neon_bit_ops_q,\
1341                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1342                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1343                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1344                cortex_a9_neon_mla_qqq_8_16,\
1345                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1346                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1347                cortex_a9_neon_fp_vmla_ddd,\
1348                cortex_a9_neon_fp_vmla_qqq,\
1349                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1350                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1351
1352 (define_bypass 2 "cortex_a9_neon_vmov"
1353                "cortex_a9_neon_int_1,\
1354                cortex_a9_neon_int_4,\
1355                cortex_a9_neon_bit_ops_q,\
1356                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1357                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1358                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1359                cortex_a9_neon_mla_qqq_8_16,\
1360                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1361                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1362                cortex_a9_neon_fp_vmla_ddd,\
1363                cortex_a9_neon_fp_vmla_qqq,\
1364                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1365                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1366
1367 (define_bypass 3 "cortex_a9_neon_bit_ops_q"
1368                "cortex_a9_neon_int_1,\
1369                cortex_a9_neon_int_4,\
1370                cortex_a9_neon_bit_ops_q,\
1371                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1372                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1373                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1374                cortex_a9_neon_mla_qqq_8_16,\
1375                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1376                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1377                cortex_a9_neon_fp_vmla_ddd,\
1378                cortex_a9_neon_fp_vmla_qqq,\
1379                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1380                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1381
1382 (define_bypass 3 "cortex_a9_neon_vqneg_vqabs"
1383                "cortex_a9_neon_int_1,\
1384                cortex_a9_neon_int_4,\
1385                cortex_a9_neon_bit_ops_q,\
1386                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1387                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1388                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1389                cortex_a9_neon_mla_qqq_8_16,\
1390                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1391                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1392                cortex_a9_neon_fp_vmla_ddd,\
1393                cortex_a9_neon_fp_vmla_qqq,\
1394                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1395                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1396
1397 (define_bypass 3 "cortex_a9_neon_int_5"
1398                "cortex_a9_neon_int_1,\
1399                cortex_a9_neon_int_4,\
1400                cortex_a9_neon_bit_ops_q,\
1401                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1402                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1403                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1404                cortex_a9_neon_mla_qqq_8_16,\
1405                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1406                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1407                cortex_a9_neon_fp_vmla_ddd,\
1408                cortex_a9_neon_fp_vmla_qqq,\
1409                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1410                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1411
1412 (define_bypass 3 "cortex_a9_neon_int_4"
1413                "cortex_a9_neon_int_1,\
1414                cortex_a9_neon_int_4,\
1415                cortex_a9_neon_bit_ops_q,\
1416                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1417                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1418                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1419                cortex_a9_neon_mla_qqq_8_16,\
1420                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1421                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1422                cortex_a9_neon_fp_vmla_ddd,\
1423                cortex_a9_neon_fp_vmla_qqq,\
1424                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1425                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1426
1427 (define_bypass 2 "cortex_a9_neon_int_3"
1428                "cortex_a9_neon_int_1,\
1429                cortex_a9_neon_int_4,\
1430                cortex_a9_neon_bit_ops_q,\
1431                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1432                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1433                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1434                cortex_a9_neon_mla_qqq_8_16,\
1435                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1436                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1437                cortex_a9_neon_fp_vmla_ddd,\
1438                cortex_a9_neon_fp_vmla_qqq,\
1439                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1440                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1441
1442 (define_bypass 2 "cortex_a9_neon_int_2"
1443                "cortex_a9_neon_int_1,\
1444                cortex_a9_neon_int_4,\
1445                cortex_a9_neon_bit_ops_q,\
1446                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1447                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1448                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1449                cortex_a9_neon_mla_qqq_8_16,\
1450                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1451                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1452                cortex_a9_neon_fp_vmla_ddd,\
1453                cortex_a9_neon_fp_vmla_qqq,\
1454                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1455                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1456
1457 (define_bypass 2 "cortex_a9_neon_int_1"
1458                "cortex_a9_neon_int_1,\
1459                cortex_a9_neon_int_4,\
1460                cortex_a9_neon_bit_ops_q,\
1461                cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
1462                cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
1463                cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
1464                cortex_a9_neon_mla_qqq_8_16,\
1465                cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
1466                cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
1467                cortex_a9_neon_fp_vmla_ddd,\
1468                cortex_a9_neon_fp_vmla_qqq,\
1469                cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
1470                cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
1471