1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2020 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
77 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
,
79 unsigned HOST_WIDE_INT
, bool);
80 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
81 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
82 static rtx_insn
*compress_float_constant (rtx
, rtx
);
83 static rtx
get_subtarget (rtx
);
84 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
85 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
86 machine_mode
, tree
, alias_set_type
, bool, bool);
88 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
90 static int is_aligning_offset (const_tree
, const_tree
);
91 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
92 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
94 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
96 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
98 static rtx
const_vector_from_tree (tree
);
99 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
100 static tree
tree_expr_size (const_tree
);
101 static HOST_WIDE_INT
int_expr_size (tree
);
102 static void convert_mode_scalar (rtx
, rtx
, int);
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
110 init_expr_target (void)
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
121 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
127 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
128 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
129 PATTERN (insn
) = pat
;
131 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
132 mode
= (machine_mode
) ((int) mode
+ 1))
136 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
137 PUT_MODE (mem
, mode
);
138 PUT_MODE (mem1
, mode
);
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
143 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
144 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
145 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
148 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
151 set_mode_and_regno (reg
, mode
, regno
);
154 SET_DEST (pat
) = reg
;
155 if (recog (pat
, insn
, &num_clobbers
) >= 0)
156 direct_load
[(int) mode
] = 1;
158 SET_SRC (pat
) = mem1
;
159 SET_DEST (pat
) = reg
;
160 if (recog (pat
, insn
, &num_clobbers
) >= 0)
161 direct_load
[(int) mode
] = 1;
164 SET_DEST (pat
) = mem
;
165 if (recog (pat
, insn
, &num_clobbers
) >= 0)
166 direct_store
[(int) mode
] = 1;
169 SET_DEST (pat
) = mem1
;
170 if (recog (pat
, insn
, &num_clobbers
) >= 0)
171 direct_store
[(int) mode
] = 1;
175 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
177 opt_scalar_float_mode mode_iter
;
178 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
180 scalar_float_mode mode
= mode_iter
.require ();
181 scalar_float_mode srcmode
;
182 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
186 ic
= can_extend_p (mode
, srcmode
, 0);
187 if (ic
== CODE_FOR_nothing
)
190 PUT_MODE (mem
, srcmode
);
192 if (insn_operand_matches (ic
, 1, mem
))
193 float_extend_from_mem
[mode
][srcmode
] = true;
198 /* This is run at the start of compiling a function. */
203 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
213 convert_move (rtx to
, rtx from
, int unsignedp
)
215 machine_mode to_mode
= GET_MODE (to
);
216 machine_mode from_mode
= GET_MODE (from
);
218 gcc_assert (to_mode
!= BLKmode
);
219 gcc_assert (from_mode
!= BLKmode
);
221 /* If the source and destination are already the same, then there's
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
230 scalar_int_mode to_int_mode
;
231 if (GET_CODE (from
) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from
)
233 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
235 >= GET_MODE_PRECISION (to_int_mode
))
236 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
238 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
239 from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 if (GET_MODE_UNIT_PRECISION (to_mode
)
254 > GET_MODE_UNIT_PRECISION (from_mode
))
256 optab op
= unsignedp
? zext_optab
: sext_optab
;
257 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
258 if (icode
!= CODE_FOR_nothing
)
260 emit_unop_insn (icode
, to
, from
,
261 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
266 if (GET_MODE_UNIT_PRECISION (to_mode
)
267 < GET_MODE_UNIT_PRECISION (from_mode
))
269 insn_code icode
= convert_optab_handler (trunc_optab
,
271 if (icode
!= CODE_FOR_nothing
)
273 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
278 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
279 GET_MODE_BITSIZE (to_mode
)));
281 if (VECTOR_MODE_P (to_mode
))
282 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
284 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
286 emit_move_insn (to
, from
);
290 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
292 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
293 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
297 convert_mode_scalar (to
, from
, unsignedp
);
300 /* Like convert_move, but deals only with scalar modes. */
303 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
305 /* Both modes should be scalar types. */
306 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
307 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
308 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
309 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
313 gcc_assert (to_real
== from_real
);
315 /* rtx code for making an equivalent value. */
316 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
317 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
325 gcc_assert ((GET_MODE_PRECISION (from_mode
)
326 != GET_MODE_PRECISION (to_mode
))
327 || (DECIMAL_FLOAT_MODE_P (from_mode
)
328 != DECIMAL_FLOAT_MODE_P (to_mode
)));
330 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
331 /* Conversion between decimal float and binary float, same size. */
332 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
333 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
338 /* Try converting directly if the insn is supported. */
340 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
341 if (code
!= CODE_FOR_nothing
)
343 emit_unop_insn (code
, to
, from
,
344 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
348 /* Otherwise use a libcall. */
349 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
351 /* Is this conversion implemented yet? */
352 gcc_assert (libcall
);
355 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
357 insns
= get_insns ();
359 emit_libcall_block (insns
, to
, value
,
360 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
362 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
366 /* Handle pointer conversion. */ /* SPEE 900220. */
367 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
371 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
378 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
381 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
387 /* Targets are expected to provide conversion insns between PxImode and
388 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
389 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
391 scalar_int_mode full_mode
392 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
394 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
395 != CODE_FOR_nothing
);
397 if (full_mode
!= from_mode
)
398 from
= convert_to_mode (full_mode
, from
, unsignedp
);
399 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
403 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
406 scalar_int_mode full_mode
407 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
408 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
409 enum insn_code icode
;
411 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
412 gcc_assert (icode
!= CODE_FOR_nothing
);
414 if (to_mode
== full_mode
)
416 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
420 new_from
= gen_reg_rtx (full_mode
);
421 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
423 /* else proceed to integer conversions below. */
424 from_mode
= full_mode
;
428 /* Make sure both are fixed-point modes or both are not. */
429 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
430 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
431 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
433 /* If we widen from_mode to to_mode and they are in the same class,
434 we won't saturate the result.
435 Otherwise, always saturate the result to play safe. */
436 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
437 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
438 expand_fixed_convert (to
, from
, 0, 0);
440 expand_fixed_convert (to
, from
, 0, 1);
444 /* Now both modes are integers. */
446 /* Handle expanding beyond a word. */
447 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
448 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
455 scalar_mode lowpart_mode
;
456 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
458 /* Try converting directly if the insn is supported. */
459 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
462 /* If FROM is a SUBREG, put it into a register. Do this
463 so that we always generate the same set of insns for
464 better cse'ing; if an intermediate assignment occurred,
465 we won't be doing the operation directly on the SUBREG. */
466 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
467 from
= force_reg (from_mode
, from
);
468 emit_unop_insn (code
, to
, from
, equiv_code
);
471 /* Next, try converting via full word. */
472 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
473 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
474 != CODE_FOR_nothing
))
476 rtx word_to
= gen_reg_rtx (word_mode
);
479 if (reg_overlap_mentioned_p (to
, from
))
480 from
= force_reg (from_mode
, from
);
483 convert_move (word_to
, from
, unsignedp
);
484 emit_unop_insn (code
, to
, word_to
, equiv_code
);
488 /* No special multiword conversion insn; do it by hand. */
491 /* Since we will turn this into a no conflict block, we must ensure
492 the source does not overlap the target so force it into an isolated
493 register when maybe so. Likewise for any MEM input, since the
494 conversion sequence might require several references to it and we
495 must ensure we're getting the same value every time. */
497 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
498 from
= force_reg (from_mode
, from
);
500 /* Get a copy of FROM widened to a word, if necessary. */
501 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
502 lowpart_mode
= word_mode
;
504 lowpart_mode
= from_mode
;
506 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
508 lowpart
= gen_lowpart (lowpart_mode
, to
);
509 emit_move_insn (lowpart
, lowfrom
);
511 /* Compute the value to put in each remaining word. */
513 fill_value
= const0_rtx
;
515 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
516 LT
, lowfrom
, const0_rtx
,
517 lowpart_mode
, 0, -1);
519 /* Fill the remaining words. */
520 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
522 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
523 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
525 gcc_assert (subword
);
527 if (fill_value
!= subword
)
528 emit_move_insn (subword
, fill_value
);
531 insns
= get_insns ();
538 /* Truncating multi-word to a word or less. */
539 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
540 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
543 && ! MEM_VOLATILE_P (from
)
544 && direct_load
[(int) to_mode
]
545 && ! mode_dependent_address_p (XEXP (from
, 0),
546 MEM_ADDR_SPACE (from
)))
548 || GET_CODE (from
) == SUBREG
))
549 from
= force_reg (from_mode
, from
);
550 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
554 /* Now follow all the conversions between integers
555 no more than a word long. */
557 /* For truncation, usually we can just refer to FROM in a narrower mode. */
558 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
559 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
562 && ! MEM_VOLATILE_P (from
)
563 && direct_load
[(int) to_mode
]
564 && ! mode_dependent_address_p (XEXP (from
, 0),
565 MEM_ADDR_SPACE (from
)))
567 || GET_CODE (from
) == SUBREG
))
568 from
= force_reg (from_mode
, from
);
569 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
570 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
571 from
= copy_to_reg (from
);
572 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
576 /* Handle extension. */
577 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
579 /* Convert directly if that works. */
580 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
583 emit_unop_insn (code
, to
, from
, equiv_code
);
591 /* Search for a mode to convert via. */
592 opt_scalar_mode intermediate_iter
;
593 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
595 scalar_mode intermediate
= intermediate_iter
.require ();
596 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
598 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
599 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
601 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
602 != CODE_FOR_nothing
))
604 convert_move (to
, convert_to_mode (intermediate
, from
,
605 unsignedp
), unsignedp
);
610 /* No suitable intermediate mode.
611 Generate what we need with shifts. */
612 shift_amount
= (GET_MODE_PRECISION (to_mode
)
613 - GET_MODE_PRECISION (from_mode
));
614 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
615 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
617 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
620 emit_move_insn (to
, tmp
);
625 /* Support special truncate insns for certain modes. */
626 if (convert_optab_handler (trunc_optab
, to_mode
,
627 from_mode
) != CODE_FOR_nothing
)
629 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
634 /* Handle truncation of volatile memrefs, and so on;
635 the things that couldn't be truncated directly,
636 and for which there was no special instruction.
638 ??? Code above formerly short-circuited this, for most integer
639 mode pairs, with a force_reg in from_mode followed by a recursive
640 call to this routine. Appears always to have been wrong. */
641 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
643 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
644 emit_move_insn (to
, temp
);
648 /* Mode combination is not recognized. */
652 /* Return an rtx for a value that would result
653 from converting X to mode MODE.
654 Both X and MODE may be floating, or both integer.
655 UNSIGNEDP is nonzero if X is an unsigned value.
656 This can be done by referring to a part of X in place
657 or by copying to a new temporary with conversion. */
660 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
662 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
665 /* Return an rtx for a value that would result
666 from converting X from mode OLDMODE to mode MODE.
667 Both modes may be floating, or both integer.
668 UNSIGNEDP is nonzero if X is an unsigned value.
670 This can be done by referring to a part of X in place
671 or by copying to a new temporary with conversion.
673 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
676 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
679 scalar_int_mode int_mode
;
681 /* If FROM is a SUBREG that indicates that we have already done at least
682 the required extension, strip it. */
684 if (GET_CODE (x
) == SUBREG
685 && SUBREG_PROMOTED_VAR_P (x
)
686 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
687 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
688 >= GET_MODE_PRECISION (int_mode
))
689 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
690 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
692 if (GET_MODE (x
) != VOIDmode
)
693 oldmode
= GET_MODE (x
);
698 if (CONST_SCALAR_INT_P (x
)
699 && is_int_mode (mode
, &int_mode
))
701 /* If the caller did not tell us the old mode, then there is not
702 much to do with respect to canonicalization. We have to
703 assume that all the bits are significant. */
704 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
705 oldmode
= MAX_MODE_INT
;
706 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
707 GET_MODE_PRECISION (int_mode
),
708 unsignedp
? UNSIGNED
: SIGNED
);
709 return immed_wide_int_const (w
, int_mode
);
712 /* We can do this with a gen_lowpart if both desired and current modes
713 are integer, and this is either a constant integer, a register, or a
715 scalar_int_mode int_oldmode
;
716 if (is_int_mode (mode
, &int_mode
)
717 && is_int_mode (oldmode
, &int_oldmode
)
718 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
719 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
720 || CONST_POLY_INT_P (x
)
722 && (!HARD_REGISTER_P (x
)
723 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
724 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
725 return gen_lowpart (int_mode
, x
);
727 /* Converting from integer constant into mode is always equivalent to an
729 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
731 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
732 GET_MODE_BITSIZE (oldmode
)));
733 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
736 temp
= gen_reg_rtx (mode
);
737 convert_move (temp
, x
, unsignedp
);
741 /* Return the largest alignment we can use for doing a move (or store)
742 of MAX_PIECES. ALIGN is the largest alignment we could use. */
745 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
747 scalar_int_mode tmode
748 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
750 if (align
>= GET_MODE_ALIGNMENT (tmode
))
751 align
= GET_MODE_ALIGNMENT (tmode
);
754 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
755 opt_scalar_int_mode mode_iter
;
756 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
758 tmode
= mode_iter
.require ();
759 if (GET_MODE_SIZE (tmode
) > max_pieces
760 || targetm
.slow_unaligned_access (tmode
, align
))
765 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
771 /* Return the widest integer mode that is narrower than SIZE bytes. */
773 static scalar_int_mode
774 widest_int_mode_for_size (unsigned int size
)
776 scalar_int_mode result
= NARROWEST_INT_MODE
;
778 gcc_checking_assert (size
> 1);
780 opt_scalar_int_mode tmode
;
781 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
782 if (GET_MODE_SIZE (tmode
.require ()) < size
)
783 result
= tmode
.require ();
788 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
789 and should be performed piecewise. */
792 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
793 enum by_pieces_operation op
)
795 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
796 optimize_insn_for_speed_p ());
799 /* Determine whether the LEN bytes can be moved by using several move
800 instructions. Return nonzero if a call to move_by_pieces should
804 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
806 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
809 /* Return number of insns required to perform operation OP by pieces
810 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
812 unsigned HOST_WIDE_INT
813 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
814 unsigned int max_size
, by_pieces_operation op
)
816 unsigned HOST_WIDE_INT n_insns
= 0;
818 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
820 while (max_size
> 1 && l
> 0)
822 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
823 enum insn_code icode
;
825 unsigned int modesize
= GET_MODE_SIZE (mode
);
827 icode
= optab_handler (mov_optab
, mode
);
828 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
830 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
838 case COMPARE_BY_PIECES
:
839 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
840 int batch_ops
= 4 * batch
- 1;
841 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
842 n_insns
+= full
* batch_ops
;
843 if (n_pieces
% batch
!= 0)
856 /* Used when performing piecewise block operations, holds information
857 about one of the memory objects involved. The member functions
858 can be used to generate code for loading from the object and
859 updating the address when iterating. */
863 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
866 /* The address of the object. Can differ from that seen in the
867 MEM rtx if we copied the address to a register. */
869 /* Nonzero if the address on the object has an autoincrement already,
870 signifies whether that was an increment or decrement. */
871 signed char m_addr_inc
;
872 /* Nonzero if we intend to use autoinc without the address already
873 having autoinc form. We will insert add insns around each memory
874 reference, expecting later passes to form autoinc addressing modes.
875 The only supported options are predecrement and postincrement. */
876 signed char m_explicit_inc
;
877 /* True if we have either of the two possible cases of using
880 /* True if this is an address to be used for load operations rather
884 /* Optionally, a function to obtain constants for any given offset into
885 the objects, and data associated with it. */
886 by_pieces_constfn m_constfn
;
889 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
890 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
891 void increment_address (HOST_WIDE_INT
);
892 void maybe_predec (HOST_WIDE_INT
);
893 void maybe_postinc (HOST_WIDE_INT
);
894 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
901 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
902 true if the operation to be performed on this object is a load
903 rather than a store. For stores, OBJ can be NULL, in which case we
904 assume the operation is a stack push. For loads, the optional
905 CONSTFN and its associated CFNDATA can be used in place of the
908 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
910 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
916 rtx addr
= XEXP (obj
, 0);
917 rtx_code code
= GET_CODE (addr
);
919 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
920 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
923 m_addr_inc
= dec
? -1 : 1;
925 /* While we have always looked for these codes here, the code
926 implementing the memory operation has never handled them.
927 Support could be added later if necessary or beneficial. */
928 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
936 if (STACK_GROWS_DOWNWARD
)
942 gcc_assert (constfn
!= NULL
);
946 gcc_assert (is_load
);
949 /* Decide whether to use autoinc for an address involved in a memory op.
950 MODE is the mode of the accesses, REVERSE is true if we've decided to
951 perform the operation starting from the end, and LEN is the length of
952 the operation. Don't override an earlier decision to set m_auto. */
955 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
958 if (m_auto
|| m_obj
== NULL_RTX
)
961 bool use_predec
= (m_is_load
962 ? USE_LOAD_PRE_DECREMENT (mode
)
963 : USE_STORE_PRE_DECREMENT (mode
));
964 bool use_postinc
= (m_is_load
965 ? USE_LOAD_POST_INCREMENT (mode
)
966 : USE_STORE_POST_INCREMENT (mode
));
967 machine_mode addr_mode
= get_address_mode (m_obj
);
969 if (use_predec
&& reverse
)
971 m_addr
= copy_to_mode_reg (addr_mode
,
972 plus_constant (addr_mode
,
977 else if (use_postinc
&& !reverse
)
979 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
983 else if (CONSTANT_P (m_addr
))
984 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
987 /* Adjust the address to refer to the data at OFFSET in MODE. If we
988 are using autoincrement for this address, we don't add the offset,
989 but we still modify the MEM's properties. */
992 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
995 return m_constfn (m_cfndata
, offset
, mode
);
996 if (m_obj
== NULL_RTX
)
999 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1001 return adjust_address (m_obj
, mode
, offset
);
1004 /* Emit an add instruction to increment the address by SIZE. */
1007 pieces_addr::increment_address (HOST_WIDE_INT size
)
1009 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1010 emit_insn (gen_add2_insn (m_addr
, amount
));
1013 /* If we are supposed to decrement the address after each access, emit code
1014 to do so now. Increment by SIZE (which has should have the correct sign
1018 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1020 if (m_explicit_inc
>= 0)
1022 gcc_assert (HAVE_PRE_DECREMENT
);
1023 increment_address (size
);
1026 /* If we are supposed to decrement the address after each access, emit code
1027 to do so now. Increment by SIZE. */
1030 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1032 if (m_explicit_inc
<= 0)
1034 gcc_assert (HAVE_POST_INCREMENT
);
1035 increment_address (size
);
1038 /* This structure is used by do_op_by_pieces to describe the operation
1041 class op_by_pieces_d
1044 pieces_addr m_to
, m_from
;
1045 unsigned HOST_WIDE_INT m_len
;
1046 HOST_WIDE_INT m_offset
;
1047 unsigned int m_align
;
1048 unsigned int m_max_size
;
1051 /* Virtual functions, overriden by derived classes for the specific
1053 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1054 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1055 virtual void finish_mode (machine_mode
)
1060 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1061 unsigned HOST_WIDE_INT
, unsigned int);
1065 /* The constructor for an op_by_pieces_d structure. We require two
1066 objects named TO and FROM, which are identified as loads or stores
1067 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1068 and its associated FROM_CFN_DATA can be used to replace loads with
1069 constant values. LEN describes the length of the operation. */
1071 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1072 rtx from
, bool from_load
,
1073 by_pieces_constfn from_cfn
,
1074 void *from_cfn_data
,
1075 unsigned HOST_WIDE_INT len
,
1077 : m_to (to
, to_load
, NULL
, NULL
),
1078 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1079 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1081 int toi
= m_to
.get_addr_inc ();
1082 int fromi
= m_from
.get_addr_inc ();
1083 if (toi
>= 0 && fromi
>= 0)
1085 else if (toi
<= 0 && fromi
<= 0)
1090 m_offset
= m_reverse
? len
: 0;
1091 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1092 from
? MEM_ALIGN (from
) : align
);
1094 /* If copying requires more than two move insns,
1095 copy addresses to registers (to make displacements shorter)
1096 and use post-increment if available. */
1097 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1099 /* Find the mode of the largest comparison. */
1100 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1102 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1103 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1106 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1110 /* This function contains the main loop used for expanding a block
1111 operation. First move what we can in the largest integer mode,
1112 then go to successively smaller modes. For every access, call
1113 GENFUN with the two operands and the EXTRA_DATA. */
1116 op_by_pieces_d::run ()
1118 while (m_max_size
> 1 && m_len
> 0)
1120 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1122 if (prepare_mode (mode
, m_align
))
1124 unsigned int size
= GET_MODE_SIZE (mode
);
1125 rtx to1
= NULL_RTX
, from1
;
1127 while (m_len
>= size
)
1132 to1
= m_to
.adjust (mode
, m_offset
);
1133 from1
= m_from
.adjust (mode
, m_offset
);
1135 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1136 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1138 generate (to1
, from1
, mode
);
1140 m_to
.maybe_postinc (size
);
1141 m_from
.maybe_postinc (size
);
1152 m_max_size
= GET_MODE_SIZE (mode
);
1155 /* The code above should have handled everything. */
1156 gcc_assert (!m_len
);
1159 /* Derived class from op_by_pieces_d, providing support for block move
1162 class move_by_pieces_d
: public op_by_pieces_d
1164 insn_gen_fn m_gen_fun
;
1165 void generate (rtx
, rtx
, machine_mode
);
1166 bool prepare_mode (machine_mode
, unsigned int);
1169 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1171 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1174 rtx
finish_retmode (memop_ret
);
1177 /* Return true if MODE can be used for a set of copies, given an
1178 alignment ALIGN. Prepare whatever data is necessary for later
1179 calls to generate. */
1182 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1184 insn_code icode
= optab_handler (mov_optab
, mode
);
1185 m_gen_fun
= GEN_FCN (icode
);
1186 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1189 /* A callback used when iterating for a compare_by_pieces_operation.
1190 OP0 and OP1 are the values that have been loaded and should be
1191 compared in MODE. If OP0 is NULL, this means we should generate a
1192 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1193 gen function that should be used to generate the mode. */
1196 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1197 machine_mode mode ATTRIBUTE_UNUSED
)
1199 #ifdef PUSH_ROUNDING
1200 if (op0
== NULL_RTX
)
1202 emit_single_push_insn (mode
, op1
, NULL
);
1206 emit_insn (m_gen_fun (op0
, op1
));
1209 /* Perform the final adjustment at the end of a string to obtain the
1210 correct return value for the block operation.
1211 Return value is based on RETMODE argument. */
1214 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1216 gcc_assert (!m_reverse
);
1217 if (retmode
== RETURN_END_MINUS_ONE
)
1219 m_to
.maybe_postinc (-1);
1222 return m_to
.adjust (QImode
, m_offset
);
1225 /* Generate several move instructions to copy LEN bytes from block FROM to
1226 block TO. (These are MEM rtx's with BLKmode).
1228 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1229 used to push FROM to the stack.
1231 ALIGN is maximum stack alignment we can assume.
1233 Return value is based on RETMODE argument. */
1236 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1237 unsigned int align
, memop_ret retmode
)
1239 #ifndef PUSH_ROUNDING
1244 move_by_pieces_d
data (to
, from
, len
, align
);
1248 if (retmode
!= RETURN_BEGIN
)
1249 return data
.finish_retmode (retmode
);
1254 /* Derived class from op_by_pieces_d, providing support for block move
1257 class store_by_pieces_d
: public op_by_pieces_d
1259 insn_gen_fn m_gen_fun
;
1260 void generate (rtx
, rtx
, machine_mode
);
1261 bool prepare_mode (machine_mode
, unsigned int);
1264 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1265 unsigned HOST_WIDE_INT len
, unsigned int align
)
1266 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1269 rtx
finish_retmode (memop_ret
);
1272 /* Return true if MODE can be used for a set of stores, given an
1273 alignment ALIGN. Prepare whatever data is necessary for later
1274 calls to generate. */
1277 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1279 insn_code icode
= optab_handler (mov_optab
, mode
);
1280 m_gen_fun
= GEN_FCN (icode
);
1281 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1284 /* A callback used when iterating for a store_by_pieces_operation.
1285 OP0 and OP1 are the values that have been loaded and should be
1286 compared in MODE. If OP0 is NULL, this means we should generate a
1287 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1288 gen function that should be used to generate the mode. */
1291 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1293 emit_insn (m_gen_fun (op0
, op1
));
1296 /* Perform the final adjustment at the end of a string to obtain the
1297 correct return value for the block operation.
1298 Return value is based on RETMODE argument. */
1301 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1303 gcc_assert (!m_reverse
);
1304 if (retmode
== RETURN_END_MINUS_ONE
)
1306 m_to
.maybe_postinc (-1);
1309 return m_to
.adjust (QImode
, m_offset
);
1312 /* Determine whether the LEN bytes generated by CONSTFUN can be
1313 stored to memory using several move instructions. CONSTFUNDATA is
1314 a pointer which will be passed as argument in every CONSTFUN call.
1315 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1316 a memset operation and false if it's a copy of a constant string.
1317 Return nonzero if a call to store_by_pieces should succeed. */
1320 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1321 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1322 void *constfundata
, unsigned int align
, bool memsetp
)
1324 unsigned HOST_WIDE_INT l
;
1325 unsigned int max_size
;
1326 HOST_WIDE_INT offset
= 0;
1327 enum insn_code icode
;
1329 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1330 rtx cst ATTRIBUTE_UNUSED
;
1335 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1339 optimize_insn_for_speed_p ()))
1342 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1344 /* We would first store what we can in the largest integer mode, then go to
1345 successively smaller modes. */
1348 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1352 max_size
= STORE_MAX_PIECES
+ 1;
1353 while (max_size
> 1 && l
> 0)
1355 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1357 icode
= optab_handler (mov_optab
, mode
);
1358 if (icode
!= CODE_FOR_nothing
1359 && align
>= GET_MODE_ALIGNMENT (mode
))
1361 unsigned int size
= GET_MODE_SIZE (mode
);
1368 cst
= (*constfun
) (constfundata
, offset
, mode
);
1369 if (!targetm
.legitimate_constant_p (mode
, cst
))
1379 max_size
= GET_MODE_SIZE (mode
);
1382 /* The code above should have handled everything. */
1389 /* Generate several move instructions to store LEN bytes generated by
1390 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1391 pointer which will be passed as argument in every CONSTFUN call.
1392 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1393 a memset operation and false if it's a copy of a constant string.
1394 Return value is based on RETMODE argument. */
1397 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1398 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1399 void *constfundata
, unsigned int align
, bool memsetp
,
1404 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1408 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1410 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1411 optimize_insn_for_speed_p ()));
1413 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1416 if (retmode
!= RETURN_BEGIN
)
1417 return data
.finish_retmode (retmode
);
1422 /* Callback routine for clear_by_pieces.
1423 Return const0_rtx unconditionally. */
1426 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1431 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1432 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1435 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1440 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1444 /* Context used by compare_by_pieces_genfn. It stores the fail label
1445 to jump to in case of miscomparison, and for branch ratios greater than 1,
1446 it stores an accumulator and the current and maximum counts before
1447 emitting another branch. */
1449 class compare_by_pieces_d
: public op_by_pieces_d
1451 rtx_code_label
*m_fail_label
;
1453 int m_count
, m_batch
;
1455 void generate (rtx
, rtx
, machine_mode
);
1456 bool prepare_mode (machine_mode
, unsigned int);
1457 void finish_mode (machine_mode
);
1459 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1460 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1461 rtx_code_label
*fail_label
)
1462 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1464 m_fail_label
= fail_label
;
1468 /* A callback used when iterating for a compare_by_pieces_operation.
1469 OP0 and OP1 are the values that have been loaded and should be
1470 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1471 context structure. */
1474 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1478 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1479 true, OPTAB_LIB_WIDEN
);
1481 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1482 true, OPTAB_LIB_WIDEN
);
1483 m_accumulator
= temp
;
1485 if (++m_count
< m_batch
)
1489 op0
= m_accumulator
;
1491 m_accumulator
= NULL_RTX
;
1493 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1494 m_fail_label
, profile_probability::uninitialized ());
1497 /* Return true if MODE can be used for a set of moves and comparisons,
1498 given an alignment ALIGN. Prepare whatever data is necessary for
1499 later calls to generate. */
1502 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1504 insn_code icode
= optab_handler (mov_optab
, mode
);
1505 if (icode
== CODE_FOR_nothing
1506 || align
< GET_MODE_ALIGNMENT (mode
)
1507 || !can_compare_p (EQ
, mode
, ccp_jump
))
1509 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1512 m_accumulator
= NULL_RTX
;
1517 /* Called after expanding a series of comparisons in MODE. If we have
1518 accumulated results for which we haven't emitted a branch yet, do
1522 compare_by_pieces_d::finish_mode (machine_mode mode
)
1524 if (m_accumulator
!= NULL_RTX
)
1525 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1526 NULL_RTX
, NULL
, m_fail_label
,
1527 profile_probability::uninitialized ());
1530 /* Generate several move instructions to compare LEN bytes from blocks
1531 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1533 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1534 used to push FROM to the stack.
1536 ALIGN is maximum stack alignment we can assume.
1538 Optionally, the caller can pass a constfn and associated data in A1_CFN
1539 and A1_CFN_DATA. describing that the second operand being compared is a
1540 known constant and how to obtain its data. */
1543 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1544 rtx target
, unsigned int align
,
1545 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1547 rtx_code_label
*fail_label
= gen_label_rtx ();
1548 rtx_code_label
*end_label
= gen_label_rtx ();
1550 if (target
== NULL_RTX
1551 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1552 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1554 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1559 emit_move_insn (target
, const0_rtx
);
1560 emit_jump (end_label
);
1562 emit_label (fail_label
);
1563 emit_move_insn (target
, const1_rtx
);
1564 emit_label (end_label
);
1569 /* Emit code to move a block Y to a block X. This may be done with
1570 string-move instructions, with multiple scalar move instructions,
1571 or with a library call.
1573 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1574 SIZE is an rtx that says how long they are.
1575 ALIGN is the maximum alignment we can assume they have.
1576 METHOD describes what kind of copy this is, and what mechanisms may be used.
1577 MIN_SIZE is the minimal size of block to move
1578 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1579 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1581 Return the address of the new block, if memcpy is called and returns it,
1585 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1586 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1587 unsigned HOST_WIDE_INT min_size
,
1588 unsigned HOST_WIDE_INT max_size
,
1589 unsigned HOST_WIDE_INT probable_max_size
,
1590 bool bail_out_libcall
, bool *is_move_done
,
1598 *is_move_done
= true;
1601 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1606 case BLOCK_OP_NORMAL
:
1607 case BLOCK_OP_TAILCALL
:
1611 case BLOCK_OP_CALL_PARM
:
1612 may_use_call
= block_move_libcall_safe_for_call_parm ();
1614 /* Make inhibit_defer_pop nonzero around the library call
1615 to force it to pop the arguments right away. */
1619 case BLOCK_OP_NO_LIBCALL
:
1623 case BLOCK_OP_NO_LIBCALL_RET
:
1631 gcc_assert (MEM_P (x
) && MEM_P (y
));
1632 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1633 gcc_assert (align
>= BITS_PER_UNIT
);
1635 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1636 block copy is more efficient for other large modes, e.g. DCmode. */
1637 x
= adjust_address (x
, BLKmode
, 0);
1638 y
= adjust_address (y
, BLKmode
, 0);
1640 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1641 can be incorrect is coming from __builtin_memcpy. */
1642 poly_int64 const_size
;
1643 if (poly_int_rtx_p (size
, &const_size
))
1645 x
= shallow_copy_rtx (x
);
1646 y
= shallow_copy_rtx (y
);
1647 set_mem_size (x
, const_size
);
1648 set_mem_size (y
, const_size
);
1651 bool pieces_ok
= CONST_INT_P (size
)
1652 && can_move_by_pieces (INTVAL (size
), align
);
1653 bool pattern_ok
= false;
1655 if (!pieces_ok
|| might_overlap
)
1658 = emit_block_move_via_pattern (x
, y
, size
, align
,
1659 expected_align
, expected_size
,
1660 min_size
, max_size
, probable_max_size
,
1662 if (!pattern_ok
&& might_overlap
)
1664 /* Do not try any of the other methods below as they are not safe
1665 for overlapping moves. */
1666 *is_move_done
= false;
1674 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1675 else if (may_use_call
&& !might_overlap
1676 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1677 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1679 if (bail_out_libcall
)
1682 *is_move_done
= false;
1686 if (may_use_call
< 0)
1689 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1690 method
== BLOCK_OP_TAILCALL
);
1692 else if (might_overlap
)
1693 *is_move_done
= false;
1695 emit_block_move_via_loop (x
, y
, size
, align
);
1697 if (method
== BLOCK_OP_CALL_PARM
)
1704 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1706 unsigned HOST_WIDE_INT max
, min
= 0;
1707 if (GET_CODE (size
) == CONST_INT
)
1708 min
= max
= UINTVAL (size
);
1710 max
= GET_MODE_MASK (GET_MODE (size
));
1711 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1715 /* A subroutine of emit_block_move. Returns true if calling the
1716 block move libcall will not clobber any parameters which may have
1717 already been placed on the stack. */
1720 block_move_libcall_safe_for_call_parm (void)
1724 /* If arguments are pushed on the stack, then they're safe. */
1728 /* If registers go on the stack anyway, any argument is sure to clobber
1729 an outgoing argument. */
1730 #if defined (REG_PARM_STACK_SPACE)
1731 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1732 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1733 depend on its argument. */
1735 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1736 && REG_PARM_STACK_SPACE (fn
) != 0)
1740 /* If any argument goes in memory, then it might clobber an outgoing
1743 CUMULATIVE_ARGS args_so_far_v
;
1744 cumulative_args_t args_so_far
;
1747 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1748 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1749 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1751 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1752 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1754 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1755 function_arg_info
arg_info (mode
, /*named=*/true);
1756 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1757 if (!tmp
|| !REG_P (tmp
))
1759 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1761 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1767 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1768 return true if successful.
1770 X is the destination of the copy or move.
1771 Y is the source of the copy or move.
1772 SIZE is the size of the block to be moved.
1774 MIGHT_OVERLAP indicates this originated with expansion of a
1775 builtin_memmove() and the source and destination blocks may
1780 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1781 unsigned int expected_align
,
1782 HOST_WIDE_INT expected_size
,
1783 unsigned HOST_WIDE_INT min_size
,
1784 unsigned HOST_WIDE_INT max_size
,
1785 unsigned HOST_WIDE_INT probable_max_size
,
1788 if (expected_align
< align
)
1789 expected_align
= align
;
1790 if (expected_size
!= -1)
1792 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1793 expected_size
= probable_max_size
;
1794 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1795 expected_size
= min_size
;
1798 /* Since this is a move insn, we don't care about volatility. */
1799 temporary_volatile_ok
v (true);
1801 /* Try the most limited insn first, because there's no point
1802 including more than one in the machine description unless
1803 the more limited one has some advantage. */
1805 opt_scalar_int_mode mode_iter
;
1806 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1808 scalar_int_mode mode
= mode_iter
.require ();
1809 enum insn_code code
;
1811 code
= direct_optab_handler (movmem_optab
, mode
);
1813 code
= direct_optab_handler (cpymem_optab
, mode
);
1815 if (code
!= CODE_FOR_nothing
1816 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1817 here because if SIZE is less than the mode mask, as it is
1818 returned by the macro, it will definitely be less than the
1819 actual mode mask. Since SIZE is within the Pmode address
1820 space, we limit MODE to Pmode. */
1821 && ((CONST_INT_P (size
)
1822 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1823 <= (GET_MODE_MASK (mode
) >> 1)))
1824 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1825 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1827 class expand_operand ops
[9];
1830 /* ??? When called via emit_block_move_for_call, it'd be
1831 nice if there were some way to inform the backend, so
1832 that it doesn't fail the expansion because it thinks
1833 emitting the libcall would be more efficient. */
1834 nops
= insn_data
[(int) code
].n_generator_args
;
1835 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1837 create_fixed_operand (&ops
[0], x
);
1838 create_fixed_operand (&ops
[1], y
);
1839 /* The check above guarantees that this size conversion is valid. */
1840 create_convert_operand_to (&ops
[2], size
, mode
, true);
1841 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1844 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1845 create_integer_operand (&ops
[5], expected_size
);
1849 create_integer_operand (&ops
[6], min_size
);
1850 /* If we cannot represent the maximal size,
1851 make parameter NULL. */
1852 if ((HOST_WIDE_INT
) max_size
!= -1)
1853 create_integer_operand (&ops
[7], max_size
);
1855 create_fixed_operand (&ops
[7], NULL
);
1859 /* If we cannot represent the maximal size,
1860 make parameter NULL. */
1861 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1862 create_integer_operand (&ops
[8], probable_max_size
);
1864 create_fixed_operand (&ops
[8], NULL
);
1866 if (maybe_expand_insn (code
, nops
, ops
))
1874 /* A subroutine of emit_block_move. Copy the data via an explicit
1875 loop. This is used only when libcalls are forbidden. */
1876 /* ??? It'd be nice to copy in hunks larger than QImode. */
1879 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1880 unsigned int align ATTRIBUTE_UNUSED
)
1882 rtx_code_label
*cmp_label
, *top_label
;
1883 rtx iter
, x_addr
, y_addr
, tmp
;
1884 machine_mode x_addr_mode
= get_address_mode (x
);
1885 machine_mode y_addr_mode
= get_address_mode (y
);
1886 machine_mode iter_mode
;
1888 iter_mode
= GET_MODE (size
);
1889 if (iter_mode
== VOIDmode
)
1890 iter_mode
= word_mode
;
1892 top_label
= gen_label_rtx ();
1893 cmp_label
= gen_label_rtx ();
1894 iter
= gen_reg_rtx (iter_mode
);
1896 emit_move_insn (iter
, const0_rtx
);
1898 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1899 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1900 do_pending_stack_adjust ();
1902 emit_jump (cmp_label
);
1903 emit_label (top_label
);
1905 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1906 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1908 if (x_addr_mode
!= y_addr_mode
)
1909 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1910 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1912 x
= change_address (x
, QImode
, x_addr
);
1913 y
= change_address (y
, QImode
, y_addr
);
1915 emit_move_insn (x
, y
);
1917 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1918 true, OPTAB_LIB_WIDEN
);
1920 emit_move_insn (iter
, tmp
);
1922 emit_label (cmp_label
);
1924 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1926 profile_probability::guessed_always ()
1927 .apply_scale (9, 10));
1930 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1931 TAILCALL is true if this is a tail call. */
1934 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1935 rtx size
, bool tailcall
)
1937 rtx dst_addr
, src_addr
;
1938 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1939 machine_mode size_mode
;
1941 /* Since dst and src are passed to a libcall, mark the corresponding
1942 tree EXPR as addressable. */
1943 tree dst_expr
= MEM_EXPR (dst
);
1944 tree src_expr
= MEM_EXPR (src
);
1946 mark_addressable (dst_expr
);
1948 mark_addressable (src_expr
);
1950 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1951 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1952 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1954 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1955 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1956 src_tree
= make_tree (ptr_type_node
, src_addr
);
1958 size_mode
= TYPE_MODE (sizetype
);
1959 size
= convert_to_mode (size_mode
, size
, 1);
1960 size
= copy_to_mode_reg (size_mode
, size
);
1961 size_tree
= make_tree (sizetype
, size
);
1963 /* It is incorrect to use the libcall calling conventions for calls to
1964 memcpy/memmove/memcmp because they can be provided by the user. */
1965 tree fn
= builtin_decl_implicit (fncode
);
1966 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1967 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1969 return expand_call (call_expr
, NULL_RTX
, false);
1972 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1973 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1974 otherwise return null. */
1977 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1978 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1979 HOST_WIDE_INT align
)
1981 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1983 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1986 class expand_operand ops
[5];
1987 create_output_operand (&ops
[0], target
, insn_mode
);
1988 create_fixed_operand (&ops
[1], arg1_rtx
);
1989 create_fixed_operand (&ops
[2], arg2_rtx
);
1990 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1991 TYPE_UNSIGNED (arg3_type
));
1992 create_integer_operand (&ops
[4], align
);
1993 if (maybe_expand_insn (icode
, 5, ops
))
1994 return ops
[0].value
;
1998 /* Expand a block compare between X and Y with length LEN using the
1999 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2000 of the expression that was used to calculate the length. ALIGN
2001 gives the known minimum common alignment. */
2004 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2007 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2008 implementing memcmp because it will stop if it encounters two
2010 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2012 if (icode
== CODE_FOR_nothing
)
2015 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2018 /* Emit code to compare a block Y to a block X. This may be done with
2019 string-compare instructions, with multiple scalar instructions,
2020 or with a library call.
2022 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2023 they are. LEN_TYPE is the type of the expression that was used to
2026 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2027 value of a normal memcmp call, instead we can just compare for equality.
2028 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2031 Optionally, the caller can pass a constfn and associated data in Y_CFN
2032 and Y_CFN_DATA. describing that the second operand being compared is a
2033 known constant and how to obtain its data.
2034 Return the result of the comparison, or NULL_RTX if we failed to
2035 perform the operation. */
2038 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2039 bool equality_only
, by_pieces_constfn y_cfn
,
2044 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2047 gcc_assert (MEM_P (x
) && MEM_P (y
));
2048 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2049 gcc_assert (align
>= BITS_PER_UNIT
);
2051 x
= adjust_address (x
, BLKmode
, 0);
2052 y
= adjust_address (y
, BLKmode
, 0);
2055 && CONST_INT_P (len
)
2056 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2057 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2060 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2065 /* Copy all or part of a value X into registers starting at REGNO.
2066 The number of registers to be filled is NREGS. */
2069 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2074 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2075 x
= validize_mem (force_const_mem (mode
, x
));
2077 /* See if the machine can do this with a load multiple insn. */
2078 if (targetm
.have_load_multiple ())
2080 rtx_insn
*last
= get_last_insn ();
2081 rtx first
= gen_rtx_REG (word_mode
, regno
);
2082 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2089 delete_insns_since (last
);
2092 for (int i
= 0; i
< nregs
; i
++)
2093 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2094 operand_subword_force (x
, i
, mode
));
2097 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2098 The number of registers to be filled is NREGS. */
2101 move_block_from_reg (int regno
, rtx x
, int nregs
)
2106 /* See if the machine can do this with a store multiple insn. */
2107 if (targetm
.have_store_multiple ())
2109 rtx_insn
*last
= get_last_insn ();
2110 rtx first
= gen_rtx_REG (word_mode
, regno
);
2111 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2118 delete_insns_since (last
);
2121 for (int i
= 0; i
< nregs
; i
++)
2123 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2127 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2131 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2132 ORIG, where ORIG is a non-consecutive group of registers represented by
2133 a PARALLEL. The clone is identical to the original except in that the
2134 original set of registers is replaced by a new set of pseudo registers.
2135 The new set has the same modes as the original set. */
2138 gen_group_rtx (rtx orig
)
2143 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2145 length
= XVECLEN (orig
, 0);
2146 tmps
= XALLOCAVEC (rtx
, length
);
2148 /* Skip a NULL entry in first slot. */
2149 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2154 for (; i
< length
; i
++)
2156 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2157 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2159 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2162 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2165 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2166 except that values are placed in TMPS[i], and must later be moved
2167 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2170 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2175 machine_mode m
= GET_MODE (orig_src
);
2177 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2180 && !SCALAR_INT_MODE_P (m
)
2181 && !MEM_P (orig_src
)
2182 && GET_CODE (orig_src
) != CONCAT
)
2184 scalar_int_mode imode
;
2185 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2187 src
= gen_reg_rtx (imode
);
2188 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2192 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2193 emit_move_insn (src
, orig_src
);
2195 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2199 /* Check for a NULL entry, used to indicate that the parameter goes
2200 both on the stack and in registers. */
2201 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2206 /* Process the pieces. */
2207 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2209 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2210 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2211 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2212 poly_int64 shift
= 0;
2214 /* Handle trailing fragments that run over the size of the struct.
2215 It's the target's responsibility to make sure that the fragment
2216 cannot be strictly smaller in some cases and strictly larger
2218 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2219 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2221 /* Arrange to shift the fragment to where it belongs.
2222 extract_bit_field loads to the lsb of the reg. */
2224 #ifdef BLOCK_REG_PADDING
2225 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2226 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2231 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2232 bytelen
= ssize
- bytepos
;
2233 gcc_assert (maybe_gt (bytelen
, 0));
2236 /* If we won't be loading directly from memory, protect the real source
2237 from strange tricks we might play; but make sure that the source can
2238 be loaded directly into the destination. */
2240 if (!MEM_P (orig_src
)
2241 && (!CONSTANT_P (orig_src
)
2242 || (GET_MODE (orig_src
) != mode
2243 && GET_MODE (orig_src
) != VOIDmode
)))
2245 if (GET_MODE (orig_src
) == VOIDmode
)
2246 src
= gen_reg_rtx (mode
);
2248 src
= gen_reg_rtx (GET_MODE (orig_src
));
2250 emit_move_insn (src
, orig_src
);
2253 /* Optimize the access just a bit. */
2255 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2256 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2257 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2258 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2260 tmps
[i
] = gen_reg_rtx (mode
);
2261 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2263 else if (COMPLEX_MODE_P (mode
)
2264 && GET_MODE (src
) == mode
2265 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2266 /* Let emit_move_complex do the bulk of the work. */
2268 else if (GET_CODE (src
) == CONCAT
)
2270 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2271 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2275 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2276 && known_le (subpos
+ bytelen
, slen0
))
2278 /* The following assumes that the concatenated objects all
2279 have the same size. In this case, a simple calculation
2280 can be used to determine the object and the bit field
2282 tmps
[i
] = XEXP (src
, elt
);
2283 if (maybe_ne (subpos
, 0)
2284 || maybe_ne (subpos
+ bytelen
, slen0
)
2285 || (!CONSTANT_P (tmps
[i
])
2286 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2287 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2288 subpos
* BITS_PER_UNIT
,
2289 1, NULL_RTX
, mode
, mode
, false,
2296 gcc_assert (known_eq (bytepos
, 0));
2297 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2298 emit_move_insn (mem
, src
);
2299 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2300 0, 1, NULL_RTX
, mode
, mode
, false,
2304 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2305 SIMD register, which is currently broken. While we get GCC
2306 to emit proper RTL for these cases, let's dump to memory. */
2307 else if (VECTOR_MODE_P (GET_MODE (dst
))
2310 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2313 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2314 emit_move_insn (mem
, src
);
2315 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2317 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2318 && XVECLEN (dst
, 0) > 1)
2319 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2320 else if (CONSTANT_P (src
))
2322 if (known_eq (bytelen
, ssize
))
2328 /* TODO: const_wide_int can have sizes other than this... */
2329 gcc_assert (known_eq (2 * bytelen
, ssize
));
2330 split_double (src
, &first
, &second
);
2337 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2340 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2341 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2342 mode
, mode
, false, NULL
);
2344 if (maybe_ne (shift
, 0))
2345 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2350 /* Emit code to move a block SRC of type TYPE to a block DST,
2351 where DST is non-consecutive registers represented by a PARALLEL.
2352 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2356 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2361 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2362 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2364 /* Copy the extracted pieces into the proper (probable) hard regs. */
2365 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2367 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2370 emit_move_insn (d
, tmps
[i
]);
2374 /* Similar, but load SRC into new pseudos in a format that looks like
2375 PARALLEL. This can later be fed to emit_group_move to get things
2376 in the right place. */
2379 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2384 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2385 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2387 /* Convert the vector to look just like the original PARALLEL, except
2388 with the computed values. */
2389 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2391 rtx e
= XVECEXP (parallel
, 0, i
);
2392 rtx d
= XEXP (e
, 0);
2396 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2397 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2399 RTVEC_ELT (vec
, i
) = e
;
2402 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2405 /* Emit code to move a block SRC to block DST, where SRC and DST are
2406 non-consecutive groups of registers, each represented by a PARALLEL. */
2409 emit_group_move (rtx dst
, rtx src
)
2413 gcc_assert (GET_CODE (src
) == PARALLEL
2414 && GET_CODE (dst
) == PARALLEL
2415 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2417 /* Skip first entry if NULL. */
2418 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2419 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2420 XEXP (XVECEXP (src
, 0, i
), 0));
2423 /* Move a group of registers represented by a PARALLEL into pseudos. */
2426 emit_group_move_into_temps (rtx src
)
2428 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2431 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2433 rtx e
= XVECEXP (src
, 0, i
);
2434 rtx d
= XEXP (e
, 0);
2437 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2438 RTVEC_ELT (vec
, i
) = e
;
2441 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2444 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2445 where SRC is non-consecutive registers represented by a PARALLEL.
2446 SSIZE represents the total size of block ORIG_DST, or -1 if not
2450 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2454 int start
, finish
, i
;
2455 machine_mode m
= GET_MODE (orig_dst
);
2457 gcc_assert (GET_CODE (src
) == PARALLEL
);
2459 if (!SCALAR_INT_MODE_P (m
)
2460 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2462 scalar_int_mode imode
;
2463 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2465 dst
= gen_reg_rtx (imode
);
2466 emit_group_store (dst
, src
, type
, ssize
);
2467 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2471 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2472 emit_group_store (dst
, src
, type
, ssize
);
2474 emit_move_insn (orig_dst
, dst
);
2478 /* Check for a NULL entry, used to indicate that the parameter goes
2479 both on the stack and in registers. */
2480 if (XEXP (XVECEXP (src
, 0, 0), 0))
2484 finish
= XVECLEN (src
, 0);
2486 tmps
= XALLOCAVEC (rtx
, finish
);
2488 /* Copy the (probable) hard regs into pseudos. */
2489 for (i
= start
; i
< finish
; i
++)
2491 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2492 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2494 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2495 emit_move_insn (tmps
[i
], reg
);
2501 /* If we won't be storing directly into memory, protect the real destination
2502 from strange tricks we might play. */
2504 if (GET_CODE (dst
) == PARALLEL
)
2508 /* We can get a PARALLEL dst if there is a conditional expression in
2509 a return statement. In that case, the dst and src are the same,
2510 so no action is necessary. */
2511 if (rtx_equal_p (dst
, src
))
2514 /* It is unclear if we can ever reach here, but we may as well handle
2515 it. Allocate a temporary, and split this into a store/load to/from
2517 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2518 emit_group_store (temp
, src
, type
, ssize
);
2519 emit_group_load (dst
, temp
, type
, ssize
);
2522 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2524 machine_mode outer
= GET_MODE (dst
);
2530 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2531 dst
= gen_reg_rtx (outer
);
2533 /* Make life a bit easier for combine. */
2534 /* If the first element of the vector is the low part
2535 of the destination mode, use a paradoxical subreg to
2536 initialize the destination. */
2539 inner
= GET_MODE (tmps
[start
]);
2540 bytepos
= subreg_lowpart_offset (inner
, outer
);
2541 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2544 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2548 emit_move_insn (dst
, temp
);
2555 /* If the first element wasn't the low part, try the last. */
2557 && start
< finish
- 1)
2559 inner
= GET_MODE (tmps
[finish
- 1]);
2560 bytepos
= subreg_lowpart_offset (inner
, outer
);
2561 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2565 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2569 emit_move_insn (dst
, temp
);
2576 /* Otherwise, simply initialize the result to zero. */
2578 emit_move_insn (dst
, CONST0_RTX (outer
));
2581 /* Process the pieces. */
2582 for (i
= start
; i
< finish
; i
++)
2584 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2585 machine_mode mode
= GET_MODE (tmps
[i
]);
2586 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2587 poly_uint64 adj_bytelen
;
2590 /* Handle trailing fragments that run over the size of the struct.
2591 It's the target's responsibility to make sure that the fragment
2592 cannot be strictly smaller in some cases and strictly larger
2594 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2595 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2596 adj_bytelen
= ssize
- bytepos
;
2598 adj_bytelen
= bytelen
;
2600 if (GET_CODE (dst
) == CONCAT
)
2602 if (known_le (bytepos
+ adj_bytelen
,
2603 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2604 dest
= XEXP (dst
, 0);
2605 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2607 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2608 dest
= XEXP (dst
, 1);
2612 machine_mode dest_mode
= GET_MODE (dest
);
2613 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2615 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2617 if (GET_MODE_ALIGNMENT (dest_mode
)
2618 >= GET_MODE_ALIGNMENT (tmp_mode
))
2620 dest
= assign_stack_temp (dest_mode
,
2621 GET_MODE_SIZE (dest_mode
));
2622 emit_move_insn (adjust_address (dest
,
2630 dest
= assign_stack_temp (tmp_mode
,
2631 GET_MODE_SIZE (tmp_mode
));
2632 emit_move_insn (dest
, tmps
[i
]);
2633 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2639 /* Handle trailing fragments that run over the size of the struct. */
2640 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2642 /* store_bit_field always takes its value from the lsb.
2643 Move the fragment to the lsb if it's not already there. */
2645 #ifdef BLOCK_REG_PADDING
2646 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2647 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2653 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2654 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2658 /* Make sure not to write past the end of the struct. */
2659 store_bit_field (dest
,
2660 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2661 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2662 VOIDmode
, tmps
[i
], false);
2665 /* Optimize the access just a bit. */
2666 else if (MEM_P (dest
)
2667 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2668 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2669 && multiple_p (bytepos
* BITS_PER_UNIT
,
2670 GET_MODE_ALIGNMENT (mode
))
2671 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2672 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2675 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2676 0, 0, mode
, tmps
[i
], false);
2679 /* Copy from the pseudo into the (probable) hard reg. */
2680 if (orig_dst
!= dst
)
2681 emit_move_insn (orig_dst
, dst
);
2684 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2685 of the value stored in X. */
2688 maybe_emit_group_store (rtx x
, tree type
)
2690 machine_mode mode
= TYPE_MODE (type
);
2691 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2692 if (GET_CODE (x
) == PARALLEL
)
2694 rtx result
= gen_reg_rtx (mode
);
2695 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2701 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2703 This is used on targets that return BLKmode values in registers. */
2706 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2708 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2709 rtx src
= NULL
, dst
= NULL
;
2710 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2711 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2712 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2713 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2714 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2715 fixed_size_mode copy_mode
;
2717 /* BLKmode registers created in the back-end shouldn't have survived. */
2718 gcc_assert (mode
!= BLKmode
);
2720 /* If the structure doesn't take up a whole number of words, see whether
2721 SRCREG is padded on the left or on the right. If it's on the left,
2722 set PADDING_CORRECTION to the number of bits to skip.
2724 In most ABIs, the structure will be returned at the least end of
2725 the register, which translates to right padding on little-endian
2726 targets and left padding on big-endian targets. The opposite
2727 holds if the structure is returned at the most significant
2728 end of the register. */
2729 if (bytes
% UNITS_PER_WORD
!= 0
2730 && (targetm
.calls
.return_in_msb (type
)
2732 : BYTES_BIG_ENDIAN
))
2734 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2736 /* We can use a single move if we have an exact mode for the size. */
2737 else if (MEM_P (target
)
2738 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2739 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2740 && bytes
== GET_MODE_SIZE (mode
))
2742 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2746 /* And if we additionally have the same mode for a register. */
2747 else if (REG_P (target
)
2748 && GET_MODE (target
) == mode
2749 && bytes
== GET_MODE_SIZE (mode
))
2751 emit_move_insn (target
, srcreg
);
2755 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2756 into a new pseudo which is a full word. */
2757 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2759 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2763 /* Copy the structure BITSIZE bits at a time. If the target lives in
2764 memory, take care of not reading/writing past its end by selecting
2765 a copy mode suited to BITSIZE. This should always be possible given
2768 If the target lives in register, make sure not to select a copy mode
2769 larger than the mode of the register.
2771 We could probably emit more efficient code for machines which do not use
2772 strict alignment, but it doesn't seem worth the effort at the current
2775 copy_mode
= word_mode
;
2778 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2779 if (mem_mode
.exists ())
2780 copy_mode
= mem_mode
.require ();
2782 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2785 for (bitpos
= 0, xbitpos
= padding_correction
;
2786 bitpos
< bytes
* BITS_PER_UNIT
;
2787 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2789 /* We need a new source operand each time xbitpos is on a
2790 word boundary and when xbitpos == padding_correction
2791 (the first time through). */
2792 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2793 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2795 /* We need a new destination operand each time bitpos is on
2797 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2799 else if (bitpos
% BITS_PER_WORD
== 0)
2800 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2802 /* Use xbitpos for the source extraction (right justified) and
2803 bitpos for the destination store (left justified). */
2804 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2805 extract_bit_field (src
, bitsize
,
2806 xbitpos
% BITS_PER_WORD
, 1,
2807 NULL_RTX
, copy_mode
, copy_mode
,
2813 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2814 register if it contains any data, otherwise return null.
2816 This is used on targets that return BLKmode values in registers. */
2819 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2822 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2823 unsigned int bitsize
;
2824 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2825 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2826 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2827 fixed_size_mode dst_mode
;
2828 scalar_int_mode min_mode
;
2830 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2832 x
= expand_normal (src
);
2834 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2838 /* If the structure doesn't take up a whole number of words, see
2839 whether the register value should be padded on the left or on
2840 the right. Set PADDING_CORRECTION to the number of padding
2841 bits needed on the left side.
2843 In most ABIs, the structure will be returned at the least end of
2844 the register, which translates to right padding on little-endian
2845 targets and left padding on big-endian targets. The opposite
2846 holds if the structure is returned at the most significant
2847 end of the register. */
2848 if (bytes
% UNITS_PER_WORD
!= 0
2849 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2851 : BYTES_BIG_ENDIAN
))
2852 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2855 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2856 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2857 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2858 min_mode
= smallest_int_mode_for_size (bitsize
);
2860 /* Copy the structure BITSIZE bits at a time. */
2861 for (bitpos
= 0, xbitpos
= padding_correction
;
2862 bitpos
< bytes
* BITS_PER_UNIT
;
2863 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2865 /* We need a new destination pseudo each time xbitpos is
2866 on a word boundary and when xbitpos == padding_correction
2867 (the first time through). */
2868 if (xbitpos
% BITS_PER_WORD
== 0
2869 || xbitpos
== padding_correction
)
2871 /* Generate an appropriate register. */
2872 dst_word
= gen_reg_rtx (word_mode
);
2873 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2875 /* Clear the destination before we move anything into it. */
2876 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2879 /* Find the largest integer mode that can be used to copy all or as
2880 many bits as possible of the structure if the target supports larger
2881 copies. There are too many corner cases here w.r.t to alignments on
2882 the read/writes. So if there is any padding just use single byte
2884 opt_scalar_int_mode mode_iter
;
2885 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2887 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2889 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2890 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2891 && msize
<= BITS_PER_WORD
)
2898 /* We need a new source operand each time bitpos is on a word
2900 if (bitpos
% BITS_PER_WORD
== 0)
2901 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2903 /* Use bitpos for the source extraction (left justified) and
2904 xbitpos for the destination store (right justified). */
2905 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2907 extract_bit_field (src_word
, bitsize
,
2908 bitpos
% BITS_PER_WORD
, 1,
2909 NULL_RTX
, word_mode
, word_mode
,
2914 if (mode
== BLKmode
)
2916 /* Find the smallest integer mode large enough to hold the
2917 entire structure. */
2918 opt_scalar_int_mode mode_iter
;
2919 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2920 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2923 /* A suitable mode should have been found. */
2924 mode
= mode_iter
.require ();
2927 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2928 dst_mode
= word_mode
;
2931 dst
= gen_reg_rtx (dst_mode
);
2933 for (i
= 0; i
< n_regs
; i
++)
2934 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2936 if (mode
!= dst_mode
)
2937 dst
= gen_lowpart (mode
, dst
);
2942 /* Add a USE expression for REG to the (possibly empty) list pointed
2943 to by CALL_FUSAGE. REG must denote a hard register. */
2946 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2948 gcc_assert (REG_P (reg
));
2950 if (!HARD_REGISTER_P (reg
))
2954 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2957 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2958 to by CALL_FUSAGE. REG must denote a hard register. */
2961 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2963 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2966 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2969 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2970 starting at REGNO. All of these registers must be hard registers. */
2973 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2977 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2979 for (i
= 0; i
< nregs
; i
++)
2980 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2983 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2984 PARALLEL REGS. This is for calls that pass values in multiple
2985 non-contiguous locations. The Irix 6 ABI has examples of this. */
2988 use_group_regs (rtx
*call_fusage
, rtx regs
)
2992 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2994 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2996 /* A NULL entry means the parameter goes both on the stack and in
2997 registers. This can also be a MEM for targets that pass values
2998 partially on the stack and partially in registers. */
2999 if (reg
!= 0 && REG_P (reg
))
3000 use_reg (call_fusage
, reg
);
3004 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3005 assigment and the code of the expresion on the RHS is CODE. Return
3009 get_def_for_expr (tree name
, enum tree_code code
)
3013 if (TREE_CODE (name
) != SSA_NAME
)
3016 def_stmt
= get_gimple_for_ssa_name (name
);
3018 || gimple_assign_rhs_code (def_stmt
) != code
)
3024 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3025 assigment and the class of the expresion on the RHS is CLASS. Return
3029 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3033 if (TREE_CODE (name
) != SSA_NAME
)
3036 def_stmt
= get_gimple_for_ssa_name (name
);
3038 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3044 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3045 its length in bytes. */
3048 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3049 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3050 unsigned HOST_WIDE_INT min_size
,
3051 unsigned HOST_WIDE_INT max_size
,
3052 unsigned HOST_WIDE_INT probable_max_size
)
3054 machine_mode mode
= GET_MODE (object
);
3057 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3059 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3060 just move a zero. Otherwise, do this a piece at a time. */
3061 poly_int64 size_val
;
3063 && poly_int_rtx_p (size
, &size_val
)
3064 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3066 rtx zero
= CONST0_RTX (mode
);
3069 emit_move_insn (object
, zero
);
3073 if (COMPLEX_MODE_P (mode
))
3075 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3078 write_complex_part (object
, zero
, 0);
3079 write_complex_part (object
, zero
, 1);
3085 if (size
== const0_rtx
)
3088 align
= MEM_ALIGN (object
);
3090 if (CONST_INT_P (size
)
3091 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3093 optimize_insn_for_speed_p ()))
3094 clear_by_pieces (object
, INTVAL (size
), align
);
3095 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3096 expected_align
, expected_size
,
3097 min_size
, max_size
, probable_max_size
))
3099 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3100 return set_storage_via_libcall (object
, size
, const0_rtx
,
3101 method
== BLOCK_OP_TAILCALL
);
3109 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3111 unsigned HOST_WIDE_INT max
, min
= 0;
3112 if (GET_CODE (size
) == CONST_INT
)
3113 min
= max
= UINTVAL (size
);
3115 max
= GET_MODE_MASK (GET_MODE (size
));
3116 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3120 /* A subroutine of clear_storage. Expand a call to memset.
3121 Return the return value of memset, 0 otherwise. */
3124 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3126 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3127 machine_mode size_mode
;
3129 object
= copy_addr_to_reg (XEXP (object
, 0));
3130 object_tree
= make_tree (ptr_type_node
, object
);
3132 if (!CONST_INT_P (val
))
3133 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3134 val_tree
= make_tree (integer_type_node
, val
);
3136 size_mode
= TYPE_MODE (sizetype
);
3137 size
= convert_to_mode (size_mode
, size
, 1);
3138 size
= copy_to_mode_reg (size_mode
, size
);
3139 size_tree
= make_tree (sizetype
, size
);
3141 /* It is incorrect to use the libcall calling conventions for calls to
3142 memset because it can be provided by the user. */
3143 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3144 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3145 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3147 return expand_call (call_expr
, NULL_RTX
, false);
3150 /* Expand a setmem pattern; return true if successful. */
3153 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3154 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3155 unsigned HOST_WIDE_INT min_size
,
3156 unsigned HOST_WIDE_INT max_size
,
3157 unsigned HOST_WIDE_INT probable_max_size
)
3159 /* Try the most limited insn first, because there's no point
3160 including more than one in the machine description unless
3161 the more limited one has some advantage. */
3163 if (expected_align
< align
)
3164 expected_align
= align
;
3165 if (expected_size
!= -1)
3167 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3168 expected_size
= max_size
;
3169 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3170 expected_size
= min_size
;
3173 opt_scalar_int_mode mode_iter
;
3174 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3176 scalar_int_mode mode
= mode_iter
.require ();
3177 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3179 if (code
!= CODE_FOR_nothing
3180 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3181 here because if SIZE is less than the mode mask, as it is
3182 returned by the macro, it will definitely be less than the
3183 actual mode mask. Since SIZE is within the Pmode address
3184 space, we limit MODE to Pmode. */
3185 && ((CONST_INT_P (size
)
3186 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3187 <= (GET_MODE_MASK (mode
) >> 1)))
3188 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3189 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3191 class expand_operand ops
[9];
3194 nops
= insn_data
[(int) code
].n_generator_args
;
3195 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3197 create_fixed_operand (&ops
[0], object
);
3198 /* The check above guarantees that this size conversion is valid. */
3199 create_convert_operand_to (&ops
[1], size
, mode
, true);
3200 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3201 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3204 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3205 create_integer_operand (&ops
[5], expected_size
);
3209 create_integer_operand (&ops
[6], min_size
);
3210 /* If we cannot represent the maximal size,
3211 make parameter NULL. */
3212 if ((HOST_WIDE_INT
) max_size
!= -1)
3213 create_integer_operand (&ops
[7], max_size
);
3215 create_fixed_operand (&ops
[7], NULL
);
3219 /* If we cannot represent the maximal size,
3220 make parameter NULL. */
3221 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3222 create_integer_operand (&ops
[8], probable_max_size
);
3224 create_fixed_operand (&ops
[8], NULL
);
3226 if (maybe_expand_insn (code
, nops
, ops
))
3235 /* Write to one of the components of the complex value CPLX. Write VAL to
3236 the real part if IMAG_P is false, and the imaginary part if its true. */
3239 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3245 if (GET_CODE (cplx
) == CONCAT
)
3247 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3251 cmode
= GET_MODE (cplx
);
3252 imode
= GET_MODE_INNER (cmode
);
3253 ibitsize
= GET_MODE_BITSIZE (imode
);
3255 /* For MEMs simplify_gen_subreg may generate an invalid new address
3256 because, e.g., the original address is considered mode-dependent
3257 by the target, which restricts simplify_subreg from invoking
3258 adjust_address_nv. Instead of preparing fallback support for an
3259 invalid address, we call adjust_address_nv directly. */
3262 emit_move_insn (adjust_address_nv (cplx
, imode
,
3263 imag_p
? GET_MODE_SIZE (imode
) : 0),
3268 /* If the sub-object is at least word sized, then we know that subregging
3269 will work. This special case is important, since store_bit_field
3270 wants to operate on integer modes, and there's rarely an OImode to
3271 correspond to TCmode. */
3272 if (ibitsize
>= BITS_PER_WORD
3273 /* For hard regs we have exact predicates. Assume we can split
3274 the original object if it spans an even number of hard regs.
3275 This special case is important for SCmode on 64-bit platforms
3276 where the natural size of floating-point regs is 32-bit. */
3278 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3279 && REG_NREGS (cplx
) % 2 == 0))
3281 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3282 imag_p
? GET_MODE_SIZE (imode
) : 0);
3285 emit_move_insn (part
, val
);
3289 /* simplify_gen_subreg may fail for sub-word MEMs. */
3290 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3293 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3297 /* Extract one of the components of the complex value CPLX. Extract the
3298 real part if IMAG_P is false, and the imaginary part if it's true. */
3301 read_complex_part (rtx cplx
, bool imag_p
)
3307 if (GET_CODE (cplx
) == CONCAT
)
3308 return XEXP (cplx
, imag_p
);
3310 cmode
= GET_MODE (cplx
);
3311 imode
= GET_MODE_INNER (cmode
);
3312 ibitsize
= GET_MODE_BITSIZE (imode
);
3314 /* Special case reads from complex constants that got spilled to memory. */
3315 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3317 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3318 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3320 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3321 if (CONSTANT_CLASS_P (part
))
3322 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3326 /* For MEMs simplify_gen_subreg may generate an invalid new address
3327 because, e.g., the original address is considered mode-dependent
3328 by the target, which restricts simplify_subreg from invoking
3329 adjust_address_nv. Instead of preparing fallback support for an
3330 invalid address, we call adjust_address_nv directly. */
3332 return adjust_address_nv (cplx
, imode
,
3333 imag_p
? GET_MODE_SIZE (imode
) : 0);
3335 /* If the sub-object is at least word sized, then we know that subregging
3336 will work. This special case is important, since extract_bit_field
3337 wants to operate on integer modes, and there's rarely an OImode to
3338 correspond to TCmode. */
3339 if (ibitsize
>= BITS_PER_WORD
3340 /* For hard regs we have exact predicates. Assume we can split
3341 the original object if it spans an even number of hard regs.
3342 This special case is important for SCmode on 64-bit platforms
3343 where the natural size of floating-point regs is 32-bit. */
3345 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3346 && REG_NREGS (cplx
) % 2 == 0))
3348 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3349 imag_p
? GET_MODE_SIZE (imode
) : 0);
3353 /* simplify_gen_subreg may fail for sub-word MEMs. */
3354 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3357 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3358 true, NULL_RTX
, imode
, imode
, false, NULL
);
3361 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3362 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3363 represented in NEW_MODE. If FORCE is true, this will never happen, as
3364 we'll force-create a SUBREG if needed. */
3367 emit_move_change_mode (machine_mode new_mode
,
3368 machine_mode old_mode
, rtx x
, bool force
)
3372 if (push_operand (x
, GET_MODE (x
)))
3374 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3375 MEM_COPY_ATTRIBUTES (ret
, x
);
3379 /* We don't have to worry about changing the address since the
3380 size in bytes is supposed to be the same. */
3381 if (reload_in_progress
)
3383 /* Copy the MEM to change the mode and move any
3384 substitutions from the old MEM to the new one. */
3385 ret
= adjust_address_nv (x
, new_mode
, 0);
3386 copy_replacements (x
, ret
);
3389 ret
= adjust_address (x
, new_mode
, 0);
3393 /* Note that we do want simplify_subreg's behavior of validating
3394 that the new mode is ok for a hard register. If we were to use
3395 simplify_gen_subreg, we would create the subreg, but would
3396 probably run into the target not being able to implement it. */
3397 /* Except, of course, when FORCE is true, when this is exactly what
3398 we want. Which is needed for CCmodes on some targets. */
3400 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3402 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3408 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3409 an integer mode of the same size as MODE. Returns the instruction
3410 emitted, or NULL if such a move could not be generated. */
3413 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3415 scalar_int_mode imode
;
3416 enum insn_code code
;
3418 /* There must exist a mode of the exact size we require. */
3419 if (!int_mode_for_mode (mode
).exists (&imode
))
3422 /* The target must support moves in this mode. */
3423 code
= optab_handler (mov_optab
, imode
);
3424 if (code
== CODE_FOR_nothing
)
3427 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3430 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3433 return emit_insn (GEN_FCN (code
) (x
, y
));
3436 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3437 Return an equivalent MEM that does not use an auto-increment. */
3440 emit_move_resolve_push (machine_mode mode
, rtx x
)
3442 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3445 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3446 #ifdef PUSH_ROUNDING
3447 adjust
= PUSH_ROUNDING (adjust
);
3449 if (code
== PRE_DEC
|| code
== POST_DEC
)
3451 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3453 rtx expr
= XEXP (XEXP (x
, 0), 1);
3455 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3456 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3457 if (GET_CODE (expr
) == MINUS
)
3459 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3463 /* Do not use anti_adjust_stack, since we don't want to update
3464 stack_pointer_delta. */
3465 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3466 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3467 0, OPTAB_LIB_WIDEN
);
3468 if (temp
!= stack_pointer_rtx
)
3469 emit_move_insn (stack_pointer_rtx
, temp
);
3476 temp
= stack_pointer_rtx
;
3481 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3487 return replace_equiv_address (x
, temp
);
3490 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3491 X is known to satisfy push_operand, and MODE is known to be complex.
3492 Returns the last instruction emitted. */
3495 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3497 scalar_mode submode
= GET_MODE_INNER (mode
);
3500 #ifdef PUSH_ROUNDING
3501 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3503 /* In case we output to the stack, but the size is smaller than the
3504 machine can push exactly, we need to use move instructions. */
3505 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3507 x
= emit_move_resolve_push (mode
, x
);
3508 return emit_move_insn (x
, y
);
3512 /* Note that the real part always precedes the imag part in memory
3513 regardless of machine's endianness. */
3514 switch (GET_CODE (XEXP (x
, 0)))
3528 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3529 read_complex_part (y
, imag_first
));
3530 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3531 read_complex_part (y
, !imag_first
));
3534 /* A subroutine of emit_move_complex. Perform the move from Y to X
3535 via two moves of the parts. Returns the last instruction emitted. */
3538 emit_move_complex_parts (rtx x
, rtx y
)
3540 /* Show the output dies here. This is necessary for SUBREGs
3541 of pseudos since we cannot track their lifetimes correctly;
3542 hard regs shouldn't appear here except as return values. */
3543 if (!reload_completed
&& !reload_in_progress
3544 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3547 write_complex_part (x
, read_complex_part (y
, false), false);
3548 write_complex_part (x
, read_complex_part (y
, true), true);
3550 return get_last_insn ();
3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3554 MODE is known to be complex. Returns the last instruction emitted. */
3557 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3561 /* Need to take special care for pushes, to maintain proper ordering
3562 of the data, and possibly extra padding. */
3563 if (push_operand (x
, mode
))
3564 return emit_move_complex_push (mode
, x
, y
);
3566 /* See if we can coerce the target into moving both values at once, except
3567 for floating point where we favor moving as parts if this is easy. */
3568 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3569 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3571 && HARD_REGISTER_P (x
)
3572 && REG_NREGS (x
) == 1)
3574 && HARD_REGISTER_P (y
)
3575 && REG_NREGS (y
) == 1))
3577 /* Not possible if the values are inherently not adjacent. */
3578 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3580 /* Is possible if both are registers (or subregs of registers). */
3581 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3583 /* If one of the operands is a memory, and alignment constraints
3584 are friendly enough, we may be able to do combined memory operations.
3585 We do not attempt this if Y is a constant because that combination is
3586 usually better with the by-parts thing below. */
3587 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3588 && (!STRICT_ALIGNMENT
3589 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3598 /* For memory to memory moves, optimal behavior can be had with the
3599 existing block move logic. But use normal expansion if optimizing
3601 if (MEM_P (x
) && MEM_P (y
))
3603 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3604 (optimize_insn_for_speed_p()
3605 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
3606 return get_last_insn ();
3609 ret
= emit_move_via_integer (mode
, x
, y
, true);
3614 return emit_move_complex_parts (x
, y
);
3617 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3618 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3621 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3625 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3628 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3629 if (code
!= CODE_FOR_nothing
)
3631 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3632 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3633 return emit_insn (GEN_FCN (code
) (x
, y
));
3637 /* Otherwise, find the MODE_INT mode of the same width. */
3638 ret
= emit_move_via_integer (mode
, x
, y
, false);
3639 gcc_assert (ret
!= NULL
);
3643 /* Return true if word I of OP lies entirely in the
3644 undefined bits of a paradoxical subreg. */
3647 undefined_operand_subword_p (const_rtx op
, int i
)
3649 if (GET_CODE (op
) != SUBREG
)
3651 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3652 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3653 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3654 || known_le (offset
, -UNITS_PER_WORD
));
3657 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3658 MODE is any multi-word or full-word mode that lacks a move_insn
3659 pattern. Note that you will get better code if you define such
3660 patterns, even if they must turn into multiple assembler instructions. */
3663 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3665 rtx_insn
*last_insn
= 0;
3671 /* This function can only handle cases where the number of words is
3672 known at compile time. */
3673 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3674 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3676 /* If X is a push on the stack, do the push now and replace
3677 X with a reference to the stack pointer. */
3678 if (push_operand (x
, mode
))
3679 x
= emit_move_resolve_push (mode
, x
);
3681 /* If we are in reload, see if either operand is a MEM whose address
3682 is scheduled for replacement. */
3683 if (reload_in_progress
&& MEM_P (x
)
3684 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3685 x
= replace_equiv_address_nv (x
, inner
);
3686 if (reload_in_progress
&& MEM_P (y
)
3687 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3688 y
= replace_equiv_address_nv (y
, inner
);
3692 need_clobber
= false;
3693 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3695 /* Do not generate code for a move if it would go entirely
3696 to the non-existing bits of a paradoxical subreg. */
3697 if (undefined_operand_subword_p (x
, i
))
3700 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3703 /* Do not generate code for a move if it would come entirely
3704 from the undefined bits of a paradoxical subreg. */
3705 if (undefined_operand_subword_p (y
, i
))
3708 ypart
= operand_subword (y
, i
, 1, mode
);
3710 /* If we can't get a part of Y, put Y into memory if it is a
3711 constant. Otherwise, force it into a register. Then we must
3712 be able to get a part of Y. */
3713 if (ypart
== 0 && CONSTANT_P (y
))
3715 y
= use_anchored_address (force_const_mem (mode
, y
));
3716 ypart
= operand_subword (y
, i
, 1, mode
);
3718 else if (ypart
== 0)
3719 ypart
= operand_subword_force (y
, i
, mode
);
3721 gcc_assert (xpart
&& ypart
);
3723 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3725 last_insn
= emit_move_insn (xpart
, ypart
);
3731 /* Show the output dies here. This is necessary for SUBREGs
3732 of pseudos since we cannot track their lifetimes correctly;
3733 hard regs shouldn't appear here except as return values.
3734 We never want to emit such a clobber after reload. */
3736 && ! (reload_in_progress
|| reload_completed
)
3737 && need_clobber
!= 0)
3745 /* Low level part of emit_move_insn.
3746 Called just like emit_move_insn, but assumes X and Y
3747 are basically valid. */
3750 emit_move_insn_1 (rtx x
, rtx y
)
3752 machine_mode mode
= GET_MODE (x
);
3753 enum insn_code code
;
3755 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3757 code
= optab_handler (mov_optab
, mode
);
3758 if (code
!= CODE_FOR_nothing
)
3759 return emit_insn (GEN_FCN (code
) (x
, y
));
3761 /* Expand complex moves by moving real part and imag part. */
3762 if (COMPLEX_MODE_P (mode
))
3763 return emit_move_complex (mode
, x
, y
);
3765 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3766 || ALL_FIXED_POINT_MODE_P (mode
))
3768 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3770 /* If we can't find an integer mode, use multi words. */
3774 return emit_move_multi_word (mode
, x
, y
);
3777 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3778 return emit_move_ccmode (mode
, x
, y
);
3780 /* Try using a move pattern for the corresponding integer mode. This is
3781 only safe when simplify_subreg can convert MODE constants into integer
3782 constants. At present, it can only do this reliably if the value
3783 fits within a HOST_WIDE_INT. */
3785 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3787 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3791 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3796 return emit_move_multi_word (mode
, x
, y
);
3799 /* Generate code to copy Y into X.
3800 Both Y and X must have the same mode, except that
3801 Y can be a constant with VOIDmode.
3802 This mode cannot be BLKmode; use emit_block_move for that.
3804 Return the last instruction emitted. */
3807 emit_move_insn (rtx x
, rtx y
)
3809 machine_mode mode
= GET_MODE (x
);
3810 rtx y_cst
= NULL_RTX
;
3811 rtx_insn
*last_insn
;
3814 gcc_assert (mode
!= BLKmode
3815 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3820 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3821 && (last_insn
= compress_float_constant (x
, y
)))
3826 if (!targetm
.legitimate_constant_p (mode
, y
))
3828 y
= force_const_mem (mode
, y
);
3830 /* If the target's cannot_force_const_mem prevented the spill,
3831 assume that the target's move expanders will also take care
3832 of the non-legitimate constant. */
3836 y
= use_anchored_address (y
);
3840 /* If X or Y are memory references, verify that their addresses are valid
3843 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3845 && ! push_operand (x
, GET_MODE (x
))))
3846 x
= validize_mem (x
);
3849 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3850 MEM_ADDR_SPACE (y
)))
3851 y
= validize_mem (y
);
3853 gcc_assert (mode
!= BLKmode
);
3855 last_insn
= emit_move_insn_1 (x
, y
);
3857 if (y_cst
&& REG_P (x
)
3858 && (set
= single_set (last_insn
)) != NULL_RTX
3859 && SET_DEST (set
) == x
3860 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3861 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3866 /* Generate the body of an instruction to copy Y into X.
3867 It may be a list of insns, if one insn isn't enough. */
3870 gen_move_insn (rtx x
, rtx y
)
3875 emit_move_insn_1 (x
, y
);
3881 /* If Y is representable exactly in a narrower mode, and the target can
3882 perform the extension directly from constant or memory, then emit the
3883 move as an extension. */
3886 compress_float_constant (rtx x
, rtx y
)
3888 machine_mode dstmode
= GET_MODE (x
);
3889 machine_mode orig_srcmode
= GET_MODE (y
);
3890 machine_mode srcmode
;
3891 const REAL_VALUE_TYPE
*r
;
3892 int oldcost
, newcost
;
3893 bool speed
= optimize_insn_for_speed_p ();
3895 r
= CONST_DOUBLE_REAL_VALUE (y
);
3897 if (targetm
.legitimate_constant_p (dstmode
, y
))
3898 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3900 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3902 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3906 rtx_insn
*last_insn
;
3908 /* Skip if the target can't extend this way. */
3909 ic
= can_extend_p (dstmode
, srcmode
, 0);
3910 if (ic
== CODE_FOR_nothing
)
3913 /* Skip if the narrowed value isn't exact. */
3914 if (! exact_real_truncate (srcmode
, r
))
3917 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3919 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3921 /* Skip if the target needs extra instructions to perform
3923 if (!insn_operand_matches (ic
, 1, trunc_y
))
3925 /* This is valid, but may not be cheaper than the original. */
3926 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3928 if (oldcost
< newcost
)
3931 else if (float_extend_from_mem
[dstmode
][srcmode
])
3933 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3934 /* This is valid, but may not be cheaper than the original. */
3935 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3937 if (oldcost
< newcost
)
3939 trunc_y
= validize_mem (trunc_y
);
3944 /* For CSE's benefit, force the compressed constant pool entry
3945 into a new pseudo. This constant may be used in different modes,
3946 and if not, combine will put things back together for us. */
3947 trunc_y
= force_reg (srcmode
, trunc_y
);
3949 /* If x is a hard register, perform the extension into a pseudo,
3950 so that e.g. stack realignment code is aware of it. */
3952 if (REG_P (x
) && HARD_REGISTER_P (x
))
3953 target
= gen_reg_rtx (dstmode
);
3955 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3956 last_insn
= get_last_insn ();
3959 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3962 return emit_move_insn (x
, target
);
3969 /* Pushing data onto the stack. */
3971 /* Push a block of length SIZE (perhaps variable)
3972 and return an rtx to address the beginning of the block.
3973 The value may be virtual_outgoing_args_rtx.
3975 EXTRA is the number of bytes of padding to push in addition to SIZE.
3976 BELOW nonzero means this padding comes at low addresses;
3977 otherwise, the padding comes at high addresses. */
3980 push_block (rtx size
, poly_int64 extra
, int below
)
3984 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3985 if (CONSTANT_P (size
))
3986 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3987 else if (REG_P (size
) && known_eq (extra
, 0))
3988 anti_adjust_stack (size
);
3991 temp
= copy_to_mode_reg (Pmode
, size
);
3992 if (maybe_ne (extra
, 0))
3993 temp
= expand_binop (Pmode
, add_optab
, temp
,
3994 gen_int_mode (extra
, Pmode
),
3995 temp
, 0, OPTAB_LIB_WIDEN
);
3996 anti_adjust_stack (temp
);
3999 if (STACK_GROWS_DOWNWARD
)
4001 temp
= virtual_outgoing_args_rtx
;
4002 if (maybe_ne (extra
, 0) && below
)
4003 temp
= plus_constant (Pmode
, temp
, extra
);
4008 if (poly_int_rtx_p (size
, &csize
))
4009 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4010 -csize
- (below
? 0 : extra
));
4011 else if (maybe_ne (extra
, 0) && !below
)
4012 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4013 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4016 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4017 negate_rtx (Pmode
, size
));
4020 return memory_address (NARROWEST_INT_MODE
, temp
);
4023 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4026 mem_autoinc_base (rtx mem
)
4030 rtx addr
= XEXP (mem
, 0);
4031 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4032 return XEXP (addr
, 0);
4037 /* A utility routine used here, in reload, and in try_split. The insns
4038 after PREV up to and including LAST are known to adjust the stack,
4039 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4040 placing notes as appropriate. PREV may be NULL, indicating the
4041 entire insn sequence prior to LAST should be scanned.
4043 The set of allowed stack pointer modifications is small:
4044 (1) One or more auto-inc style memory references (aka pushes),
4045 (2) One or more addition/subtraction with the SP as destination,
4046 (3) A single move insn with the SP as destination,
4047 (4) A call_pop insn,
4048 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4050 Insns in the sequence that do not modify the SP are ignored,
4051 except for noreturn calls.
4053 The return value is the amount of adjustment that can be trivially
4054 verified, via immediate operand or auto-inc. If the adjustment
4055 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4058 find_args_size_adjust (rtx_insn
*insn
)
4063 pat
= PATTERN (insn
);
4066 /* Look for a call_pop pattern. */
4069 /* We have to allow non-call_pop patterns for the case
4070 of emit_single_push_insn of a TLS address. */
4071 if (GET_CODE (pat
) != PARALLEL
)
4074 /* All call_pop have a stack pointer adjust in the parallel.
4075 The call itself is always first, and the stack adjust is
4076 usually last, so search from the end. */
4077 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4079 set
= XVECEXP (pat
, 0, i
);
4080 if (GET_CODE (set
) != SET
)
4082 dest
= SET_DEST (set
);
4083 if (dest
== stack_pointer_rtx
)
4086 /* We'd better have found the stack pointer adjust. */
4089 /* Fall through to process the extracted SET and DEST
4090 as if it was a standalone insn. */
4092 else if (GET_CODE (pat
) == SET
)
4094 else if ((set
= single_set (insn
)) != NULL
)
4096 else if (GET_CODE (pat
) == PARALLEL
)
4098 /* ??? Some older ports use a parallel with a stack adjust
4099 and a store for a PUSH_ROUNDING pattern, rather than a
4100 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4101 /* ??? See h8300 and m68k, pushqi1. */
4102 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4104 set
= XVECEXP (pat
, 0, i
);
4105 if (GET_CODE (set
) != SET
)
4107 dest
= SET_DEST (set
);
4108 if (dest
== stack_pointer_rtx
)
4111 /* We do not expect an auto-inc of the sp in the parallel. */
4112 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4113 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4114 != stack_pointer_rtx
);
4122 dest
= SET_DEST (set
);
4124 /* Look for direct modifications of the stack pointer. */
4125 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4127 /* Look for a trivial adjustment, otherwise assume nothing. */
4128 /* Note that the SPU restore_stack_block pattern refers to
4129 the stack pointer in V4SImode. Consider that non-trivial. */
4131 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4132 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4134 /* ??? Reload can generate no-op moves, which will be cleaned
4135 up later. Recognize it and continue searching. */
4136 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4139 return HOST_WIDE_INT_MIN
;
4145 /* Otherwise only think about autoinc patterns. */
4146 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4149 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4150 != stack_pointer_rtx
);
4152 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4153 mem
= SET_SRC (set
);
4157 addr
= XEXP (mem
, 0);
4158 switch (GET_CODE (addr
))
4162 return GET_MODE_SIZE (GET_MODE (mem
));
4165 return -GET_MODE_SIZE (GET_MODE (mem
));
4168 addr
= XEXP (addr
, 1);
4169 gcc_assert (GET_CODE (addr
) == PLUS
);
4170 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4171 return rtx_to_poly_int64 (XEXP (addr
, 1));
4179 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4180 poly_int64 end_args_size
)
4182 poly_int64 args_size
= end_args_size
;
4183 bool saw_unknown
= false;
4186 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4188 if (!NONDEBUG_INSN_P (insn
))
4191 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4192 a call argument containing a TLS address that itself requires
4193 a call to __tls_get_addr. The handling of stack_pointer_delta
4194 in emit_single_push_insn is supposed to ensure that any such
4195 notes are already correct. */
4196 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4197 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4199 poly_int64 this_delta
= find_args_size_adjust (insn
);
4200 if (known_eq (this_delta
, 0))
4203 || ACCUMULATE_OUTGOING_ARGS
4204 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4208 gcc_assert (!saw_unknown
);
4209 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4213 add_args_size_note (insn
, args_size
);
4214 if (STACK_GROWS_DOWNWARD
)
4215 this_delta
= -poly_uint64 (this_delta
);
4218 args_size
= HOST_WIDE_INT_MIN
;
4220 args_size
-= this_delta
;
4226 #ifdef PUSH_ROUNDING
4227 /* Emit single push insn. */
4230 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4233 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4235 enum insn_code icode
;
4237 /* If there is push pattern, use it. Otherwise try old way of throwing
4238 MEM representing push operation to move expander. */
4239 icode
= optab_handler (push_optab
, mode
);
4240 if (icode
!= CODE_FOR_nothing
)
4242 class expand_operand ops
[1];
4244 create_input_operand (&ops
[0], x
, mode
);
4245 if (maybe_expand_insn (icode
, 1, ops
))
4248 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4249 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4250 /* If we are to pad downward, adjust the stack pointer first and
4251 then store X into the stack location using an offset. This is
4252 because emit_move_insn does not know how to pad; it does not have
4254 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4256 emit_move_insn (stack_pointer_rtx
,
4257 expand_binop (Pmode
,
4258 STACK_GROWS_DOWNWARD
? sub_optab
4261 gen_int_mode (rounded_size
, Pmode
),
4262 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4264 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4265 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4266 /* We have already decremented the stack pointer, so get the
4268 offset
+= rounded_size
;
4270 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4271 /* We have already incremented the stack pointer, so get the
4273 offset
-= rounded_size
;
4275 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4279 if (STACK_GROWS_DOWNWARD
)
4280 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4281 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4283 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4284 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4286 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4289 dest
= gen_rtx_MEM (mode
, dest_addr
);
4293 set_mem_attributes (dest
, type
, 1);
4295 if (cfun
->tail_call_marked
)
4296 /* Function incoming arguments may overlap with sibling call
4297 outgoing arguments and we cannot allow reordering of reads
4298 from function arguments with stores to outgoing arguments
4299 of sibling calls. */
4300 set_mem_alias_set (dest
, 0);
4302 emit_move_insn (dest
, x
);
4305 /* Emit and annotate a single push insn. */
4308 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4310 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4311 rtx_insn
*prev
= get_last_insn ();
4314 emit_single_push_insn_1 (mode
, x
, type
);
4316 /* Adjust stack_pointer_delta to describe the situation after the push
4317 we just performed. Note that we must do this after the push rather
4318 than before the push in case calculating X needs pushes and pops of
4319 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4320 for such pushes and pops must not include the effect of the future
4322 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4324 last
= get_last_insn ();
4326 /* Notice the common case where we emitted exactly one insn. */
4327 if (PREV_INSN (last
) == prev
)
4329 add_args_size_note (last
, stack_pointer_delta
);
4333 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4334 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4335 || known_eq (delta
, old_delta
));
4339 /* If reading SIZE bytes from X will end up reading from
4340 Y return the number of bytes that overlap. Return -1
4341 if there is no overlap or -2 if we can't determine
4342 (for example when X and Y have different base registers). */
4345 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4347 rtx tmp
= plus_constant (Pmode
, x
, size
);
4348 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4350 if (!CONST_INT_P (sub
))
4353 HOST_WIDE_INT val
= INTVAL (sub
);
4355 return IN_RANGE (val
, 1, size
) ? val
: -1;
4358 /* Generate code to push X onto the stack, assuming it has mode MODE and
4360 MODE is redundant except when X is a CONST_INT (since they don't
4362 SIZE is an rtx for the size of data to be copied (in bytes),
4363 needed only if X is BLKmode.
4364 Return true if successful. May return false if asked to push a
4365 partial argument during a sibcall optimization (as specified by
4366 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4369 ALIGN (in bits) is maximum alignment we can assume.
4371 If PARTIAL and REG are both nonzero, then copy that many of the first
4372 bytes of X into registers starting with REG, and push the rest of X.
4373 The amount of space pushed is decreased by PARTIAL bytes.
4374 REG must be a hard register in this case.
4375 If REG is zero but PARTIAL is not, take any all others actions for an
4376 argument partially in registers, but do not actually load any
4379 EXTRA is the amount in bytes of extra space to leave next to this arg.
4380 This is ignored if an argument block has already been allocated.
4382 On a machine that lacks real push insns, ARGS_ADDR is the address of
4383 the bottom of the argument block for this call. We use indexing off there
4384 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4385 argument block has not been preallocated.
4387 ARGS_SO_FAR is the size of args previously pushed for this call.
4389 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4390 for arguments passed in registers. If nonzero, it will be the number
4391 of bytes required. */
4394 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4395 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4396 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4397 rtx alignment_pad
, bool sibcall_p
)
4400 pad_direction stack_direction
4401 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4403 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4404 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4405 Default is below for small data on big-endian machines; else above. */
4406 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4408 /* Invert direction if stack is post-decrement.
4410 if (STACK_PUSH_CODE
== POST_DEC
)
4411 if (where_pad
!= PAD_NONE
)
4412 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4416 int nregs
= partial
/ UNITS_PER_WORD
;
4417 rtx
*tmp_regs
= NULL
;
4418 int overlapping
= 0;
4421 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4423 /* Copy a block into the stack, entirely or partially. */
4430 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4431 used
= partial
- offset
;
4433 if (mode
!= BLKmode
)
4435 /* A value is to be stored in an insufficiently aligned
4436 stack slot; copy via a suitably aligned slot if
4438 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4439 if (!MEM_P (xinner
))
4441 temp
= assign_temp (type
, 1, 1);
4442 emit_move_insn (temp
, xinner
);
4449 /* USED is now the # of bytes we need not copy to the stack
4450 because registers will take care of them. */
4453 xinner
= adjust_address (xinner
, BLKmode
, used
);
4455 /* If the partial register-part of the arg counts in its stack size,
4456 skip the part of stack space corresponding to the registers.
4457 Otherwise, start copying to the beginning of the stack space,
4458 by setting SKIP to 0. */
4459 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4461 #ifdef PUSH_ROUNDING
4462 /* Do it with several push insns if that doesn't take lots of insns
4463 and if there is no difficulty with push insns that skip bytes
4464 on the stack for alignment purposes. */
4467 && CONST_INT_P (size
)
4469 && MEM_ALIGN (xinner
) >= align
4470 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4471 /* Here we avoid the case of a structure whose weak alignment
4472 forces many pushes of a small amount of data,
4473 and such small pushes do rounding that causes trouble. */
4474 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4475 || align
>= BIGGEST_ALIGNMENT
4476 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4477 align
/ BITS_PER_UNIT
))
4478 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4480 /* Push padding now if padding above and stack grows down,
4481 or if padding below and stack grows up.
4482 But if space already allocated, this has already been done. */
4483 if (maybe_ne (extra
, 0)
4485 && where_pad
!= PAD_NONE
4486 && where_pad
!= stack_direction
)
4487 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4489 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4493 #endif /* PUSH_ROUNDING */
4497 /* Otherwise make space on the stack and copy the data
4498 to the address of that space. */
4500 /* Deduct words put into registers from the size we must copy. */
4503 if (CONST_INT_P (size
))
4504 size
= GEN_INT (INTVAL (size
) - used
);
4506 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4507 gen_int_mode (used
, GET_MODE (size
)),
4508 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4511 /* Get the address of the stack space.
4512 In this case, we do not deal with EXTRA separately.
4513 A single stack adjust will do. */
4514 poly_int64 const_args_so_far
;
4517 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4520 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4521 temp
= memory_address (BLKmode
,
4522 plus_constant (Pmode
, args_addr
,
4523 skip
+ const_args_so_far
));
4525 temp
= memory_address (BLKmode
,
4526 plus_constant (Pmode
,
4527 gen_rtx_PLUS (Pmode
,
4532 if (!ACCUMULATE_OUTGOING_ARGS
)
4534 /* If the source is referenced relative to the stack pointer,
4535 copy it to another register to stabilize it. We do not need
4536 to do this if we know that we won't be changing sp. */
4538 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4539 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4540 temp
= copy_to_reg (temp
);
4543 target
= gen_rtx_MEM (BLKmode
, temp
);
4545 /* We do *not* set_mem_attributes here, because incoming arguments
4546 may overlap with sibling call outgoing arguments and we cannot
4547 allow reordering of reads from function arguments with stores
4548 to outgoing arguments of sibling calls. We do, however, want
4549 to record the alignment of the stack slot. */
4550 /* ALIGN may well be better aligned than TYPE, e.g. due to
4551 PARM_BOUNDARY. Assume the caller isn't lying. */
4552 set_mem_align (target
, align
);
4554 /* If part should go in registers and pushing to that part would
4555 overwrite some of the values that need to go into regs, load the
4556 overlapping values into temporary pseudos to be moved into the hard
4557 regs at the end after the stack pushing has completed.
4558 We cannot load them directly into the hard regs here because
4559 they can be clobbered by the block move expansions.
4562 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4563 && GET_CODE (reg
) != PARALLEL
)
4565 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4566 if (overlapping
> 0)
4568 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4569 overlapping
/= UNITS_PER_WORD
;
4571 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4573 for (int i
= 0; i
< overlapping
; i
++)
4574 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4576 for (int i
= 0; i
< overlapping
; i
++)
4577 emit_move_insn (tmp_regs
[i
],
4578 operand_subword_force (target
, i
, mode
));
4580 else if (overlapping
== -1)
4582 /* Could not determine whether there is overlap.
4583 Fail the sibcall. */
4591 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4594 else if (partial
> 0)
4596 /* Scalar partly in registers. This case is only supported
4597 for fixed-wdth modes. */
4598 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4599 num_words
/= UNITS_PER_WORD
;
4602 /* # bytes of start of argument
4603 that we must make space for but need not store. */
4604 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4605 int args_offset
= INTVAL (args_so_far
);
4608 /* Push padding now if padding above and stack grows down,
4609 or if padding below and stack grows up.
4610 But if space already allocated, this has already been done. */
4611 if (maybe_ne (extra
, 0)
4613 && where_pad
!= PAD_NONE
4614 && where_pad
!= stack_direction
)
4615 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4617 /* If we make space by pushing it, we might as well push
4618 the real data. Otherwise, we can leave OFFSET nonzero
4619 and leave the space uninitialized. */
4623 /* Now NOT_STACK gets the number of words that we don't need to
4624 allocate on the stack. Convert OFFSET to words too. */
4625 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4626 offset
/= UNITS_PER_WORD
;
4628 /* If the partial register-part of the arg counts in its stack size,
4629 skip the part of stack space corresponding to the registers.
4630 Otherwise, start copying to the beginning of the stack space,
4631 by setting SKIP to 0. */
4632 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4634 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4635 x
= validize_mem (force_const_mem (mode
, x
));
4637 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4638 SUBREGs of such registers are not allowed. */
4639 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4640 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4641 x
= copy_to_reg (x
);
4643 /* Loop over all the words allocated on the stack for this arg. */
4644 /* We can do it by words, because any scalar bigger than a word
4645 has a size a multiple of a word. */
4646 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4647 if (i
>= not_stack
+ offset
)
4648 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4649 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4651 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4653 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4661 /* Push padding now if padding above and stack grows down,
4662 or if padding below and stack grows up.
4663 But if space already allocated, this has already been done. */
4664 if (maybe_ne (extra
, 0)
4666 && where_pad
!= PAD_NONE
4667 && where_pad
!= stack_direction
)
4668 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4670 #ifdef PUSH_ROUNDING
4671 if (args_addr
== 0 && PUSH_ARGS
)
4672 emit_single_push_insn (mode
, x
, type
);
4676 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4677 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4679 /* We do *not* set_mem_attributes here, because incoming arguments
4680 may overlap with sibling call outgoing arguments and we cannot
4681 allow reordering of reads from function arguments with stores
4682 to outgoing arguments of sibling calls. We do, however, want
4683 to record the alignment of the stack slot. */
4684 /* ALIGN may well be better aligned than TYPE, e.g. due to
4685 PARM_BOUNDARY. Assume the caller isn't lying. */
4686 set_mem_align (dest
, align
);
4688 emit_move_insn (dest
, x
);
4692 /* Move the partial arguments into the registers and any overlapping
4693 values that we moved into the pseudos in tmp_regs. */
4694 if (partial
> 0 && reg
!= 0)
4696 /* Handle calls that pass values in multiple non-contiguous locations.
4697 The Irix 6 ABI has examples of this. */
4698 if (GET_CODE (reg
) == PARALLEL
)
4699 emit_group_load (reg
, x
, type
, -1);
4702 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4703 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4705 for (int i
= 0; i
< overlapping
; i
++)
4706 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4707 + nregs
- overlapping
+ i
),
4713 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4714 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4716 if (alignment_pad
&& args_addr
== 0)
4717 anti_adjust_stack (alignment_pad
);
4722 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4726 get_subtarget (rtx x
)
4730 /* Only registers can be subtargets. */
4732 /* Don't use hard regs to avoid extending their life. */
4733 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4737 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4738 FIELD is a bitfield. Returns true if the optimization was successful,
4739 and there's nothing else to do. */
4742 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4743 poly_uint64 pbitpos
,
4744 poly_uint64 pbitregion_start
,
4745 poly_uint64 pbitregion_end
,
4746 machine_mode mode1
, rtx str_rtx
,
4747 tree to
, tree src
, bool reverse
)
4749 /* str_mode is not guaranteed to be a scalar type. */
4750 machine_mode str_mode
= GET_MODE (str_rtx
);
4751 unsigned int str_bitsize
;
4756 enum tree_code code
;
4758 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4759 if (mode1
!= VOIDmode
4760 || !pbitsize
.is_constant (&bitsize
)
4761 || !pbitpos
.is_constant (&bitpos
)
4762 || !pbitregion_start
.is_constant (&bitregion_start
)
4763 || !pbitregion_end
.is_constant (&bitregion_end
)
4764 || bitsize
>= BITS_PER_WORD
4765 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4766 || str_bitsize
> BITS_PER_WORD
4767 || TREE_SIDE_EFFECTS (to
)
4768 || TREE_THIS_VOLATILE (to
))
4772 if (TREE_CODE (src
) != SSA_NAME
)
4774 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4777 srcstmt
= get_gimple_for_ssa_name (src
);
4779 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4782 code
= gimple_assign_rhs_code (srcstmt
);
4784 op0
= gimple_assign_rhs1 (srcstmt
);
4786 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4787 to find its initialization. Hopefully the initialization will
4788 be from a bitfield load. */
4789 if (TREE_CODE (op0
) == SSA_NAME
)
4791 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4793 /* We want to eventually have OP0 be the same as TO, which
4794 should be a bitfield. */
4796 || !is_gimple_assign (op0stmt
)
4797 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4799 op0
= gimple_assign_rhs1 (op0stmt
);
4802 op1
= gimple_assign_rhs2 (srcstmt
);
4804 if (!operand_equal_p (to
, op0
, 0))
4807 if (MEM_P (str_rtx
))
4809 unsigned HOST_WIDE_INT offset1
;
4811 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4812 str_bitsize
= BITS_PER_WORD
;
4814 scalar_int_mode best_mode
;
4815 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4816 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4818 str_mode
= best_mode
;
4819 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4822 bitpos
%= str_bitsize
;
4823 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4824 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4826 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4829 /* If the bit field covers the whole REG/MEM, store_field
4830 will likely generate better code. */
4831 if (bitsize
>= str_bitsize
)
4834 /* We can't handle fields split across multiple entities. */
4835 if (bitpos
+ bitsize
> str_bitsize
)
4838 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4839 bitpos
= str_bitsize
- bitpos
- bitsize
;
4845 /* For now, just optimize the case of the topmost bitfield
4846 where we don't need to do any masking and also
4847 1 bit bitfields where xor can be used.
4848 We might win by one instruction for the other bitfields
4849 too if insv/extv instructions aren't used, so that
4850 can be added later. */
4851 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4852 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4855 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4856 value
= convert_modes (str_mode
,
4857 TYPE_MODE (TREE_TYPE (op1
)), value
,
4858 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4860 /* We may be accessing data outside the field, which means
4861 we can alias adjacent data. */
4862 if (MEM_P (str_rtx
))
4864 str_rtx
= shallow_copy_rtx (str_rtx
);
4865 set_mem_alias_set (str_rtx
, 0);
4866 set_mem_expr (str_rtx
, 0);
4869 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4871 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4875 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4877 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4879 value
= flip_storage_order (str_mode
, value
);
4880 result
= expand_binop (str_mode
, binop
, str_rtx
,
4881 value
, str_rtx
, 1, OPTAB_WIDEN
);
4882 if (result
!= str_rtx
)
4883 emit_move_insn (str_rtx
, result
);
4888 if (TREE_CODE (op1
) != INTEGER_CST
)
4890 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4891 value
= convert_modes (str_mode
,
4892 TYPE_MODE (TREE_TYPE (op1
)), value
,
4893 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4895 /* We may be accessing data outside the field, which means
4896 we can alias adjacent data. */
4897 if (MEM_P (str_rtx
))
4899 str_rtx
= shallow_copy_rtx (str_rtx
);
4900 set_mem_alias_set (str_rtx
, 0);
4901 set_mem_expr (str_rtx
, 0);
4904 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4905 if (bitpos
+ bitsize
!= str_bitsize
)
4907 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4909 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4911 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4913 value
= flip_storage_order (str_mode
, value
);
4914 result
= expand_binop (str_mode
, binop
, str_rtx
,
4915 value
, str_rtx
, 1, OPTAB_WIDEN
);
4916 if (result
!= str_rtx
)
4917 emit_move_insn (str_rtx
, result
);
4927 /* In the C++ memory model, consecutive bit fields in a structure are
4928 considered one memory location.
4930 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4931 returns the bit range of consecutive bits in which this COMPONENT_REF
4932 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4933 and *OFFSET may be adjusted in the process.
4935 If the access does not need to be restricted, 0 is returned in both
4936 *BITSTART and *BITEND. */
4939 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4940 poly_int64_pod
*bitpos
, tree
*offset
)
4942 poly_int64 bitoffset
;
4945 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4947 field
= TREE_OPERAND (exp
, 1);
4948 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4949 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4950 need to limit the range we can access. */
4953 *bitstart
= *bitend
= 0;
4957 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4958 part of a larger bit field, then the representative does not serve any
4959 useful purpose. This can occur in Ada. */
4960 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4963 poly_int64 rbitsize
, rbitpos
;
4965 int unsignedp
, reversep
, volatilep
= 0;
4966 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4967 &roffset
, &rmode
, &unsignedp
, &reversep
,
4969 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4971 *bitstart
= *bitend
= 0;
4976 /* Compute the adjustment to bitpos from the offset of the field
4977 relative to the representative. DECL_FIELD_OFFSET of field and
4978 repr are the same by construction if they are not constants,
4979 see finish_bitfield_layout. */
4980 poly_uint64 field_offset
, repr_offset
;
4981 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4982 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4983 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4986 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4987 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4989 /* If the adjustment is larger than bitpos, we would have a negative bit
4990 position for the lower bound and this may wreak havoc later. Adjust
4991 offset and bitpos to make the lower bound non-negative in that case. */
4992 if (maybe_gt (bitoffset
, *bitpos
))
4994 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4995 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4997 *bitpos
+= adjust_bits
;
4998 if (*offset
== NULL_TREE
)
4999 *offset
= size_int (-adjust_bytes
);
5001 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5005 *bitstart
= *bitpos
- bitoffset
;
5007 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5010 /* Returns true if BASE is a DECL that does not reside in memory and
5011 has non-BLKmode. DECL_RTL must not be a MEM; if
5012 DECL_RTL was not set yet, return false. */
5015 non_mem_decl_p (tree base
)
5018 || TREE_ADDRESSABLE (base
)
5019 || DECL_MODE (base
) == BLKmode
)
5022 if (!DECL_RTL_SET_P (base
))
5025 return (!MEM_P (DECL_RTL (base
)));
5028 /* Returns true if REF refers to an object that does not
5029 reside in memory and has non-BLKmode. */
5032 mem_ref_refers_to_non_mem_p (tree ref
)
5036 if (TREE_CODE (ref
) == MEM_REF
5037 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5039 tree addr
= TREE_OPERAND (ref
, 0);
5041 if (TREE_CODE (addr
) != ADDR_EXPR
)
5044 base
= TREE_OPERAND (addr
, 0);
5049 return non_mem_decl_p (base
);
5052 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5053 is true, try generating a nontemporal store. */
5056 expand_assignment (tree to
, tree from
, bool nontemporal
)
5062 enum insn_code icode
;
5064 /* Don't crash if the lhs of the assignment was erroneous. */
5065 if (TREE_CODE (to
) == ERROR_MARK
)
5067 expand_normal (from
);
5071 /* Optimize away no-op moves without side-effects. */
5072 if (operand_equal_p (to
, from
, 0))
5075 /* Handle misaligned stores. */
5076 mode
= TYPE_MODE (TREE_TYPE (to
));
5077 if ((TREE_CODE (to
) == MEM_REF
5078 || TREE_CODE (to
) == TARGET_MEM_REF
5081 && !mem_ref_refers_to_non_mem_p (to
)
5082 && ((align
= get_object_alignment (to
))
5083 < GET_MODE_ALIGNMENT (mode
))
5084 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5085 != CODE_FOR_nothing
)
5086 || targetm
.slow_unaligned_access (mode
, align
)))
5090 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5091 reg
= force_not_mem (reg
);
5092 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5093 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5094 reg
= flip_storage_order (mode
, reg
);
5096 if (icode
!= CODE_FOR_nothing
)
5098 class expand_operand ops
[2];
5100 create_fixed_operand (&ops
[0], mem
);
5101 create_input_operand (&ops
[1], reg
, mode
);
5102 /* The movmisalign<mode> pattern cannot fail, else the assignment
5103 would silently be omitted. */
5104 expand_insn (icode
, 2, ops
);
5107 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5112 /* Assignment of a structure component needs special treatment
5113 if the structure component's rtx is not simply a MEM.
5114 Assignment of an array element at a constant index, and assignment of
5115 an array element in an unaligned packed structure field, has the same
5116 problem. Same for (partially) storing into a non-memory object. */
5117 if (handled_component_p (to
)
5118 || (TREE_CODE (to
) == MEM_REF
5119 && (REF_REVERSE_STORAGE_ORDER (to
)
5120 || mem_ref_refers_to_non_mem_p (to
)))
5121 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5124 poly_int64 bitsize
, bitpos
;
5125 poly_uint64 bitregion_start
= 0;
5126 poly_uint64 bitregion_end
= 0;
5128 int unsignedp
, reversep
, volatilep
= 0;
5132 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5133 &unsignedp
, &reversep
, &volatilep
);
5135 /* Make sure bitpos is not negative, it can wreak havoc later. */
5136 if (maybe_lt (bitpos
, 0))
5138 gcc_assert (offset
== NULL_TREE
);
5139 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5140 bitpos
= num_trailing_bits (bitpos
);
5143 if (TREE_CODE (to
) == COMPONENT_REF
5144 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5145 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5146 /* The C++ memory model naturally applies to byte-aligned fields.
5147 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5148 BITSIZE are not byte-aligned, there is no need to limit the range
5149 we can access. This can occur with packed structures in Ada. */
5150 else if (maybe_gt (bitsize
, 0)
5151 && multiple_p (bitsize
, BITS_PER_UNIT
)
5152 && multiple_p (bitpos
, BITS_PER_UNIT
))
5154 bitregion_start
= bitpos
;
5155 bitregion_end
= bitpos
+ bitsize
- 1;
5158 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5160 /* If the field has a mode, we want to access it in the
5161 field's mode, not the computed mode.
5162 If a MEM has VOIDmode (external with incomplete type),
5163 use BLKmode for it instead. */
5166 if (mode1
!= VOIDmode
)
5167 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5168 else if (GET_MODE (to_rtx
) == VOIDmode
)
5169 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5174 machine_mode address_mode
;
5177 if (!MEM_P (to_rtx
))
5179 /* We can get constant negative offsets into arrays with broken
5180 user code. Translate this to a trap instead of ICEing. */
5181 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5182 expand_builtin_trap ();
5183 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5186 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5187 address_mode
= get_address_mode (to_rtx
);
5188 if (GET_MODE (offset_rtx
) != address_mode
)
5190 /* We cannot be sure that the RTL in offset_rtx is valid outside
5191 of a memory address context, so force it into a register
5192 before attempting to convert it to the desired mode. */
5193 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5194 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5197 /* If we have an expression in OFFSET_RTX and a non-zero
5198 byte offset in BITPOS, adding the byte offset before the
5199 OFFSET_RTX results in better intermediate code, which makes
5200 later rtl optimization passes perform better.
5202 We prefer intermediate code like this:
5204 r124:DI=r123:DI+0x18
5209 r124:DI=r123:DI+0x10
5210 [r124:DI+0x8]=r121:DI
5212 This is only done for aligned data values, as these can
5213 be expected to result in single move instructions. */
5215 if (mode1
!= VOIDmode
5216 && maybe_ne (bitpos
, 0)
5217 && maybe_gt (bitsize
, 0)
5218 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5219 && multiple_p (bitpos
, bitsize
)
5220 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5221 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5223 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5224 bitregion_start
= 0;
5225 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5226 bitregion_end
-= bitpos
;
5230 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5231 highest_pow2_factor_for_target (to
,
5235 /* No action is needed if the target is not a memory and the field
5236 lies completely outside that target. This can occur if the source
5237 code contains an out-of-bounds access to a small array. */
5239 && GET_MODE (to_rtx
) != BLKmode
5240 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5242 expand_normal (from
);
5245 /* Handle expand_expr of a complex value returning a CONCAT. */
5246 else if (GET_CODE (to_rtx
) == CONCAT
)
5248 machine_mode to_mode
= GET_MODE (to_rtx
);
5249 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5250 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5251 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5252 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5253 && known_eq (bitpos
, 0)
5254 && known_eq (bitsize
, mode_bitsize
))
5255 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5256 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5257 && known_eq (bitsize
, inner_bitsize
)
5258 && (known_eq (bitpos
, 0)
5259 || known_eq (bitpos
, inner_bitsize
)))
5260 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5261 false, nontemporal
, reversep
);
5262 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5263 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5264 bitregion_start
, bitregion_end
,
5265 mode1
, from
, get_alias_set (to
),
5266 nontemporal
, reversep
);
5267 else if (known_ge (bitpos
, inner_bitsize
))
5268 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5269 bitpos
- inner_bitsize
,
5270 bitregion_start
, bitregion_end
,
5271 mode1
, from
, get_alias_set (to
),
5272 nontemporal
, reversep
);
5273 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5275 result
= expand_normal (from
);
5276 if (GET_CODE (result
) == CONCAT
)
5278 to_mode
= GET_MODE_INNER (to_mode
);
5279 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5281 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5284 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5286 if (!from_real
|| !from_imag
)
5287 goto concat_store_slow
;
5288 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5289 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5293 machine_mode from_mode
5294 = GET_MODE (result
) == VOIDmode
5295 ? TYPE_MODE (TREE_TYPE (from
))
5296 : GET_MODE (result
);
5299 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5302 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5305 emit_move_insn (XEXP (to_rtx
, 0),
5306 read_complex_part (from_rtx
, false));
5307 emit_move_insn (XEXP (to_rtx
, 1),
5308 read_complex_part (from_rtx
, true));
5312 to_mode
= GET_MODE_INNER (to_mode
);
5314 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5316 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5317 GET_MODE_SIZE (to_mode
));
5318 if (!from_real
|| !from_imag
)
5319 goto concat_store_slow
;
5320 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5321 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5328 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5329 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5330 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5331 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5332 result
= store_field (temp
, bitsize
, bitpos
,
5333 bitregion_start
, bitregion_end
,
5334 mode1
, from
, get_alias_set (to
),
5335 nontemporal
, reversep
);
5336 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5337 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5340 /* For calls to functions returning variable length structures, if TO_RTX
5341 is not a MEM, go through a MEM because we must not create temporaries
5343 else if (!MEM_P (to_rtx
)
5344 && TREE_CODE (from
) == CALL_EXPR
5345 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5346 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5348 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5349 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5350 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5351 bitregion_end
, mode1
, from
, get_alias_set (to
),
5352 nontemporal
, reversep
);
5353 emit_move_insn (to_rtx
, temp
);
5359 /* If the field is at offset zero, we could have been given the
5360 DECL_RTX of the parent struct. Don't munge it. */
5361 to_rtx
= shallow_copy_rtx (to_rtx
);
5362 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5364 MEM_VOLATILE_P (to_rtx
) = 1;
5367 gcc_checking_assert (known_ge (bitpos
, 0));
5368 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5369 bitregion_start
, bitregion_end
,
5370 mode1
, to_rtx
, to
, from
,
5374 result
= store_field (to_rtx
, bitsize
, bitpos
,
5375 bitregion_start
, bitregion_end
,
5376 mode1
, from
, get_alias_set (to
),
5377 nontemporal
, reversep
);
5381 preserve_temp_slots (result
);
5386 /* If the rhs is a function call and its value is not an aggregate,
5387 call the function before we start to compute the lhs.
5388 This is needed for correct code for cases such as
5389 val = setjmp (buf) on machines where reference to val
5390 requires loading up part of an address in a separate insn.
5392 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5393 since it might be a promoted variable where the zero- or sign- extension
5394 needs to be done. Handling this in the normal way is safe because no
5395 computation is done before the call. The same is true for SSA names. */
5396 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5397 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5398 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5400 || TREE_CODE (to
) == PARM_DECL
5401 || TREE_CODE (to
) == RESULT_DECL
)
5402 && REG_P (DECL_RTL (to
)))
5403 || TREE_CODE (to
) == SSA_NAME
))
5408 value
= expand_normal (from
);
5411 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5413 /* Handle calls that return values in multiple non-contiguous locations.
5414 The Irix 6 ABI has examples of this. */
5415 if (GET_CODE (to_rtx
) == PARALLEL
)
5417 if (GET_CODE (value
) == PARALLEL
)
5418 emit_group_move (to_rtx
, value
);
5420 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5421 int_size_in_bytes (TREE_TYPE (from
)));
5423 else if (GET_CODE (value
) == PARALLEL
)
5424 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5425 int_size_in_bytes (TREE_TYPE (from
)));
5426 else if (GET_MODE (to_rtx
) == BLKmode
)
5428 /* Handle calls that return BLKmode values in registers. */
5430 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5432 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5436 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5437 value
= convert_memory_address_addr_space
5438 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5439 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5441 emit_move_insn (to_rtx
, value
);
5444 preserve_temp_slots (to_rtx
);
5449 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5450 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5452 /* Don't move directly into a return register. */
5453 if (TREE_CODE (to
) == RESULT_DECL
5454 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5460 /* If the source is itself a return value, it still is in a pseudo at
5461 this point so we can move it back to the return register directly. */
5463 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5464 && TREE_CODE (from
) != CALL_EXPR
)
5465 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5467 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5469 /* Handle calls that return values in multiple non-contiguous locations.
5470 The Irix 6 ABI has examples of this. */
5471 if (GET_CODE (to_rtx
) == PARALLEL
)
5473 if (GET_CODE (temp
) == PARALLEL
)
5474 emit_group_move (to_rtx
, temp
);
5476 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5477 int_size_in_bytes (TREE_TYPE (from
)));
5480 emit_move_insn (to_rtx
, temp
);
5482 preserve_temp_slots (to_rtx
);
5487 /* In case we are returning the contents of an object which overlaps
5488 the place the value is being stored, use a safe function when copying
5489 a value through a pointer into a structure value return block. */
5490 if (TREE_CODE (to
) == RESULT_DECL
5491 && TREE_CODE (from
) == INDIRECT_REF
5492 && ADDR_SPACE_GENERIC_P
5493 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5494 && refs_may_alias_p (to
, from
)
5495 && cfun
->returns_struct
5496 && !cfun
->returns_pcc_struct
)
5501 size
= expr_size (from
);
5502 from_rtx
= expand_normal (from
);
5504 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5506 preserve_temp_slots (to_rtx
);
5511 /* Compute FROM and store the value in the rtx we got. */
5514 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5515 preserve_temp_slots (result
);
5520 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5521 succeeded, false otherwise. */
5524 emit_storent_insn (rtx to
, rtx from
)
5526 class expand_operand ops
[2];
5527 machine_mode mode
= GET_MODE (to
);
5528 enum insn_code code
= optab_handler (storent_optab
, mode
);
5530 if (code
== CODE_FOR_nothing
)
5533 create_fixed_operand (&ops
[0], to
);
5534 create_input_operand (&ops
[1], from
, mode
);
5535 return maybe_expand_insn (code
, 2, ops
);
5538 /* Helper function for store_expr storing of STRING_CST. */
5541 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5543 tree str
= (tree
) data
;
5545 gcc_assert (offset
>= 0);
5546 if (offset
>= TREE_STRING_LENGTH (str
))
5549 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5550 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5552 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5553 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5554 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5555 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5556 return c_readstr (p
, mode
, false);
5559 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5562 /* Generate code for computing expression EXP,
5563 and storing the value into TARGET.
5565 If the mode is BLKmode then we may return TARGET itself.
5566 It turns out that in BLKmode it doesn't cause a problem.
5567 because C has no operators that could combine two different
5568 assignments into the same BLKmode object with different values
5569 with no sequence point. Will other languages need this to
5572 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5573 stack, and block moves may need to be treated specially.
5575 If NONTEMPORAL is true, try using a nontemporal store instruction.
5577 If REVERSE is true, the store is to be done in reverse order. */
5580 store_expr (tree exp
, rtx target
, int call_param_p
,
5581 bool nontemporal
, bool reverse
)
5584 rtx alt_rtl
= NULL_RTX
;
5585 location_t loc
= curr_insn_location ();
5586 bool shortened_string_cst
= false;
5588 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5590 /* C++ can generate ?: expressions with a throw expression in one
5591 branch and an rvalue in the other. Here, we resolve attempts to
5592 store the throw expression's nonexistent result. */
5593 gcc_assert (!call_param_p
);
5594 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5597 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5599 /* Perform first part of compound expression, then assign from second
5601 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5602 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5603 return store_expr (TREE_OPERAND (exp
, 1), target
,
5604 call_param_p
, nontemporal
, reverse
);
5606 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5608 /* For conditional expression, get safe form of the target. Then
5609 test the condition, doing the appropriate assignment on either
5610 side. This avoids the creation of unnecessary temporaries.
5611 For non-BLKmode, it is more efficient not to do this. */
5613 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5615 do_pending_stack_adjust ();
5617 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5618 profile_probability::uninitialized ());
5619 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5620 nontemporal
, reverse
);
5621 emit_jump_insn (targetm
.gen_jump (lab2
));
5624 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5625 nontemporal
, reverse
);
5631 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5632 /* If this is a scalar in a register that is stored in a wider mode
5633 than the declared mode, compute the result into its declared mode
5634 and then convert to the wider mode. Our value is the computed
5637 rtx inner_target
= 0;
5638 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5639 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5641 /* We can do the conversion inside EXP, which will often result
5642 in some optimizations. Do the conversion in two steps: first
5643 change the signedness, if needed, then the extend. But don't
5644 do this if the type of EXP is a subtype of something else
5645 since then the conversion might involve more than just
5646 converting modes. */
5647 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5648 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5649 && GET_MODE_PRECISION (outer_mode
)
5650 == TYPE_PRECISION (TREE_TYPE (exp
)))
5652 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5653 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5655 /* Some types, e.g. Fortran's logical*4, won't have a signed
5656 version, so use the mode instead. */
5658 = (signed_or_unsigned_type_for
5659 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5661 ntype
= lang_hooks
.types
.type_for_mode
5662 (TYPE_MODE (TREE_TYPE (exp
)),
5663 SUBREG_PROMOTED_SIGN (target
));
5665 exp
= fold_convert_loc (loc
, ntype
, exp
);
5668 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5669 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5672 inner_target
= SUBREG_REG (target
);
5675 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5676 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5679 /* If TEMP is a VOIDmode constant, use convert_modes to make
5680 sure that we properly convert it. */
5681 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5683 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5684 temp
, SUBREG_PROMOTED_SIGN (target
));
5685 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5686 SUBREG_PROMOTED_SIGN (target
));
5689 convert_move (SUBREG_REG (target
), temp
,
5690 SUBREG_PROMOTED_SIGN (target
));
5694 else if ((TREE_CODE (exp
) == STRING_CST
5695 || (TREE_CODE (exp
) == MEM_REF
5696 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5697 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5699 && integer_zerop (TREE_OPERAND (exp
, 1))))
5700 && !nontemporal
&& !call_param_p
5703 /* Optimize initialization of an array with a STRING_CST. */
5704 HOST_WIDE_INT exp_len
, str_copy_len
;
5706 tree str
= TREE_CODE (exp
) == STRING_CST
5707 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5709 exp_len
= int_expr_size (exp
);
5713 if (TREE_STRING_LENGTH (str
) <= 0)
5716 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5717 MEM_ALIGN (target
), false))
5719 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5720 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5724 str_copy_len
= TREE_STRING_LENGTH (str
);
5725 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5727 str_copy_len
+= STORE_MAX_PIECES
- 1;
5728 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5730 if (str_copy_len
>= exp_len
)
5733 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5734 (void *) str
, MEM_ALIGN (target
), false))
5737 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5738 (void *) str
, MEM_ALIGN (target
), false,
5740 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5741 exp_len
- str_copy_len
),
5742 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5750 /* If we want to use a nontemporal or a reverse order store, force the
5751 value into a register first. */
5752 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5754 if (TREE_CODE (exp
) == STRING_CST
5755 && tmp_target
== target
5756 && GET_MODE (target
) == BLKmode
5757 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
5759 rtx size
= expr_size (exp
);
5760 if (CONST_INT_P (size
)
5761 && size
!= const0_rtx
5763 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
5765 /* If the STRING_CST has much larger array type than
5766 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
5767 it into the rodata section as the code later on will use
5768 memset zero for the remainder anyway. See PR95052. */
5769 tmp_target
= NULL_RTX
;
5770 rexp
= copy_node (exp
);
5772 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
5773 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
5775 shortened_string_cst
= true;
5778 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
5780 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5782 if (shortened_string_cst
)
5784 gcc_assert (MEM_P (temp
));
5785 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
5789 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5790 the same as that of TARGET, adjust the constant. This is needed, for
5791 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5792 only a word-sized value. */
5793 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5794 && TREE_CODE (exp
) != ERROR_MARK
5795 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5797 gcc_assert (!shortened_string_cst
);
5798 if (GET_MODE_CLASS (GET_MODE (target
))
5799 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5800 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5801 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5803 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5804 TYPE_MODE (TREE_TYPE (exp
)), 0);
5808 if (GET_MODE (temp
) == VOIDmode
)
5809 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5810 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5813 /* If value was not generated in the target, store it there.
5814 Convert the value to TARGET's type first if necessary and emit the
5815 pending incrementations that have been queued when expanding EXP.
5816 Note that we cannot emit the whole queue blindly because this will
5817 effectively disable the POST_INC optimization later.
5819 If TEMP and TARGET compare equal according to rtx_equal_p, but
5820 one or both of them are volatile memory refs, we have to distinguish
5822 - expand_expr has used TARGET. In this case, we must not generate
5823 another copy. This can be detected by TARGET being equal according
5825 - expand_expr has not used TARGET - that means that the source just
5826 happens to have the same RTX form. Since temp will have been created
5827 by expand_expr, it will compare unequal according to == .
5828 We must generate a copy in this case, to reach the correct number
5829 of volatile memory references. */
5831 if ((! rtx_equal_p (temp
, target
)
5832 || (temp
!= target
&& (side_effects_p (temp
)
5833 || side_effects_p (target
))))
5834 && TREE_CODE (exp
) != ERROR_MARK
5835 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5836 but TARGET is not valid memory reference, TEMP will differ
5837 from TARGET although it is really the same location. */
5839 && rtx_equal_p (alt_rtl
, target
)
5840 && !side_effects_p (alt_rtl
)
5841 && !side_effects_p (target
))
5842 /* If there's nothing to copy, don't bother. Don't call
5843 expr_size unless necessary, because some front-ends (C++)
5844 expr_size-hook must not be given objects that are not
5845 supposed to be bit-copied or bit-initialized. */
5846 && expr_size (exp
) != const0_rtx
)
5848 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5850 gcc_assert (!shortened_string_cst
);
5851 if (GET_MODE (target
) == BLKmode
)
5853 /* Handle calls that return BLKmode values in registers. */
5854 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5855 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5857 store_bit_field (target
,
5858 rtx_to_poly_int64 (expr_size (exp
))
5860 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5863 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5866 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5868 /* Handle copying a string constant into an array. The string
5869 constant may be shorter than the array. So copy just the string's
5870 actual length, and clear the rest. First get the size of the data
5871 type of the string, which is actually the size of the target. */
5872 rtx size
= expr_size (exp
);
5874 if (CONST_INT_P (size
)
5875 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5876 emit_block_move (target
, temp
, size
,
5878 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5881 machine_mode pointer_mode
5882 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5883 machine_mode address_mode
= get_address_mode (target
);
5885 /* Compute the size of the data to copy from the string. */
5887 = size_binop_loc (loc
, MIN_EXPR
,
5888 make_tree (sizetype
, size
),
5889 size_int (TREE_STRING_LENGTH (exp
)));
5891 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5893 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5894 rtx_code_label
*label
= 0;
5896 /* Copy that much. */
5897 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5898 TYPE_UNSIGNED (sizetype
));
5899 emit_block_move (target
, temp
, copy_size_rtx
,
5901 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5903 /* Figure out how much is left in TARGET that we have to clear.
5904 Do all calculations in pointer_mode. */
5905 poly_int64 const_copy_size
;
5906 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5908 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5909 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5913 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5914 copy_size_rtx
, NULL_RTX
, 0,
5917 if (GET_MODE (copy_size_rtx
) != address_mode
)
5918 copy_size_rtx
= convert_to_mode (address_mode
,
5920 TYPE_UNSIGNED (sizetype
));
5922 target
= offset_address (target
, copy_size_rtx
,
5923 highest_pow2_factor (copy_size
));
5924 label
= gen_label_rtx ();
5925 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5926 GET_MODE (size
), 0, label
);
5929 if (size
!= const0_rtx
)
5930 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5936 else if (shortened_string_cst
)
5938 /* Handle calls that return values in multiple non-contiguous locations.
5939 The Irix 6 ABI has examples of this. */
5940 else if (GET_CODE (target
) == PARALLEL
)
5942 if (GET_CODE (temp
) == PARALLEL
)
5943 emit_group_move (target
, temp
);
5945 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5946 int_size_in_bytes (TREE_TYPE (exp
)));
5948 else if (GET_CODE (temp
) == PARALLEL
)
5949 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5950 int_size_in_bytes (TREE_TYPE (exp
)));
5951 else if (GET_MODE (temp
) == BLKmode
)
5952 emit_block_move (target
, temp
, expr_size (exp
),
5954 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5955 /* If we emit a nontemporal store, there is nothing else to do. */
5956 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5961 temp
= flip_storage_order (GET_MODE (target
), temp
);
5962 temp
= force_operand (temp
, target
);
5964 emit_move_insn (target
, temp
);
5968 gcc_assert (!shortened_string_cst
);
5973 /* Return true if field F of structure TYPE is a flexible array. */
5976 flexible_array_member_p (const_tree f
, const_tree type
)
5981 return (DECL_CHAIN (f
) == NULL
5982 && TREE_CODE (tf
) == ARRAY_TYPE
5984 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5985 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5986 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5987 && int_size_in_bytes (type
) >= 0);
5990 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5991 must have in order for it to completely initialize a value of type TYPE.
5992 Return -1 if the number isn't known.
5994 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5996 static HOST_WIDE_INT
5997 count_type_elements (const_tree type
, bool for_ctor_p
)
5999 switch (TREE_CODE (type
))
6005 nelts
= array_type_nelts (type
);
6006 if (nelts
&& tree_fits_uhwi_p (nelts
))
6008 unsigned HOST_WIDE_INT n
;
6010 n
= tree_to_uhwi (nelts
) + 1;
6011 if (n
== 0 || for_ctor_p
)
6014 return n
* count_type_elements (TREE_TYPE (type
), false);
6016 return for_ctor_p
? -1 : 1;
6021 unsigned HOST_WIDE_INT n
;
6025 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6026 if (TREE_CODE (f
) == FIELD_DECL
)
6029 n
+= count_type_elements (TREE_TYPE (f
), false);
6030 else if (!flexible_array_member_p (f
, type
))
6031 /* Don't count flexible arrays, which are not supposed
6032 to be initialized. */
6040 case QUAL_UNION_TYPE
:
6045 gcc_assert (!for_ctor_p
);
6046 /* Estimate the number of scalars in each field and pick the
6047 maximum. Other estimates would do instead; the idea is simply
6048 to make sure that the estimate is not sensitive to the ordering
6051 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6052 if (TREE_CODE (f
) == FIELD_DECL
)
6054 m
= count_type_elements (TREE_TYPE (f
), false);
6055 /* If the field doesn't span the whole union, add an extra
6056 scalar for the rest. */
6057 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6058 TYPE_SIZE (type
)) != 1)
6071 unsigned HOST_WIDE_INT nelts
;
6072 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6080 case FIXED_POINT_TYPE
:
6085 case REFERENCE_TYPE
:
6101 /* Helper for categorize_ctor_elements. Identical interface. */
6104 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6105 HOST_WIDE_INT
*p_unique_nz_elts
,
6106 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6108 unsigned HOST_WIDE_INT idx
;
6109 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6110 tree value
, purpose
, elt_type
;
6112 /* Whether CTOR is a valid constant initializer, in accordance with what
6113 initializer_constant_valid_p does. If inferred from the constructor
6114 elements, true until proven otherwise. */
6115 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6116 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6122 elt_type
= NULL_TREE
;
6124 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6126 HOST_WIDE_INT mult
= 1;
6128 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6130 tree lo_index
= TREE_OPERAND (purpose
, 0);
6131 tree hi_index
= TREE_OPERAND (purpose
, 1);
6133 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6134 mult
= (tree_to_uhwi (hi_index
)
6135 - tree_to_uhwi (lo_index
) + 1);
6138 elt_type
= TREE_TYPE (value
);
6140 switch (TREE_CODE (value
))
6144 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6146 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6149 nz_elts
+= mult
* nz
;
6150 unique_nz_elts
+= unz
;
6151 init_elts
+= mult
* ic
;
6153 if (const_from_elts_p
&& const_p
)
6154 const_p
= const_elt_p
;
6161 if (!initializer_zerop (value
))
6170 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6171 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6172 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6176 if (!initializer_zerop (TREE_REALPART (value
)))
6181 if (!initializer_zerop (TREE_IMAGPART (value
)))
6186 init_elts
+= 2 * mult
;
6191 /* We can only construct constant-length vectors using
6193 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6194 for (unsigned int i
= 0; i
< nunits
; ++i
)
6196 tree v
= VECTOR_CST_ELT (value
, i
);
6197 if (!initializer_zerop (v
))
6209 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6210 nz_elts
+= mult
* tc
;
6211 unique_nz_elts
+= tc
;
6212 init_elts
+= mult
* tc
;
6214 if (const_from_elts_p
&& const_p
)
6216 = initializer_constant_valid_p (value
,
6218 TYPE_REVERSE_STORAGE_ORDER
6226 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6227 num_fields
, elt_type
))
6228 *p_complete
= false;
6230 *p_nz_elts
+= nz_elts
;
6231 *p_unique_nz_elts
+= unique_nz_elts
;
6232 *p_init_elts
+= init_elts
;
6237 /* Examine CTOR to discover:
6238 * how many scalar fields are set to nonzero values,
6239 and place it in *P_NZ_ELTS;
6240 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6241 high - low + 1 (this can be useful for callers to determine ctors
6242 that could be cheaply initialized with - perhaps nested - loops
6243 compared to copied from huge read-only data),
6244 and place it in *P_UNIQUE_NZ_ELTS;
6245 * how many scalar fields in total are in CTOR,
6246 and place it in *P_ELT_COUNT.
6247 * whether the constructor is complete -- in the sense that every
6248 meaningful byte is explicitly given a value --
6249 and place it in *P_COMPLETE.
6251 Return whether or not CTOR is a valid static constant initializer, the same
6252 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6255 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6256 HOST_WIDE_INT
*p_unique_nz_elts
,
6257 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6260 *p_unique_nz_elts
= 0;
6264 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6265 p_init_elts
, p_complete
);
6268 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6269 of which had type LAST_TYPE. Each element was itself a complete
6270 initializer, in the sense that every meaningful byte was explicitly
6271 given a value. Return true if the same is true for the constructor
6275 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6276 const_tree last_type
)
6278 if (TREE_CODE (type
) == UNION_TYPE
6279 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6284 gcc_assert (num_elts
== 1 && last_type
);
6286 /* ??? We could look at each element of the union, and find the
6287 largest element. Which would avoid comparing the size of the
6288 initialized element against any tail padding in the union.
6289 Doesn't seem worth the effort... */
6290 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6293 return count_type_elements (type
, true) == num_elts
;
6296 /* Return 1 if EXP contains mostly (3/4) zeros. */
6299 mostly_zeros_p (const_tree exp
)
6301 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6303 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6306 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6308 return !complete_p
|| nz_elts
< init_elts
/ 4;
6311 return initializer_zerop (exp
);
6314 /* Return 1 if EXP contains all zeros. */
6317 all_zeros_p (const_tree exp
)
6319 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6321 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6324 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6326 return nz_elts
== 0;
6329 return initializer_zerop (exp
);
6332 /* Helper function for store_constructor.
6333 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6334 CLEARED is as for store_constructor.
6335 ALIAS_SET is the alias set to use for any stores.
6336 If REVERSE is true, the store is to be done in reverse order.
6338 This provides a recursive shortcut back to store_constructor when it isn't
6339 necessary to go through store_field. This is so that we can pass through
6340 the cleared field to let store_constructor know that we may not have to
6341 clear a substructure if the outer structure has already been cleared. */
6344 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6345 poly_uint64 bitregion_start
,
6346 poly_uint64 bitregion_end
,
6348 tree exp
, int cleared
,
6349 alias_set_type alias_set
, bool reverse
)
6352 poly_uint64 bytesize
;
6353 if (TREE_CODE (exp
) == CONSTRUCTOR
6354 /* We can only call store_constructor recursively if the size and
6355 bit position are on a byte boundary. */
6356 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6357 && maybe_ne (bitsize
, 0U)
6358 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6359 /* If we have a nonzero bitpos for a register target, then we just
6360 let store_field do the bitfield handling. This is unlikely to
6361 generate unnecessary clear instructions anyways. */
6362 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6366 machine_mode target_mode
= GET_MODE (target
);
6367 if (target_mode
!= BLKmode
6368 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6369 target_mode
= BLKmode
;
6370 target
= adjust_address (target
, target_mode
, bytepos
);
6374 /* Update the alias set, if required. */
6375 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6376 && MEM_ALIAS_SET (target
) != 0)
6378 target
= copy_rtx (target
);
6379 set_mem_alias_set (target
, alias_set
);
6382 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6385 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6386 exp
, alias_set
, false, reverse
);
6390 /* Returns the number of FIELD_DECLs in TYPE. */
6393 fields_length (const_tree type
)
6395 tree t
= TYPE_FIELDS (type
);
6398 for (; t
; t
= DECL_CHAIN (t
))
6399 if (TREE_CODE (t
) == FIELD_DECL
)
6406 /* Store the value of constructor EXP into the rtx TARGET.
6407 TARGET is either a REG or a MEM; we know it cannot conflict, since
6408 safe_from_p has been called.
6409 CLEARED is true if TARGET is known to have been zero'd.
6410 SIZE is the number of bytes of TARGET we are allowed to modify: this
6411 may not be the same as the size of EXP if we are assigning to a field
6412 which has been packed to exclude padding bits.
6413 If REVERSE is true, the store is to be done in reverse order. */
6416 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6419 tree type
= TREE_TYPE (exp
);
6420 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6421 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6423 switch (TREE_CODE (type
))
6427 case QUAL_UNION_TYPE
:
6429 unsigned HOST_WIDE_INT idx
;
6432 /* The storage order is specified for every aggregate type. */
6433 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6435 /* If size is zero or the target is already cleared, do nothing. */
6436 if (known_eq (size
, 0) || cleared
)
6438 /* We either clear the aggregate or indicate the value is dead. */
6439 else if ((TREE_CODE (type
) == UNION_TYPE
6440 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6441 && ! CONSTRUCTOR_ELTS (exp
))
6442 /* If the constructor is empty, clear the union. */
6444 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6448 /* If we are building a static constructor into a register,
6449 set the initial value as zero so we can fold the value into
6450 a constant. But if more than one register is involved,
6451 this probably loses. */
6452 else if (REG_P (target
) && TREE_STATIC (exp
)
6453 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6454 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6456 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6460 /* If the constructor has fewer fields than the structure or
6461 if we are initializing the structure to mostly zeros, clear
6462 the whole structure first. Don't do this if TARGET is a
6463 register whose mode size isn't equal to SIZE since
6464 clear_storage can't handle this case. */
6465 else if (known_size_p (size
)
6466 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6467 || mostly_zeros_p (exp
))
6469 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6471 clear_storage (target
, gen_int_mode (size
, Pmode
),
6476 if (REG_P (target
) && !cleared
)
6477 emit_clobber (target
);
6479 /* Store each element of the constructor into the
6480 corresponding field of TARGET. */
6481 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6484 HOST_WIDE_INT bitsize
;
6485 HOST_WIDE_INT bitpos
= 0;
6487 rtx to_rtx
= target
;
6489 /* Just ignore missing fields. We cleared the whole
6490 structure, above, if any fields are missing. */
6494 if (cleared
&& initializer_zerop (value
))
6497 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6498 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6502 mode
= DECL_MODE (field
);
6503 if (DECL_BIT_FIELD (field
))
6506 offset
= DECL_FIELD_OFFSET (field
);
6507 if (tree_fits_shwi_p (offset
)
6508 && tree_fits_shwi_p (bit_position (field
)))
6510 bitpos
= int_bit_position (field
);
6516 /* If this initializes a field that is smaller than a
6517 word, at the start of a word, try to widen it to a full
6518 word. This special case allows us to output C++ member
6519 function initializations in a form that the optimizers
6521 if (WORD_REGISTER_OPERATIONS
6523 && bitsize
< BITS_PER_WORD
6524 && bitpos
% BITS_PER_WORD
== 0
6525 && GET_MODE_CLASS (mode
) == MODE_INT
6526 && TREE_CODE (value
) == INTEGER_CST
6528 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6530 type
= TREE_TYPE (value
);
6532 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6534 type
= lang_hooks
.types
.type_for_mode
6535 (word_mode
, TYPE_UNSIGNED (type
));
6536 value
= fold_convert (type
, value
);
6537 /* Make sure the bits beyond the original bitsize are zero
6538 so that we can correctly avoid extra zeroing stores in
6539 later constructor elements. */
6541 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6543 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6546 if (BYTES_BIG_ENDIAN
)
6548 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6549 build_int_cst (type
,
6550 BITS_PER_WORD
- bitsize
));
6551 bitsize
= BITS_PER_WORD
;
6555 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6556 && DECL_NONADDRESSABLE_P (field
))
6558 to_rtx
= copy_rtx (to_rtx
);
6559 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6562 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6563 0, bitregion_end
, mode
,
6565 get_alias_set (TREE_TYPE (field
)),
6573 unsigned HOST_WIDE_INT i
;
6576 tree elttype
= TREE_TYPE (type
);
6578 HOST_WIDE_INT minelt
= 0;
6579 HOST_WIDE_INT maxelt
= 0;
6581 /* The storage order is specified for every aggregate type. */
6582 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6584 domain
= TYPE_DOMAIN (type
);
6585 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6586 && TYPE_MAX_VALUE (domain
)
6587 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6588 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6590 /* If we have constant bounds for the range of the type, get them. */
6593 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6594 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6597 /* If the constructor has fewer elements than the array, clear
6598 the whole array first. Similarly if this is static
6599 constructor of a non-BLKmode object. */
6602 else if (REG_P (target
) && TREE_STATIC (exp
))
6606 unsigned HOST_WIDE_INT idx
;
6607 HOST_WIDE_INT count
= 0, zero_count
= 0;
6608 need_to_clear
= ! const_bounds_p
;
6610 /* This loop is a more accurate version of the loop in
6611 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6612 is also needed to check for missing elements. */
6613 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6615 HOST_WIDE_INT this_node_count
;
6620 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6622 tree lo_index
= TREE_OPERAND (index
, 0);
6623 tree hi_index
= TREE_OPERAND (index
, 1);
6625 if (! tree_fits_uhwi_p (lo_index
)
6626 || ! tree_fits_uhwi_p (hi_index
))
6632 this_node_count
= (tree_to_uhwi (hi_index
)
6633 - tree_to_uhwi (lo_index
) + 1);
6636 this_node_count
= 1;
6638 count
+= this_node_count
;
6639 if (mostly_zeros_p (value
))
6640 zero_count
+= this_node_count
;
6643 /* Clear the entire array first if there are any missing
6644 elements, or if the incidence of zero elements is >=
6647 && (count
< maxelt
- minelt
+ 1
6648 || 4 * zero_count
>= 3 * count
))
6652 if (need_to_clear
&& maybe_gt (size
, 0))
6655 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6657 clear_storage (target
, gen_int_mode (size
, Pmode
),
6662 if (!cleared
&& REG_P (target
))
6663 /* Inform later passes that the old value is dead. */
6664 emit_clobber (target
);
6666 /* Store each element of the constructor into the
6667 corresponding element of TARGET, determined by counting the
6669 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6673 HOST_WIDE_INT bitpos
;
6674 rtx xtarget
= target
;
6676 if (cleared
&& initializer_zerop (value
))
6679 mode
= TYPE_MODE (elttype
);
6680 if (mode
!= BLKmode
)
6681 bitsize
= GET_MODE_BITSIZE (mode
);
6682 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6685 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6687 tree lo_index
= TREE_OPERAND (index
, 0);
6688 tree hi_index
= TREE_OPERAND (index
, 1);
6689 rtx index_r
, pos_rtx
;
6690 HOST_WIDE_INT lo
, hi
, count
;
6693 /* If the range is constant and "small", unroll the loop. */
6695 && tree_fits_shwi_p (lo_index
)
6696 && tree_fits_shwi_p (hi_index
)
6697 && (lo
= tree_to_shwi (lo_index
),
6698 hi
= tree_to_shwi (hi_index
),
6699 count
= hi
- lo
+ 1,
6702 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6703 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6706 lo
-= minelt
; hi
-= minelt
;
6707 for (; lo
<= hi
; lo
++)
6709 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6712 && !MEM_KEEP_ALIAS_SET_P (target
)
6713 && TREE_CODE (type
) == ARRAY_TYPE
6714 && TYPE_NONALIASED_COMPONENT (type
))
6716 target
= copy_rtx (target
);
6717 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6720 store_constructor_field
6721 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6722 mode
, value
, cleared
,
6723 get_alias_set (elttype
), reverse
);
6728 rtx_code_label
*loop_start
= gen_label_rtx ();
6729 rtx_code_label
*loop_end
= gen_label_rtx ();
6732 expand_normal (hi_index
);
6734 index
= build_decl (EXPR_LOCATION (exp
),
6735 VAR_DECL
, NULL_TREE
, domain
);
6736 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6737 SET_DECL_RTL (index
, index_r
);
6738 store_expr (lo_index
, index_r
, 0, false, reverse
);
6740 /* Build the head of the loop. */
6741 do_pending_stack_adjust ();
6742 emit_label (loop_start
);
6744 /* Assign value to element index. */
6746 fold_convert (ssizetype
,
6747 fold_build2 (MINUS_EXPR
,
6750 TYPE_MIN_VALUE (domain
)));
6753 size_binop (MULT_EXPR
, position
,
6754 fold_convert (ssizetype
,
6755 TYPE_SIZE_UNIT (elttype
)));
6757 pos_rtx
= expand_normal (position
);
6758 xtarget
= offset_address (target
, pos_rtx
,
6759 highest_pow2_factor (position
));
6760 xtarget
= adjust_address (xtarget
, mode
, 0);
6761 if (TREE_CODE (value
) == CONSTRUCTOR
)
6762 store_constructor (value
, xtarget
, cleared
,
6763 exact_div (bitsize
, BITS_PER_UNIT
),
6766 store_expr (value
, xtarget
, 0, false, reverse
);
6768 /* Generate a conditional jump to exit the loop. */
6769 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6771 jumpif (exit_cond
, loop_end
,
6772 profile_probability::uninitialized ());
6774 /* Update the loop counter, and jump to the head of
6776 expand_assignment (index
,
6777 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6778 index
, integer_one_node
),
6781 emit_jump (loop_start
);
6783 /* Build the end of the loop. */
6784 emit_label (loop_end
);
6787 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6788 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6793 index
= ssize_int (1);
6796 index
= fold_convert (ssizetype
,
6797 fold_build2 (MINUS_EXPR
,
6800 TYPE_MIN_VALUE (domain
)));
6803 size_binop (MULT_EXPR
, index
,
6804 fold_convert (ssizetype
,
6805 TYPE_SIZE_UNIT (elttype
)));
6806 xtarget
= offset_address (target
,
6807 expand_normal (position
),
6808 highest_pow2_factor (position
));
6809 xtarget
= adjust_address (xtarget
, mode
, 0);
6810 store_expr (value
, xtarget
, 0, false, reverse
);
6815 bitpos
= ((tree_to_shwi (index
) - minelt
)
6816 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6818 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6820 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6821 && TREE_CODE (type
) == ARRAY_TYPE
6822 && TYPE_NONALIASED_COMPONENT (type
))
6824 target
= copy_rtx (target
);
6825 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6827 store_constructor_field (target
, bitsize
, bitpos
, 0,
6828 bitregion_end
, mode
, value
,
6829 cleared
, get_alias_set (elttype
),
6838 unsigned HOST_WIDE_INT idx
;
6839 constructor_elt
*ce
;
6842 insn_code icode
= CODE_FOR_nothing
;
6844 tree elttype
= TREE_TYPE (type
);
6845 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6846 machine_mode eltmode
= TYPE_MODE (elttype
);
6847 HOST_WIDE_INT bitsize
;
6848 HOST_WIDE_INT bitpos
;
6849 rtvec vector
= NULL
;
6851 unsigned HOST_WIDE_INT const_n_elts
;
6852 alias_set_type alias
;
6853 bool vec_vec_init_p
= false;
6854 machine_mode mode
= GET_MODE (target
);
6856 gcc_assert (eltmode
!= BLKmode
);
6858 /* Try using vec_duplicate_optab for uniform vectors. */
6859 if (!TREE_SIDE_EFFECTS (exp
)
6860 && VECTOR_MODE_P (mode
)
6861 && eltmode
== GET_MODE_INNER (mode
)
6862 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6863 != CODE_FOR_nothing
)
6864 && (elt
= uniform_vector_p (exp
)))
6866 class expand_operand ops
[2];
6867 create_output_operand (&ops
[0], target
, mode
);
6868 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6869 expand_insn (icode
, 2, ops
);
6870 if (!rtx_equal_p (target
, ops
[0].value
))
6871 emit_move_insn (target
, ops
[0].value
);
6875 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6877 && VECTOR_MODE_P (mode
)
6878 && n_elts
.is_constant (&const_n_elts
))
6880 machine_mode emode
= eltmode
;
6881 bool vector_typed_elts_p
= false;
6883 if (CONSTRUCTOR_NELTS (exp
)
6884 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6887 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6888 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6889 * TYPE_VECTOR_SUBPARTS (etype
),
6891 emode
= TYPE_MODE (etype
);
6892 vector_typed_elts_p
= true;
6894 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6895 if (icode
!= CODE_FOR_nothing
)
6897 unsigned int n
= const_n_elts
;
6899 if (vector_typed_elts_p
)
6901 n
= CONSTRUCTOR_NELTS (exp
);
6902 vec_vec_init_p
= true;
6904 vector
= rtvec_alloc (n
);
6905 for (unsigned int k
= 0; k
< n
; k
++)
6906 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
6910 /* If the constructor has fewer elements than the vector,
6911 clear the whole array first. Similarly if this is static
6912 constructor of a non-BLKmode object. */
6915 else if (REG_P (target
) && TREE_STATIC (exp
))
6919 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6922 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6924 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6926 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6927 TYPE_SIZE (elttype
)));
6929 count
+= n_elts_here
;
6930 if (mostly_zeros_p (value
))
6931 zero_count
+= n_elts_here
;
6934 /* Clear the entire vector first if there are any missing elements,
6935 or if the incidence of zero elements is >= 75%. */
6936 need_to_clear
= (maybe_lt (count
, n_elts
)
6937 || 4 * zero_count
>= 3 * count
);
6940 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6943 emit_move_insn (target
, CONST0_RTX (mode
));
6945 clear_storage (target
, gen_int_mode (size
, Pmode
),
6950 /* Inform later passes that the old value is dead. */
6951 if (!cleared
&& !vector
&& REG_P (target
))
6952 emit_move_insn (target
, CONST0_RTX (mode
));
6955 alias
= MEM_ALIAS_SET (target
);
6957 alias
= get_alias_set (elttype
);
6959 /* Store each element of the constructor into the corresponding
6960 element of TARGET, determined by counting the elements. */
6961 for (idx
= 0, i
= 0;
6962 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6963 idx
++, i
+= bitsize
/ elt_size
)
6965 HOST_WIDE_INT eltpos
;
6966 tree value
= ce
->value
;
6968 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6969 if (cleared
&& initializer_zerop (value
))
6973 eltpos
= tree_to_uhwi (ce
->index
);
6981 gcc_assert (ce
->index
== NULL_TREE
);
6982 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6986 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6987 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6991 machine_mode value_mode
6992 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6993 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6994 bitpos
= eltpos
* elt_size
;
6995 store_constructor_field (target
, bitsize
, bitpos
, 0,
6996 bitregion_end
, value_mode
,
6997 value
, cleared
, alias
, reverse
);
7002 emit_insn (GEN_FCN (icode
) (target
,
7003 gen_rtx_PARALLEL (mode
, vector
)));
7012 /* Store the value of EXP (an expression tree)
7013 into a subfield of TARGET which has mode MODE and occupies
7014 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7015 If MODE is VOIDmode, it means that we are storing into a bit-field.
7017 BITREGION_START is bitpos of the first bitfield in this region.
7018 BITREGION_END is the bitpos of the ending bitfield in this region.
7019 These two fields are 0, if the C++ memory model does not apply,
7020 or we are not interested in keeping track of bitfield regions.
7022 Always return const0_rtx unless we have something particular to
7025 ALIAS_SET is the alias set for the destination. This value will
7026 (in general) be different from that for TARGET, since TARGET is a
7027 reference to the containing structure.
7029 If NONTEMPORAL is true, try generating a nontemporal store.
7031 If REVERSE is true, the store is to be done in reverse order. */
7034 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7035 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7036 machine_mode mode
, tree exp
,
7037 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7039 if (TREE_CODE (exp
) == ERROR_MARK
)
7042 /* If we have nothing to store, do nothing unless the expression has
7043 side-effects. Don't do that for zero sized addressable lhs of
7045 if (known_eq (bitsize
, 0)
7046 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7047 || TREE_CODE (exp
) != CALL_EXPR
))
7048 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7050 if (GET_CODE (target
) == CONCAT
)
7052 /* We're storing into a struct containing a single __complex. */
7054 gcc_assert (known_eq (bitpos
, 0));
7055 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7058 /* If the structure is in a register or if the component
7059 is a bit field, we cannot use addressing to access it.
7060 Use bit-field techniques or SUBREG to store in it. */
7062 poly_int64 decl_bitsize
;
7063 if (mode
== VOIDmode
7064 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7065 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7066 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7068 || GET_CODE (target
) == SUBREG
7069 /* If the field isn't aligned enough to store as an ordinary memref,
7070 store it as a bit field. */
7072 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7073 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7074 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7075 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7076 || (known_size_p (bitsize
)
7078 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7079 /* If the RHS and field are a constant size and the size of the
7080 RHS isn't the same size as the bitfield, we must use bitfield
7082 || (known_size_p (bitsize
)
7083 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7084 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7086 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7087 we will handle specially below. */
7088 && !(TREE_CODE (exp
) == CONSTRUCTOR
7089 && multiple_p (bitsize
, BITS_PER_UNIT
))
7090 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7091 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7092 includes some extra padding. store_expr / expand_expr will in
7093 that case call get_inner_reference that will have the bitsize
7094 we check here and thus the block move will not clobber the
7095 padding that shouldn't be clobbered. In the future we could
7096 replace the TREE_ADDRESSABLE check with a check that
7097 get_base_address needs to live in memory. */
7098 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7099 || TREE_CODE (exp
) != COMPONENT_REF
7100 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7101 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7102 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7104 || maybe_ne (decl_bitsize
, bitsize
)))
7105 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7106 decl we must use bitfield operations. */
7107 || (known_size_p (bitsize
)
7108 && TREE_CODE (exp
) == MEM_REF
7109 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7110 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7111 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7112 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7117 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7118 implies a mask operation. If the precision is the same size as
7119 the field we're storing into, that mask is redundant. This is
7120 particularly common with bit field assignments generated by the
7122 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7125 tree type
= TREE_TYPE (exp
);
7126 if (INTEGRAL_TYPE_P (type
)
7127 && maybe_ne (TYPE_PRECISION (type
),
7128 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7129 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7131 tree op
= gimple_assign_rhs1 (nop_def
);
7132 type
= TREE_TYPE (op
);
7133 if (INTEGRAL_TYPE_P (type
)
7134 && known_ge (TYPE_PRECISION (type
), bitsize
))
7139 temp
= expand_normal (exp
);
7141 /* We don't support variable-sized BLKmode bitfields, since our
7142 handling of BLKmode is bound up with the ability to break
7143 things into words. */
7144 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7146 /* Handle calls that return values in multiple non-contiguous locations.
7147 The Irix 6 ABI has examples of this. */
7148 if (GET_CODE (temp
) == PARALLEL
)
7150 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7151 machine_mode temp_mode
= GET_MODE (temp
);
7152 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7153 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7154 rtx temp_target
= gen_reg_rtx (temp_mode
);
7155 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7159 /* Handle calls that return BLKmode values in registers. */
7160 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7162 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7163 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7167 /* If the value has aggregate type and an integral mode then, if BITSIZE
7168 is narrower than this mode and this is for big-endian data, we first
7169 need to put the value into the low-order bits for store_bit_field,
7170 except when MODE is BLKmode and BITSIZE larger than the word size
7171 (see the handling of fields larger than a word in store_bit_field).
7172 Moreover, the field may be not aligned on a byte boundary; in this
7173 case, if it has reverse storage order, it needs to be accessed as a
7174 scalar field with reverse storage order and we must first put the
7175 value into target order. */
7176 scalar_int_mode temp_mode
;
7177 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7178 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7180 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7182 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7185 temp
= flip_storage_order (temp_mode
, temp
);
7187 gcc_checking_assert (known_le (bitsize
, size
));
7188 if (maybe_lt (bitsize
, size
)
7189 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7190 /* Use of to_constant for BLKmode was checked above. */
7191 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7192 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7193 size
- bitsize
, NULL_RTX
, 1);
7196 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7197 if (mode
!= VOIDmode
&& mode
!= BLKmode
7198 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7199 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7201 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7202 and BITPOS must be aligned on a byte boundary. If so, we simply do
7203 a block copy. Likewise for a BLKmode-like TARGET. */
7204 if (GET_MODE (temp
) == BLKmode
7205 && (GET_MODE (target
) == BLKmode
7207 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7208 && multiple_p (bitpos
, BITS_PER_UNIT
)
7209 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7211 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7212 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7213 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7215 target
= adjust_address (target
, VOIDmode
, bytepos
);
7216 emit_block_move (target
, temp
,
7217 gen_int_mode (bytesize
, Pmode
),
7223 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7224 word size, we need to load the value (see again store_bit_field). */
7225 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7227 temp_mode
= smallest_int_mode_for_size (bitsize
);
7228 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7229 temp_mode
, false, NULL
);
7232 /* Store the value in the bitfield. */
7233 gcc_checking_assert (known_ge (bitpos
, 0));
7234 store_bit_field (target
, bitsize
, bitpos
,
7235 bitregion_start
, bitregion_end
,
7236 mode
, temp
, reverse
);
7242 /* Now build a reference to just the desired component. */
7243 rtx to_rtx
= adjust_address (target
, mode
,
7244 exact_div (bitpos
, BITS_PER_UNIT
));
7246 if (to_rtx
== target
)
7247 to_rtx
= copy_rtx (to_rtx
);
7249 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7250 set_mem_alias_set (to_rtx
, alias_set
);
7252 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7253 into a target smaller than its type; handle that case now. */
7254 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7256 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7257 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7261 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7265 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7266 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7267 codes and find the ultimate containing object, which we return.
7269 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7270 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7271 storage order of the field.
7272 If the position of the field is variable, we store a tree
7273 giving the variable offset (in units) in *POFFSET.
7274 This offset is in addition to the bit position.
7275 If the position is not variable, we store 0 in *POFFSET.
7277 If any of the extraction expressions is volatile,
7278 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7280 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7281 Otherwise, it is a mode that can be used to access the field.
7283 If the field describes a variable-sized object, *PMODE is set to
7284 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7285 this case, but the address of the object can be found. */
7288 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7289 poly_int64_pod
*pbitpos
, tree
*poffset
,
7290 machine_mode
*pmode
, int *punsignedp
,
7291 int *preversep
, int *pvolatilep
)
7294 machine_mode mode
= VOIDmode
;
7295 bool blkmode_bitfield
= false;
7296 tree offset
= size_zero_node
;
7297 poly_offset_int bit_offset
= 0;
7299 /* First get the mode, signedness, storage order and size. We do this from
7300 just the outermost expression. */
7302 if (TREE_CODE (exp
) == COMPONENT_REF
)
7304 tree field
= TREE_OPERAND (exp
, 1);
7305 size_tree
= DECL_SIZE (field
);
7306 if (flag_strict_volatile_bitfields
> 0
7307 && TREE_THIS_VOLATILE (exp
)
7308 && DECL_BIT_FIELD_TYPE (field
)
7309 && DECL_MODE (field
) != BLKmode
)
7310 /* Volatile bitfields should be accessed in the mode of the
7311 field's type, not the mode computed based on the bit
7313 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7314 else if (!DECL_BIT_FIELD (field
))
7316 mode
= DECL_MODE (field
);
7317 /* For vector fields re-check the target flags, as DECL_MODE
7318 could have been set with different target flags than
7319 the current function has. */
7321 && VECTOR_TYPE_P (TREE_TYPE (field
))
7322 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7323 mode
= TYPE_MODE (TREE_TYPE (field
));
7325 else if (DECL_MODE (field
) == BLKmode
)
7326 blkmode_bitfield
= true;
7328 *punsignedp
= DECL_UNSIGNED (field
);
7330 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7332 size_tree
= TREE_OPERAND (exp
, 1);
7333 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7334 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7336 /* For vector element types with the correct size of access or for
7337 vector typed accesses use the mode of the access type. */
7338 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7339 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7340 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7341 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7342 mode
= TYPE_MODE (TREE_TYPE (exp
));
7346 mode
= TYPE_MODE (TREE_TYPE (exp
));
7347 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7349 if (mode
== BLKmode
)
7350 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7352 *pbitsize
= GET_MODE_BITSIZE (mode
);
7357 if (! tree_fits_uhwi_p (size_tree
))
7358 mode
= BLKmode
, *pbitsize
= -1;
7360 *pbitsize
= tree_to_uhwi (size_tree
);
7363 *preversep
= reverse_storage_order_for_component_p (exp
);
7365 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7366 and find the ultimate containing object. */
7369 switch (TREE_CODE (exp
))
7372 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7377 tree field
= TREE_OPERAND (exp
, 1);
7378 tree this_offset
= component_ref_field_offset (exp
);
7380 /* If this field hasn't been filled in yet, don't go past it.
7381 This should only happen when folding expressions made during
7382 type construction. */
7383 if (this_offset
== 0)
7386 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7387 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7389 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7394 case ARRAY_RANGE_REF
:
7396 tree index
= TREE_OPERAND (exp
, 1);
7397 tree low_bound
= array_ref_low_bound (exp
);
7398 tree unit_size
= array_ref_element_size (exp
);
7400 /* We assume all arrays have sizes that are a multiple of a byte.
7401 First subtract the lower bound, if any, in the type of the
7402 index, then convert to sizetype and multiply by the size of
7403 the array element. */
7404 if (! integer_zerop (low_bound
))
7405 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7408 offset
= size_binop (PLUS_EXPR
, offset
,
7409 size_binop (MULT_EXPR
,
7410 fold_convert (sizetype
, index
),
7419 bit_offset
+= *pbitsize
;
7422 case VIEW_CONVERT_EXPR
:
7426 /* Hand back the decl for MEM[&decl, off]. */
7427 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7429 tree off
= TREE_OPERAND (exp
, 1);
7430 if (!integer_zerop (off
))
7432 poly_offset_int boff
= mem_ref_offset (exp
);
7433 boff
<<= LOG2_BITS_PER_UNIT
;
7436 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7444 /* If any reference in the chain is volatile, the effect is volatile. */
7445 if (TREE_THIS_VOLATILE (exp
))
7448 exp
= TREE_OPERAND (exp
, 0);
7452 /* If OFFSET is constant, see if we can return the whole thing as a
7453 constant bit position. Make sure to handle overflow during
7455 if (poly_int_tree_p (offset
))
7457 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7458 TYPE_PRECISION (sizetype
));
7459 tem
<<= LOG2_BITS_PER_UNIT
;
7461 if (tem
.to_shwi (pbitpos
))
7462 *poffset
= offset
= NULL_TREE
;
7465 /* Otherwise, split it up. */
7468 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7469 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7471 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7472 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7473 offset
= size_binop (PLUS_EXPR
, offset
,
7474 build_int_cst (sizetype
, bytes
.force_shwi ()));
7480 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7481 if (mode
== VOIDmode
7483 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7484 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7492 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7494 static unsigned HOST_WIDE_INT
7495 target_align (const_tree target
)
7497 /* We might have a chain of nested references with intermediate misaligning
7498 bitfields components, so need to recurse to find out. */
7500 unsigned HOST_WIDE_INT this_align
, outer_align
;
7502 switch (TREE_CODE (target
))
7508 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7509 outer_align
= target_align (TREE_OPERAND (target
, 0));
7510 return MIN (this_align
, outer_align
);
7513 case ARRAY_RANGE_REF
:
7514 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7515 outer_align
= target_align (TREE_OPERAND (target
, 0));
7516 return MIN (this_align
, outer_align
);
7519 case NON_LVALUE_EXPR
:
7520 case VIEW_CONVERT_EXPR
:
7521 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7522 outer_align
= target_align (TREE_OPERAND (target
, 0));
7523 return MAX (this_align
, outer_align
);
7526 return TYPE_ALIGN (TREE_TYPE (target
));
7531 /* Given an rtx VALUE that may contain additions and multiplications, return
7532 an equivalent value that just refers to a register, memory, or constant.
7533 This is done by generating instructions to perform the arithmetic and
7534 returning a pseudo-register containing the value.
7536 The returned value may be a REG, SUBREG, MEM or constant. */
7539 force_operand (rtx value
, rtx target
)
7542 /* Use subtarget as the target for operand 0 of a binary operation. */
7543 rtx subtarget
= get_subtarget (target
);
7544 enum rtx_code code
= GET_CODE (value
);
7546 /* Check for subreg applied to an expression produced by loop optimizer. */
7548 && !REG_P (SUBREG_REG (value
))
7549 && !MEM_P (SUBREG_REG (value
)))
7552 = simplify_gen_subreg (GET_MODE (value
),
7553 force_reg (GET_MODE (SUBREG_REG (value
)),
7554 force_operand (SUBREG_REG (value
),
7556 GET_MODE (SUBREG_REG (value
)),
7557 SUBREG_BYTE (value
));
7558 code
= GET_CODE (value
);
7561 /* Check for a PIC address load. */
7562 if ((code
== PLUS
|| code
== MINUS
)
7563 && XEXP (value
, 0) == pic_offset_table_rtx
7564 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7565 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7566 || GET_CODE (XEXP (value
, 1)) == CONST
))
7569 subtarget
= gen_reg_rtx (GET_MODE (value
));
7570 emit_move_insn (subtarget
, value
);
7574 if (ARITHMETIC_P (value
))
7576 op2
= XEXP (value
, 1);
7577 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7579 if (code
== MINUS
&& CONST_INT_P (op2
))
7582 op2
= negate_rtx (GET_MODE (value
), op2
);
7585 /* Check for an addition with OP2 a constant integer and our first
7586 operand a PLUS of a virtual register and something else. In that
7587 case, we want to emit the sum of the virtual register and the
7588 constant first and then add the other value. This allows virtual
7589 register instantiation to simply modify the constant rather than
7590 creating another one around this addition. */
7591 if (code
== PLUS
&& CONST_INT_P (op2
)
7592 && GET_CODE (XEXP (value
, 0)) == PLUS
7593 && REG_P (XEXP (XEXP (value
, 0), 0))
7594 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7595 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7597 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7598 XEXP (XEXP (value
, 0), 0), op2
,
7599 subtarget
, 0, OPTAB_LIB_WIDEN
);
7600 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7601 force_operand (XEXP (XEXP (value
,
7603 target
, 0, OPTAB_LIB_WIDEN
);
7606 op1
= force_operand (XEXP (value
, 0), subtarget
);
7607 op2
= force_operand (op2
, NULL_RTX
);
7611 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7613 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7614 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7615 target
, 1, OPTAB_LIB_WIDEN
);
7617 return expand_divmod (0,
7618 FLOAT_MODE_P (GET_MODE (value
))
7619 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7620 GET_MODE (value
), op1
, op2
, target
, 0);
7622 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7625 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7628 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7631 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7632 target
, 0, OPTAB_LIB_WIDEN
);
7634 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7635 target
, 1, OPTAB_LIB_WIDEN
);
7638 if (UNARY_P (value
))
7641 target
= gen_reg_rtx (GET_MODE (value
));
7642 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7649 case FLOAT_TRUNCATE
:
7650 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7655 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7659 case UNSIGNED_FLOAT
:
7660 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7664 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7668 #ifdef INSN_SCHEDULING
7669 /* On machines that have insn scheduling, we want all memory reference to be
7670 explicit, so we need to deal with such paradoxical SUBREGs. */
7671 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7673 = simplify_gen_subreg (GET_MODE (value
),
7674 force_reg (GET_MODE (SUBREG_REG (value
)),
7675 force_operand (SUBREG_REG (value
),
7677 GET_MODE (SUBREG_REG (value
)),
7678 SUBREG_BYTE (value
));
7684 /* Subroutine of expand_expr: return nonzero iff there is no way that
7685 EXP can reference X, which is being modified. TOP_P is nonzero if this
7686 call is going to be used to determine whether we need a temporary
7687 for EXP, as opposed to a recursive call to this function.
7689 It is always safe for this routine to return zero since it merely
7690 searches for optimization opportunities. */
7693 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7699 /* If EXP has varying size, we MUST use a target since we currently
7700 have no way of allocating temporaries of variable size
7701 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7702 So we assume here that something at a higher level has prevented a
7703 clash. This is somewhat bogus, but the best we can do. Only
7704 do this when X is BLKmode and when we are at the top level. */
7705 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7706 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7707 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7708 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7709 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7711 && GET_MODE (x
) == BLKmode
)
7712 /* If X is in the outgoing argument area, it is always safe. */
7714 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7715 || (GET_CODE (XEXP (x
, 0)) == PLUS
7716 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7719 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7720 find the underlying pseudo. */
7721 if (GET_CODE (x
) == SUBREG
)
7724 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7728 /* Now look at our tree code and possibly recurse. */
7729 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7731 case tcc_declaration
:
7732 exp_rtl
= DECL_RTL_IF_SET (exp
);
7738 case tcc_exceptional
:
7739 if (TREE_CODE (exp
) == TREE_LIST
)
7743 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7745 exp
= TREE_CHAIN (exp
);
7748 if (TREE_CODE (exp
) != TREE_LIST
)
7749 return safe_from_p (x
, exp
, 0);
7752 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7754 constructor_elt
*ce
;
7755 unsigned HOST_WIDE_INT idx
;
7757 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7758 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7759 || !safe_from_p (x
, ce
->value
, 0))
7763 else if (TREE_CODE (exp
) == ERROR_MARK
)
7764 return 1; /* An already-visited SAVE_EXPR? */
7769 /* The only case we look at here is the DECL_INITIAL inside a
7771 return (TREE_CODE (exp
) != DECL_EXPR
7772 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7773 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7774 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7777 case tcc_comparison
:
7778 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7783 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7785 case tcc_expression
:
7788 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7789 the expression. If it is set, we conflict iff we are that rtx or
7790 both are in memory. Otherwise, we check all operands of the
7791 expression recursively. */
7793 switch (TREE_CODE (exp
))
7796 /* If the operand is static or we are static, we can't conflict.
7797 Likewise if we don't conflict with the operand at all. */
7798 if (staticp (TREE_OPERAND (exp
, 0))
7799 || TREE_STATIC (exp
)
7800 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7803 /* Otherwise, the only way this can conflict is if we are taking
7804 the address of a DECL a that address if part of X, which is
7806 exp
= TREE_OPERAND (exp
, 0);
7809 if (!DECL_RTL_SET_P (exp
)
7810 || !MEM_P (DECL_RTL (exp
)))
7813 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7819 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7820 get_alias_set (exp
)))
7825 /* Assume that the call will clobber all hard registers and
7827 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7832 case WITH_CLEANUP_EXPR
:
7833 case CLEANUP_POINT_EXPR
:
7834 /* Lowered by gimplify.c. */
7838 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7844 /* If we have an rtx, we do not need to scan our operands. */
7848 nops
= TREE_OPERAND_LENGTH (exp
);
7849 for (i
= 0; i
< nops
; i
++)
7850 if (TREE_OPERAND (exp
, i
) != 0
7851 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7857 /* Should never get a type here. */
7861 /* If we have an rtl, find any enclosed object. Then see if we conflict
7865 if (GET_CODE (exp_rtl
) == SUBREG
)
7867 exp_rtl
= SUBREG_REG (exp_rtl
);
7869 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7873 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7874 are memory and they conflict. */
7875 return ! (rtx_equal_p (x
, exp_rtl
)
7876 || (MEM_P (x
) && MEM_P (exp_rtl
)
7877 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7880 /* If we reach here, it is safe. */
7885 /* Return the highest power of two that EXP is known to be a multiple of.
7886 This is used in updating alignment of MEMs in array references. */
7888 unsigned HOST_WIDE_INT
7889 highest_pow2_factor (const_tree exp
)
7891 unsigned HOST_WIDE_INT ret
;
7892 int trailing_zeros
= tree_ctz (exp
);
7893 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7894 return BIGGEST_ALIGNMENT
;
7895 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7896 if (ret
> BIGGEST_ALIGNMENT
)
7897 return BIGGEST_ALIGNMENT
;
7901 /* Similar, except that the alignment requirements of TARGET are
7902 taken into account. Assume it is at least as aligned as its
7903 type, unless it is a COMPONENT_REF in which case the layout of
7904 the structure gives the alignment. */
7906 static unsigned HOST_WIDE_INT
7907 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7909 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7910 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7912 return MAX (factor
, talign
);
7915 /* Convert the tree comparison code TCODE to the rtl one where the
7916 signedness is UNSIGNEDP. */
7918 static enum rtx_code
7919 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7931 code
= unsignedp
? LTU
: LT
;
7934 code
= unsignedp
? LEU
: LE
;
7937 code
= unsignedp
? GTU
: GT
;
7940 code
= unsignedp
? GEU
: GE
;
7942 case UNORDERED_EXPR
:
7973 /* Subroutine of expand_expr. Expand the two operands of a binary
7974 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7975 The value may be stored in TARGET if TARGET is nonzero. The
7976 MODIFIER argument is as documented by expand_expr. */
7979 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7980 enum expand_modifier modifier
)
7982 if (! safe_from_p (target
, exp1
, 1))
7984 if (operand_equal_p (exp0
, exp1
, 0))
7986 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7987 *op1
= copy_rtx (*op0
);
7991 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7992 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7997 /* Return a MEM that contains constant EXP. DEFER is as for
7998 output_constant_def and MODIFIER is as for expand_expr. */
8001 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8005 mem
= output_constant_def (exp
, defer
);
8006 if (modifier
!= EXPAND_INITIALIZER
)
8007 mem
= use_anchored_address (mem
);
8011 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8012 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8015 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8016 enum expand_modifier modifier
, addr_space_t as
)
8018 rtx result
, subtarget
;
8020 poly_int64 bitsize
, bitpos
;
8021 int unsignedp
, reversep
, volatilep
= 0;
8024 /* If we are taking the address of a constant and are at the top level,
8025 we have to use output_constant_def since we can't call force_const_mem
8027 /* ??? This should be considered a front-end bug. We should not be
8028 generating ADDR_EXPR of something that isn't an LVALUE. The only
8029 exception here is STRING_CST. */
8030 if (CONSTANT_CLASS_P (exp
))
8032 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8033 if (modifier
< EXPAND_SUM
)
8034 result
= force_operand (result
, target
);
8038 /* Everything must be something allowed by is_gimple_addressable. */
8039 switch (TREE_CODE (exp
))
8042 /* This case will happen via recursion for &a->b. */
8043 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8047 tree tem
= TREE_OPERAND (exp
, 0);
8048 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8049 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8050 return expand_expr (tem
, target
, tmode
, modifier
);
8053 case TARGET_MEM_REF
:
8054 return addr_for_mem_ref (exp
, as
, true);
8057 /* Expand the initializer like constants above. */
8058 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8060 if (modifier
< EXPAND_SUM
)
8061 result
= force_operand (result
, target
);
8065 /* The real part of the complex number is always first, therefore
8066 the address is the same as the address of the parent object. */
8069 inner
= TREE_OPERAND (exp
, 0);
8073 /* The imaginary part of the complex number is always second.
8074 The expression is therefore always offset by the size of the
8077 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8078 inner
= TREE_OPERAND (exp
, 0);
8081 case COMPOUND_LITERAL_EXPR
:
8082 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8083 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8084 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8085 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8086 the initializers aren't gimplified. */
8087 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8088 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8089 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8090 target
, tmode
, modifier
, as
);
8093 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8094 expand_expr, as that can have various side effects; LABEL_DECLs for
8095 example, may not have their DECL_RTL set yet. Expand the rtl of
8096 CONSTRUCTORs too, which should yield a memory reference for the
8097 constructor's contents. Assume language specific tree nodes can
8098 be expanded in some interesting way. */
8099 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8101 || TREE_CODE (exp
) == CONSTRUCTOR
8102 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8104 result
= expand_expr (exp
, target
, tmode
,
8105 modifier
== EXPAND_INITIALIZER
8106 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8108 /* If the DECL isn't in memory, then the DECL wasn't properly
8109 marked TREE_ADDRESSABLE, which will be either a front-end
8110 or a tree optimizer bug. */
8112 gcc_assert (MEM_P (result
));
8113 result
= XEXP (result
, 0);
8115 /* ??? Is this needed anymore? */
8117 TREE_USED (exp
) = 1;
8119 if (modifier
!= EXPAND_INITIALIZER
8120 && modifier
!= EXPAND_CONST_ADDRESS
8121 && modifier
!= EXPAND_SUM
)
8122 result
= force_operand (result
, target
);
8126 /* Pass FALSE as the last argument to get_inner_reference although
8127 we are expanding to RTL. The rationale is that we know how to
8128 handle "aligning nodes" here: we can just bypass them because
8129 they won't change the final object whose address will be returned
8130 (they actually exist only for that purpose). */
8131 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8132 &unsignedp
, &reversep
, &volatilep
);
8136 /* We must have made progress. */
8137 gcc_assert (inner
!= exp
);
8139 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8140 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8141 inner alignment, force the inner to be sufficiently aligned. */
8142 if (CONSTANT_CLASS_P (inner
)
8143 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8145 inner
= copy_node (inner
);
8146 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8147 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8148 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8150 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8156 if (modifier
!= EXPAND_NORMAL
)
8157 result
= force_operand (result
, NULL
);
8158 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8159 modifier
== EXPAND_INITIALIZER
8160 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8162 /* expand_expr is allowed to return an object in a mode other
8163 than TMODE. If it did, we need to convert. */
8164 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8165 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8166 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8167 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8168 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8170 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8171 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8174 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8175 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8176 1, OPTAB_LIB_WIDEN
);
8180 if (maybe_ne (bitpos
, 0))
8182 /* Someone beforehand should have rejected taking the address
8183 of an object that isn't byte-aligned. */
8184 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8185 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8186 result
= plus_constant (tmode
, result
, bytepos
);
8187 if (modifier
< EXPAND_SUM
)
8188 result
= force_operand (result
, target
);
8194 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8195 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8198 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8199 enum expand_modifier modifier
)
8201 addr_space_t as
= ADDR_SPACE_GENERIC
;
8202 scalar_int_mode address_mode
= Pmode
;
8203 scalar_int_mode pointer_mode
= ptr_mode
;
8207 /* Target mode of VOIDmode says "whatever's natural". */
8208 if (tmode
== VOIDmode
)
8209 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8211 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8213 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8214 address_mode
= targetm
.addr_space
.address_mode (as
);
8215 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8218 /* We can get called with some Weird Things if the user does silliness
8219 like "(short) &a". In that case, convert_memory_address won't do
8220 the right thing, so ignore the given target mode. */
8221 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8225 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8226 new_tmode
, modifier
, as
);
8228 /* Despite expand_expr claims concerning ignoring TMODE when not
8229 strictly convenient, stuff breaks if we don't honor it. Note
8230 that combined with the above, we only do this for pointer modes. */
8231 rmode
= GET_MODE (result
);
8232 if (rmode
== VOIDmode
)
8234 if (rmode
!= new_tmode
)
8235 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8240 /* Generate code for computing CONSTRUCTOR EXP.
8241 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8242 is TRUE, instead of creating a temporary variable in memory
8243 NULL is returned and the caller needs to handle it differently. */
8246 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8247 bool avoid_temp_mem
)
8249 tree type
= TREE_TYPE (exp
);
8250 machine_mode mode
= TYPE_MODE (type
);
8252 /* Try to avoid creating a temporary at all. This is possible
8253 if all of the initializer is zero.
8254 FIXME: try to handle all [0..255] initializers we can handle
8256 if (TREE_STATIC (exp
)
8257 && !TREE_ADDRESSABLE (exp
)
8258 && target
!= 0 && mode
== BLKmode
8259 && all_zeros_p (exp
))
8261 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8265 /* All elts simple constants => refer to a constant in memory. But
8266 if this is a non-BLKmode mode, let it store a field at a time
8267 since that should make a CONST_INT, CONST_WIDE_INT or
8268 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8269 use, it is best to store directly into the target unless the type
8270 is large enough that memcpy will be used. If we are making an
8271 initializer and all operands are constant, put it in memory as
8274 FIXME: Avoid trying to fill vector constructors piece-meal.
8275 Output them with output_constant_def below unless we're sure
8276 they're zeros. This should go away when vector initializers
8277 are treated like VECTOR_CST instead of arrays. */
8278 if ((TREE_STATIC (exp
)
8279 && ((mode
== BLKmode
8280 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8281 || TREE_ADDRESSABLE (exp
)
8282 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8283 && (! can_move_by_pieces
8284 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8286 && ! mostly_zeros_p (exp
))))
8287 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8288 && TREE_CONSTANT (exp
)))
8295 constructor
= expand_expr_constant (exp
, 1, modifier
);
8297 if (modifier
!= EXPAND_CONST_ADDRESS
8298 && modifier
!= EXPAND_INITIALIZER
8299 && modifier
!= EXPAND_SUM
)
8300 constructor
= validize_mem (constructor
);
8305 /* Handle calls that pass values in multiple non-contiguous
8306 locations. The Irix 6 ABI has examples of this. */
8307 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8308 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8313 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8316 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8321 /* expand_expr: generate code for computing expression EXP.
8322 An rtx for the computed value is returned. The value is never null.
8323 In the case of a void EXP, const0_rtx is returned.
8325 The value may be stored in TARGET if TARGET is nonzero.
8326 TARGET is just a suggestion; callers must assume that
8327 the rtx returned may not be the same as TARGET.
8329 If TARGET is CONST0_RTX, it means that the value will be ignored.
8331 If TMODE is not VOIDmode, it suggests generating the
8332 result in mode TMODE. But this is done only when convenient.
8333 Otherwise, TMODE is ignored and the value generated in its natural mode.
8334 TMODE is just a suggestion; callers must assume that
8335 the rtx returned may not have mode TMODE.
8337 Note that TARGET may have neither TMODE nor MODE. In that case, it
8338 probably will not be used.
8340 If MODIFIER is EXPAND_SUM then when EXP is an addition
8341 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8342 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8343 products as above, or REG or MEM, or constant.
8344 Ordinarily in such cases we would output mul or add instructions
8345 and then return a pseudo reg containing the sum.
8347 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8348 it also marks a label as absolutely required (it can't be dead).
8349 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8350 This is used for outputting expressions used in initializers.
8352 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8353 with a constant address even if that address is not normally legitimate.
8354 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8356 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8357 a call parameter. Such targets require special care as we haven't yet
8358 marked TARGET so that it's safe from being trashed by libcalls. We
8359 don't want to use TARGET for anything but the final result;
8360 Intermediate values must go elsewhere. Additionally, calls to
8361 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8363 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8364 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8365 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8366 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8368 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8369 then *ALT_RTL is set to TARGET (before legitimziation).
8371 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8372 In this case, we don't adjust a returned MEM rtx that wouldn't be
8373 sufficiently aligned for its mode; instead, it's up to the caller
8374 to deal with it afterwards. This is used to make sure that unaligned
8375 base objects for which out-of-bounds accesses are supported, for
8376 example record types with trailing arrays, aren't realigned behind
8377 the back of the caller.
8378 The normal operating mode is to pass FALSE for this parameter. */
8381 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8382 enum expand_modifier modifier
, rtx
*alt_rtl
,
8383 bool inner_reference_p
)
8387 /* Handle ERROR_MARK before anybody tries to access its type. */
8388 if (TREE_CODE (exp
) == ERROR_MARK
8389 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8391 ret
= CONST0_RTX (tmode
);
8392 return ret
? ret
: const0_rtx
;
8395 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8400 /* Try to expand the conditional expression which is represented by
8401 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8402 return the rtl reg which represents the result. Otherwise return
8406 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8407 tree treeop1 ATTRIBUTE_UNUSED
,
8408 tree treeop2 ATTRIBUTE_UNUSED
)
8411 rtx op00
, op01
, op1
, op2
;
8412 enum rtx_code comparison_code
;
8413 machine_mode comparison_mode
;
8416 tree type
= TREE_TYPE (treeop1
);
8417 int unsignedp
= TYPE_UNSIGNED (type
);
8418 machine_mode mode
= TYPE_MODE (type
);
8419 machine_mode orig_mode
= mode
;
8420 static bool expanding_cond_expr_using_cmove
= false;
8422 /* Conditional move expansion can end up TERing two operands which,
8423 when recursively hitting conditional expressions can result in
8424 exponential behavior if the cmove expansion ultimatively fails.
8425 It's hardly profitable to TER a cmove into a cmove so avoid doing
8426 that by failing early if we end up recursing. */
8427 if (expanding_cond_expr_using_cmove
)
8430 /* If we cannot do a conditional move on the mode, try doing it
8431 with the promoted mode. */
8432 if (!can_conditionally_move_p (mode
))
8434 mode
= promote_mode (type
, mode
, &unsignedp
);
8435 if (!can_conditionally_move_p (mode
))
8437 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8440 temp
= assign_temp (type
, 0, 1);
8442 expanding_cond_expr_using_cmove
= true;
8444 expand_operands (treeop1
, treeop2
,
8445 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8447 if (TREE_CODE (treeop0
) == SSA_NAME
8448 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8450 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8451 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8452 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8453 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8454 comparison_mode
= TYPE_MODE (type
);
8455 unsignedp
= TYPE_UNSIGNED (type
);
8456 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8458 else if (COMPARISON_CLASS_P (treeop0
))
8460 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8461 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8462 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8463 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8464 unsignedp
= TYPE_UNSIGNED (type
);
8465 comparison_mode
= TYPE_MODE (type
);
8466 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8470 op00
= expand_normal (treeop0
);
8472 comparison_code
= NE
;
8473 comparison_mode
= GET_MODE (op00
);
8474 if (comparison_mode
== VOIDmode
)
8475 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8477 expanding_cond_expr_using_cmove
= false;
8479 if (GET_MODE (op1
) != mode
)
8480 op1
= gen_lowpart (mode
, op1
);
8482 if (GET_MODE (op2
) != mode
)
8483 op2
= gen_lowpart (mode
, op2
);
8485 /* Try to emit the conditional move. */
8486 insn
= emit_conditional_move (temp
, comparison_code
,
8487 op00
, op01
, comparison_mode
,
8491 /* If we could do the conditional move, emit the sequence,
8495 rtx_insn
*seq
= get_insns ();
8498 return convert_modes (orig_mode
, mode
, temp
, 0);
8501 /* Otherwise discard the sequence and fall back to code with
8507 /* A helper function for expand_expr_real_2 to be used with a
8508 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8509 is nonzero, with alignment ALIGN in bits.
8510 Store the value at TARGET if possible (if TARGET is nonzero).
8511 Regardless of TARGET, we return the rtx for where the value is placed.
8512 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8513 then *ALT_RTL is set to TARGET (before legitimziation). */
8516 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8517 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8519 enum insn_code icode
;
8521 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8522 != CODE_FOR_nothing
)
8524 class expand_operand ops
[2];
8526 /* We've already validated the memory, and we're creating a
8527 new pseudo destination. The predicates really can't fail,
8528 nor can the generator. */
8529 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8530 create_fixed_operand (&ops
[1], temp
);
8531 expand_insn (icode
, 2, ops
);
8532 temp
= ops
[0].value
;
8534 else if (targetm
.slow_unaligned_access (mode
, align
))
8535 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8536 0, unsignedp
, target
,
8537 mode
, mode
, false, alt_rtl
);
8542 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8543 enum expand_modifier modifier
)
8545 rtx op0
, op1
, op2
, temp
;
8546 rtx_code_label
*lab
;
8550 scalar_int_mode int_mode
;
8551 enum tree_code code
= ops
->code
;
8553 rtx subtarget
, original_target
;
8555 bool reduce_bit_field
;
8556 location_t loc
= ops
->location
;
8557 tree treeop0
, treeop1
, treeop2
;
8558 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8559 ? reduce_to_bit_field_precision ((expr), \
8565 mode
= TYPE_MODE (type
);
8566 unsignedp
= TYPE_UNSIGNED (type
);
8572 /* We should be called only on simple (binary or unary) expressions,
8573 exactly those that are valid in gimple expressions that aren't
8574 GIMPLE_SINGLE_RHS (or invalid). */
8575 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8576 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8577 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8579 ignore
= (target
== const0_rtx
8580 || ((CONVERT_EXPR_CODE_P (code
)
8581 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8582 && TREE_CODE (type
) == VOID_TYPE
));
8584 /* We should be called only if we need the result. */
8585 gcc_assert (!ignore
);
8587 /* An operation in what may be a bit-field type needs the
8588 result to be reduced to the precision of the bit-field type,
8589 which is narrower than that of the type's mode. */
8590 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8591 && !type_has_mode_precision_p (type
));
8593 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8596 /* Use subtarget as the target for operand 0 of a binary operation. */
8597 subtarget
= get_subtarget (target
);
8598 original_target
= target
;
8602 case NON_LVALUE_EXPR
:
8605 if (treeop0
== error_mark_node
)
8608 if (TREE_CODE (type
) == UNION_TYPE
)
8610 tree valtype
= TREE_TYPE (treeop0
);
8612 /* If both input and output are BLKmode, this conversion isn't doing
8613 anything except possibly changing memory attribute. */
8614 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8616 rtx result
= expand_expr (treeop0
, target
, tmode
,
8619 result
= copy_rtx (result
);
8620 set_mem_attributes (result
, type
, 0);
8626 if (TYPE_MODE (type
) != BLKmode
)
8627 target
= gen_reg_rtx (TYPE_MODE (type
));
8629 target
= assign_temp (type
, 1, 1);
8633 /* Store data into beginning of memory target. */
8634 store_expr (treeop0
,
8635 adjust_address (target
, TYPE_MODE (valtype
), 0),
8636 modifier
== EXPAND_STACK_PARM
,
8637 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8641 gcc_assert (REG_P (target
)
8642 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8644 /* Store this field into a union of the proper type. */
8645 poly_uint64 op0_size
8646 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8647 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8648 store_field (target
,
8649 /* The conversion must be constructed so that
8650 we know at compile time how many bits
8652 ordered_min (op0_size
, union_size
),
8653 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8657 /* Return the entire union. */
8661 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8663 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8666 /* If the signedness of the conversion differs and OP0 is
8667 a promoted SUBREG, clear that indication since we now
8668 have to do the proper extension. */
8669 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8670 && GET_CODE (op0
) == SUBREG
)
8671 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8673 return REDUCE_BIT_FIELD (op0
);
8676 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8677 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8678 if (GET_MODE (op0
) == mode
)
8681 /* If OP0 is a constant, just convert it into the proper mode. */
8682 else if (CONSTANT_P (op0
))
8684 tree inner_type
= TREE_TYPE (treeop0
);
8685 machine_mode inner_mode
= GET_MODE (op0
);
8687 if (inner_mode
== VOIDmode
)
8688 inner_mode
= TYPE_MODE (inner_type
);
8690 if (modifier
== EXPAND_INITIALIZER
)
8691 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8693 op0
= convert_modes (mode
, inner_mode
, op0
,
8694 TYPE_UNSIGNED (inner_type
));
8697 else if (modifier
== EXPAND_INITIALIZER
)
8698 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8699 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8701 else if (target
== 0)
8702 op0
= convert_to_mode (mode
, op0
,
8703 TYPE_UNSIGNED (TREE_TYPE
8707 convert_move (target
, op0
,
8708 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8712 return REDUCE_BIT_FIELD (op0
);
8714 case ADDR_SPACE_CONVERT_EXPR
:
8716 tree treeop0_type
= TREE_TYPE (treeop0
);
8718 gcc_assert (POINTER_TYPE_P (type
));
8719 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8721 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8722 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8724 /* Conversions between pointers to the same address space should
8725 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8726 gcc_assert (as_to
!= as_from
);
8728 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8730 /* Ask target code to handle conversion between pointers
8731 to overlapping address spaces. */
8732 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8733 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8735 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8739 /* For disjoint address spaces, converting anything but a null
8740 pointer invokes undefined behavior. We truncate or extend the
8741 value as if we'd converted via integers, which handles 0 as
8742 required, and all others as the programmer likely expects. */
8743 #ifndef POINTERS_EXTEND_UNSIGNED
8744 const int POINTERS_EXTEND_UNSIGNED
= 1;
8746 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8747 op0
, POINTERS_EXTEND_UNSIGNED
);
8753 case POINTER_PLUS_EXPR
:
8754 /* Even though the sizetype mode and the pointer's mode can be different
8755 expand is able to handle this correctly and get the correct result out
8756 of the PLUS_EXPR code. */
8757 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8758 if sizetype precision is smaller than pointer precision. */
8759 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8760 treeop1
= fold_convert_loc (loc
, type
,
8761 fold_convert_loc (loc
, ssizetype
,
8763 /* If sizetype precision is larger than pointer precision, truncate the
8764 offset to have matching modes. */
8765 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8766 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8770 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8771 something else, make sure we add the register to the constant and
8772 then to the other thing. This case can occur during strength
8773 reduction and doing it this way will produce better code if the
8774 frame pointer or argument pointer is eliminated.
8776 fold-const.c will ensure that the constant is always in the inner
8777 PLUS_EXPR, so the only case we need to do anything about is if
8778 sp, ap, or fp is our second argument, in which case we must swap
8779 the innermost first argument and our second argument. */
8781 if (TREE_CODE (treeop0
) == PLUS_EXPR
8782 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8784 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8785 || DECL_RTL (treeop1
) == stack_pointer_rtx
8786 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8791 /* If the result is to be ptr_mode and we are adding an integer to
8792 something, we might be forming a constant. So try to use
8793 plus_constant. If it produces a sum and we can't accept it,
8794 use force_operand. This allows P = &ARR[const] to generate
8795 efficient code on machines where a SYMBOL_REF is not a valid
8798 If this is an EXPAND_SUM call, always return the sum. */
8799 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8800 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8802 if (modifier
== EXPAND_STACK_PARM
)
8804 if (TREE_CODE (treeop0
) == INTEGER_CST
8805 && HWI_COMPUTABLE_MODE_P (mode
)
8806 && TREE_CONSTANT (treeop1
))
8810 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8812 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8814 /* Use wi::shwi to ensure that the constant is
8815 truncated according to the mode of OP1, then sign extended
8816 to a HOST_WIDE_INT. Using the constant directly can result
8817 in non-canonical RTL in a 64x32 cross compile. */
8818 wc
= TREE_INT_CST_LOW (treeop0
);
8820 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8821 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8822 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8823 op1
= force_operand (op1
, target
);
8824 return REDUCE_BIT_FIELD (op1
);
8827 else if (TREE_CODE (treeop1
) == INTEGER_CST
8828 && HWI_COMPUTABLE_MODE_P (mode
)
8829 && TREE_CONSTANT (treeop0
))
8833 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8835 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8836 (modifier
== EXPAND_INITIALIZER
8837 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8838 if (! CONSTANT_P (op0
))
8840 op1
= expand_expr (treeop1
, NULL_RTX
,
8841 VOIDmode
, modifier
);
8842 /* Return a PLUS if modifier says it's OK. */
8843 if (modifier
== EXPAND_SUM
8844 || modifier
== EXPAND_INITIALIZER
)
8845 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8848 /* Use wi::shwi to ensure that the constant is
8849 truncated according to the mode of OP1, then sign extended
8850 to a HOST_WIDE_INT. Using the constant directly can result
8851 in non-canonical RTL in a 64x32 cross compile. */
8852 wc
= TREE_INT_CST_LOW (treeop1
);
8854 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8855 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8856 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8857 op0
= force_operand (op0
, target
);
8858 return REDUCE_BIT_FIELD (op0
);
8862 /* Use TER to expand pointer addition of a negated value
8863 as pointer subtraction. */
8864 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8865 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8866 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8867 && TREE_CODE (treeop1
) == SSA_NAME
8868 && TYPE_MODE (TREE_TYPE (treeop0
))
8869 == TYPE_MODE (TREE_TYPE (treeop1
)))
8871 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8874 treeop1
= gimple_assign_rhs1 (def
);
8880 /* No sense saving up arithmetic to be done
8881 if it's all in the wrong mode to form part of an address.
8882 And force_operand won't know whether to sign-extend or
8884 if (modifier
!= EXPAND_INITIALIZER
8885 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8887 expand_operands (treeop0
, treeop1
,
8888 subtarget
, &op0
, &op1
, modifier
);
8889 if (op0
== const0_rtx
)
8891 if (op1
== const0_rtx
)
8896 expand_operands (treeop0
, treeop1
,
8897 subtarget
, &op0
, &op1
, modifier
);
8898 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8901 case POINTER_DIFF_EXPR
:
8903 /* For initializers, we are allowed to return a MINUS of two
8904 symbolic constants. Here we handle all cases when both operands
8906 /* Handle difference of two symbolic constants,
8907 for the sake of an initializer. */
8908 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8909 && really_constant_p (treeop0
)
8910 && really_constant_p (treeop1
))
8912 expand_operands (treeop0
, treeop1
,
8913 NULL_RTX
, &op0
, &op1
, modifier
);
8914 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8917 /* No sense saving up arithmetic to be done
8918 if it's all in the wrong mode to form part of an address.
8919 And force_operand won't know whether to sign-extend or
8921 if (modifier
!= EXPAND_INITIALIZER
8922 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8925 expand_operands (treeop0
, treeop1
,
8926 subtarget
, &op0
, &op1
, modifier
);
8928 /* Convert A - const to A + (-const). */
8929 if (CONST_INT_P (op1
))
8931 op1
= negate_rtx (mode
, op1
);
8932 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8937 case WIDEN_MULT_PLUS_EXPR
:
8938 case WIDEN_MULT_MINUS_EXPR
:
8939 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8940 op2
= expand_normal (treeop2
);
8941 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8945 case WIDEN_MULT_EXPR
:
8946 /* If first operand is constant, swap them.
8947 Thus the following special case checks need only
8948 check the second operand. */
8949 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8950 std::swap (treeop0
, treeop1
);
8952 /* First, check if we have a multiplication of one signed and one
8953 unsigned operand. */
8954 if (TREE_CODE (treeop1
) != INTEGER_CST
8955 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8956 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8958 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8959 this_optab
= usmul_widen_optab
;
8960 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8961 != CODE_FOR_nothing
)
8963 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8964 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8967 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8969 /* op0 and op1 might still be constant, despite the above
8970 != INTEGER_CST check. Handle it. */
8971 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8973 op0
= convert_modes (mode
, innermode
, op0
, true);
8974 op1
= convert_modes (mode
, innermode
, op1
, false);
8975 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8976 target
, unsignedp
));
8981 /* Check for a multiplication with matching signedness. */
8982 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8983 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8984 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8985 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8987 tree op0type
= TREE_TYPE (treeop0
);
8988 machine_mode innermode
= TYPE_MODE (op0type
);
8989 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8990 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8991 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8993 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8995 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8996 != CODE_FOR_nothing
)
8998 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9000 /* op0 and op1 might still be constant, despite the above
9001 != INTEGER_CST check. Handle it. */
9002 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9005 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9007 = convert_modes (mode
, innermode
, op1
,
9008 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9009 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9013 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9014 unsignedp
, this_optab
);
9015 return REDUCE_BIT_FIELD (temp
);
9017 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9019 && innermode
== word_mode
)
9022 op0
= expand_normal (treeop0
);
9023 op1
= expand_normal (treeop1
);
9024 /* op0 and op1 might be constants, despite the above
9025 != INTEGER_CST check. Handle it. */
9026 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9027 goto widen_mult_const
;
9028 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9029 unsignedp
, OPTAB_LIB_WIDEN
);
9030 hipart
= gen_highpart (word_mode
, temp
);
9031 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9035 emit_move_insn (hipart
, htem
);
9036 return REDUCE_BIT_FIELD (temp
);
9040 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9041 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9042 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9043 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9046 /* If this is a fixed-point operation, then we cannot use the code
9047 below because "expand_mult" doesn't support sat/no-sat fixed-point
9049 if (ALL_FIXED_POINT_MODE_P (mode
))
9052 /* If first operand is constant, swap them.
9053 Thus the following special case checks need only
9054 check the second operand. */
9055 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9056 std::swap (treeop0
, treeop1
);
9058 /* Attempt to return something suitable for generating an
9059 indexed address, for machines that support that. */
9061 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9062 && tree_fits_shwi_p (treeop1
))
9064 tree exp1
= treeop1
;
9066 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9070 op0
= force_operand (op0
, NULL_RTX
);
9072 op0
= copy_to_mode_reg (mode
, op0
);
9074 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9075 gen_int_mode (tree_to_shwi (exp1
),
9076 TYPE_MODE (TREE_TYPE (exp1
)))));
9079 if (modifier
== EXPAND_STACK_PARM
)
9082 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9083 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9085 case TRUNC_MOD_EXPR
:
9086 case FLOOR_MOD_EXPR
:
9088 case ROUND_MOD_EXPR
:
9090 case TRUNC_DIV_EXPR
:
9091 case FLOOR_DIV_EXPR
:
9093 case ROUND_DIV_EXPR
:
9094 case EXACT_DIV_EXPR
:
9096 /* If this is a fixed-point operation, then we cannot use the code
9097 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9099 if (ALL_FIXED_POINT_MODE_P (mode
))
9102 if (modifier
== EXPAND_STACK_PARM
)
9104 /* Possible optimization: compute the dividend with EXPAND_SUM
9105 then if the divisor is constant can optimize the case
9106 where some terms of the dividend have coeffs divisible by it. */
9107 expand_operands (treeop0
, treeop1
,
9108 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9109 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9110 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9111 if (SCALAR_INT_MODE_P (mode
)
9113 && get_range_pos_neg (treeop0
) == 1
9114 && get_range_pos_neg (treeop1
) == 1)
9116 /* If both arguments are known to be positive when interpreted
9117 as signed, we can expand it as both signed and unsigned
9118 division or modulo. Choose the cheaper sequence in that case. */
9119 bool speed_p
= optimize_insn_for_speed_p ();
9120 do_pending_stack_adjust ();
9122 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9123 rtx_insn
*uns_insns
= get_insns ();
9126 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9127 rtx_insn
*sgn_insns
= get_insns ();
9129 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9130 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9132 /* If costs are the same then use as tie breaker the other
9134 if (uns_cost
== sgn_cost
)
9136 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9137 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9140 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9142 emit_insn (uns_insns
);
9145 emit_insn (sgn_insns
);
9148 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9153 case MULT_HIGHPART_EXPR
:
9154 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9155 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9159 case FIXED_CONVERT_EXPR
:
9160 op0
= expand_normal (treeop0
);
9161 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9162 target
= gen_reg_rtx (mode
);
9164 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9165 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9166 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9167 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9169 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9172 case FIX_TRUNC_EXPR
:
9173 op0
= expand_normal (treeop0
);
9174 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9175 target
= gen_reg_rtx (mode
);
9176 expand_fix (target
, op0
, unsignedp
);
9180 op0
= expand_normal (treeop0
);
9181 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9182 target
= gen_reg_rtx (mode
);
9183 /* expand_float can't figure out what to do if FROM has VOIDmode.
9184 So give it the correct mode. With -O, cse will optimize this. */
9185 if (GET_MODE (op0
) == VOIDmode
)
9186 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9188 expand_float (target
, op0
,
9189 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9193 op0
= expand_expr (treeop0
, subtarget
,
9194 VOIDmode
, EXPAND_NORMAL
);
9195 if (modifier
== EXPAND_STACK_PARM
)
9197 temp
= expand_unop (mode
,
9198 optab_for_tree_code (NEGATE_EXPR
, type
,
9202 return REDUCE_BIT_FIELD (temp
);
9206 op0
= expand_expr (treeop0
, subtarget
,
9207 VOIDmode
, EXPAND_NORMAL
);
9208 if (modifier
== EXPAND_STACK_PARM
)
9211 /* ABS_EXPR is not valid for complex arguments. */
9212 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9213 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9215 /* Unsigned abs is simply the operand. Testing here means we don't
9216 risk generating incorrect code below. */
9217 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9220 return expand_abs (mode
, op0
, target
, unsignedp
,
9221 safe_from_p (target
, treeop0
, 1));
9225 target
= original_target
;
9227 || modifier
== EXPAND_STACK_PARM
9228 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9229 || GET_MODE (target
) != mode
9231 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9232 target
= gen_reg_rtx (mode
);
9233 expand_operands (treeop0
, treeop1
,
9234 target
, &op0
, &op1
, EXPAND_NORMAL
);
9236 /* First try to do it with a special MIN or MAX instruction.
9237 If that does not win, use a conditional jump to select the proper
9239 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9240 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9245 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9246 and similarly for MAX <x, y>. */
9247 if (VECTOR_TYPE_P (type
))
9249 tree t0
= make_tree (type
, op0
);
9250 tree t1
= make_tree (type
, op1
);
9251 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9253 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9257 /* At this point, a MEM target is no longer useful; we will get better
9260 if (! REG_P (target
))
9261 target
= gen_reg_rtx (mode
);
9263 /* If op1 was placed in target, swap op0 and op1. */
9264 if (target
!= op0
&& target
== op1
)
9265 std::swap (op0
, op1
);
9267 /* We generate better code and avoid problems with op1 mentioning
9268 target by forcing op1 into a pseudo if it isn't a constant. */
9269 if (! CONSTANT_P (op1
))
9270 op1
= force_reg (mode
, op1
);
9273 enum rtx_code comparison_code
;
9276 if (code
== MAX_EXPR
)
9277 comparison_code
= unsignedp
? GEU
: GE
;
9279 comparison_code
= unsignedp
? LEU
: LE
;
9281 /* Canonicalize to comparisons against 0. */
9282 if (op1
== const1_rtx
)
9284 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9285 or (a != 0 ? a : 1) for unsigned.
9286 For MIN we are safe converting (a <= 1 ? a : 1)
9287 into (a <= 0 ? a : 1) */
9288 cmpop1
= const0_rtx
;
9289 if (code
== MAX_EXPR
)
9290 comparison_code
= unsignedp
? NE
: GT
;
9292 if (op1
== constm1_rtx
&& !unsignedp
)
9294 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9295 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9296 cmpop1
= const0_rtx
;
9297 if (code
== MIN_EXPR
)
9298 comparison_code
= LT
;
9301 /* Use a conditional move if possible. */
9302 if (can_conditionally_move_p (mode
))
9308 /* Try to emit the conditional move. */
9309 insn
= emit_conditional_move (target
, comparison_code
,
9314 /* If we could do the conditional move, emit the sequence,
9318 rtx_insn
*seq
= get_insns ();
9324 /* Otherwise discard the sequence and fall back to code with
9330 emit_move_insn (target
, op0
);
9332 lab
= gen_label_rtx ();
9333 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9334 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9335 profile_probability::uninitialized ());
9337 emit_move_insn (target
, op1
);
9342 op0
= expand_expr (treeop0
, subtarget
,
9343 VOIDmode
, EXPAND_NORMAL
);
9344 if (modifier
== EXPAND_STACK_PARM
)
9346 /* In case we have to reduce the result to bitfield precision
9347 for unsigned bitfield expand this as XOR with a proper constant
9349 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9351 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9352 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9353 false, GET_MODE_PRECISION (int_mode
));
9355 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9356 immed_wide_int_const (mask
, int_mode
),
9357 target
, 1, OPTAB_LIB_WIDEN
);
9360 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9364 /* ??? Can optimize bitwise operations with one arg constant.
9365 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9366 and (a bitwise1 b) bitwise2 b (etc)
9367 but that is probably not worth while. */
9376 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9377 || type_has_mode_precision_p (type
));
9383 /* If this is a fixed-point operation, then we cannot use the code
9384 below because "expand_shift" doesn't support sat/no-sat fixed-point
9386 if (ALL_FIXED_POINT_MODE_P (mode
))
9389 if (! safe_from_p (subtarget
, treeop1
, 1))
9391 if (modifier
== EXPAND_STACK_PARM
)
9393 op0
= expand_expr (treeop0
, subtarget
,
9394 VOIDmode
, EXPAND_NORMAL
);
9396 /* Left shift optimization when shifting across word_size boundary.
9398 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9399 there isn't native instruction to support this wide mode
9400 left shift. Given below scenario:
9402 Type A = (Type) B << C
9405 | dest_high | dest_low |
9409 If the shift amount C caused we shift B to across the word
9410 size boundary, i.e part of B shifted into high half of
9411 destination register, and part of B remains in the low
9412 half, then GCC will use the following left shift expand
9415 1. Initialize dest_low to B.
9416 2. Initialize every bit of dest_high to the sign bit of B.
9417 3. Logic left shift dest_low by C bit to finalize dest_low.
9418 The value of dest_low before this shift is kept in a temp D.
9419 4. Logic left shift dest_high by C.
9420 5. Logic right shift D by (word_size - C).
9421 6. Or the result of 4 and 5 to finalize dest_high.
9423 While, by checking gimple statements, if operand B is
9424 coming from signed extension, then we can simplify above
9427 1. dest_high = src_low >> (word_size - C).
9428 2. dest_low = src_low << C.
9430 We can use one arithmetic right shift to finish all the
9431 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9432 needed from 6 into 2.
9434 The case is similar for zero extension, except that we
9435 initialize dest_high to zero rather than copies of the sign
9436 bit from B. Furthermore, we need to use a logical right shift
9439 The choice of sign-extension versus zero-extension is
9440 determined entirely by whether or not B is signed and is
9441 independent of the current setting of unsignedp. */
9444 if (code
== LSHIFT_EXPR
9447 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9449 && TREE_CONSTANT (treeop1
)
9450 && TREE_CODE (treeop0
) == SSA_NAME
)
9452 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9453 if (is_gimple_assign (def
)
9454 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9456 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9457 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9459 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9460 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9461 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9462 >= GET_MODE_BITSIZE (word_mode
)))
9464 rtx_insn
*seq
, *seq_old
;
9465 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9467 bool extend_unsigned
9468 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9469 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9470 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9471 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9472 int_mode
, high_off
);
9473 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9474 - TREE_INT_CST_LOW (treeop1
));
9475 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9478 /* dest_high = src_low >> (word_size - C). */
9479 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9482 if (temp
!= dest_high
)
9483 emit_move_insn (dest_high
, temp
);
9485 /* dest_low = src_low << C. */
9486 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9487 treeop1
, dest_low
, unsignedp
);
9488 if (temp
!= dest_low
)
9489 emit_move_insn (dest_low
, temp
);
9495 if (have_insn_for (ASHIFT
, int_mode
))
9497 bool speed_p
= optimize_insn_for_speed_p ();
9499 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9504 seq_old
= get_insns ();
9506 if (seq_cost (seq
, speed_p
)
9507 >= seq_cost (seq_old
, speed_p
))
9518 if (temp
== NULL_RTX
)
9519 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9521 if (code
== LSHIFT_EXPR
)
9522 temp
= REDUCE_BIT_FIELD (temp
);
9526 /* Could determine the answer when only additive constants differ. Also,
9527 the addition of one can be handled by changing the condition. */
9534 case UNORDERED_EXPR
:
9543 temp
= do_store_flag (ops
,
9544 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9545 tmode
!= VOIDmode
? tmode
: mode
);
9549 /* Use a compare and a jump for BLKmode comparisons, or for function
9550 type comparisons is have_canonicalize_funcptr_for_compare. */
9553 || modifier
== EXPAND_STACK_PARM
9554 || ! safe_from_p (target
, treeop0
, 1)
9555 || ! safe_from_p (target
, treeop1
, 1)
9556 /* Make sure we don't have a hard reg (such as function's return
9557 value) live across basic blocks, if not optimizing. */
9558 || (!optimize
&& REG_P (target
)
9559 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9560 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9562 emit_move_insn (target
, const0_rtx
);
9564 rtx_code_label
*lab1
= gen_label_rtx ();
9565 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9566 profile_probability::uninitialized ());
9568 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9569 emit_move_insn (target
, constm1_rtx
);
9571 emit_move_insn (target
, const1_rtx
);
9577 /* Get the rtx code of the operands. */
9578 op0
= expand_normal (treeop0
);
9579 op1
= expand_normal (treeop1
);
9582 target
= gen_reg_rtx (TYPE_MODE (type
));
9584 /* If target overlaps with op1, then either we need to force
9585 op1 into a pseudo (if target also overlaps with op0),
9586 or write the complex parts in reverse order. */
9587 switch (GET_CODE (target
))
9590 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9592 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9594 complex_expr_force_op1
:
9595 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9596 emit_move_insn (temp
, op1
);
9600 complex_expr_swap_order
:
9601 /* Move the imaginary (op1) and real (op0) parts to their
9603 write_complex_part (target
, op1
, true);
9604 write_complex_part (target
, op0
, false);
9610 temp
= adjust_address_nv (target
,
9611 GET_MODE_INNER (GET_MODE (target
)), 0);
9612 if (reg_overlap_mentioned_p (temp
, op1
))
9614 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9615 temp
= adjust_address_nv (target
, imode
,
9616 GET_MODE_SIZE (imode
));
9617 if (reg_overlap_mentioned_p (temp
, op0
))
9618 goto complex_expr_force_op1
;
9619 goto complex_expr_swap_order
;
9623 if (reg_overlap_mentioned_p (target
, op1
))
9625 if (reg_overlap_mentioned_p (target
, op0
))
9626 goto complex_expr_force_op1
;
9627 goto complex_expr_swap_order
;
9632 /* Move the real (op0) and imaginary (op1) parts to their location. */
9633 write_complex_part (target
, op0
, false);
9634 write_complex_part (target
, op1
, true);
9638 case WIDEN_SUM_EXPR
:
9640 tree oprnd0
= treeop0
;
9641 tree oprnd1
= treeop1
;
9643 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9644 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9649 case VEC_UNPACK_HI_EXPR
:
9650 case VEC_UNPACK_LO_EXPR
:
9651 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9652 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9654 op0
= expand_normal (treeop0
);
9655 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9661 case VEC_UNPACK_FLOAT_HI_EXPR
:
9662 case VEC_UNPACK_FLOAT_LO_EXPR
:
9664 op0
= expand_normal (treeop0
);
9665 /* The signedness is determined from input operand. */
9666 temp
= expand_widen_pattern_expr
9667 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9668 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9674 case VEC_WIDEN_MULT_HI_EXPR
:
9675 case VEC_WIDEN_MULT_LO_EXPR
:
9676 case VEC_WIDEN_MULT_EVEN_EXPR
:
9677 case VEC_WIDEN_MULT_ODD_EXPR
:
9678 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9679 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9680 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9681 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9683 gcc_assert (target
);
9686 case VEC_PACK_SAT_EXPR
:
9687 case VEC_PACK_FIX_TRUNC_EXPR
:
9688 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9691 case VEC_PACK_TRUNC_EXPR
:
9692 if (VECTOR_BOOLEAN_TYPE_P (type
)
9693 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9694 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9695 && SCALAR_INT_MODE_P (mode
))
9697 class expand_operand eops
[4];
9698 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9699 expand_operands (treeop0
, treeop1
,
9700 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9701 this_optab
= vec_pack_sbool_trunc_optab
;
9702 enum insn_code icode
= optab_handler (this_optab
, imode
);
9703 create_output_operand (&eops
[0], target
, mode
);
9704 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9705 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9706 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9707 create_input_operand (&eops
[3], temp
, imode
);
9708 expand_insn (icode
, 4, eops
);
9709 return eops
[0].value
;
9711 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9714 case VEC_PACK_FLOAT_EXPR
:
9715 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9716 expand_operands (treeop0
, treeop1
,
9717 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9718 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9720 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9721 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9723 gcc_assert (target
);
9728 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9729 vec_perm_builder sel
;
9730 if (TREE_CODE (treeop2
) == VECTOR_CST
9731 && tree_to_vec_perm_builder (&sel
, treeop2
))
9733 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9734 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9739 op2
= expand_normal (treeop2
);
9740 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9748 tree oprnd0
= treeop0
;
9749 tree oprnd1
= treeop1
;
9750 tree oprnd2
= treeop2
;
9752 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9753 op2
= expand_normal (oprnd2
);
9754 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9761 tree oprnd0
= treeop0
;
9762 tree oprnd1
= treeop1
;
9763 tree oprnd2
= treeop2
;
9765 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9766 op2
= expand_normal (oprnd2
);
9767 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9772 case REALIGN_LOAD_EXPR
:
9774 tree oprnd0
= treeop0
;
9775 tree oprnd1
= treeop1
;
9776 tree oprnd2
= treeop2
;
9778 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9779 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9780 op2
= expand_normal (oprnd2
);
9781 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9789 /* A COND_EXPR with its type being VOID_TYPE represents a
9790 conditional jump and is handled in
9791 expand_gimple_cond_expr. */
9792 gcc_assert (!VOID_TYPE_P (type
));
9794 /* Note that COND_EXPRs whose type is a structure or union
9795 are required to be constructed to contain assignments of
9796 a temporary variable, so that we can evaluate them here
9797 for side effect only. If type is void, we must do likewise. */
9799 gcc_assert (!TREE_ADDRESSABLE (type
)
9801 && TREE_TYPE (treeop1
) != void_type_node
9802 && TREE_TYPE (treeop2
) != void_type_node
);
9804 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9808 /* If we are not to produce a result, we have no target. Otherwise,
9809 if a target was specified use it; it will not be used as an
9810 intermediate target unless it is safe. If no target, use a
9813 if (modifier
!= EXPAND_STACK_PARM
9815 && safe_from_p (original_target
, treeop0
, 1)
9816 && GET_MODE (original_target
) == mode
9817 && !MEM_P (original_target
))
9818 temp
= original_target
;
9820 temp
= assign_temp (type
, 0, 1);
9822 do_pending_stack_adjust ();
9824 rtx_code_label
*lab0
= gen_label_rtx ();
9825 rtx_code_label
*lab1
= gen_label_rtx ();
9826 jumpifnot (treeop0
, lab0
,
9827 profile_probability::uninitialized ());
9828 store_expr (treeop1
, temp
,
9829 modifier
== EXPAND_STACK_PARM
,
9832 emit_jump_insn (targetm
.gen_jump (lab1
));
9835 store_expr (treeop2
, temp
,
9836 modifier
== EXPAND_STACK_PARM
,
9845 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9848 case VEC_DUPLICATE_EXPR
:
9849 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9850 target
= expand_vector_broadcast (mode
, op0
);
9851 gcc_assert (target
);
9854 case VEC_SERIES_EXPR
:
9855 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9856 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9858 case BIT_INSERT_EXPR
:
9860 unsigned bitpos
= tree_to_uhwi (treeop2
);
9862 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9863 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9865 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9866 op0
= expand_normal (treeop0
);
9867 op1
= expand_normal (treeop1
);
9868 rtx dst
= gen_reg_rtx (mode
);
9869 emit_move_insn (dst
, op0
);
9870 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9871 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9879 /* Here to do an ordinary binary operator. */
9881 expand_operands (treeop0
, treeop1
,
9882 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9884 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9886 if (modifier
== EXPAND_STACK_PARM
)
9888 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9889 unsignedp
, OPTAB_LIB_WIDEN
);
9891 /* Bitwise operations do not need bitfield reduction as we expect their
9892 operands being properly truncated. */
9893 if (code
== BIT_XOR_EXPR
9894 || code
== BIT_AND_EXPR
9895 || code
== BIT_IOR_EXPR
)
9897 return REDUCE_BIT_FIELD (temp
);
9899 #undef REDUCE_BIT_FIELD
9902 /* Return TRUE if expression STMT is suitable for replacement.
9903 Never consider memory loads as replaceable, because those don't ever lead
9904 into constant expressions. */
9907 stmt_is_replaceable_p (gimple
*stmt
)
9909 if (ssa_is_replaceable_p (stmt
))
9911 /* Don't move around loads. */
9912 if (!gimple_assign_single_p (stmt
)
9913 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9920 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9921 enum expand_modifier modifier
, rtx
*alt_rtl
,
9922 bool inner_reference_p
)
9924 rtx op0
, op1
, temp
, decl_rtl
;
9927 machine_mode mode
, dmode
;
9928 enum tree_code code
= TREE_CODE (exp
);
9929 rtx subtarget
, original_target
;
9932 bool reduce_bit_field
;
9933 location_t loc
= EXPR_LOCATION (exp
);
9934 struct separate_ops ops
;
9935 tree treeop0
, treeop1
, treeop2
;
9936 tree ssa_name
= NULL_TREE
;
9939 type
= TREE_TYPE (exp
);
9940 mode
= TYPE_MODE (type
);
9941 unsignedp
= TYPE_UNSIGNED (type
);
9943 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9944 if (!VL_EXP_CLASS_P (exp
))
9945 switch (TREE_CODE_LENGTH (code
))
9948 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9949 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9950 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9960 ignore
= (target
== const0_rtx
9961 || ((CONVERT_EXPR_CODE_P (code
)
9962 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9963 && TREE_CODE (type
) == VOID_TYPE
));
9965 /* An operation in what may be a bit-field type needs the
9966 result to be reduced to the precision of the bit-field type,
9967 which is narrower than that of the type's mode. */
9968 reduce_bit_field
= (!ignore
9969 && INTEGRAL_TYPE_P (type
)
9970 && !type_has_mode_precision_p (type
));
9972 /* If we are going to ignore this result, we need only do something
9973 if there is a side-effect somewhere in the expression. If there
9974 is, short-circuit the most common cases here. Note that we must
9975 not call expand_expr with anything but const0_rtx in case this
9976 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9980 if (! TREE_SIDE_EFFECTS (exp
))
9983 /* Ensure we reference a volatile object even if value is ignored, but
9984 don't do this if all we are doing is taking its address. */
9985 if (TREE_THIS_VOLATILE (exp
)
9986 && TREE_CODE (exp
) != FUNCTION_DECL
9987 && mode
!= VOIDmode
&& mode
!= BLKmode
9988 && modifier
!= EXPAND_CONST_ADDRESS
)
9990 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9996 if (TREE_CODE_CLASS (code
) == tcc_unary
9997 || code
== BIT_FIELD_REF
9998 || code
== COMPONENT_REF
9999 || code
== INDIRECT_REF
)
10000 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10003 else if (TREE_CODE_CLASS (code
) == tcc_binary
10004 || TREE_CODE_CLASS (code
) == tcc_comparison
10005 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10007 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10008 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10015 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10018 /* Use subtarget as the target for operand 0 of a binary operation. */
10019 subtarget
= get_subtarget (target
);
10020 original_target
= target
;
10026 tree function
= decl_function_context (exp
);
10028 temp
= label_rtx (exp
);
10029 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10031 if (function
!= current_function_decl
10033 LABEL_REF_NONLOCAL_P (temp
) = 1;
10035 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10040 /* ??? ivopts calls expander, without any preparation from
10041 out-of-ssa. So fake instructions as if this was an access to the
10042 base variable. This unnecessarily allocates a pseudo, see how we can
10043 reuse it, if partition base vars have it set already. */
10044 if (!currently_expanding_to_rtl
)
10046 tree var
= SSA_NAME_VAR (exp
);
10047 if (var
&& DECL_RTL_SET_P (var
))
10048 return DECL_RTL (var
);
10049 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10050 LAST_VIRTUAL_REGISTER
+ 1);
10053 g
= get_gimple_for_ssa_name (exp
);
10054 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10056 && modifier
== EXPAND_INITIALIZER
10057 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10058 && (optimize
|| !SSA_NAME_VAR (exp
)
10059 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10060 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10061 g
= SSA_NAME_DEF_STMT (exp
);
10065 location_t saved_loc
= curr_insn_location ();
10066 loc
= gimple_location (g
);
10067 if (loc
!= UNKNOWN_LOCATION
)
10068 set_curr_insn_location (loc
);
10069 ops
.code
= gimple_assign_rhs_code (g
);
10070 switch (get_gimple_rhs_class (ops
.code
))
10072 case GIMPLE_TERNARY_RHS
:
10073 ops
.op2
= gimple_assign_rhs3 (g
);
10075 case GIMPLE_BINARY_RHS
:
10076 ops
.op1
= gimple_assign_rhs2 (g
);
10078 /* Try to expand conditonal compare. */
10079 if (targetm
.gen_ccmp_first
)
10081 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10082 r
= expand_ccmp_expr (g
, mode
);
10087 case GIMPLE_UNARY_RHS
:
10088 ops
.op0
= gimple_assign_rhs1 (g
);
10089 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10090 ops
.location
= loc
;
10091 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10093 case GIMPLE_SINGLE_RHS
:
10095 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10096 tmode
, modifier
, alt_rtl
,
10097 inner_reference_p
);
10101 gcc_unreachable ();
10103 set_curr_insn_location (saved_loc
);
10104 if (REG_P (r
) && !REG_EXPR (r
))
10105 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10110 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10111 exp
= SSA_NAME_VAR (ssa_name
);
10112 goto expand_decl_rtl
;
10116 /* If a static var's type was incomplete when the decl was written,
10117 but the type is complete now, lay out the decl now. */
10118 if (DECL_SIZE (exp
) == 0
10119 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10120 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10121 layout_decl (exp
, 0);
10125 case FUNCTION_DECL
:
10127 decl_rtl
= DECL_RTL (exp
);
10129 gcc_assert (decl_rtl
);
10131 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10132 settings for VECTOR_TYPE_P that might switch for the function. */
10133 if (currently_expanding_to_rtl
10134 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10135 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10136 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10138 decl_rtl
= copy_rtx (decl_rtl
);
10140 /* Record writes to register variables. */
10141 if (modifier
== EXPAND_WRITE
10142 && REG_P (decl_rtl
)
10143 && HARD_REGISTER_P (decl_rtl
))
10144 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10145 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10147 /* Ensure variable marked as used even if it doesn't go through
10148 a parser. If it hasn't be used yet, write out an external
10151 TREE_USED (exp
) = 1;
10153 /* Show we haven't gotten RTL for this yet. */
10156 /* Variables inherited from containing functions should have
10157 been lowered by this point. */
10159 context
= decl_function_context (exp
);
10161 || SCOPE_FILE_SCOPE_P (context
)
10162 || context
== current_function_decl
10163 || TREE_STATIC (exp
)
10164 || DECL_EXTERNAL (exp
)
10165 /* ??? C++ creates functions that are not TREE_STATIC. */
10166 || TREE_CODE (exp
) == FUNCTION_DECL
);
10168 /* This is the case of an array whose size is to be determined
10169 from its initializer, while the initializer is still being parsed.
10170 ??? We aren't parsing while expanding anymore. */
10172 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10173 temp
= validize_mem (decl_rtl
);
10175 /* If DECL_RTL is memory, we are in the normal case and the
10176 address is not valid, get the address into a register. */
10178 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10181 *alt_rtl
= decl_rtl
;
10182 decl_rtl
= use_anchored_address (decl_rtl
);
10183 if (modifier
!= EXPAND_CONST_ADDRESS
10184 && modifier
!= EXPAND_SUM
10185 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10186 : GET_MODE (decl_rtl
),
10187 XEXP (decl_rtl
, 0),
10188 MEM_ADDR_SPACE (decl_rtl
)))
10189 temp
= replace_equiv_address (decl_rtl
,
10190 copy_rtx (XEXP (decl_rtl
, 0)));
10193 /* If we got something, return it. But first, set the alignment
10194 if the address is a register. */
10197 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10198 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10200 else if (MEM_P (decl_rtl
))
10206 && modifier
!= EXPAND_WRITE
10207 && modifier
!= EXPAND_MEMORY
10208 && modifier
!= EXPAND_INITIALIZER
10209 && modifier
!= EXPAND_CONST_ADDRESS
10210 && modifier
!= EXPAND_SUM
10211 && !inner_reference_p
10213 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10214 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10215 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10221 dmode
= DECL_MODE (exp
);
10223 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10225 /* If the mode of DECL_RTL does not match that of the decl,
10226 there are two cases: we are dealing with a BLKmode value
10227 that is returned in a register, or we are dealing with
10228 a promoted value. In the latter case, return a SUBREG
10229 of the wanted mode, but mark it so that we know that it
10230 was already extended. */
10231 if (REG_P (decl_rtl
)
10232 && dmode
!= BLKmode
10233 && GET_MODE (decl_rtl
) != dmode
)
10235 machine_mode pmode
;
10237 /* Get the signedness to be used for this variable. Ensure we get
10238 the same mode we got when the variable was declared. */
10239 if (code
!= SSA_NAME
)
10240 pmode
= promote_decl_mode (exp
, &unsignedp
);
10241 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10242 && gimple_code (g
) == GIMPLE_CALL
10243 && !gimple_call_internal_p (g
))
10244 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10245 gimple_call_fntype (g
),
10248 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10249 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10251 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10252 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10253 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10261 /* Given that TYPE_PRECISION (type) is not always equal to
10262 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10263 the former to the latter according to the signedness of the
10265 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10266 temp
= immed_wide_int_const
10267 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10273 tree tmp
= NULL_TREE
;
10274 if (VECTOR_MODE_P (mode
))
10275 return const_vector_from_tree (exp
);
10276 scalar_int_mode int_mode
;
10277 if (is_int_mode (mode
, &int_mode
))
10279 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10280 return const_scalar_mask_from_tree (int_mode
, exp
);
10284 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10286 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10287 type_for_mode
, exp
);
10292 vec
<constructor_elt
, va_gc
> *v
;
10293 /* Constructors need to be fixed-length. FIXME. */
10294 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10295 vec_alloc (v
, nunits
);
10296 for (unsigned int i
= 0; i
< nunits
; ++i
)
10297 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10298 tmp
= build_constructor (type
, v
);
10300 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10305 if (modifier
== EXPAND_WRITE
)
10307 /* Writing into CONST_DECL is always invalid, but handle it
10309 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10310 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10311 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10312 EXPAND_NORMAL
, as
);
10313 op0
= memory_address_addr_space (mode
, op0
, as
);
10314 temp
= gen_rtx_MEM (mode
, op0
);
10315 set_mem_addr_space (temp
, as
);
10318 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10321 /* If optimized, generate immediate CONST_DOUBLE
10322 which will be turned into memory by reload if necessary.
10324 We used to force a register so that loop.c could see it. But
10325 this does not allow gen_* patterns to perform optimizations with
10326 the constants. It also produces two insns in cases like "x = 1.0;".
10327 On most machines, floating-point constants are not permitted in
10328 many insns, so we'd end up copying it to a register in any case.
10330 Now, we do the copying in expand_binop, if appropriate. */
10331 return const_double_from_real_value (TREE_REAL_CST (exp
),
10332 TYPE_MODE (TREE_TYPE (exp
)));
10335 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10336 TYPE_MODE (TREE_TYPE (exp
)));
10339 /* Handle evaluating a complex constant in a CONCAT target. */
10340 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10344 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10345 rtarg
= XEXP (original_target
, 0);
10346 itarg
= XEXP (original_target
, 1);
10348 /* Move the real and imaginary parts separately. */
10349 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10350 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10353 emit_move_insn (rtarg
, op0
);
10355 emit_move_insn (itarg
, op1
);
10357 return original_target
;
10363 temp
= expand_expr_constant (exp
, 1, modifier
);
10365 /* temp contains a constant address.
10366 On RISC machines where a constant address isn't valid,
10367 make some insns to get that address into a register. */
10368 if (modifier
!= EXPAND_CONST_ADDRESS
10369 && modifier
!= EXPAND_INITIALIZER
10370 && modifier
!= EXPAND_SUM
10371 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10372 MEM_ADDR_SPACE (temp
)))
10373 return replace_equiv_address (temp
,
10374 copy_rtx (XEXP (temp
, 0)));
10378 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10382 tree val
= treeop0
;
10383 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10384 inner_reference_p
);
10386 if (!SAVE_EXPR_RESOLVED_P (exp
))
10388 /* We can indeed still hit this case, typically via builtin
10389 expanders calling save_expr immediately before expanding
10390 something. Assume this means that we only have to deal
10391 with non-BLKmode values. */
10392 gcc_assert (GET_MODE (ret
) != BLKmode
);
10394 val
= build_decl (curr_insn_location (),
10395 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10396 DECL_ARTIFICIAL (val
) = 1;
10397 DECL_IGNORED_P (val
) = 1;
10399 TREE_OPERAND (exp
, 0) = treeop0
;
10400 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10402 if (!CONSTANT_P (ret
))
10403 ret
= copy_to_reg (ret
);
10404 SET_DECL_RTL (val
, ret
);
10412 /* If we don't need the result, just ensure we evaluate any
10416 unsigned HOST_WIDE_INT idx
;
10419 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10420 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10425 return expand_constructor (exp
, target
, modifier
, false);
10427 case TARGET_MEM_REF
:
10430 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10431 unsigned int align
;
10433 op0
= addr_for_mem_ref (exp
, as
, true);
10434 op0
= memory_address_addr_space (mode
, op0
, as
);
10435 temp
= gen_rtx_MEM (mode
, op0
);
10436 set_mem_attributes (temp
, exp
, 0);
10437 set_mem_addr_space (temp
, as
);
10438 align
= get_object_alignment (exp
);
10439 if (modifier
!= EXPAND_WRITE
10440 && modifier
!= EXPAND_MEMORY
10442 && align
< GET_MODE_ALIGNMENT (mode
))
10443 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10444 align
, NULL_RTX
, NULL
);
10450 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10452 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10453 machine_mode address_mode
;
10454 tree base
= TREE_OPERAND (exp
, 0);
10457 /* Handle expansion of non-aliased memory with non-BLKmode. That
10458 might end up in a register. */
10459 if (mem_ref_refers_to_non_mem_p (exp
))
10461 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10462 base
= TREE_OPERAND (base
, 0);
10463 poly_uint64 type_size
;
10464 if (known_eq (offset
, 0)
10466 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10467 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10468 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10469 target
, tmode
, modifier
);
10470 if (TYPE_MODE (type
) == BLKmode
)
10472 temp
= assign_stack_temp (DECL_MODE (base
),
10473 GET_MODE_SIZE (DECL_MODE (base
)));
10474 store_expr (base
, temp
, 0, false, false);
10475 temp
= adjust_address (temp
, BLKmode
, offset
);
10476 set_mem_size (temp
, int_size_in_bytes (type
));
10479 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10480 bitsize_int (offset
* BITS_PER_UNIT
));
10481 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10482 return expand_expr (exp
, target
, tmode
, modifier
);
10484 address_mode
= targetm
.addr_space
.address_mode (as
);
10485 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10487 tree mask
= gimple_assign_rhs2 (def_stmt
);
10488 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10489 gimple_assign_rhs1 (def_stmt
), mask
);
10490 TREE_OPERAND (exp
, 0) = base
;
10492 align
= get_object_alignment (exp
);
10493 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10494 op0
= memory_address_addr_space (mode
, op0
, as
);
10495 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10497 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10498 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10499 op0
= memory_address_addr_space (mode
, op0
, as
);
10501 temp
= gen_rtx_MEM (mode
, op0
);
10502 set_mem_attributes (temp
, exp
, 0);
10503 set_mem_addr_space (temp
, as
);
10504 if (TREE_THIS_VOLATILE (exp
))
10505 MEM_VOLATILE_P (temp
) = 1;
10506 if (modifier
!= EXPAND_WRITE
10507 && modifier
!= EXPAND_MEMORY
10508 && !inner_reference_p
10510 && align
< GET_MODE_ALIGNMENT (mode
))
10511 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10512 modifier
== EXPAND_STACK_PARM
10513 ? NULL_RTX
: target
, alt_rtl
);
10515 && modifier
!= EXPAND_MEMORY
10516 && modifier
!= EXPAND_WRITE
)
10517 temp
= flip_storage_order (mode
, temp
);
10524 tree array
= treeop0
;
10525 tree index
= treeop1
;
10528 /* Fold an expression like: "foo"[2].
10529 This is not done in fold so it won't happen inside &.
10530 Don't fold if this is for wide characters since it's too
10531 difficult to do correctly and this is a very rare case. */
10533 if (modifier
!= EXPAND_CONST_ADDRESS
10534 && modifier
!= EXPAND_INITIALIZER
10535 && modifier
!= EXPAND_MEMORY
)
10537 tree t
= fold_read_from_constant_string (exp
);
10540 return expand_expr (t
, target
, tmode
, modifier
);
10543 /* If this is a constant index into a constant array,
10544 just get the value from the array. Handle both the cases when
10545 we have an explicit constructor and when our operand is a variable
10546 that was declared const. */
10548 if (modifier
!= EXPAND_CONST_ADDRESS
10549 && modifier
!= EXPAND_INITIALIZER
10550 && modifier
!= EXPAND_MEMORY
10551 && TREE_CODE (array
) == CONSTRUCTOR
10552 && ! TREE_SIDE_EFFECTS (array
)
10553 && TREE_CODE (index
) == INTEGER_CST
)
10555 unsigned HOST_WIDE_INT ix
;
10558 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10560 if (tree_int_cst_equal (field
, index
))
10562 if (!TREE_SIDE_EFFECTS (value
))
10563 return expand_expr (fold (value
), target
, tmode
, modifier
);
10568 else if (optimize
>= 1
10569 && modifier
!= EXPAND_CONST_ADDRESS
10570 && modifier
!= EXPAND_INITIALIZER
10571 && modifier
!= EXPAND_MEMORY
10572 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10573 && TREE_CODE (index
) == INTEGER_CST
10574 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10575 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10577 if (init
== NULL_TREE
)
10579 tree value
= build_zero_cst (type
);
10580 if (TREE_CODE (value
) == CONSTRUCTOR
)
10582 /* If VALUE is a CONSTRUCTOR, this optimization is only
10583 useful if this doesn't store the CONSTRUCTOR into
10584 memory. If it does, it is more efficient to just
10585 load the data from the array directly. */
10586 rtx ret
= expand_constructor (value
, target
,
10588 if (ret
== NULL_RTX
)
10593 return expand_expr (value
, target
, tmode
, modifier
);
10595 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10597 unsigned HOST_WIDE_INT ix
;
10600 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10602 if (tree_int_cst_equal (field
, index
))
10604 if (TREE_SIDE_EFFECTS (value
))
10607 if (TREE_CODE (value
) == CONSTRUCTOR
)
10609 /* If VALUE is a CONSTRUCTOR, this
10610 optimization is only useful if
10611 this doesn't store the CONSTRUCTOR
10612 into memory. If it does, it is more
10613 efficient to just load the data from
10614 the array directly. */
10615 rtx ret
= expand_constructor (value
, target
,
10617 if (ret
== NULL_RTX
)
10622 expand_expr (fold (value
), target
, tmode
, modifier
);
10625 else if (TREE_CODE (init
) == STRING_CST
)
10627 tree low_bound
= array_ref_low_bound (exp
);
10628 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10630 /* Optimize the special case of a zero lower bound.
10632 We convert the lower bound to sizetype to avoid problems
10633 with constant folding. E.g. suppose the lower bound is
10634 1 and its mode is QI. Without the conversion
10635 (ARRAY + (INDEX - (unsigned char)1))
10637 (ARRAY + (-(unsigned char)1) + INDEX)
10639 (ARRAY + 255 + INDEX). Oops! */
10640 if (!integer_zerop (low_bound
))
10641 index1
= size_diffop_loc (loc
, index1
,
10642 fold_convert_loc (loc
, sizetype
,
10645 if (tree_fits_uhwi_p (index1
)
10646 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10648 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10649 scalar_int_mode char_mode
;
10651 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10652 && GET_MODE_SIZE (char_mode
) == 1)
10653 return gen_int_mode (TREE_STRING_POINTER (init
)
10654 [TREE_INT_CST_LOW (index1
)],
10660 goto normal_inner_ref
;
10662 case COMPONENT_REF
:
10663 /* If the operand is a CONSTRUCTOR, we can just extract the
10664 appropriate field if it is present. */
10665 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10667 unsigned HOST_WIDE_INT idx
;
10669 scalar_int_mode field_mode
;
10671 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10673 if (field
== treeop1
10674 /* We can normally use the value of the field in the
10675 CONSTRUCTOR. However, if this is a bitfield in
10676 an integral mode that we can fit in a HOST_WIDE_INT,
10677 we must mask only the number of bits in the bitfield,
10678 since this is done implicitly by the constructor. If
10679 the bitfield does not meet either of those conditions,
10680 we can't do this optimization. */
10681 && (! DECL_BIT_FIELD (field
)
10682 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10683 && (GET_MODE_PRECISION (field_mode
)
10684 <= HOST_BITS_PER_WIDE_INT
))))
10686 if (DECL_BIT_FIELD (field
)
10687 && modifier
== EXPAND_STACK_PARM
)
10689 op0
= expand_expr (value
, target
, tmode
, modifier
);
10690 if (DECL_BIT_FIELD (field
))
10692 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10693 scalar_int_mode imode
10694 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10696 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10698 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10700 op0
= expand_and (imode
, op0
, op1
, target
);
10704 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10706 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10708 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10716 goto normal_inner_ref
;
10718 case BIT_FIELD_REF
:
10719 case ARRAY_RANGE_REF
:
10722 machine_mode mode1
, mode2
;
10723 poly_int64 bitsize
, bitpos
, bytepos
;
10725 int reversep
, volatilep
= 0, must_force_mem
;
10727 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10728 &unsignedp
, &reversep
, &volatilep
);
10729 rtx orig_op0
, memloc
;
10730 bool clear_mem_expr
= false;
10732 /* If we got back the original object, something is wrong. Perhaps
10733 we are evaluating an expression too early. In any event, don't
10734 infinitely recurse. */
10735 gcc_assert (tem
!= exp
);
10737 /* If TEM's type is a union of variable size, pass TARGET to the inner
10738 computation, since it will need a temporary and TARGET is known
10739 to have to do. This occurs in unchecked conversion in Ada. */
10741 = expand_expr_real (tem
,
10742 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10743 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10744 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10746 && modifier
!= EXPAND_STACK_PARM
10747 ? target
: NULL_RTX
),
10749 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10752 /* If the field has a mode, we want to access it in the
10753 field's mode, not the computed mode.
10754 If a MEM has VOIDmode (external with incomplete type),
10755 use BLKmode for it instead. */
10758 if (mode1
!= VOIDmode
)
10759 op0
= adjust_address (op0
, mode1
, 0);
10760 else if (GET_MODE (op0
) == VOIDmode
)
10761 op0
= adjust_address (op0
, BLKmode
, 0);
10765 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10767 /* Make sure bitpos is not negative, it can wreak havoc later. */
10768 if (maybe_lt (bitpos
, 0))
10770 gcc_checking_assert (offset
== NULL_TREE
);
10771 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10772 bitpos
= num_trailing_bits (bitpos
);
10775 /* If we have either an offset, a BLKmode result, or a reference
10776 outside the underlying object, we must force it to memory.
10777 Such a case can occur in Ada if we have unchecked conversion
10778 of an expression from a scalar type to an aggregate type or
10779 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10780 passed a partially uninitialized object or a view-conversion
10781 to a larger size. */
10782 must_force_mem
= (offset
10783 || mode1
== BLKmode
10784 || (mode
== BLKmode
10785 && !int_mode_for_size (bitsize
, 1).exists ())
10786 || maybe_gt (bitpos
+ bitsize
,
10787 GET_MODE_BITSIZE (mode2
)));
10789 /* Handle CONCAT first. */
10790 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10792 if (known_eq (bitpos
, 0)
10793 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10794 && COMPLEX_MODE_P (mode1
)
10795 && COMPLEX_MODE_P (GET_MODE (op0
))
10796 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10797 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10800 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10801 if (mode1
!= GET_MODE (op0
))
10804 for (int i
= 0; i
< 2; i
++)
10806 rtx op
= read_complex_part (op0
, i
!= 0);
10807 if (GET_CODE (op
) == SUBREG
)
10808 op
= force_reg (GET_MODE (op
), op
);
10809 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10814 if (!REG_P (op
) && !MEM_P (op
))
10815 op
= force_reg (GET_MODE (op
), op
);
10816 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10820 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10824 if (known_eq (bitpos
, 0)
10825 && known_eq (bitsize
,
10826 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10827 && maybe_ne (bitsize
, 0))
10829 op0
= XEXP (op0
, 0);
10830 mode2
= GET_MODE (op0
);
10832 else if (known_eq (bitpos
,
10833 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10834 && known_eq (bitsize
,
10835 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10836 && maybe_ne (bitpos
, 0)
10837 && maybe_ne (bitsize
, 0))
10839 op0
= XEXP (op0
, 1);
10841 mode2
= GET_MODE (op0
);
10844 /* Otherwise force into memory. */
10845 must_force_mem
= 1;
10848 /* If this is a constant, put it in a register if it is a legitimate
10849 constant and we don't need a memory reference. */
10850 if (CONSTANT_P (op0
)
10851 && mode2
!= BLKmode
10852 && targetm
.legitimate_constant_p (mode2
, op0
)
10853 && !must_force_mem
)
10854 op0
= force_reg (mode2
, op0
);
10856 /* Otherwise, if this is a constant, try to force it to the constant
10857 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10858 is a legitimate constant. */
10859 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10860 op0
= validize_mem (memloc
);
10862 /* Otherwise, if this is a constant or the object is not in memory
10863 and need be, put it there. */
10864 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10866 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10867 emit_move_insn (memloc
, op0
);
10869 clear_mem_expr
= true;
10874 machine_mode address_mode
;
10875 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10878 gcc_assert (MEM_P (op0
));
10880 address_mode
= get_address_mode (op0
);
10881 if (GET_MODE (offset_rtx
) != address_mode
)
10883 /* We cannot be sure that the RTL in offset_rtx is valid outside
10884 of a memory address context, so force it into a register
10885 before attempting to convert it to the desired mode. */
10886 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10887 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10890 /* See the comment in expand_assignment for the rationale. */
10891 if (mode1
!= VOIDmode
10892 && maybe_ne (bitpos
, 0)
10893 && maybe_gt (bitsize
, 0)
10894 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10895 && multiple_p (bitpos
, bitsize
)
10896 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10897 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10899 op0
= adjust_address (op0
, mode1
, bytepos
);
10903 op0
= offset_address (op0
, offset_rtx
,
10904 highest_pow2_factor (offset
));
10907 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10908 record its alignment as BIGGEST_ALIGNMENT. */
10910 && known_eq (bitpos
, 0)
10912 && is_aligning_offset (offset
, tem
))
10913 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10915 /* Don't forget about volatility even if this is a bitfield. */
10916 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10918 if (op0
== orig_op0
)
10919 op0
= copy_rtx (op0
);
10921 MEM_VOLATILE_P (op0
) = 1;
10924 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
10926 if (op0
== orig_op0
)
10927 op0
= copy_rtx (op0
);
10929 set_mem_align (op0
, BITS_PER_UNIT
);
10932 /* In cases where an aligned union has an unaligned object
10933 as a field, we might be extracting a BLKmode value from
10934 an integer-mode (e.g., SImode) object. Handle this case
10935 by doing the extract into an object as wide as the field
10936 (which we know to be the width of a basic mode), then
10937 storing into memory, and changing the mode to BLKmode. */
10938 if (mode1
== VOIDmode
10939 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10940 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10941 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10942 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10943 && modifier
!= EXPAND_CONST_ADDRESS
10944 && modifier
!= EXPAND_INITIALIZER
10945 && modifier
!= EXPAND_MEMORY
)
10946 /* If the bitfield is volatile and the bitsize
10947 is narrower than the access size of the bitfield,
10948 we need to extract bitfields from the access. */
10949 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10950 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10951 && mode1
!= BLKmode
10952 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10953 /* If the field isn't aligned enough to fetch as a memref,
10954 fetch it as a bit field. */
10955 || (mode1
!= BLKmode
10957 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10958 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10959 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10960 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10961 && modifier
!= EXPAND_MEMORY
10962 && ((modifier
== EXPAND_CONST_ADDRESS
10963 || modifier
== EXPAND_INITIALIZER
)
10965 : targetm
.slow_unaligned_access (mode1
,
10967 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10968 /* If the type and the field are a constant size and the
10969 size of the type isn't the same size as the bitfield,
10970 we must use bitfield operations. */
10971 || (known_size_p (bitsize
)
10972 && TYPE_SIZE (TREE_TYPE (exp
))
10973 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10974 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10977 machine_mode ext_mode
= mode
;
10979 if (ext_mode
== BLKmode
10980 && ! (target
!= 0 && MEM_P (op0
)
10982 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10983 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10985 if (ext_mode
== BLKmode
)
10988 target
= assign_temp (type
, 1, 1);
10990 /* ??? Unlike the similar test a few lines below, this one is
10991 very likely obsolete. */
10992 if (known_eq (bitsize
, 0))
10995 /* In this case, BITPOS must start at a byte boundary and
10996 TARGET, if specified, must be a MEM. */
10997 gcc_assert (MEM_P (op0
)
10998 && (!target
|| MEM_P (target
)));
11000 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11001 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11002 emit_block_move (target
,
11003 adjust_address (op0
, VOIDmode
, bytepos
),
11004 gen_int_mode (bytesize
, Pmode
),
11005 (modifier
== EXPAND_STACK_PARM
11006 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11011 /* If we have nothing to extract, the result will be 0 for targets
11012 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11013 return 0 for the sake of consistency, as reading a zero-sized
11014 bitfield is valid in Ada and the value is fully specified. */
11015 if (known_eq (bitsize
, 0))
11018 op0
= validize_mem (op0
);
11020 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11021 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11023 /* If the result has aggregate type and the extraction is done in
11024 an integral mode, then the field may be not aligned on a byte
11025 boundary; in this case, if it has reverse storage order, it
11026 needs to be extracted as a scalar field with reverse storage
11027 order and put back into memory order afterwards. */
11028 if (AGGREGATE_TYPE_P (type
)
11029 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11030 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11032 gcc_checking_assert (known_ge (bitpos
, 0));
11033 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11034 (modifier
== EXPAND_STACK_PARM
11035 ? NULL_RTX
: target
),
11036 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11038 /* If the result has aggregate type and the mode of OP0 is an
11039 integral mode then, if BITSIZE is narrower than this mode
11040 and this is for big-endian data, we must put the field
11041 into the high-order bits. And we must also put it back
11042 into memory order if it has been previously reversed. */
11043 scalar_int_mode op0_mode
;
11044 if (AGGREGATE_TYPE_P (type
)
11045 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11047 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11049 gcc_checking_assert (known_le (bitsize
, size
));
11050 if (maybe_lt (bitsize
, size
)
11051 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11052 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11053 size
- bitsize
, op0
, 1);
11056 op0
= flip_storage_order (op0_mode
, op0
);
11059 /* If the result type is BLKmode, store the data into a temporary
11060 of the appropriate type, but with the mode corresponding to the
11061 mode for the data we have (op0's mode). */
11062 if (mode
== BLKmode
)
11065 = assign_stack_temp_for_type (ext_mode
,
11066 GET_MODE_BITSIZE (ext_mode
),
11068 emit_move_insn (new_rtx
, op0
);
11069 op0
= copy_rtx (new_rtx
);
11070 PUT_MODE (op0
, BLKmode
);
11076 /* If the result is BLKmode, use that to access the object
11078 if (mode
== BLKmode
)
11081 /* Get a reference to just this component. */
11082 bytepos
= bits_to_bytes_round_down (bitpos
);
11083 if (modifier
== EXPAND_CONST_ADDRESS
11084 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11085 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11087 op0
= adjust_address (op0
, mode1
, bytepos
);
11089 if (op0
== orig_op0
)
11090 op0
= copy_rtx (op0
);
11092 /* Don't set memory attributes if the base expression is
11093 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11094 we should just honor its original memory attributes. */
11095 if (!(TREE_CODE (tem
) == SSA_NAME
11096 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11097 set_mem_attributes (op0
, exp
, 0);
11099 if (REG_P (XEXP (op0
, 0)))
11100 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11102 /* If op0 is a temporary because the original expressions was forced
11103 to memory, clear MEM_EXPR so that the original expression cannot
11104 be marked as addressable through MEM_EXPR of the temporary. */
11105 if (clear_mem_expr
)
11106 set_mem_expr (op0
, NULL_TREE
);
11108 MEM_VOLATILE_P (op0
) |= volatilep
;
11111 && modifier
!= EXPAND_MEMORY
11112 && modifier
!= EXPAND_WRITE
)
11113 op0
= flip_storage_order (mode1
, op0
);
11115 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11116 || modifier
== EXPAND_CONST_ADDRESS
11117 || modifier
== EXPAND_INITIALIZER
)
11121 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11123 convert_move (target
, op0
, unsignedp
);
11128 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11131 /* All valid uses of __builtin_va_arg_pack () are removed during
11133 if (CALL_EXPR_VA_ARG_PACK (exp
))
11134 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11136 tree fndecl
= get_callee_fndecl (exp
), attr
;
11139 /* Don't diagnose the error attribute in thunks, those are
11140 artificially created. */
11141 && !CALL_FROM_THUNK_P (exp
)
11142 && (attr
= lookup_attribute ("error",
11143 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11145 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11146 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11147 identifier_to_locale (ident
),
11148 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11151 /* Don't diagnose the warning attribute in thunks, those are
11152 artificially created. */
11153 && !CALL_FROM_THUNK_P (exp
)
11154 && (attr
= lookup_attribute ("warning",
11155 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11157 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11158 warning_at (tree_nonartificial_location (exp
),
11159 OPT_Wattribute_warning
,
11160 "%Kcall to %qs declared with attribute warning: %s",
11161 exp
, identifier_to_locale (ident
),
11162 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11165 /* Check for a built-in function. */
11166 if (fndecl
&& fndecl_built_in_p (fndecl
))
11168 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11169 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11172 return expand_call (exp
, target
, ignore
);
11174 case VIEW_CONVERT_EXPR
:
11177 /* If we are converting to BLKmode, try to avoid an intermediate
11178 temporary by fetching an inner memory reference. */
11179 if (mode
== BLKmode
11180 && poly_int_tree_p (TYPE_SIZE (type
))
11181 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11182 && handled_component_p (treeop0
))
11184 machine_mode mode1
;
11185 poly_int64 bitsize
, bitpos
, bytepos
;
11187 int reversep
, volatilep
= 0;
11189 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11190 &unsignedp
, &reversep
, &volatilep
);
11192 /* ??? We should work harder and deal with non-zero offsets. */
11194 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11196 && known_size_p (bitsize
)
11197 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11199 /* See the normal_inner_ref case for the rationale. */
11201 = expand_expr_real (tem
,
11202 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11203 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11205 && modifier
!= EXPAND_STACK_PARM
11206 ? target
: NULL_RTX
),
11208 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11211 if (MEM_P (orig_op0
))
11215 /* Get a reference to just this component. */
11216 if (modifier
== EXPAND_CONST_ADDRESS
11217 || modifier
== EXPAND_SUM
11218 || modifier
== EXPAND_INITIALIZER
)
11219 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11221 op0
= adjust_address (op0
, mode
, bytepos
);
11223 if (op0
== orig_op0
)
11224 op0
= copy_rtx (op0
);
11226 set_mem_attributes (op0
, treeop0
, 0);
11227 if (REG_P (XEXP (op0
, 0)))
11228 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11230 MEM_VOLATILE_P (op0
) |= volatilep
;
11236 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11237 NULL
, inner_reference_p
);
11239 /* If the input and output modes are both the same, we are done. */
11240 if (mode
== GET_MODE (op0
))
11242 /* If neither mode is BLKmode, and both modes are the same size
11243 then we can use gen_lowpart. */
11244 else if (mode
!= BLKmode
11245 && GET_MODE (op0
) != BLKmode
11246 && known_eq (GET_MODE_PRECISION (mode
),
11247 GET_MODE_PRECISION (GET_MODE (op0
)))
11248 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11250 if (GET_CODE (op0
) == SUBREG
)
11251 op0
= force_reg (GET_MODE (op0
), op0
);
11252 temp
= gen_lowpart_common (mode
, op0
);
11257 if (!REG_P (op0
) && !MEM_P (op0
))
11258 op0
= force_reg (GET_MODE (op0
), op0
);
11259 op0
= gen_lowpart (mode
, op0
);
11262 /* If both types are integral, convert from one mode to the other. */
11263 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11264 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11265 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11266 /* If the output type is a bit-field type, do an extraction. */
11267 else if (reduce_bit_field
)
11268 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11269 TYPE_UNSIGNED (type
), NULL_RTX
,
11270 mode
, mode
, false, NULL
);
11271 /* As a last resort, spill op0 to memory, and reload it in a
11273 else if (!MEM_P (op0
))
11275 /* If the operand is not a MEM, force it into memory. Since we
11276 are going to be changing the mode of the MEM, don't call
11277 force_const_mem for constants because we don't allow pool
11278 constants to change mode. */
11279 tree inner_type
= TREE_TYPE (treeop0
);
11281 gcc_assert (!TREE_ADDRESSABLE (exp
));
11283 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11285 = assign_stack_temp_for_type
11286 (TYPE_MODE (inner_type
),
11287 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11289 emit_move_insn (target
, op0
);
11293 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11294 output type is such that the operand is known to be aligned, indicate
11295 that it is. Otherwise, we need only be concerned about alignment for
11296 non-BLKmode results. */
11299 enum insn_code icode
;
11301 if (modifier
!= EXPAND_WRITE
11302 && modifier
!= EXPAND_MEMORY
11303 && !inner_reference_p
11305 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11307 /* If the target does have special handling for unaligned
11308 loads of mode then use them. */
11309 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11310 != CODE_FOR_nothing
)
11314 op0
= adjust_address (op0
, mode
, 0);
11315 /* We've already validated the memory, and we're creating a
11316 new pseudo destination. The predicates really can't
11318 reg
= gen_reg_rtx (mode
);
11320 /* Nor can the insn generator. */
11321 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11325 else if (STRICT_ALIGNMENT
)
11327 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11328 poly_uint64 temp_size
= mode_size
;
11329 if (GET_MODE (op0
) != BLKmode
)
11330 temp_size
= upper_bound (temp_size
,
11331 GET_MODE_SIZE (GET_MODE (op0
)));
11333 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11334 rtx new_with_op0_mode
11335 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11337 gcc_assert (!TREE_ADDRESSABLE (exp
));
11339 if (GET_MODE (op0
) == BLKmode
)
11341 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11342 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11343 (modifier
== EXPAND_STACK_PARM
11344 ? BLOCK_OP_CALL_PARM
11345 : BLOCK_OP_NORMAL
));
11348 emit_move_insn (new_with_op0_mode
, op0
);
11354 op0
= adjust_address (op0
, mode
, 0);
11361 tree lhs
= treeop0
;
11362 tree rhs
= treeop1
;
11363 gcc_assert (ignore
);
11365 /* Check for |= or &= of a bitfield of size one into another bitfield
11366 of size 1. In this case, (unless we need the result of the
11367 assignment) we can do this more efficiently with a
11368 test followed by an assignment, if necessary.
11370 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11371 things change so we do, this code should be enhanced to
11373 if (TREE_CODE (lhs
) == COMPONENT_REF
11374 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11375 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11376 && TREE_OPERAND (rhs
, 0) == lhs
11377 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11378 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11379 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11381 rtx_code_label
*label
= gen_label_rtx ();
11382 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11383 profile_probability prob
= profile_probability::uninitialized ();
11385 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11387 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11388 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11390 do_pending_stack_adjust ();
11391 emit_label (label
);
11395 expand_assignment (lhs
, rhs
, false);
11400 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11402 case REALPART_EXPR
:
11403 op0
= expand_normal (treeop0
);
11404 return read_complex_part (op0
, false);
11406 case IMAGPART_EXPR
:
11407 op0
= expand_normal (treeop0
);
11408 return read_complex_part (op0
, true);
11415 /* Expanded in cfgexpand.c. */
11416 gcc_unreachable ();
11418 case TRY_CATCH_EXPR
:
11420 case EH_FILTER_EXPR
:
11421 case TRY_FINALLY_EXPR
:
11423 /* Lowered by tree-eh.c. */
11424 gcc_unreachable ();
11426 case WITH_CLEANUP_EXPR
:
11427 case CLEANUP_POINT_EXPR
:
11429 case CASE_LABEL_EXPR
:
11434 case COMPOUND_EXPR
:
11435 case PREINCREMENT_EXPR
:
11436 case PREDECREMENT_EXPR
:
11437 case POSTINCREMENT_EXPR
:
11438 case POSTDECREMENT_EXPR
:
11441 case COMPOUND_LITERAL_EXPR
:
11442 /* Lowered by gimplify.c. */
11443 gcc_unreachable ();
11446 /* Function descriptors are not valid except for as
11447 initialization constants, and should not be expanded. */
11448 gcc_unreachable ();
11450 case WITH_SIZE_EXPR
:
11451 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11452 have pulled out the size to use in whatever context it needed. */
11453 return expand_expr_real (treeop0
, original_target
, tmode
,
11454 modifier
, alt_rtl
, inner_reference_p
);
11457 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11461 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11462 signedness of TYPE), possibly returning the result in TARGET.
11463 TYPE is known to be a partial integer type. */
11465 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11467 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11468 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11470 /* For constant values, reduce using build_int_cst_type. */
11471 poly_int64 const_exp
;
11472 if (poly_int_rtx_p (exp
, &const_exp
))
11474 tree t
= build_int_cst_type (type
, const_exp
);
11475 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11477 else if (TYPE_UNSIGNED (type
))
11479 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11480 rtx mask
= immed_wide_int_const
11481 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11482 return expand_and (mode
, exp
, mask
, target
);
11486 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11487 int count
= GET_MODE_PRECISION (mode
) - prec
;
11488 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11489 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11493 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11494 when applied to the address of EXP produces an address known to be
11495 aligned more than BIGGEST_ALIGNMENT. */
11498 is_aligning_offset (const_tree offset
, const_tree exp
)
11500 /* Strip off any conversions. */
11501 while (CONVERT_EXPR_P (offset
))
11502 offset
= TREE_OPERAND (offset
, 0);
11504 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11505 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11506 if (TREE_CODE (offset
) != BIT_AND_EXPR
11507 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11508 || compare_tree_int (TREE_OPERAND (offset
, 1),
11509 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11510 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11513 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11514 It must be NEGATE_EXPR. Then strip any more conversions. */
11515 offset
= TREE_OPERAND (offset
, 0);
11516 while (CONVERT_EXPR_P (offset
))
11517 offset
= TREE_OPERAND (offset
, 0);
11519 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11522 offset
= TREE_OPERAND (offset
, 0);
11523 while (CONVERT_EXPR_P (offset
))
11524 offset
= TREE_OPERAND (offset
, 0);
11526 /* This must now be the address of EXP. */
11527 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11530 /* Return the tree node if an ARG corresponds to a string constant or zero
11531 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11532 non-constant) offset in bytes within the string that ARG is accessing.
11533 If MEM_SIZE is non-zero the storage size of the memory is returned.
11534 If DECL is non-zero the constant declaration is returned if available. */
11537 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11539 tree dummy
= NULL_TREE
;;
11543 /* Store the type of the original expression before conversions
11544 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11546 tree argtype
= TREE_TYPE (arg
);
11551 /* Non-constant index into the character array in an ARRAY_REF
11552 expression or null. */
11553 tree varidx
= NULL_TREE
;
11555 poly_int64 base_off
= 0;
11557 if (TREE_CODE (arg
) == ADDR_EXPR
)
11559 arg
= TREE_OPERAND (arg
, 0);
11561 if (TREE_CODE (arg
) == ARRAY_REF
)
11563 tree idx
= TREE_OPERAND (arg
, 1);
11564 if (TREE_CODE (idx
) != INTEGER_CST
)
11566 /* From a pointer (but not array) argument extract the variable
11567 index to prevent get_addr_base_and_unit_offset() from failing
11568 due to it. Use it later to compute the non-constant offset
11569 into the string and return it to the caller. */
11571 ref
= TREE_OPERAND (arg
, 0);
11573 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11576 if (!integer_zerop (array_ref_low_bound (arg
)))
11579 if (!integer_onep (array_ref_element_size (arg
)))
11583 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11585 || (TREE_CODE (array
) != VAR_DECL
11586 && TREE_CODE (array
) != CONST_DECL
11587 && TREE_CODE (array
) != STRING_CST
))
11590 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11592 tree arg0
= TREE_OPERAND (arg
, 0);
11593 tree arg1
= TREE_OPERAND (arg
, 1);
11596 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11599 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11605 /* Avoid pointers to arrays (see bug 86622). */
11606 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11607 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11608 && !(decl
&& !*decl
)
11609 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11610 && tree_fits_uhwi_p (*mem_size
)
11611 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11614 tree type
= TREE_TYPE (offset
);
11615 arg1
= fold_convert (type
, arg1
);
11616 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11621 else if (TREE_CODE (arg
) == SSA_NAME
)
11623 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11624 if (!is_gimple_assign (stmt
))
11627 tree rhs1
= gimple_assign_rhs1 (stmt
);
11628 tree_code code
= gimple_assign_rhs_code (stmt
);
11629 if (code
== ADDR_EXPR
)
11630 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11631 else if (code
!= POINTER_PLUS_EXPR
)
11635 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11637 /* Avoid pointers to arrays (see bug 86622). */
11638 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11639 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11640 && !(decl
&& !*decl
)
11641 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11642 && tree_fits_uhwi_p (*mem_size
)
11643 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11646 tree rhs2
= gimple_assign_rhs2 (stmt
);
11647 tree type
= TREE_TYPE (offset
);
11648 rhs2
= fold_convert (type
, rhs2
);
11649 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11654 else if (DECL_P (arg
))
11659 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11662 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11665 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11666 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11667 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11670 offset
= fold_convert (sizetype
, varidx
);
11673 if (TREE_CODE (array
) == STRING_CST
)
11675 *ptr_offset
= fold_convert (sizetype
, offset
);
11676 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11679 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11680 >= TREE_STRING_LENGTH (array
));
11684 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11687 tree init
= ctor_for_folding (array
);
11689 /* Handle variables initialized with string literals. */
11690 if (!init
|| init
== error_mark_node
)
11692 if (TREE_CODE (init
) == CONSTRUCTOR
)
11694 /* Convert the 64-bit constant offset to a wider type to avoid
11697 if (!base_off
.is_constant (&wioff
))
11700 wioff
*= BITS_PER_UNIT
;
11701 if (!wi::fits_uhwi_p (wioff
))
11704 base_off
= wioff
.to_uhwi ();
11705 unsigned HOST_WIDE_INT fieldoff
= 0;
11706 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11708 HOST_WIDE_INT cstoff
;
11709 if (!base_off
.is_constant (&cstoff
))
11712 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11713 tree off
= build_int_cst (sizetype
, cstoff
);
11715 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11723 *ptr_offset
= offset
;
11725 tree inittype
= TREE_TYPE (init
);
11727 if (TREE_CODE (init
) == INTEGER_CST
11728 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11729 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11731 /* For a reference to (address of) a single constant character,
11732 store the native representation of the character in CHARBUF.
11733 If the reference is to an element of an array or a member
11734 of a struct, only consider narrow characters until ctors
11735 for wide character arrays are transformed to STRING_CSTs
11736 like those for narrow arrays. */
11737 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11738 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11741 /* Construct a string literal with elements of INITTYPE and
11742 the representation above. Then strip
11743 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11744 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11745 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11749 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11751 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11753 /* Fold an empty/zero constructor for an implicitly initialized
11754 object or subobject into the empty string. */
11756 /* Determine the character type from that of the original
11758 tree chartype
= argtype
;
11759 if (POINTER_TYPE_P (chartype
))
11760 chartype
= TREE_TYPE (chartype
);
11761 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11762 chartype
= TREE_TYPE (chartype
);
11763 /* Convert a char array to an empty STRING_CST having an array
11764 of the expected type. */
11766 initsize
= integer_zero_node
;
11768 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11769 init
= build_string_literal (size
? 1 : 0, "", chartype
, size
);
11770 init
= TREE_OPERAND (init
, 0);
11771 init
= TREE_OPERAND (init
, 0);
11773 *ptr_offset
= integer_zero_node
;
11779 if (TREE_CODE (init
) != STRING_CST
)
11782 *mem_size
= initsize
;
11784 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11789 /* Compute the modular multiplicative inverse of A modulo M
11790 using extended Euclid's algorithm. Assumes A and M are coprime. */
11792 mod_inv (const wide_int
&a
, const wide_int
&b
)
11794 /* Verify the assumption. */
11795 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11797 unsigned int p
= a
.get_precision () + 1;
11798 gcc_checking_assert (b
.get_precision () + 1 == p
);
11799 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11800 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11801 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11802 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11804 if (wi::eq_p (b
, 1))
11805 return wide_int::from (1, p
, UNSIGNED
);
11807 while (wi::gt_p (c
, 1, UNSIGNED
))
11810 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11813 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11816 if (wi::lt_p (x1
, 0, SIGNED
))
11821 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11822 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11823 for C2 > 0 to x & C3 == C2
11824 for C2 < 0 to x & C3 == (C2 & C3). */
11826 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11828 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11829 tree treeop0
= gimple_assign_rhs1 (stmt
);
11830 tree treeop1
= gimple_assign_rhs2 (stmt
);
11831 tree type
= TREE_TYPE (*arg0
);
11832 scalar_int_mode mode
;
11833 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11835 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11836 || TYPE_PRECISION (type
) <= 1
11837 || TYPE_UNSIGNED (type
)
11838 /* Signed x % c == 0 should have been optimized into unsigned modulo
11840 || integer_zerop (*arg1
)
11841 /* If c is known to be non-negative, modulo will be expanded as unsigned
11843 || get_range_pos_neg (treeop0
) == 1)
11846 /* x % c == d where d < 0 && d <= -c should be always false. */
11847 if (tree_int_cst_sgn (*arg1
) == -1
11848 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11851 int prec
= TYPE_PRECISION (type
);
11852 wide_int w
= wi::to_wide (treeop1
) - 1;
11853 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11854 tree c3
= wide_int_to_tree (type
, w
);
11856 if (tree_int_cst_sgn (*arg1
) == -1)
11857 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11859 rtx op0
= expand_normal (treeop0
);
11860 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11862 bool speed_p
= optimize_insn_for_speed_p ();
11864 do_pending_stack_adjust ();
11866 location_t loc
= gimple_location (stmt
);
11867 struct separate_ops ops
;
11868 ops
.code
= TRUNC_MOD_EXPR
;
11869 ops
.location
= loc
;
11870 ops
.type
= TREE_TYPE (treeop0
);
11873 ops
.op2
= NULL_TREE
;
11875 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11877 rtx_insn
*moinsns
= get_insns ();
11880 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11881 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11882 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11884 ops
.code
= BIT_AND_EXPR
;
11885 ops
.location
= loc
;
11886 ops
.type
= TREE_TYPE (treeop0
);
11889 ops
.op2
= NULL_TREE
;
11891 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11893 rtx_insn
*muinsns
= get_insns ();
11896 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11897 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11898 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11900 if (mocost
<= mucost
)
11902 emit_insn (moinsns
);
11903 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11907 emit_insn (muinsns
);
11908 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11913 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11915 (X - C2) * C3 <= C4 (or >), where
11916 C3 is modular multiplicative inverse of C1 and 1<<prec and
11917 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11918 if C2 > ((1<<prec) - 1) % C1).
11919 If C1 is even, S = ctz (C1) and C2 is 0, use
11920 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11921 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11923 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11925 (X * C3) + C4 <= 2 * C4, where
11926 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11927 C4 is ((1<<(prec - 1) - 1) / C1).
11928 If C1 is even, S = ctz(C1), use
11929 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11930 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11931 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11933 See the Hacker's Delight book, section 10-17. */
11935 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11937 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11938 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11943 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11947 tree treeop0
= gimple_assign_rhs1 (stmt
);
11948 tree treeop1
= gimple_assign_rhs2 (stmt
);
11949 if (TREE_CODE (treeop0
) != SSA_NAME
11950 || TREE_CODE (treeop1
) != INTEGER_CST
11951 /* Don't optimize the undefined behavior case x % 0;
11952 x % 1 should have been optimized into zero, punt if
11953 it makes it here for whatever reason;
11954 x % -c should have been optimized into x % c. */
11955 || compare_tree_int (treeop1
, 2) <= 0
11956 /* Likewise x % c == d where d >= c should be always false. */
11957 || tree_int_cst_le (treeop1
, *arg1
))
11960 /* Unsigned x % pow2 is handled right already, for signed
11961 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11962 if (integer_pow2p (treeop1
))
11963 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11965 tree type
= TREE_TYPE (*arg0
);
11966 scalar_int_mode mode
;
11967 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11969 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11970 || TYPE_PRECISION (type
) <= 1)
11973 signop sgn
= UNSIGNED
;
11974 /* If both operands are known to have the sign bit clear, handle
11975 even the signed modulo case as unsigned. treeop1 is always
11976 positive >= 2, checked above. */
11977 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11980 if (!TYPE_UNSIGNED (type
))
11982 if (tree_int_cst_sgn (*arg1
) == -1)
11984 type
= unsigned_type_for (type
);
11985 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11989 int prec
= TYPE_PRECISION (type
);
11990 wide_int w
= wi::to_wide (treeop1
);
11991 int shift
= wi::ctz (w
);
11992 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11993 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11994 If C1 is odd, we can handle all cases by subtracting
11995 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11996 e.g. by testing for overflow on the subtraction, punt on that for now
11998 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12002 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12003 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12007 imm_use_iterator imm_iter
;
12008 use_operand_p use_p
;
12009 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12011 gimple
*use_stmt
= USE_STMT (use_p
);
12012 /* Punt if treeop0 is used in the same bb in a division
12013 or another modulo with the same divisor. We should expect
12014 the division and modulo combined together. */
12015 if (use_stmt
== stmt
12016 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12018 if (!is_gimple_assign (use_stmt
)
12019 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12020 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12022 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12023 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12028 w
= wi::lrshift (w
, shift
);
12029 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12030 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12031 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
12032 tree c3
= wide_int_to_tree (type
, m
);
12033 tree c5
= NULL_TREE
;
12035 if (sgn
== UNSIGNED
)
12037 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12038 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12039 otherwise use < or subtract one from C4. E.g. for
12040 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12041 x % 3U == 1 already needs to be
12042 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12043 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12046 d
= wi::lrshift (d
, shift
);
12050 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12052 d
= wi::lshift (e
, 1);
12055 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12056 d
= wi::lrshift (e
, shift
- 1);
12058 c5
= wide_int_to_tree (type
, e
);
12060 tree c4
= wide_int_to_tree (type
, d
);
12062 rtx op0
= expand_normal (treeop0
);
12063 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12065 bool speed_p
= optimize_insn_for_speed_p ();
12067 do_pending_stack_adjust ();
12069 location_t loc
= gimple_location (stmt
);
12070 struct separate_ops ops
;
12071 ops
.code
= TRUNC_MOD_EXPR
;
12072 ops
.location
= loc
;
12073 ops
.type
= TREE_TYPE (treeop0
);
12076 ops
.op2
= NULL_TREE
;
12078 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12080 rtx_insn
*moinsns
= get_insns ();
12083 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12084 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12085 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12087 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12088 if (!integer_zerop (*arg1
))
12089 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12090 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12092 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12095 tree s
= build_int_cst (NULL_TREE
, shift
);
12096 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12100 rtx mur
= expand_normal (t
);
12101 rtx_insn
*muinsns
= get_insns ();
12104 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12105 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12106 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12108 if (mocost
<= mucost
)
12110 emit_insn (moinsns
);
12111 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12115 emit_insn (muinsns
);
12116 *arg0
= make_tree (type
, mur
);
12118 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12121 /* Generate code to calculate OPS, and exploded expression
12122 using a store-flag instruction and return an rtx for the result.
12123 OPS reflects a comparison.
12125 If TARGET is nonzero, store the result there if convenient.
12127 Return zero if there is no suitable set-flag instruction
12128 available on this machine.
12130 Once expand_expr has been called on the arguments of the comparison,
12131 we are committed to doing the store flag, since it is not safe to
12132 re-evaluate the expression. We emit the store-flag insn by calling
12133 emit_store_flag, but only expand the arguments if we have a reason
12134 to believe that emit_store_flag will be successful. If we think that
12135 it will, but it isn't, we have to simulate the store-flag with a
12136 set/jump/set sequence. */
12139 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12141 enum rtx_code code
;
12142 tree arg0
, arg1
, type
;
12143 machine_mode operand_mode
;
12146 rtx subtarget
= target
;
12147 location_t loc
= ops
->location
;
12152 /* Don't crash if the comparison was erroneous. */
12153 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12156 type
= TREE_TYPE (arg0
);
12157 operand_mode
= TYPE_MODE (type
);
12158 unsignedp
= TYPE_UNSIGNED (type
);
12160 /* We won't bother with BLKmode store-flag operations because it would mean
12161 passing a lot of information to emit_store_flag. */
12162 if (operand_mode
== BLKmode
)
12165 /* We won't bother with store-flag operations involving function pointers
12166 when function pointers must be canonicalized before comparisons. */
12167 if (targetm
.have_canonicalize_funcptr_for_compare ()
12168 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12169 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12170 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12171 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12177 /* For vector typed comparisons emit code to generate the desired
12178 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12179 expander for this. */
12180 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12182 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12183 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12184 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12185 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12188 tree if_true
= constant_boolean_node (true, ops
->type
);
12189 tree if_false
= constant_boolean_node (false, ops
->type
);
12190 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12195 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12196 into (x - C2) * C3 < C4. */
12197 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12198 && TREE_CODE (arg0
) == SSA_NAME
12199 && TREE_CODE (arg1
) == INTEGER_CST
)
12201 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12203 if (new_code
!= ops
->code
)
12205 struct separate_ops nops
= *ops
;
12206 nops
.code
= ops
->code
= new_code
;
12209 nops
.type
= TREE_TYPE (arg0
);
12210 return do_store_flag (&nops
, target
, mode
);
12214 /* Get the rtx comparison code to use. We know that EXP is a comparison
12215 operation of some type. Some comparisons against 1 and -1 can be
12216 converted to comparisons with zero. Do so here so that the tests
12217 below will be aware that we have a comparison with zero. These
12218 tests will not catch constants in the first operand, but constants
12219 are rarely passed as the first operand. */
12230 if (integer_onep (arg1
))
12231 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12233 code
= unsignedp
? LTU
: LT
;
12236 if (! unsignedp
&& integer_all_onesp (arg1
))
12237 arg1
= integer_zero_node
, code
= LT
;
12239 code
= unsignedp
? LEU
: LE
;
12242 if (! unsignedp
&& integer_all_onesp (arg1
))
12243 arg1
= integer_zero_node
, code
= GE
;
12245 code
= unsignedp
? GTU
: GT
;
12248 if (integer_onep (arg1
))
12249 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12251 code
= unsignedp
? GEU
: GE
;
12254 case UNORDERED_EXPR
:
12280 gcc_unreachable ();
12283 /* Put a constant second. */
12284 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12285 || TREE_CODE (arg0
) == FIXED_CST
)
12287 std::swap (arg0
, arg1
);
12288 code
= swap_condition (code
);
12291 /* If this is an equality or inequality test of a single bit, we can
12292 do this by shifting the bit being tested to the low-order bit and
12293 masking the result with the constant 1. If the condition was EQ,
12294 we xor it with 1. This does not require an scc insn and is faster
12295 than an scc insn even if we have it.
12297 The code to make this transformation was moved into fold_single_bit_test,
12298 so we just call into the folder and expand its result. */
12300 if ((code
== NE
|| code
== EQ
)
12301 && integer_zerop (arg1
)
12302 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12304 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12306 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12308 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12309 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12310 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12311 gimple_assign_rhs1 (srcstmt
),
12312 gimple_assign_rhs2 (srcstmt
));
12313 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12315 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12319 if (! get_subtarget (target
)
12320 || GET_MODE (subtarget
) != operand_mode
)
12323 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12326 target
= gen_reg_rtx (mode
);
12328 /* Try a cstore if possible. */
12329 return emit_store_flag_force (target
, code
, op0
, op1
,
12330 operand_mode
, unsignedp
,
12331 (TYPE_PRECISION (ops
->type
) == 1
12332 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12335 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12336 0 otherwise (i.e. if there is no casesi instruction).
12338 DEFAULT_PROBABILITY is the probability of jumping to the default
12341 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12342 rtx table_label
, rtx default_label
, rtx fallback_label
,
12343 profile_probability default_probability
)
12345 class expand_operand ops
[5];
12346 scalar_int_mode index_mode
= SImode
;
12347 rtx op1
, op2
, index
;
12349 if (! targetm
.have_casesi ())
12352 /* The index must be some form of integer. Convert it to SImode. */
12353 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12354 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12356 rtx rangertx
= expand_normal (range
);
12358 /* We must handle the endpoints in the original mode. */
12359 index_expr
= build2 (MINUS_EXPR
, index_type
,
12360 index_expr
, minval
);
12361 minval
= integer_zero_node
;
12362 index
= expand_normal (index_expr
);
12364 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12365 omode
, 1, default_label
,
12366 default_probability
);
12367 /* Now we can safely truncate. */
12368 index
= convert_to_mode (index_mode
, index
, 0);
12372 if (omode
!= index_mode
)
12374 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12375 index_expr
= fold_convert (index_type
, index_expr
);
12378 index
= expand_normal (index_expr
);
12381 do_pending_stack_adjust ();
12383 op1
= expand_normal (minval
);
12384 op2
= expand_normal (range
);
12386 create_input_operand (&ops
[0], index
, index_mode
);
12387 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12388 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12389 create_fixed_operand (&ops
[3], table_label
);
12390 create_fixed_operand (&ops
[4], (default_label
12392 : fallback_label
));
12393 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12397 /* Attempt to generate a tablejump instruction; same concept. */
12398 /* Subroutine of the next function.
12400 INDEX is the value being switched on, with the lowest value
12401 in the table already subtracted.
12402 MODE is its expected mode (needed if INDEX is constant).
12403 RANGE is the length of the jump table.
12404 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12406 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12407 index value is out of range.
12408 DEFAULT_PROBABILITY is the probability of jumping to
12409 the default label. */
12412 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12413 rtx default_label
, profile_probability default_probability
)
12417 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12418 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12420 /* Do an unsigned comparison (in the proper mode) between the index
12421 expression and the value which represents the length of the range.
12422 Since we just finished subtracting the lower bound of the range
12423 from the index expression, this comparison allows us to simultaneously
12424 check that the original index expression value is both greater than
12425 or equal to the minimum value of the range and less than or equal to
12426 the maximum value of the range. */
12429 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12430 default_label
, default_probability
);
12432 /* If index is in range, it must fit in Pmode.
12433 Convert to Pmode so we can index with it. */
12436 unsigned int width
;
12438 /* We know the value of INDEX is between 0 and RANGE. If we have a
12439 sign-extended subreg, and RANGE does not have the sign bit set, then
12440 we have a value that is valid for both sign and zero extension. In
12441 this case, we get better code if we sign extend. */
12442 if (GET_CODE (index
) == SUBREG
12443 && SUBREG_PROMOTED_VAR_P (index
)
12444 && SUBREG_PROMOTED_SIGNED_P (index
)
12445 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12446 <= HOST_BITS_PER_WIDE_INT
)
12447 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12448 index
= convert_to_mode (Pmode
, index
, 0);
12450 index
= convert_to_mode (Pmode
, index
, 1);
12453 /* Don't let a MEM slip through, because then INDEX that comes
12454 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12455 and break_out_memory_refs will go to work on it and mess it up. */
12456 #ifdef PIC_CASE_VECTOR_ADDRESS
12457 if (flag_pic
&& !REG_P (index
))
12458 index
= copy_to_mode_reg (Pmode
, index
);
12461 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12462 GET_MODE_SIZE, because this indicates how large insns are. The other
12463 uses should all be Pmode, because they are addresses. This code
12464 could fail if addresses and insns are not the same size. */
12465 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12466 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12468 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12469 gen_rtx_LABEL_REF (Pmode
, table_label
));
12471 #ifdef PIC_CASE_VECTOR_ADDRESS
12473 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12476 index
= memory_address (CASE_VECTOR_MODE
, index
);
12477 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12478 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12479 convert_move (temp
, vector
, 0);
12481 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12483 /* If we are generating PIC code or if the table is PC-relative, the
12484 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12485 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12490 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12491 rtx table_label
, rtx default_label
,
12492 profile_probability default_probability
)
12496 if (! targetm
.have_tablejump ())
12499 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12500 fold_convert (index_type
, index_expr
),
12501 fold_convert (index_type
, minval
));
12502 index
= expand_normal (index_expr
);
12503 do_pending_stack_adjust ();
12505 do_tablejump (index
, TYPE_MODE (index_type
),
12506 convert_modes (TYPE_MODE (index_type
),
12507 TYPE_MODE (TREE_TYPE (range
)),
12508 expand_normal (range
),
12509 TYPE_UNSIGNED (TREE_TYPE (range
))),
12510 table_label
, default_label
, default_probability
);
12514 /* Return a CONST_VECTOR rtx representing vector mask for
12515 a VECTOR_CST of booleans. */
12517 const_vector_mask_from_tree (tree exp
)
12519 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12520 machine_mode inner
= GET_MODE_INNER (mode
);
12522 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12523 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12524 unsigned int count
= builder
.encoded_nelts ();
12525 for (unsigned int i
= 0; i
< count
; ++i
)
12527 tree elt
= VECTOR_CST_ELT (exp
, i
);
12528 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12529 if (integer_zerop (elt
))
12530 builder
.quick_push (CONST0_RTX (inner
));
12531 else if (integer_onep (elt
)
12532 || integer_minus_onep (elt
))
12533 builder
.quick_push (CONSTM1_RTX (inner
));
12535 gcc_unreachable ();
12537 return builder
.build ();
12540 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12541 Return a constant scalar rtx of mode MODE in which bit X is set if element
12542 X of EXP is nonzero. */
12544 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12546 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12549 /* The result has a fixed number of bits so the input must too. */
12550 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12551 for (unsigned int i
= 0; i
< nunits
; ++i
)
12553 elt
= VECTOR_CST_ELT (exp
, i
);
12554 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12555 if (integer_all_onesp (elt
))
12556 res
= wi::set_bit (res
, i
);
12558 gcc_assert (integer_zerop (elt
));
12561 return immed_wide_int_const (res
, mode
);
12564 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12566 const_vector_from_tree (tree exp
)
12568 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12570 if (initializer_zerop (exp
))
12571 return CONST0_RTX (mode
);
12573 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12574 return const_vector_mask_from_tree (exp
);
12576 machine_mode inner
= GET_MODE_INNER (mode
);
12578 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12579 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12580 unsigned int count
= builder
.encoded_nelts ();
12581 for (unsigned int i
= 0; i
< count
; ++i
)
12583 tree elt
= VECTOR_CST_ELT (exp
, i
);
12584 if (TREE_CODE (elt
) == REAL_CST
)
12585 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12587 else if (TREE_CODE (elt
) == FIXED_CST
)
12588 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12591 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12594 return builder
.build ();
12597 /* Build a decl for a personality function given a language prefix. */
12600 build_personality_function (const char *lang
)
12602 const char *unwind_and_version
;
12606 switch (targetm_common
.except_unwind_info (&global_options
))
12611 unwind_and_version
= "_sj0";
12615 unwind_and_version
= "_v0";
12618 unwind_and_version
= "_seh0";
12621 gcc_unreachable ();
12624 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12626 type
= build_function_type_list (unsigned_type_node
,
12627 integer_type_node
, integer_type_node
,
12628 long_long_unsigned_type_node
,
12629 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12630 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12631 get_identifier (name
), type
);
12632 DECL_ARTIFICIAL (decl
) = 1;
12633 DECL_EXTERNAL (decl
) = 1;
12634 TREE_PUBLIC (decl
) = 1;
12636 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12637 are the flags assigned by targetm.encode_section_info. */
12638 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12643 /* Extracts the personality function of DECL and returns the corresponding
12647 get_personality_function (tree decl
)
12649 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12650 enum eh_personality_kind pk
;
12652 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12653 if (pk
== eh_personality_none
)
12657 && pk
== eh_personality_any
)
12658 personality
= lang_hooks
.eh_personality ();
12660 if (pk
== eh_personality_lang
)
12661 gcc_assert (personality
!= NULL_TREE
);
12663 return XEXP (DECL_RTL (personality
), 0);
12666 /* Returns a tree for the size of EXP in bytes. */
12669 tree_expr_size (const_tree exp
)
12672 && DECL_SIZE_UNIT (exp
) != 0)
12673 return DECL_SIZE_UNIT (exp
);
12675 return size_in_bytes (TREE_TYPE (exp
));
12678 /* Return an rtx for the size in bytes of the value of EXP. */
12681 expr_size (tree exp
)
12685 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12686 size
= TREE_OPERAND (exp
, 1);
12689 size
= tree_expr_size (exp
);
12691 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12694 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12697 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12698 if the size can vary or is larger than an integer. */
12700 static HOST_WIDE_INT
12701 int_expr_size (tree exp
)
12705 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12706 size
= TREE_OPERAND (exp
, 1);
12709 size
= tree_expr_size (exp
);
12713 if (size
== 0 || !tree_fits_shwi_p (size
))
12716 return tree_to_shwi (size
);