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1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
29
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "toplev.h"
47 #include "diagnostic-core.h"
48 #include "output.h"
49 #include "timevar.h"
50 #include "hashtab.h"
51 #include "target.h"
52 #include "tree-pass.h"
53 #include "df.h"
54 #include "ira.h"
55
56 /* Maximum register number used in this function, plus one. */
57
58 int max_regno;
59
60 \f
61 struct target_hard_regs default_target_hard_regs;
62 struct target_regs default_target_regs;
63 #if SWITCHABLE_TARGET
64 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
65 struct target_regs *this_target_regs = &default_target_regs;
66 #endif
67
68 /* Data for initializing fixed_regs. */
69 static const char initial_fixed_regs[] = FIXED_REGISTERS;
70
71 /* Data for initializing call_used_regs. */
72 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
73
74 #ifdef CALL_REALLY_USED_REGISTERS
75 /* Data for initializing call_really_used_regs. */
76 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
77 #endif
78
79 #ifdef CALL_REALLY_USED_REGISTERS
80 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
81 #else
82 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
83 #endif
84
85 /* Indexed by hard register number, contains 1 for registers
86 that are being used for global register decls.
87 These must be exempt from ordinary flow analysis
88 and are also considered fixed. */
89 char global_regs[FIRST_PSEUDO_REGISTER];
90
91 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
92 in dataflow more conveniently. */
93 regset regs_invalidated_by_call_regset;
94
95 /* The bitmap_obstack is used to hold some static variables that
96 should not be reset after each function is compiled. */
97 static bitmap_obstack persistent_obstack;
98
99 /* Used to initialize reg_alloc_order. */
100 #ifdef REG_ALLOC_ORDER
101 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
102 #endif
103
104 /* The same information, but as an array of unsigned ints. We copy from
105 these unsigned ints to the table above. We do this so the tm.h files
106 do not have to be aware of the wordsize for machines with <= 64 regs.
107 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
108 #define N_REG_INTS \
109 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
110
111 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
112 = REG_CLASS_CONTENTS;
113
114 /* Array containing all of the register names. */
115 static const char *const initial_reg_names[] = REGISTER_NAMES;
116
117 /* Array containing all of the register class names. */
118 const char * reg_class_names[] = REG_CLASS_NAMES;
119
120 #define last_mode_for_init_move_cost \
121 (this_target_regs->x_last_mode_for_init_move_cost)
122
123 /* No more global register variables may be declared; true once
124 reginfo has been initialized. */
125 static int no_global_reg_vars = 0;
126
127 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
128 correspond to the hard registers, if any, set in that map. This
129 could be done far more efficiently by having all sorts of special-cases
130 with moving single words, but probably isn't worth the trouble. */
131 void
132 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
133 {
134 unsigned i;
135 bitmap_iterator bi;
136
137 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
138 {
139 if (i >= FIRST_PSEUDO_REGISTER)
140 return;
141 SET_HARD_REG_BIT (*to, i);
142 }
143 }
144
145 /* Function called only once per target_globals to initialize the
146 target_hard_regs structure. Once this is done, various switches
147 may override. */
148 void
149 init_reg_sets (void)
150 {
151 int i, j;
152
153 /* First copy the register information from the initial int form into
154 the regsets. */
155
156 for (i = 0; i < N_REG_CLASSES; i++)
157 {
158 CLEAR_HARD_REG_SET (reg_class_contents[i]);
159
160 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
161 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
162 if (int_reg_class_contents[i][j / 32]
163 & ((unsigned) 1 << (j % 32)))
164 SET_HARD_REG_BIT (reg_class_contents[i], j);
165 }
166
167 /* Sanity check: make sure the target macros FIXED_REGISTERS and
168 CALL_USED_REGISTERS had the right number of initializers. */
169 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
170 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
171 #ifdef CALL_REALLY_USED_REGISTERS
172 gcc_assert (sizeof call_really_used_regs
173 == sizeof initial_call_really_used_regs);
174 #endif
175 #ifdef REG_ALLOC_ORDER
176 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
177 #endif
178 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
179
180 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
181 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
182 #ifdef CALL_REALLY_USED_REGISTERS
183 memcpy (call_really_used_regs, initial_call_really_used_regs,
184 sizeof call_really_used_regs);
185 #endif
186 #ifdef REG_ALLOC_ORDER
187 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
188 #endif
189 memcpy (reg_names, initial_reg_names, sizeof reg_names);
190 }
191
192 /* Initialize may_move_cost and friends for mode M. */
193 void
194 init_move_cost (enum machine_mode m)
195 {
196 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
197 bool all_match = true;
198 unsigned int i, j;
199
200 gcc_assert (have_regs_of_mode[m]);
201 for (i = 0; i < N_REG_CLASSES; i++)
202 if (contains_reg_of_mode[i][m])
203 for (j = 0; j < N_REG_CLASSES; j++)
204 {
205 int cost;
206 if (!contains_reg_of_mode[j][m])
207 cost = 65535;
208 else
209 {
210 cost = register_move_cost (m, (enum reg_class) i,
211 (enum reg_class) j);
212 gcc_assert (cost < 65535);
213 }
214 all_match &= (last_move_cost[i][j] == cost);
215 last_move_cost[i][j] = cost;
216 }
217 if (all_match && last_mode_for_init_move_cost != -1)
218 {
219 move_cost[m] = move_cost[last_mode_for_init_move_cost];
220 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
221 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
222 return;
223 }
224 last_mode_for_init_move_cost = m;
225 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
226 * N_REG_CLASSES);
227 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
228 * N_REG_CLASSES);
229 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
230 * N_REG_CLASSES);
231 for (i = 0; i < N_REG_CLASSES; i++)
232 if (contains_reg_of_mode[i][m])
233 for (j = 0; j < N_REG_CLASSES; j++)
234 {
235 int cost;
236 enum reg_class *p1, *p2;
237
238 if (last_move_cost[i][j] == 65535)
239 {
240 move_cost[m][i][j] = 65535;
241 may_move_in_cost[m][i][j] = 65535;
242 may_move_out_cost[m][i][j] = 65535;
243 }
244 else
245 {
246 cost = last_move_cost[i][j];
247
248 for (p2 = &reg_class_subclasses[j][0];
249 *p2 != LIM_REG_CLASSES; p2++)
250 if (*p2 != i && contains_reg_of_mode[*p2][m])
251 cost = MAX (cost, move_cost[m][i][*p2]);
252
253 for (p1 = &reg_class_subclasses[i][0];
254 *p1 != LIM_REG_CLASSES; p1++)
255 if (*p1 != j && contains_reg_of_mode[*p1][m])
256 cost = MAX (cost, move_cost[m][*p1][j]);
257
258 gcc_assert (cost <= 65535);
259 move_cost[m][i][j] = cost;
260
261 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
262 may_move_in_cost[m][i][j] = 0;
263 else
264 may_move_in_cost[m][i][j] = cost;
265
266 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
267 may_move_out_cost[m][i][j] = 0;
268 else
269 may_move_out_cost[m][i][j] = cost;
270 }
271 }
272 else
273 for (j = 0; j < N_REG_CLASSES; j++)
274 {
275 move_cost[m][i][j] = 65535;
276 may_move_in_cost[m][i][j] = 65535;
277 may_move_out_cost[m][i][j] = 65535;
278 }
279 }
280
281 /* We need to save copies of some of the register information which
282 can be munged by command-line switches so we can restore it during
283 subsequent back-end reinitialization. */
284 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
285 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
286 #ifdef CALL_REALLY_USED_REGISTERS
287 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
288 #endif
289 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
290
291 /* Save the register information. */
292 void
293 save_register_info (void)
294 {
295 /* Sanity check: make sure the target macros FIXED_REGISTERS and
296 CALL_USED_REGISTERS had the right number of initializers. */
297 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
298 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
299 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
300 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
301
302 /* Likewise for call_really_used_regs. */
303 #ifdef CALL_REALLY_USED_REGISTERS
304 gcc_assert (sizeof call_really_used_regs
305 == sizeof saved_call_really_used_regs);
306 memcpy (saved_call_really_used_regs, call_really_used_regs,
307 sizeof call_really_used_regs);
308 #endif
309
310 /* And similarly for reg_names. */
311 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
312 memcpy (saved_reg_names, reg_names, sizeof reg_names);
313 }
314
315 /* Restore the register information. */
316 static void
317 restore_register_info (void)
318 {
319 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
320 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
321
322 #ifdef CALL_REALLY_USED_REGISTERS
323 memcpy (call_really_used_regs, saved_call_really_used_regs,
324 sizeof call_really_used_regs);
325 #endif
326
327 memcpy (reg_names, saved_reg_names, sizeof reg_names);
328 }
329
330 /* After switches have been processed, which perhaps alter
331 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
332 static void
333 init_reg_sets_1 (void)
334 {
335 unsigned int i, j;
336 unsigned int /* enum machine_mode */ m;
337
338 restore_register_info ();
339
340 #ifdef REG_ALLOC_ORDER
341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
342 inv_reg_alloc_order[reg_alloc_order[i]] = i;
343 #endif
344
345 /* This macro allows the fixed or call-used registers
346 and the register classes to depend on target flags. */
347
348 #ifdef CONDITIONAL_REGISTER_USAGE
349 CONDITIONAL_REGISTER_USAGE;
350 #endif
351
352 /* Compute number of hard regs in each class. */
353
354 memset (reg_class_size, 0, sizeof reg_class_size);
355 for (i = 0; i < N_REG_CLASSES; i++)
356 {
357 bool any_nonfixed = false;
358 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
359 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
360 {
361 reg_class_size[i]++;
362 if (!fixed_regs[j])
363 any_nonfixed = true;
364 }
365 class_only_fixed_regs[i] = !any_nonfixed;
366 }
367
368 /* Initialize the table of subunions.
369 reg_class_subunion[I][J] gets the largest-numbered reg-class
370 that is contained in the union of classes I and J. */
371
372 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
373 for (i = 0; i < N_REG_CLASSES; i++)
374 {
375 for (j = 0; j < N_REG_CLASSES; j++)
376 {
377 HARD_REG_SET c;
378 int k;
379
380 COPY_HARD_REG_SET (c, reg_class_contents[i]);
381 IOR_HARD_REG_SET (c, reg_class_contents[j]);
382 for (k = 0; k < N_REG_CLASSES; k++)
383 if (hard_reg_set_subset_p (reg_class_contents[k], c)
384 && !hard_reg_set_subset_p (reg_class_contents[k],
385 reg_class_contents
386 [(int) reg_class_subunion[i][j]]))
387 reg_class_subunion[i][j] = (enum reg_class) k;
388 }
389 }
390
391 /* Initialize the table of superunions.
392 reg_class_superunion[I][J] gets the smallest-numbered reg-class
393 containing the union of classes I and J. */
394
395 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
396 for (i = 0; i < N_REG_CLASSES; i++)
397 {
398 for (j = 0; j < N_REG_CLASSES; j++)
399 {
400 HARD_REG_SET c;
401 int k;
402
403 COPY_HARD_REG_SET (c, reg_class_contents[i]);
404 IOR_HARD_REG_SET (c, reg_class_contents[j]);
405 for (k = 0; k < N_REG_CLASSES; k++)
406 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
407 break;
408
409 reg_class_superunion[i][j] = (enum reg_class) k;
410 }
411 }
412
413 /* Initialize the tables of subclasses and superclasses of each reg class.
414 First clear the whole table, then add the elements as they are found. */
415
416 for (i = 0; i < N_REG_CLASSES; i++)
417 {
418 for (j = 0; j < N_REG_CLASSES; j++)
419 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
420 }
421
422 for (i = 0; i < N_REG_CLASSES; i++)
423 {
424 if (i == (int) NO_REGS)
425 continue;
426
427 for (j = i + 1; j < N_REG_CLASSES; j++)
428 if (hard_reg_set_subset_p (reg_class_contents[i],
429 reg_class_contents[j]))
430 {
431 /* Reg class I is a subclass of J.
432 Add J to the table of superclasses of I. */
433 enum reg_class *p;
434
435 /* Add I to the table of superclasses of J. */
436 p = &reg_class_subclasses[j][0];
437 while (*p != LIM_REG_CLASSES) p++;
438 *p = (enum reg_class) i;
439 }
440 }
441
442 /* Initialize "constant" tables. */
443
444 CLEAR_HARD_REG_SET (fixed_reg_set);
445 CLEAR_HARD_REG_SET (call_used_reg_set);
446 CLEAR_HARD_REG_SET (call_fixed_reg_set);
447 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
448 if (!regs_invalidated_by_call_regset)
449 {
450 bitmap_obstack_initialize (&persistent_obstack);
451 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
452 }
453 else
454 CLEAR_REG_SET (regs_invalidated_by_call_regset);
455
456 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
457 {
458 /* call_used_regs must include fixed_regs. */
459 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
460 #ifdef CALL_REALLY_USED_REGISTERS
461 /* call_used_regs must include call_really_used_regs. */
462 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
463 #endif
464
465 if (fixed_regs[i])
466 SET_HARD_REG_BIT (fixed_reg_set, i);
467
468 if (call_used_regs[i])
469 SET_HARD_REG_BIT (call_used_reg_set, i);
470
471 /* There are a couple of fixed registers that we know are safe to
472 exclude from being clobbered by calls:
473
474 The frame pointer is always preserved across calls. The arg
475 pointer is if it is fixed. The stack pointer usually is,
476 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
477 CLOBBER will be present. If we are generating PIC code, the
478 PIC offset table register is preserved across calls, though the
479 target can override that. */
480
481 if (i == STACK_POINTER_REGNUM)
482 ;
483 else if (global_regs[i])
484 {
485 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
486 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
487 }
488 else if (i == FRAME_POINTER_REGNUM)
489 ;
490 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
491 else if (i == HARD_FRAME_POINTER_REGNUM)
492 ;
493 #endif
494 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
495 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
496 ;
497 #endif
498 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
499 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
500 ;
501 else if (CALL_REALLY_USED_REGNO_P (i))
502 {
503 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
504 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
505 }
506 }
507
508 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
509
510 /* Preserve global registers if called more than once. */
511 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
512 {
513 if (global_regs[i])
514 {
515 fixed_regs[i] = call_used_regs[i] = 1;
516 SET_HARD_REG_BIT (fixed_reg_set, i);
517 SET_HARD_REG_BIT (call_used_reg_set, i);
518 SET_HARD_REG_BIT (call_fixed_reg_set, i);
519 }
520 }
521
522 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
523 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
524 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
525 {
526 HARD_REG_SET ok_regs;
527 CLEAR_HARD_REG_SET (ok_regs);
528 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
529 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
530 SET_HARD_REG_BIT (ok_regs, j);
531
532 for (i = 0; i < N_REG_CLASSES; i++)
533 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
534 (enum machine_mode) m)
535 <= reg_class_size[i])
536 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
537 {
538 contains_reg_of_mode [i][m] = 1;
539 have_regs_of_mode [m] = 1;
540 }
541 }
542
543 /* Reset move_cost and friends, making sure we only free shared
544 table entries once. */
545 for (i = 0; i < MAX_MACHINE_MODE; i++)
546 if (move_cost[i])
547 {
548 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
549 ;
550 if (i == j)
551 {
552 free (move_cost[i]);
553 free (may_move_in_cost[i]);
554 free (may_move_out_cost[i]);
555 }
556 }
557 memset (move_cost, 0, sizeof move_cost);
558 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
559 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
560 last_mode_for_init_move_cost = -1;
561 }
562
563 /* Compute the table of register modes.
564 These values are used to record death information for individual registers
565 (as opposed to a multi-register mode).
566 This function might be invoked more than once, if the target has support
567 for changing register usage conventions on a per-function basis.
568 */
569 void
570 init_reg_modes_target (void)
571 {
572 int i, j;
573
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
575 for (j = 0; j < MAX_MACHINE_MODE; j++)
576 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
577
578 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
579 {
580 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
581
582 /* If we couldn't find a valid mode, just use the previous mode.
583 ??? One situation in which we need to do this is on the mips where
584 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
585 to use DF mode for the even registers and VOIDmode for the odd
586 (for the cpu models where the odd ones are inaccessible). */
587 if (reg_raw_mode[i] == VOIDmode)
588 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
589 }
590 }
591
592 /* Finish initializing the register sets and initialize the register modes.
593 This function might be invoked more than once, if the target has support
594 for changing register usage conventions on a per-function basis.
595 */
596 void
597 init_regs (void)
598 {
599 /* This finishes what was started by init_reg_sets, but couldn't be done
600 until after register usage was specified. */
601 init_reg_sets_1 ();
602 }
603
604 /* The same as previous function plus initializing IRA. */
605 void
606 reinit_regs (void)
607 {
608 init_regs ();
609 /* caller_save needs to be re-initialized. */
610 caller_save_initialized_p = false;
611 ira_init ();
612 }
613
614 /* Initialize some fake stack-frame MEM references for use in
615 memory_move_secondary_cost. */
616 void
617 init_fake_stack_mems (void)
618 {
619 int i;
620
621 for (i = 0; i < MAX_MACHINE_MODE; i++)
622 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
623 }
624
625
626 /* Compute cost of moving data from a register of class FROM to one of
627 TO, using MODE. */
628
629 int
630 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
631 {
632 return targetm.register_move_cost (mode, from, to);
633 }
634
635 /* Compute cost of moving registers to/from memory. */
636 int
637 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
638 {
639 return targetm.memory_move_cost (mode, rclass, in);
640 }
641
642 /* Compute extra cost of moving registers to/from memory due to reloads.
643 Only needed if secondary reloads are required for memory moves. */
644 int
645 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
646 bool in)
647 {
648 reg_class_t altclass;
649 int partial_cost = 0;
650 /* We need a memory reference to feed to SECONDARY... macros. */
651 /* mem may be unused even if the SECONDARY_ macros are defined. */
652 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
653
654 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
655
656 if (altclass == NO_REGS)
657 return 0;
658
659 if (in)
660 partial_cost = register_move_cost (mode, altclass, rclass);
661 else
662 partial_cost = register_move_cost (mode, rclass, altclass);
663
664 if (rclass == altclass)
665 /* This isn't simply a copy-to-temporary situation. Can't guess
666 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
667 calling here in that case.
668
669 I'm tempted to put in an assert here, but returning this will
670 probably only give poor estimates, which is what we would've
671 had before this code anyways. */
672 return partial_cost;
673
674 /* Check if the secondary reload register will also need a
675 secondary reload. */
676 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
677 }
678
679 /* Return a machine mode that is legitimate for hard reg REGNO and large
680 enough to save nregs. If we can't find one, return VOIDmode.
681 If CALL_SAVED is true, only consider modes that are call saved. */
682 enum machine_mode
683 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
684 unsigned int nregs, bool call_saved)
685 {
686 unsigned int /* enum machine_mode */ m;
687 enum machine_mode found_mode = VOIDmode, mode;
688
689 /* We first look for the largest integer mode that can be validly
690 held in REGNO. If none, we look for the largest floating-point mode.
691 If we still didn't find a valid mode, try CCmode. */
692
693 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
694 mode != VOIDmode;
695 mode = GET_MODE_WIDER_MODE (mode))
696 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
697 && HARD_REGNO_MODE_OK (regno, mode)
698 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
699 found_mode = mode;
700
701 if (found_mode != VOIDmode)
702 return found_mode;
703
704 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
705 mode != VOIDmode;
706 mode = GET_MODE_WIDER_MODE (mode))
707 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
708 && HARD_REGNO_MODE_OK (regno, mode)
709 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
710 found_mode = mode;
711
712 if (found_mode != VOIDmode)
713 return found_mode;
714
715 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
716 mode != VOIDmode;
717 mode = GET_MODE_WIDER_MODE (mode))
718 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
719 && HARD_REGNO_MODE_OK (regno, mode)
720 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
721 found_mode = mode;
722
723 if (found_mode != VOIDmode)
724 return found_mode;
725
726 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
727 mode != VOIDmode;
728 mode = GET_MODE_WIDER_MODE (mode))
729 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
730 && HARD_REGNO_MODE_OK (regno, mode)
731 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
732 found_mode = mode;
733
734 if (found_mode != VOIDmode)
735 return found_mode;
736
737 /* Iterate over all of the CCmodes. */
738 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
739 {
740 mode = (enum machine_mode) m;
741 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
742 && HARD_REGNO_MODE_OK (regno, mode)
743 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
744 return mode;
745 }
746
747 /* We can't find a mode valid for this register. */
748 return VOIDmode;
749 }
750
751 /* Specify the usage characteristics of the register named NAME.
752 It should be a fixed register if FIXED and a
753 call-used register if CALL_USED. */
754 void
755 fix_register (const char *name, int fixed, int call_used)
756 {
757 int i;
758 int reg, nregs;
759
760 /* Decode the name and update the primary form of
761 the register info. */
762
763 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
764 {
765 gcc_assert (nregs >= 1);
766 for (i = reg; i < reg + nregs; i++)
767 {
768 if ((i == STACK_POINTER_REGNUM
769 #ifdef HARD_FRAME_POINTER_REGNUM
770 || i == HARD_FRAME_POINTER_REGNUM
771 #else
772 || i == FRAME_POINTER_REGNUM
773 #endif
774 )
775 && (fixed == 0 || call_used == 0))
776 {
777 switch (fixed)
778 {
779 case 0:
780 switch (call_used)
781 {
782 case 0:
783 error ("can%'t use %qs as a call-saved register", name);
784 break;
785
786 case 1:
787 error ("can%'t use %qs as a call-used register", name);
788 break;
789
790 default:
791 gcc_unreachable ();
792 }
793 break;
794
795 case 1:
796 switch (call_used)
797 {
798 case 1:
799 error ("can%'t use %qs as a fixed register", name);
800 break;
801
802 case 0:
803 default:
804 gcc_unreachable ();
805 }
806 break;
807
808 default:
809 gcc_unreachable ();
810 }
811 }
812 else
813 {
814 fixed_regs[i] = fixed;
815 call_used_regs[i] = call_used;
816 #ifdef CALL_REALLY_USED_REGISTERS
817 if (fixed == 0)
818 call_really_used_regs[i] = call_used;
819 #endif
820 }
821 }
822 }
823 else
824 {
825 warning (0, "unknown register name: %s", name);
826 }
827 }
828
829 /* Mark register number I as global. */
830 void
831 globalize_reg (int i)
832 {
833 #ifdef STACK_REGS
834 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
835 {
836 error ("stack register used for global register variable");
837 return;
838 }
839 #endif
840
841 if (fixed_regs[i] == 0 && no_global_reg_vars)
842 error ("global register variable follows a function definition");
843
844 if (global_regs[i])
845 {
846 warning (0, "register used for two global register variables");
847 return;
848 }
849
850 if (call_used_regs[i] && ! fixed_regs[i])
851 warning (0, "call-clobbered register used for global register variable");
852
853 global_regs[i] = 1;
854
855 /* If we're globalizing the frame pointer, we need to set the
856 appropriate regs_invalidated_by_call bit, even if it's already
857 set in fixed_regs. */
858 if (i != STACK_POINTER_REGNUM)
859 {
860 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
861 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
862 }
863
864 /* If already fixed, nothing else to do. */
865 if (fixed_regs[i])
866 return;
867
868 fixed_regs[i] = call_used_regs[i] = 1;
869 #ifdef CALL_REALLY_USED_REGISTERS
870 call_really_used_regs[i] = 1;
871 #endif
872
873 SET_HARD_REG_BIT (fixed_reg_set, i);
874 SET_HARD_REG_BIT (call_used_reg_set, i);
875 SET_HARD_REG_BIT (call_fixed_reg_set, i);
876
877 reinit_regs ();
878 }
879 \f
880
881 /* Structure used to record preferences of given pseudo. */
882 struct reg_pref
883 {
884 /* (enum reg_class) prefclass is the preferred class. May be
885 NO_REGS if no class is better than memory. */
886 char prefclass;
887
888 /* altclass is a register class that we should use for allocating
889 pseudo if no register in the preferred class is available.
890 If no register in this class is available, memory is preferred.
891
892 It might appear to be more general to have a bitmask of classes here,
893 but since it is recommended that there be a class corresponding to the
894 union of most major pair of classes, that generality is not required. */
895 char altclass;
896
897 /* coverclass is a register class that IRA uses for allocating
898 the pseudo. */
899 char coverclass;
900 };
901
902 /* Record preferences of each pseudo. This is available after RA is
903 run. */
904 static struct reg_pref *reg_pref;
905
906 /* Current size of reg_info. */
907 static int reg_info_size;
908
909 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
910 This function is sometimes called before the info has been computed.
911 When that happens, just return GENERAL_REGS, which is innocuous. */
912 enum reg_class
913 reg_preferred_class (int regno)
914 {
915 if (reg_pref == 0)
916 return GENERAL_REGS;
917
918 return (enum reg_class) reg_pref[regno].prefclass;
919 }
920
921 enum reg_class
922 reg_alternate_class (int regno)
923 {
924 if (reg_pref == 0)
925 return ALL_REGS;
926
927 return (enum reg_class) reg_pref[regno].altclass;
928 }
929
930 /* Return the reg_class which is used by IRA for its allocation. */
931 enum reg_class
932 reg_cover_class (int regno)
933 {
934 if (reg_pref == 0)
935 return NO_REGS;
936
937 return (enum reg_class) reg_pref[regno].coverclass;
938 }
939
940 \f
941
942 /* Allocate space for reg info. */
943 static void
944 allocate_reg_info (void)
945 {
946 reg_info_size = max_reg_num ();
947 gcc_assert (! reg_pref && ! reg_renumber);
948 reg_renumber = XNEWVEC (short, reg_info_size);
949 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
950 memset (reg_renumber, -1, reg_info_size * sizeof (short));
951 }
952
953
954 /* Resize reg info. The new elements will be uninitialized. Return
955 TRUE if new elements (for new pseudos) were added. */
956 bool
957 resize_reg_info (void)
958 {
959 int old;
960
961 if (reg_pref == NULL)
962 {
963 allocate_reg_info ();
964 return true;
965 }
966 if (reg_info_size == max_reg_num ())
967 return false;
968 old = reg_info_size;
969 reg_info_size = max_reg_num ();
970 gcc_assert (reg_pref && reg_renumber);
971 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
972 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
973 memset (reg_pref + old, -1,
974 (reg_info_size - old) * sizeof (struct reg_pref));
975 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
976 return true;
977 }
978
979
980 /* Free up the space allocated by allocate_reg_info. */
981 void
982 free_reg_info (void)
983 {
984 if (reg_pref)
985 {
986 free (reg_pref);
987 reg_pref = NULL;
988 }
989
990 if (reg_renumber)
991 {
992 free (reg_renumber);
993 reg_renumber = NULL;
994 }
995 }
996
997 /* Initialize some global data for this pass. */
998 static unsigned int
999 reginfo_init (void)
1000 {
1001 if (df)
1002 df_compute_regs_ever_live (true);
1003
1004 /* This prevents dump_flow_info from losing if called
1005 before reginfo is run. */
1006 reg_pref = NULL;
1007 /* No more global register variables may be declared. */
1008 no_global_reg_vars = 1;
1009 return 1;
1010 }
1011
1012 struct rtl_opt_pass pass_reginfo_init =
1013 {
1014 {
1015 RTL_PASS,
1016 "reginfo", /* name */
1017 NULL, /* gate */
1018 reginfo_init, /* execute */
1019 NULL, /* sub */
1020 NULL, /* next */
1021 0, /* static_pass_number */
1022 TV_NONE, /* tv_id */
1023 0, /* properties_required */
1024 0, /* properties_provided */
1025 0, /* properties_destroyed */
1026 0, /* todo_flags_start */
1027 0 /* todo_flags_finish */
1028 }
1029 };
1030
1031 \f
1032
1033 /* Set up preferred, alternate, and cover classes for REGNO as
1034 PREFCLASS, ALTCLASS, and COVERCLASS. */
1035 void
1036 setup_reg_classes (int regno,
1037 enum reg_class prefclass, enum reg_class altclass,
1038 enum reg_class coverclass)
1039 {
1040 if (reg_pref == NULL)
1041 return;
1042 gcc_assert (reg_info_size == max_reg_num ());
1043 reg_pref[regno].prefclass = prefclass;
1044 reg_pref[regno].altclass = altclass;
1045 reg_pref[regno].coverclass = coverclass;
1046 }
1047
1048 \f
1049 /* This is the `regscan' pass of the compiler, run just before cse and
1050 again just before loop. It finds the first and last use of each
1051 pseudo-register. */
1052
1053 static void reg_scan_mark_refs (rtx, rtx);
1054
1055 void
1056 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1057 {
1058 rtx insn;
1059
1060 timevar_push (TV_REG_SCAN);
1061
1062 for (insn = f; insn; insn = NEXT_INSN (insn))
1063 if (INSN_P (insn))
1064 {
1065 reg_scan_mark_refs (PATTERN (insn), insn);
1066 if (REG_NOTES (insn))
1067 reg_scan_mark_refs (REG_NOTES (insn), insn);
1068 }
1069
1070 timevar_pop (TV_REG_SCAN);
1071 }
1072
1073
1074 /* X is the expression to scan. INSN is the insn it appears in.
1075 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1076 We should only record information for REGs with numbers
1077 greater than or equal to MIN_REGNO. */
1078 static void
1079 reg_scan_mark_refs (rtx x, rtx insn)
1080 {
1081 enum rtx_code code;
1082 rtx dest;
1083 rtx note;
1084
1085 if (!x)
1086 return;
1087 code = GET_CODE (x);
1088 switch (code)
1089 {
1090 case CONST:
1091 case CONST_INT:
1092 case CONST_DOUBLE:
1093 case CONST_FIXED:
1094 case CONST_VECTOR:
1095 case CC0:
1096 case PC:
1097 case SYMBOL_REF:
1098 case LABEL_REF:
1099 case ADDR_VEC:
1100 case ADDR_DIFF_VEC:
1101 case REG:
1102 return;
1103
1104 case EXPR_LIST:
1105 if (XEXP (x, 0))
1106 reg_scan_mark_refs (XEXP (x, 0), insn);
1107 if (XEXP (x, 1))
1108 reg_scan_mark_refs (XEXP (x, 1), insn);
1109 break;
1110
1111 case INSN_LIST:
1112 if (XEXP (x, 1))
1113 reg_scan_mark_refs (XEXP (x, 1), insn);
1114 break;
1115
1116 case CLOBBER:
1117 if (MEM_P (XEXP (x, 0)))
1118 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1119 break;
1120
1121 case SET:
1122 /* Count a set of the destination if it is a register. */
1123 for (dest = SET_DEST (x);
1124 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1125 || GET_CODE (dest) == ZERO_EXTEND;
1126 dest = XEXP (dest, 0))
1127 ;
1128
1129 /* If this is setting a pseudo from another pseudo or the sum of a
1130 pseudo and a constant integer and the other pseudo is known to be
1131 a pointer, set the destination to be a pointer as well.
1132
1133 Likewise if it is setting the destination from an address or from a
1134 value equivalent to an address or to the sum of an address and
1135 something else.
1136
1137 But don't do any of this if the pseudo corresponds to a user
1138 variable since it should have already been set as a pointer based
1139 on the type. */
1140
1141 if (REG_P (SET_DEST (x))
1142 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1143 /* If the destination pseudo is set more than once, then other
1144 sets might not be to a pointer value (consider access to a
1145 union in two threads of control in the presence of global
1146 optimizations). So only set REG_POINTER on the destination
1147 pseudo if this is the only set of that pseudo. */
1148 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1149 && ! REG_USERVAR_P (SET_DEST (x))
1150 && ! REG_POINTER (SET_DEST (x))
1151 && ((REG_P (SET_SRC (x))
1152 && REG_POINTER (SET_SRC (x)))
1153 || ((GET_CODE (SET_SRC (x)) == PLUS
1154 || GET_CODE (SET_SRC (x)) == LO_SUM)
1155 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1156 && REG_P (XEXP (SET_SRC (x), 0))
1157 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1158 || GET_CODE (SET_SRC (x)) == CONST
1159 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1160 || GET_CODE (SET_SRC (x)) == LABEL_REF
1161 || (GET_CODE (SET_SRC (x)) == HIGH
1162 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1163 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1164 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1165 || ((GET_CODE (SET_SRC (x)) == PLUS
1166 || GET_CODE (SET_SRC (x)) == LO_SUM)
1167 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1168 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1169 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1170 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1171 && (GET_CODE (XEXP (note, 0)) == CONST
1172 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1173 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1174 REG_POINTER (SET_DEST (x)) = 1;
1175
1176 /* If this is setting a register from a register or from a simple
1177 conversion of a register, propagate REG_EXPR. */
1178 if (REG_P (dest) && !REG_ATTRS (dest))
1179 {
1180 rtx src = SET_SRC (x);
1181
1182 while (GET_CODE (src) == SIGN_EXTEND
1183 || GET_CODE (src) == ZERO_EXTEND
1184 || GET_CODE (src) == TRUNCATE
1185 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1186 src = XEXP (src, 0);
1187
1188 set_reg_attrs_from_value (dest, src);
1189 }
1190
1191 /* ... fall through ... */
1192
1193 default:
1194 {
1195 const char *fmt = GET_RTX_FORMAT (code);
1196 int i;
1197 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1198 {
1199 if (fmt[i] == 'e')
1200 reg_scan_mark_refs (XEXP (x, i), insn);
1201 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1202 {
1203 int j;
1204 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1205 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1206 }
1207 }
1208 }
1209 }
1210 }
1211 \f
1212
1213 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1214 is also in C2. */
1215 int
1216 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1217 {
1218 return (c1 == c2
1219 || c2 == ALL_REGS
1220 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1221 reg_class_contents[(int) c2]));
1222 }
1223
1224 /* Return nonzero if there is a register that is in both C1 and C2. */
1225 int
1226 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1227 {
1228 return (c1 == c2
1229 || c1 == ALL_REGS
1230 || c2 == ALL_REGS
1231 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1232 reg_class_contents[(int) c2]));
1233 }
1234
1235 \f
1236
1237 /* Passes for keeping and updating info about modes of registers
1238 inside subregisters. */
1239
1240 #ifdef CANNOT_CHANGE_MODE_CLASS
1241
1242 struct subregs_of_mode_node
1243 {
1244 unsigned int block;
1245 unsigned char modes[MAX_MACHINE_MODE];
1246 };
1247
1248 static htab_t subregs_of_mode;
1249
1250 static hashval_t
1251 som_hash (const void *x)
1252 {
1253 const struct subregs_of_mode_node *const a =
1254 (const struct subregs_of_mode_node *) x;
1255 return a->block;
1256 }
1257
1258 static int
1259 som_eq (const void *x, const void *y)
1260 {
1261 const struct subregs_of_mode_node *const a =
1262 (const struct subregs_of_mode_node *) x;
1263 const struct subregs_of_mode_node *const b =
1264 (const struct subregs_of_mode_node *) y;
1265 return a->block == b->block;
1266 }
1267
1268 static void
1269 record_subregs_of_mode (rtx subreg)
1270 {
1271 struct subregs_of_mode_node dummy, *node;
1272 enum machine_mode mode;
1273 unsigned int regno;
1274 void **slot;
1275
1276 if (!REG_P (SUBREG_REG (subreg)))
1277 return;
1278
1279 regno = REGNO (SUBREG_REG (subreg));
1280 mode = GET_MODE (subreg);
1281
1282 if (regno < FIRST_PSEUDO_REGISTER)
1283 return;
1284
1285 dummy.block = regno & -8;
1286 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1287 dummy.block, INSERT);
1288 node = (struct subregs_of_mode_node *) *slot;
1289 if (node == NULL)
1290 {
1291 node = XCNEW (struct subregs_of_mode_node);
1292 node->block = regno & -8;
1293 *slot = node;
1294 }
1295
1296 node->modes[mode] |= 1 << (regno & 7);
1297 }
1298
1299 /* Call record_subregs_of_mode for all the subregs in X. */
1300 static void
1301 find_subregs_of_mode (rtx x)
1302 {
1303 enum rtx_code code = GET_CODE (x);
1304 const char * const fmt = GET_RTX_FORMAT (code);
1305 int i;
1306
1307 if (code == SUBREG)
1308 record_subregs_of_mode (x);
1309
1310 /* Time for some deep diving. */
1311 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1312 {
1313 if (fmt[i] == 'e')
1314 find_subregs_of_mode (XEXP (x, i));
1315 else if (fmt[i] == 'E')
1316 {
1317 int j;
1318 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1319 find_subregs_of_mode (XVECEXP (x, i, j));
1320 }
1321 }
1322 }
1323
1324 void
1325 init_subregs_of_mode (void)
1326 {
1327 basic_block bb;
1328 rtx insn;
1329
1330 if (subregs_of_mode)
1331 htab_empty (subregs_of_mode);
1332 else
1333 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1334
1335 FOR_EACH_BB (bb)
1336 FOR_BB_INSNS (bb, insn)
1337 if (INSN_P (insn))
1338 find_subregs_of_mode (PATTERN (insn));
1339 }
1340
1341 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1342 mode. */
1343 bool
1344 invalid_mode_change_p (unsigned int regno,
1345 enum reg_class rclass ATTRIBUTE_UNUSED,
1346 enum machine_mode from)
1347 {
1348 struct subregs_of_mode_node dummy, *node;
1349 unsigned int to;
1350 unsigned char mask;
1351
1352 gcc_assert (subregs_of_mode);
1353 dummy.block = regno & -8;
1354 node = (struct subregs_of_mode_node *)
1355 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1356 if (node == NULL)
1357 return false;
1358
1359 mask = 1 << (regno & 7);
1360 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1361 if (node->modes[to] & mask)
1362 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1363 return true;
1364
1365 return false;
1366 }
1367
1368 void
1369 finish_subregs_of_mode (void)
1370 {
1371 htab_delete (subregs_of_mode);
1372 subregs_of_mode = 0;
1373 }
1374 #else
1375 void
1376 init_subregs_of_mode (void)
1377 {
1378 }
1379 void
1380 finish_subregs_of_mode (void)
1381 {
1382 }
1383
1384 #endif /* CANNOT_CHANGE_MODE_CLASS */