libgcc/config/nds32/isr-library/intr_isr.S

   1 /* c-isr library stuff of Andes NDS32 cpu for GNU compiler
   2    Copyright (C) 2012-2020 Free Software Foundation, Inc.
   3    Contributed by Andes Technology Corporation.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    Under Section 7 of GPL version 3, you are granted additional
  18    permissions described in the GCC Runtime Library Exception, version
  19    3.1, as published by the Free Software Foundation.
  20
  21    You should have received a copy of the GNU General Public License and
  22    a copy of the GCC Runtime Library Exception along with this program;
  23    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  24    <http://www.gnu.org/licenses/>.  */
  25
  26 #include "save_usr_regs.inc"
  27 #include "save_mac_regs.inc"
  28 #include "save_fpu_regs.inc"
  29 #include "save_fpu_regs_00.inc"
  30 #include "save_fpu_regs_01.inc"
  31 #include "save_fpu_regs_02.inc"
  32 #include "save_fpu_regs_03.inc"
  33 #include "save_all.inc"
  34 #include "save_partial.inc"
  35 #include "adj_intr_lvl.inc"
  36 #include "restore_fpu_regs_00.inc"
  37 #include "restore_fpu_regs_01.inc"
  38 #include "restore_fpu_regs_02.inc"
  39 #include "restore_fpu_regs_03.inc"
  40 #include "restore_fpu_regs.inc"
  41 #include "restore_mac_regs.inc"
  42 #include "restore_usr_regs.inc"
  43 #include "restore_all.inc"
  44 #include "restore_partial.inc"
  45
  46         .section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
  47         .align  1
  48
  49 /* First Level Handlers
  50    1. First Level Handlers are invokded in vector section via jump instruction
  51       with specific names for different configurations.
  52    2. Naming Format: _nds32_e_SR_NT for exception handlers.
  53                      _nds32_i_SR_NT for interrupt handlers.
  54      2.1 All upper case letters are replaced with specific lower case letters encodings.
  55      2.2 SR -- Saved Registers
  56          sa: Save All regs (context)
  57          ps: Partial Save (all caller-saved regs)
  58      2.3 NT -- Nested Type
  59          ns: nested
  60          nn: not nested
  61          nr: nested ready */
  62
  63 #ifdef NDS32_SAVE_ALL_REGS
  64 #if defined(NDS32_NESTED)
  65         .globl  _nds32_i_sa_ns
  66         .type   _nds32_i_sa_ns, @function
  67 _nds32_i_sa_ns:
  68 #elif defined(NDS32_NESTED_READY)
  69         .globl  _nds32_i_sa_nr
  70         .type   _nds32_i_sa_nr, @function
  71 _nds32_i_sa_nr:
  72 #else /* Not nested handler. */
  73         .globl  _nds32_i_sa_nn
  74         .type   _nds32_i_sa_nn, @function
  75 _nds32_i_sa_nn:
  76 #endif /* endif for Nest Type */
  77 #else /* not NDS32_SAVE_ALL_REGS */
  78 #if defined(NDS32_NESTED)
  79         .globl  _nds32_i_ps_ns
  80         .type   _nds32_i_ps_ns, @function
  81 _nds32_i_ps_ns:
  82 #elif defined(NDS32_NESTED_READY)
  83         .globl  _nds32_i_ps_nr
  84         .type   _nds32_i_ps_nr, @function
  85 _nds32_i_ps_nr:
  86 #else /* Not nested handler. */
  87         .globl  _nds32_i_ps_nn
  88         .type   _nds32_i_ps_nn, @function
  89 _nds32_i_ps_nn:
  90 #endif /* endif for Nest Type */
  91 #endif /* not NDS32_SAVE_ALL_REGS */
  92
  93
  94 /* For 4-byte vector size version, the vector id is
  95    extracted from $ITYPE and is set into $r0 by library.
  96    For 16-byte vector size version, the vector id
  97    is set into $r0 in vector section by compiler.  */
  98
  99 /* Save used registers first.  */
 100 #ifdef NDS32_SAVE_ALL_REGS
 101         SAVE_ALL
 102 #else
 103         SAVE_PARTIAL
 104 #endif
 105
 106 /* According to vector size, we need to have different implementation.  */
 107 #if __NDS32_ISR_VECTOR_SIZE_4__
 108         /* Prepare to call 2nd level handler.  */
 109         la      $r2, _nds32_jmptbl_00
 110         lw      $r2, [$r2 + $r0 << #2]
 111         addi    $r0, $r0, #-9   /* Make interrput vector id zero-based.  */
 112         ADJ_INTR_LVL    /* Adjust INTR level.  $r3 is clobbered.  */
 113         jral    $r2
 114 #else /* not __NDS32_ISR_VECTOR_SIZE_4__ */
 115         /* Prepare to call 2nd level handler.  */
 116         la      $r2, _nds32_jmptbl_09   /* For zero-based vcetor id.  */
 117         lw      $r2, [$r2 + $r0 << #2]
 118         ADJ_INTR_LVL    /* Adjust INTR level. $r3 is clobbered.  */
 119         jral    $r2
 120 #endif /* not __NDS32_ISR_VECTOR_SIZE_4__ */
 121
 122 /* Restore used registers.  */
 123 #ifdef NDS32_SAVE_ALL_REGS
 124         RESTORE_ALL
 125 #else
 126         RESTORE_PARTIAL
 127 #endif
 128         iret
 129
 130
 131 #ifdef NDS32_SAVE_ALL_REGS
 132 #if defined(NDS32_NESTED)
 133         .size   _nds32_i_sa_ns, .-_nds32_i_sa_ns
 134 #elif defined(NDS32_NESTED_READY)
 135         .size   _nds32_i_sa_nr, .-_nds32_i_sa_nr
 136 #else /* Not nested handler. */
 137         .size   _nds32_i_sa_nn, .-_nds32_i_sa_nn
 138 #endif /* endif for Nest Type */
 139 #else /* not NDS32_SAVE_ALL_REGS */
 140 #if defined(NDS32_NESTED)
 141         .size   _nds32_i_ps_ns, .-_nds32_i_ps_ns
 142 #elif defined(NDS32_NESTED_READY)
 143         .size   _nds32_i_ps_nr, .-_nds32_i_ps_nr
 144 #else /* Not nested handler. */
 145         .size   _nds32_i_ps_nn, .-_nds32_i_ps_nn
 146 #endif /* endif for Nest Type */
 147 #endif /* not NDS32_SAVE_ALL_REGS */