+2019-08-22 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb
+ insn.
+ (iorsi3_compare0_scratch): Likewise.
+
+2019-08-22 Sylvia Taylor <sylvia.taylor@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def:
+ (ld1x4): New.
+ (st1x4): Likewise.
+ * config/aarch64/aarch64-simd.md:
+ (aarch64_ld1x4<VALLDIF:mode>): New pattern.
+ (aarch64_st1x4<VALLDIF:mode>): Likewise.
+ (aarch64_ld1_x4_<mode>): Likewise.
+ (aarch64_st1_x4_<mode>): Likewise.
+ * config/aarch64/arm_neon.h:
+ (vld1_s8_x4): New function.
+ (vld1q_s8_x4): Likewise.
+ (vld1_s16_x4): Likewise.
+ (vld1q_s16_x4): Likewise.
+ (vld1_s32_x4): Likewise.
+ (vld1q_s32_x4): Likewise.
+ (vld1_u8_x4): Likewise.
+ (vld1q_u8_x4): Likewise.
+ (vld1_u16_x4): Likewise.
+ (vld1q_u16_x4): Likewise.
+ (vld1_u32_x4): Likewise.
+ (vld1q_u32_x4): Likewise.
+ (vld1_f16_x4): Likewise.
+ (vld1q_f16_x4): Likewise.
+ (vld1_f32_x4): Likewise.
+ (vld1q_f32_x4): Likewise.
+ (vld1_p8_x4): Likewise.
+ (vld1q_p8_x4): Likewise.
+ (vld1_p16_x4): Likewise.
+ (vld1q_p16_x4): Likewise.
+ (vld1_s64_x4): Likewise.
+ (vld1_u64_x4): Likewise.
+ (vld1_p64_x4): Likewise.
+ (vld1q_s64_x4): Likewise.
+ (vld1q_u64_x4): Likewise.
+ (vld1q_p64_x4): Likewise.
+ (vld1_f64_x4): Likewise.
+ (vld1q_f64_x4): Likewise.
+ (vst1_s8_x4): Likewise.
+ (vst1q_s8_x4): Likewise.
+ (vst1_s16_x4): Likewise.
+ (vst1q_s16_x4): Likewise.
+ (vst1_s32_x4): Likewise.
+ (vst1q_s32_x4): Likewise.
+ (vst1_u8_x4): Likewise.
+ (vst1q_u8_x4): Likewise.
+ (vst1_u16_x4): Likewise.
+ (vst1q_u16_x4): Likewise.
+ (vst1_u32_x4): Likewise.
+ (vst1q_u32_x4): Likewise.
+ (vst1_f16_x4): Likewise.
+ (vst1q_f16_x4): Likewise.
+ (vst1_f32_x4): Likewise.
+ (vst1q_f32_x4): Likewise.
+ (vst1_p8_x4): Likewise.
+ (vst1q_p8_x4): Likewise.
+ (vst1_p16_x4): Likewise.
+ (vst1q_p16_x4): Likewise.
+ (vst1_s64_x4): Likewise.
+ (vst1_u64_x4): Likewise.
+ (vst1_p64_x4): Likewise.
+ (vst1q_s64_x4): Likewise.
+ (vst1q_u64_x4): Likewise.
+ (vst1q_p64_x4): Likewise.
+ (vst1_f64_x4): Likewise.
+ (vst1q_f64_x4): Likewise.
+
+2019-08-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (vcond_mask): Add "@".
+
+2019-08-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+ Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/88839
+ * config/aarch64/aarch64.c (aarch64_evpc_sel): New function.
+ (aarch64_expand_vec_perm_const_1): Call aarch64_evpc_sel.
+
+2019-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/90724
+ * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
+ in reg if it fails aarch64_plus_operand predicate.
+
+2019-08-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/91482
+ * tree-ssa-ccp.c (ccp_folder::fold_stmt): Remove useless
+ BUILT_IN_ASSUME_ALIGNED calls.
+
+2019-08-21 Richard Biener <rguenther@suse.de>
+
+ PR target/91498
+ PR target/91503
+ * config/i386/i386-features.c
+ (general_scalar_chain::make_vector_copies): Copy stack temporary
+ rtx when using it multiple times.
+ (general_scalar_chain::convert_reg): Likewise.
+
+2019-08-20 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * function.c (assign_parm_find_stack_rtl): Use known_eq instead of ==.
+
+2019-08-20 Matthew Beliveau <mbelivea@redhat.com>
+
+ * tree-ssa-dse.c (dse_optimize_redundant_stores): Improved check to
+ catch more redundant zero initialization cases.
+ (dse_dom_walker::dse_optimize_stmt): Likewise.
+
+2019-08-20 Richard Biener <rguenther@suse.de>
+
+ PR lto/91307
+ * ipa.c (cgraph_build_static_cdtor_1): Use names not recognizable
+ by collect2 when targetm.have_ctors_dtors which avoids dragging
+ in temporary filenames from LTO input objects.
+
+2019-08-20 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/37242
+ * tree-ssa-sccvn.c (visit_nary_op): Also CSE (T)(a + b)
+ to (T)a + (T)b if we know that a + b does not overflow.
+
+2019-08-20 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR rtl-optimization/91347
+ * dse.c (scan_insn): Call add_wild_read for non-const/memset tail calls
+ before reload if HARD_FRAME_POINTER_IS_ARG_POINTER.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * calls.h (function_arg_info): Add a pass_by_reference field,
+ defaulting to false.
+ * calls.c (apply_pass_by_reference_rules): Set pass_by_reference
+ when applying pass-by-reference semantics.
+ (initialize_argument_information): Likewise.
+ (emit_library_call_value_1): Likewise.
+ * function.c (assign_parm_data_one): Remove passed_pointer field.
+ (assign_parm_find_data_types): Don't set it.
+ (assign_parm_find_stack_rtl, assign_parm_adjust_stack_rtl)
+ (assign_parm_setup_reg, assign_parms, gimplify_parameters): Use
+ arg.pass_by_reference instead of passed_pointer.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * calls.c (emit_library_call_value_1): Merge arg and orig_arg
+ into a single function_arg_info, updating its fields when we
+ apply pass-by-reference and promotion semantics. Use the
+ function_arg_info to track the mode rather than keeping it in
+ a separate local variable.
+ (initialize_argument_information): Likewise. Base the final
+ arg_to_skip on this new function_arg_info rather than creating
+ a new one from scratch.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * function.c (assign_parm_data_one): Replace passed_type,
+ promoted_mode and named_arg with a function_arg_info field.
+ (assign_parm_find_data_types): Remove local variables and
+ assign directly to "data". Make data->passed_mode shadow
+ data->arg.mode until promotion, then assign the promoted
+ mode to data->arg.mode.
+ (assign_parms_setup_varargs, assign_parm_find_entry_rtl)
+ (assign_parm_find_stack_rtl, assign_parm_adjust_entry_rtl)
+ (assign_parm_remove_parallels, assign_parm_setup_block_p)
+ (assign_parm_setup_block, assign_parm_setup_reg)
+ (assign_parm_setup_stack, assign_parms, gimplify_parameters): Use
+ arg.mode instead of promoted_mode, arg.type instead of passed_type
+ and arg.named instead of named_arg. Use data->arg for
+ function_arg_info structures that had the field values passed_type,
+ promoted_mode and named_arg. Base other function_arg_infos on
+ data->arg, changing the necessary properties.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * calls.h (apply_pass_by_reference_rules): Declare.
+ * calls.c (apply_pass_by_reference_rules): New function.
+ * config/c6x/c6x.c (c6x_call_saved_register_used): Use it.
+ * config/rs6000/rs6000-call.c (rs6000_parm_needs_stack): Likewise.
+ * config/s390/s390.c (s390_call_saved_register_used): Likewise.
+ * function.c (assign_parm_find_data_types): Likewise.
+ * var-tracking.c (prepare_call_arguments): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (must_pass_in_stack): Take a function_arg_info instead
+ of a mode and a type.
+ * doc/tm.texi: Regenerate.
+ * calls.h (must_pass_in_stack_var_size): Take a function_arg_info
+ instead of a mode and a type.
+ (must_pass_in_stack_var_size_or_pad): Likewise.
+ * calls.c (must_pass_in_stack_var_size): Likewise.
+ (must_pass_in_stack_var_size_or_pad): Likewise.
+ (initialize_argument_information): Update call to
+ targetm.calls.must_pass_in_stack.
+ (must_pass_va_arg_on_stack): Likewise.
+ * function.c (assign_parm_find_entry_rtl): Likewise.
+ * targhooks.c (hook_pass_by_reference_must_pass_in_stack): Likewise.
+ * config/alpha/alpha.c (alpha_function_arg): Likewise.
+ (alpha_function_arg_advance): Likewise.
+ * config/cr16/cr16.c (cr16_function_arg): Likewise.
+ (cr16_function_arg_advance): Likewise.
+ * config/cris/cris.c (cris_pass_by_reference): Likewise.
+ (cris_arg_partial_bytes): Likewise.
+ * config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise.
+ * config/lm32/lm32.c (lm32_function_arg): Likewise.
+ * config/mcore/mcore.c (mcore_num_arg_regs): Likewise.
+ (mcore_function_arg, mcore_arg_partial_bytes): Likewise.
+ * config/mips/mips.c (mips_pass_by_reference): Likewise.
+ * config/mmix/mmix.c (mmix_function_arg_advance): Likewise.
+ (mmix_function_arg_1, mmix_pass_by_reference): Likewise.
+ * config/sh/sh.c (sh_pass_by_reference): Likewise.
+ * config/stormy16/stormy16.c (xstormy16_function_arg): Likewise.
+ * config/xtensa/xtensa.c (xtensa_function_arg_advance): Likewise.
+ * config/arm/arm.c (arm_must_pass_in_stack): Take a function_arg_info
+ instead of a mode and a type.
+ * config/fr30/fr30.c (fr30_must_pass_in_stack): Likewise.
+ (fr30_num_arg_regs): Likewise.
+ (fr30_setup_incoming_varargs): Update calls accordingly.
+ (fr30_arg_partial_bytes, fr30_function_arg): Likewise.
+ (fr30_function_arg_advance): Likewise.
+ * config/frv/frv.c (frv_must_pass_in_stack): Take a function_arg_info
+ instead of a mode and a type.
+ * config/gcn/gcn.c (num_arg_regs): Likewise.
+ (gcn_function_arg, gcn_function_arg_advance): Update calls to
+ num_arg_regs and targetm.calls.must_pass_in_stack.
+ (gcn_arg_partial_bytes): Likewise.
+ * config/i386/i386.c (ix86_must_pass_in_stack): Take a
+ function_arg_info instead of a mode and a type.
+ (classify_argument): Update call accordingly.
+ * config/nds32/nds32.c (nds32_must_pass_in_stack): Take a
+ function_arg_info instead of a mode and a type.
+ * config/rs6000/rs6000-internal.h (rs6000_must_pass_in_stack):
+ Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_must_pass_in_stack): Likewise.
+ (rs6000_parm_needs_stack): Update call accordingly.
+ (setup_incoming_varargs): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (callee_copies): Take a function_arg_info instead
+ of a mode, type and named flag.
+ * doc/tm.texi: Regenerate.
+ * targhooks.h (hook_callee_copies_named): Take a function_arg_info
+ instead of a mode, type and named flag.
+ (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete.
+ (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise.
+ (hook_bool_CUMULATIVE_ARGS_arg_info_true): New function.
+ * targhooks.c (hook_callee_copies_named): Take a function_arg_info
+ instead of a mode, type and named flag.
+ (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete.
+ (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise.
+ (hook_bool_CUMULATIVE_ARGS_arg_info_true): New function.
+ * calls.h (reference_callee_copied): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * calls.c (reference_callee_copied): Likewise.
+ (initialize_argument_information): Update call accordingly.
+ (emit_library_call_value_1): Likewise.
+ * function.c (gimplify_parameters): Likewise.
+ * config/aarch64/aarch64.c (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_false instead of
+ hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false.
+ * config/c6x/c6x.c (c6x_callee_copies): Delete.
+ (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_true instead.
+ * config/epiphany/epiphany.c (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+ * config/mips/mips.c (mips_callee_copies): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * config/mmix/mmix.c (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+ * config/mn10300/mn10300.c (TARGET_CALLEE_COPIES): Likewise.
+ * config/msp430/msp430.c (msp430_callee_copies): Delete.
+ (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_true instead.
+ * config/pa/pa.c (pa_callee_copies): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * config/sh/sh.c (sh_callee_copies): Likewise.
+ * config/v850/v850.c (TARGET_CALLEE_COPIES): Define to
+ hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (function_arg_advance): Take a function_arg_info instead
+ of a mode, type and named flag.
+ * doc/tm.texi: Regenerate.
+ * targhooks.h (default_function_arg_advance): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * targhooks.c (default_function_arg_advance): Likewise.
+ * calls.c (initialize_argument_information): Update call to
+ targetm.calls.function_arg_advance.
+ (emit_library_call_value_1): Likewise.
+ * dse.c (get_call_args): Likewise.
+ * expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ * function.c (assign_parms, gimplify_parameters): Likewise.
+ * var-tracking.c (prepare_call_arguments): Likewise.
+ * config/aarch64/aarch64.c (aarch64_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (aarch64_setup_incoming_varargs): Update call accordingly.
+ * config/alpha/alpha.c (alpha_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (alpha_setup_incoming_varargs): Update call accordingly.
+ * config/arc/arc.c (arc_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (arc_setup_incoming_varargs): Update call accordingly.
+ * config/arm/arm.c (arm_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (cmse_func_args_or_return_in_stack): Update call accordingly.
+ (arm_function_ok_for_sibcall): Likewise.
+ (cmse_nonsecure_call_clear_caller_saved): Likewise.
+ * config/avr/avr.c (avr_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/bfin/bfin.c (bfin_function_arg_advance): Likewise.
+ * config/c6x/c6x.c (c6x_function_arg_advance): Likewise.
+ (c6x_call_saved_register_used): Update call accordingly.
+ * config/cr16/cr16.c (cr16_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/cris/cris.c (cris_function_arg_advance): Likewise.
+ * config/csky/csky.c (csky_function_arg_advance): Likewise.
+ (csky_setup_incoming_varargs): Update call accordingly.
+ * config/epiphany/epiphany.c (epiphany_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/fr30/fr30.c (fr30_function_arg_advance): Likewise.
+ * config/frv/frv.c (frv_function_arg_advance): Likewise.
+ * config/ft32/ft32.c (ft32_function_arg_advance): Likewise.
+ * config/gcn/gcn.c (gcn_function_arg_advance): Likewise.
+ * config/h8300/h8300.c (h8300_function_arg_advance): Likewise.
+ * config/i386/i386.c (ix86_function_arg_advance): Likewise.
+ (ix86_setup_incoming_varargs): Update call accordingly.
+ * config/ia64/ia64.c (ia64_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (ia64_setup_incoming_varargs): Update call accordingly.
+ * config/iq2000/iq2000.c (iq2000_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (iq2000_expand_prologue): Update call accordingly.
+ * config/lm32/lm32.c (lm32_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/m32c/m32c.c (m32c_function_arg_advance): Likewise.
+ * config/m32r/m32r.c (m32r_function_arg_advance): Likewise.
+ * config/m68k/m68k.c (m68k_function_arg_advance): Likewise.
+ * config/mcore/mcore.c (mcore_function_arg_advance): Likewise.
+ * config/microblaze/microblaze.c (microblaze_function_arg_advance):
+ Likewise.
+ (microblaze_expand_prologue): Update call accordingly.
+ * config/mips/mips.c (mips_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (mips_setup_incoming_varargs): Update call accordingly.
+ (mips_output_args_xfer): Likewise.
+ * config/mmix/mmix.c (mmix_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/mn10300/mn10300.c (mn10300_function_arg_advance): Likewise.
+ * config/moxie/moxie.c (moxie_function_arg_advance): Likewise.
+ * config/msp430/msp430.c (msp430_function_arg_advance): Likewise.
+ * config/nds32/nds32.c (nds32_function_arg_advance): Likewise.
+ * config/nios2/nios2.c (nios2_function_arg_advance): Likewise.
+ (nios2_setup_incoming_varargs): Update call accordingly.
+ * config/nvptx/nvptx.c (nvptx_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/or1k/or1k.c (or1k_function_arg_advance): Likewise.
+ * config/pa/pa.c (pa_function_arg_advance): Likewise.
+ * config/pdp11/pdp11.c (pdp11_function_arg_advance): Likewise.
+ * config/pru/pru.c (pru_function_arg_advance): Likewise.
+ * config/riscv/riscv.c (riscv_function_arg_advance): Likewise.
+ (riscv_setup_incoming_varargs): Update call accordingly.
+ * config/rl78/rl78.c (rl78_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/rs6000/rs6000-internal.h (rs6000_function_arg_advance):
+ Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_function_arg_advance): Likewise.
+ (rs6000_parm_needs_stack): Update call accordingly.
+ * config/rx/rx.c (rx_function_arg_advance): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * config/s390/s390.c (s390_function_arg_advance): Likewise.
+ (s390_call_saved_register_used): Update call accordingly.
+ * config/sh/sh.c (sh_function_arg_advance): Take a function_arg_info
+ instead of a mode, type and named flag.
+ (sh_output_mi_thunk): Update call accordingly.
+ * config/sparc/sparc.c (sparc_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/spu/spu.c (spu_function_arg_advance): Likewise.
+ (spu_setup_incoming_varargs): Update call accordingly.
+ * config/stormy16/stormy16.c (xstormy16_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/tilegx/tilegx.c (tilegx_function_arg_advance): Likewise.
+ (tilegx_setup_incoming_varargs): Update call accordingly.
+ * config/tilepro/tilepro.c (tilepro_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (tilegx_setup_incoming_varargs): Update call accordingly.
+ * config/v850/v850.c (v850_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/vax/vax.c (vax_function_arg_advance): Likewise.
+ * config/visium/visium.c (visium_function_arg_advance): Likewise.
+ (visium_setup_incoming_varargs): Update call accordingly.
+ * config/xtensa/xtensa.c (xtensa_function_arg_advance): Take a
+ function_arg_info instead of a mode, type and named flag.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (function_arg, function_incoming_arg): Take a
+ function_arg_info instead of a mode, tree and named flag.
+ * doc/tm.texi: Regenerate.
+ * targhooks.h (default_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ (default_function_incoming_arg): Likewise.
+ * targhooks.c (default_function_arg): Likewise.
+ (default_function_incoming_arg): Likewise.
+ * calls.h (function_arg_info::end_marker_p): New function.
+ (function_arg_info::end_marker): Likewise.
+ * calls.c (prepare_call_address, initialize_argument_information)
+ (expand_call, emit_library_call_value_1): Update calls to
+ targetm.calls.function_arg and targetm.calls.function_incoming_arg.
+ * dse.c: Include calls.h.
+ (get_call_args): Update call to targetm.calls.function_arg.
+ * expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ * var-tracking.c (prepare_call_arguments): Likewise.
+ * function.c (assign_parm_find_entry_rtl): Update call to
+ targetm.calls.function_incoming_arg.
+ * config/aarch64/aarch64.c (aarch64_function_arg): Take a
+ function_arg_info instead of a mode, tree and named flag.
+ * config/alpha/alpha.c (alpha_function_arg): Likewise.
+ * config/arc/arc.c (arc_function_arg): Likewise.
+ * config/arm/arm.c (arm_function_arg): Likewise.
+ (cmse_func_args_or_return_in_stack): Update call accordingly.
+ (arm_function_ok_for_sibcall): Likewise.
+ (cmse_nonsecure_call_clear_caller_saved): Likewise.
+ * config/avr/avr.c (avr_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ * config/bfin/bfin.c (bfin_function_arg): Likewise.
+ * config/c6x/c6x.c (c6x_function_arg): Likewise.
+ (c6x_call_saved_register_used): Update call accordingly.
+ * config/cr16/cr16.c (cr16_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ * config/cris/cris.c (cris_function_arg, cris_function_incoming_arg)
+ (cris_function_arg_1): Likewise.
+ * config/csky/csky.c (csky_function_arg): Likewise.
+ * config/epiphany/epiphany.c (epiphany_function_arg): Likewise.
+ * config/fr30/fr30.c (fr30_function_arg): Likewise.
+ * config/frv/frv.c (frv_function_arg, frv_function_incoming_arg)
+ (frv_function_arg_1): Likewise.
+ * config/ft32/ft32.c (ft32_function_arg): Likewise.
+ * config/gcn/gcn.c (gcn_function_arg): Likewise.
+ * config/h8300/h8300.c (h8300_function_arg): Likewise.
+ * config/i386/i386.c (ix86_function_arg): Likewise.
+ * config/ia64/ia64.c (ia64_function_arg, ia64_function_incoming_arg)
+ (ia64_function_arg_1): Likewise.
+ * config/iq2000/iq2000.c (iq2000_function_arg): Likewise.
+ (iq2000_expand_prologue, iq2000_pass_by_reference): Update call
+ accordingly.
+ * config/lm32/lm32.c (lm32_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ * config/m32c/m32c.c (m32c_function_arg): Likewise.
+ * config/m32r/m32r.c (m32r_function_arg): Likewise.
+ * config/m68k/m68k.c (m68k_function_arg): Likewise.
+ * config/mcore/mcore.c (mcore_function_arg): Likewise.
+ * config/microblaze/microblaze.c (microblaze_function_arg): Likewise.
+ (microblaze_expand_prologue): Update call accordingly.
+ * config/mips/mips.c (mips_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ * config/mmix/mmix.c (mmix_function_incoming_arg, mmix_function_arg)
+ (mmix_function_arg_1): Likewise.
+ * config/mn10300/mn10300.c (mn10300_function_arg): Likewise.
+ * config/moxie/moxie.c (moxie_function_arg): Likewise.
+ * config/msp430/msp430.c (msp430_function_arg): Likewise.
+ * config/nds32/nds32.c (nds32_function_arg): Likewise.
+ * config/nios2/nios2.c (nios2_function_arg): Likewise.
+ * config/nvptx/nvptx.c (nvptx_function_arg): Likewise.
+ (nvptx_function_incoming_arg): Likewise.
+ * config/or1k/or1k.c (or1k_function_arg): Likewise.
+ * config/pa/pa.c (pa_function_arg): Likewise.
+ * config/pdp11/pdp11.c (pdp11_function_arg): Likewise.
+ * config/pru/pru.c (pru_function_arg): Likewise.
+ * config/riscv/riscv.c (riscv_function_arg): Likewise.
+ * config/rl78/rl78.c (rl78_function_arg): Likewise.
+ * config/rs6000/rs6000-internal.h (rs6000_function_arg): Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_function_arg): Likewise.
+ (rs6000_parm_needs_stack): Update call accordingly.
+ * config/rx/rx.c (rx_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ * config/s390/s390.c (s390_function_arg): Likewise.
+ (s390_call_saved_register_used): Update call accordingly.
+ * config/sh/sh.c (sh_function_arg): Take a function_arg_info
+ instead of a mode, tree and named flag.
+ (sh_output_mi_thunk): Update call accordingly.
+ * config/sparc/sparc.c (sparc_function_arg_1, sparc_function_arg)
+ (sparc_function_incoming_arg): Take a function_arg_info instead of
+ a mode, tree and named flag.
+ * config/spu/spu.c (spu_function_arg): Likewise.
+ * config/stormy16/stormy16.c (xstormy16_function_arg): Likewise.
+ * config/tilegx/tilegx.c (tilegx_function_arg): Likewise.
+ * config/tilepro/tilepro.c (tilepro_function_arg): Likewise.
+ * config/v850/v850.c (v850_function_arg): Likewise.
+ * config/vax/vax.c (vax_function_arg): Likewise.
+ * config/visium/visium.c (visium_function_arg): Likewise.
+ * config/xtensa/xtensa.c (xtensa_function_arg_1, xtensa_function_arg)
+ (xtensa_function_incoming_arg): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (setup_incoming_varargs): Take a function_arg_info
+ instead of a mode and tree.
+ * doc/tm.texi: Regenerate.
+ * targhooks.h (default_setup_incoming_varargs): Take a
+ function_arg_info instead of a mode and tree.
+ * targhooks.c (default_setup_incoming_varargs): Likewise.
+ * config/aarch64/aarch64.c (aarch64_setup_incoming_varargs): Likewise.
+ * config/alpha/alpha.c (alpha_setup_incoming_varargs): Likewise.
+ * config/arc/arc.c (arc_setup_incoming_varargs): Likewise.
+ * config/arm/arm.c (arm_setup_incoming_varargs): Likewise.
+ * config/bfin/bfin.c (setup_incoming_varargs): Likewise.
+ * config/cris/cris.c (cris_setup_incoming_varargs): Likewise.
+ * config/csky/csky.c (csky_setup_incoming_varargs): Likewise.
+ * config/epiphany/epiphany.c (epiphany_setup_incoming_varargs):
+ Likewise.
+ * config/fr30/fr30.c (fr30_setup_incoming_varargs): Likewise.
+ * config/frv/frv.c (frv_setup_incoming_varargs): Likewise.
+ * config/ft32/ft32.c (ft32_setup_incoming_varargs): Likewise.
+ * config/i386/i386.c (ix86_setup_incoming_varargs): Likewise.
+ * config/ia64/ia64.c (ia64_setup_incoming_varargs): Likewise.
+ * config/iq2000/iq2000.c (iq2000_setup_incoming_varargs): Likewise.
+ * config/lm32/lm32.c (lm32_setup_incoming_varargs): Likewise.
+ * config/m32r/m32r.c (m32r_setup_incoming_varargs): Likewise.
+ * config/mcore/mcore.c (mcore_setup_incoming_varargs): Likewise.
+ * config/mips/mips.c (mips_setup_incoming_varargs): Likewise.
+ * config/mmix/mmix.c (mmix_setup_incoming_varargs): Likewise.
+ * config/moxie/moxie.c (moxie_setup_incoming_varargs): Likewise.
+ * config/nds32/nds32.c (nds32_setup_incoming_varargs): Likewise.
+ * config/nios2/nios2.c (nios2_setup_incoming_varargs): Likewise.
+ * config/riscv/riscv.c (riscv_setup_incoming_varargs): Likewise.
+ * config/rs6000/rs6000-internal.h (setup_incoming_varargs): Likewise.
+ * config/rs6000/rs6000-call.c (setup_incoming_varargs): Likewise.
+ * config/sh/sh.c (sh_setup_incoming_varargs): Likewise.
+ * config/spu/spu.c (spu_setup_incoming_varargs): Likewise.
+ * config/tilegx/tilegx.c (tilegx_setup_incoming_varargs): Likewise.
+ * config/tilepro/tilepro.c (tilepro_setup_incoming_varargs): Likewise.
+ * config/visium/visium.c (visium_setup_incoming_varargs): Likewise.
+ * function.c (assign_parms_setup_varargs): Update call to
+ targetm.calls.setup_incoming_varargs.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (pass_by_reference): Take a function_arg_info instead
+ of a mode, type and named flag.
+ * doc/tm.texi: Regenerate.
+ * targhooks.h (hook_pass_by_reference_must_pass_in_stack): Update
+ accordingly.
+ (hook_bool_CUMULATIVE_ARGS_arg_info_false): Declare.
+ * targhooks.c (hook_pass_by_reference_must_pass_in_stack): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (hook_bool_CUMULATIVE_ARGS_arg_info_false): New function.
+ * calls.h (pass_by_reference): Take a function_arg_info instead of a
+ mode, type and named flag.
+ * calls.c (pass_by_reference): Likewise.
+ (pass_va_arg_by_reference): Update call accordingly.
+ (initialize_argument_information): Likewise.
+ (emit_library_call_value_1): Likewise.
+ * function.c (assign_parm_find_data_types): Likewise.
+ * var-tracking.c (prepare_call_arguments): Likewise.
+ * stor-layout.c: Include calls.h.
+ (compute_record_mode): Update call to targetm.calls.pass_by_reference.
+ * config/aarch64/aarch64.c (aarch64_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/alpha/alpha.c (alpha_pass_by_reference): Likewise.
+ * config/arc/arc.c (arc_pass_by_reference): Likewise.
+ * config/arm/arm.c (arm_pass_by_reference): Likewise.
+ * config/bfin/bfin.c (bfin_pass_by_reference): Likewise.
+ * config/c6x/c6x.c (c6x_pass_by_reference): Likewise.
+ (c6x_call_saved_register_used): Update call to pass_by_reference.
+ * config/cris/cris.c (cris_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/epiphany/epiphany.c (epiphany_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (epiphany_arg_partial_bytes): Update call accordingly.
+ * config/ft32/ft32.c (ft32_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (ft32_arg_partial_bytes): Update call accordingly.
+ * config/i386/i386.c (ix86_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise.
+ * config/m32c/m32c.c (m32c_pass_by_reference): Likewise.
+ * config/m32r/m32r.c (m32r_pass_by_reference): Likewise.
+ (m32r_return_in_memory): Update call accordingly.
+ * config/mips/mips.c (mips_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/mmix/mmix.c (mmix_pass_by_reference): Likewise.
+ * config/mn10300/mn10300.c (mn10300_pass_by_reference): Likewise.
+ * config/moxie/moxie.c (moxie_pass_by_reference): Likewise.
+ (moxie_arg_partial_bytes): Update call accordingly.
+ * config/msp430/msp430.c (msp430_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/nvptx/nvptx.c (nvptx_pass_by_reference): Likewise.
+ * config/or1k/or1k.c (or1k_pass_by_reference): Likewise.
+ * config/pa/pa.c (pa_pass_by_reference): Likewise.
+ * config/riscv/riscv.c (riscv_pass_by_reference): Likewise.
+ (riscv_return_in_memory): Update call accordingly.
+ * config/rs6000/rs6000-internal.h (rs6000_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/rs6000/rs6000-call.c (rs6000_pass_by_reference): Likewise.
+ (rs6000_parm_needs_stack): Update call to pass_by_reference.
+ * config/s390/s390.c (s390_pass_by_reference): Take a
+ function_arg_info instead of a mode, type and named flag.
+ (s390_call_saved_register_used): Update call accordingly.
+ * config/sh/sh.c (sh_pass_by_reference): Take a function_arg_info
+ instead of a mode, type and named flag.
+ * config/sparc/sparc.c (sparc_pass_by_reference): Likewise.
+ * config/spu/spu.c (spu_pass_by_reference): Likewise.
+ * config/tilegx/tilegx.c (tilegx_pass_by_reference): Likewise.
+ * config/tilepro/tilepro.c (tilepro_pass_by_reference): Likewise.
+ * config/v850/v850.c (v850_pass_by_reference): Likewise.
+ * config/visium/visium.c (visium_pass_by_reference): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (arg_partial_bytes): Take a function_arg_info instead
+ of a mode, type and named flag.
+ * doc/tm.texi: Regenerate.
+ * target.h (function_arg_info): Declare.
+ * calls.h (function_arg_info): New class.
+ * targhooks.h (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete.
+ (hook_int_CUMULATIVE_ARGS_arg_info_0): Declare.
+ * targhooks.c (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete.
+ (hook_int_CUMULATIVE_ARGS_arg_info_0): New function.
+ * calls.c (initialize_argument_information): Update call to
+ targetm.calls.partial_bytes.
+ (emit_library_call_value_1): Likewise.
+ * expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ * function.c (assign_parm_find_entry_rtl): Likewise.
+ * config/alpha/alpha.c (alpha_arg_partial_bytes): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/arc/arc.c (arc_arg_partial_bytes): Likewise.
+ * config/arm/arm.c (arm_arg_partial_bytes): Likewise.
+ (cmse_func_args_or_return_in_stack): Update accordingly.
+ * config/bfin/bfin.c (bfin_arg_partial_bytes): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/cris/cris.c (cris_arg_partial_bytes): Likewise.
+ * config/csky/csky.c (csky_arg_partial_bytes): Likewise.
+ * config/epiphany/epiphany.c (epiphany_arg_partial_bytes): Likewise.
+ * config/fr30/fr30.c: Include calls.h.
+ (fr30_arg_partial_bytes): Take a function_arg_info instead of a mode,
+ type and named flag.
+ * config/frv/frv.c: Include calls.h.
+ (frv_arg_partial_bytes): Take a function_arg_info instead of a mode,
+ type and named flag.
+ * config/ft32/ft32.c (ft32_arg_partial_bytes): Likewise.
+ * config/gcn/gcn.c (gcn_arg_partial_bytes): Likewise.
+ * config/ia64/ia64.c (ia64_arg_partial_bytes): Likewise.
+ * config/iq2000/iq2000.c (iq2000_arg_partial_bytes): Likewise.
+ * config/m32r/m32r.c (m32r_arg_partial_bytes): Likewise.
+ * config/mcore/mcore.c (mcore_arg_partial_bytes): Likewise.
+ * config/microblaze/microblaze.c (function_arg_partial_bytes):
+ Likewise.
+ * config/mips/mips.c (mips_arg_partial_bytes): Likewise.
+ * config/mn10300/mn10300.c (mn10300_arg_partial_bytes): Likewise.
+ * config/moxie/moxie.c (moxie_arg_partial_bytes): Likewise.
+ * config/msp430/msp430.c (msp430_arg_partial_bytes): Likewise.
+ * config/nds32/nds32.c (nds32_arg_partial_bytes): Likewise.
+ * config/nios2/nios2.c (nios2_arg_partial_bytes): Likewise.
+ * config/pa/pa.c (pa_arg_partial_bytes): Likewise.
+ * config/pru/pru.c (pru_arg_partial_bytes): Likewise.
+ * config/riscv/riscv.c (riscv_arg_partial_bytes): Likewise.
+ * config/rs6000/rs6000-internal.h (rs6000_arg_partial_bytes): Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_arg_partial_bytes): Likewise.
+ (rs6000_parm_needs_stack): Update call accordingly.
+ * config/sh/sh.c (sh_arg_partial_bytes): Take a
+ function_arg_info instead of a mode, type and named flag.
+ * config/sparc/sparc.c (sparc_arg_partial_bytes): Likewise.
+ * config/v850/v850.c (v850_arg_partial_bytes): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * calls.h (must_pass_va_arg_in_stack): Declare.
+ * calls.c (must_pass_va_arg_in_stack): New function.
+ * config/alpha/alpha.c (alpha_gimplify_va_arg_1): Use it.
+ * config/sh/sh.c (sh_gimplify_va_arg_expr): Likewise.
+ * config/stormy16/stormy16.c (xstormy16_gimplify_va_arg_expr):
+ Likewise.
+ * config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise.
+
+2019-08-20 Richard Sandiford <richard.sandiford@arm.com>
+
+ * calls.h (pass_va_arg_by_reference): Declare.
+ * calls.c (pass_va_arg_by_reference): New function.
+ * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr): Use it.
+ * config/alpha/alpha.c (alpha_gimplify_va_arg): Likewise.
+ * config/gcn/gcn.c (gcn_gimplify_va_arg_expr): Likewise.
+ * config/i386/i386.c (ix86_gimplify_va_arg): Likewise.
+ * config/ia64/ia64.c (ia64_gimplify_va_arg): Likewise.
+ * config/mips/mips.c (mips_std_gimplify_va_arg_expr): Likewise.
+ (mips_gimplify_va_arg_expr): Likewise.
+ * config/msp430/msp430.c (msp430_gimplify_va_arg_expr): Likewise.
+ * config/pa/pa.c (hppa_gimplify_va_arg_expr): Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_gimplify_va_arg): Likewise.
+ * config/s390/s390.c (s390_gimplify_va_arg): Likewise.
+ * config/sparc/sparc.c (sparc_gimplify_va_arg): Likewise.
+ * config/spu/spu.c (spu_gimplify_va_arg_expr): Likewise.
+ * config/tilegx/tilegx.c (tilegx_gimplify_va_arg_expr): Likewise.
+ * config/tilepro/tilepro.c (tilepro_gimplify_va_arg_expr): Likewise.
+ * config/visium/visium.c (visium_gimplify_va_arg): Likewise.
+ * config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise.
+ * targhooks.c (std_gimplify_va_arg_expr): Likewise.
+
+2019-08-20 Richard Biener <rguenther@suse.de>
+
+ PR target/91498
+ * config/i386/i386-features.c (general_scalar_chain::convert_op):
+ Use (vec_merge (vec_duplicate..)) style vector from scalar move.
+ (convert_scalars_to_vector): Add timode_p parameter and use it
+ to guard TImode-only operation.
+ (pass_stv::gate): Adjust so STV runs twice for TARGET_64BIT.
+ (pass_stv::execute): Pass down timode_p.
+
+2019-08-20 Lili Cui <lili.cui@intel.com>
+
+ * common/config/i386/i386-common.c
+ (processor_names): Add tigerlake and cooperlake.
+ (processor_alias_table): Add tigerlake and cooperlake.
+ * config.gcc: Add -march=tigerlake and cooperlake.
+ * config/i386/driver-i386.c
+ (host_detect_local_cpu): Detect tigerlake and cooperlake.
+ Add "has_avx" to classify processor.
+ * config/i386/i386-builtins.c (processor_model) :
+ Add M_INTEL_COREI7_TIGERLAKE and M_INTEL_COREI7_COOPERLAKE.
+ (arch_names_table): Add tigerlake and cooperlake.
+ (get_builtin_code_for_version) : Handle PROCESSOR_TIGERLAKE
+ and PROCESSOR_COOPERLAKE.
+ * config/i386/i386-c.c
+ (ix86_target_macros_internal): Handle tigerlake and cooperlake.
+ * config/i386/i386-options.c
+ (m_TIGERLAKE) : Define.
+ (m_COOPERLAKE) : Ditto.
+ (m_CORE_AVX512): Ditto.
+ (processor_cost_table): Add cascadelake.
+ (ix86_option_override_internal): Hadle PTA_MOVDIRI, PTA_MOVDIR64B.
+ * config/i386/i386.h
+ (ix86_size_cost) : Define TARGET_TIGERLAKE and TARGET_COOPERLAKE.
+ (processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
+ (PTA_MOVDIRI): Ditto.
+ (PTA_MOVDIR64B): Ditto.
+ (PTA_COOPERLAKE) : Ditto.
+ (PTA_TIGERLAKE) : Ditto.
+ (processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
+ * doc/extend.texi: Add tigerlake and cooperlake.
+ * doc/invoke.texi: Add tigerlake and cooperlake.
+
+2019-08-20 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/install.texi (Specific, alpha): Remove note to use
+ binutils 2.11.2 or later.
+
+2019-08-20 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR middle-end/89544
+ * function.c (assign_parm_find_stack_rtl): Use larger alignment
+ when possible.
+
+2019-08-19 Joel Hutton <Joel.Hutton@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_fpconst_pow2_recip): New prototype
+ * config/aarch64/aarch64.c (aarch64_fpconst_pow2_recip): New function
+ * config/aarch64/aarch64.md (*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult): New pattern
+ (*aarch64_<su_optab>cvtf<fcvt_iesize><GPF:mode>2_mult): New pattern
+ * config/aarch64/constraints.md (Dt): New constraint
+ * config/aarch64/predicates.md (aarch64_fpconst_pow2_recip): New predicate
+
+2019-08-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/91403
+ * tree-scalar-evolution.c (follow_ssa_edge_binary): Inline
+ cases we can handle with tail-recursion...
+ (follow_ssa_edge_expr): ... here. Do so.
+
+2019-08-19 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/91441
+ * toplev.c (process_options): Check TARGET_ASAN_SHADOW_OFFSET is
+ implemented for -fsanitize=kernel-address, and merge check logic
+ with -fsanitize=address.
+
+2019-08-18 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h (TARGET_OS_CPP_BUILTINS): Add asserts
+ for cpu and machine. Factor 64/32b builtins.
+
+2019-08-18 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/install.texi (Specific, bfin): blackfin.uclinux.org is
+ gone, point to sourceforge.net.
+
+2019-08-17 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/ux.texi (User Experience Guidelines): Update reference.
+
+2019-08-17 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/include/gpl_v3.texi (Copying): Adjust the link to "Why
+ not LGPL".
+
+2019-08-16 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-sra.c (build_reconstructed_reference): Return NULL_TREE instead
+ of NULL. Add guard for broken VIEW_CONVERT_EXPRs.
+
+2019-08-16 Martin Sebor <msebor@redhat.com>
+
+ * tree.def (TYPE_SIZE): Clarify.
+ * tree.h (TYPE_SIZE, TYPE_SIZE_UNIT, DECL_SIZE): Add comments.
+
+2019-08-16 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR tree-optimization/91109
+ * lra-int.h (lra_need_for_scratch_reg_p): Declare.
+ * lra.c (lra): Use lra_need_for_scratch_reg_p.
+ * lra-spills.c (lra_need_for_scratch_reg_p): New function.
+
+2019-08-16 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/mmx.md (mmxdoublemode): New mode attribute.
+ (mmx_uavg<mode>3): Macroize expaner from mmx_uavgv8qi3 and
+ mmx_uavgv4hi3 using MMXMODE12 mode iterator.
+ (uavg<mode>3_ceil): New expander.
+ * config/i386/sse.md (uavg<mode>3_ceil): Use ssedoublemode
+ mode iterator when creating CONST1_RTX.
+ (<sse2_avx2>_uavg<mode>3<mask_name>): Ditto.
+ (*<sse2_avx2>_uavg<mode>3<mask_name>): Use ssedoublemode
+ mode iterator for const1_operand predicate.
+
+2019-08-16 Richard Biener <rguenther@suse.de>
+
+ * tree-scalar-evolution.c (follow_ssa_edge_expr): Declare.
+ (follow_ssa_edge_binary): Call follow_ssa_edge_expr instead of
+ follow_ssa_edge.
+ (follow_ssa_edge_in_condition_phi_branch): Likewise.
+ (analyze_evolution_in_loop): Likewise.
+ (follow_ssa_edge, follow_ssa_edge_in_rhs): Inline into ...
+ (follow_ssa_edge_expr): ... here. Refactor code.
+
+2019-08-16 Richard Biener <rguenther@suse.de>
+
+ PR target/91469
+ * config/i386/i386-features.c
+ (general_scalar_chain::replace_with_subreg): Stop at memory operands.
+
+2019-08-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR other/91255
+ * gensupport.c (has_subst_attribute): Error out on set_attr_alternative
+ only if subst_name matches curr_attr string.
+
+2019-08-16 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-forwprop.c (simplify_builtin_call): Do not remove
+ stmt at gsi_p, instead replace it with a NOP removed later.
+ (pass_forwprop::execute): Fully propagate lattice, DCE stmts
+ that became dead because of that.
+
+2019-08-16 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-ssa-evrp-analyze.c (record_ranges_from_phis): Skip PHIs
+ for which we can't represent a range.
+ * ipa-cp.c (ipcp_vr_lattice::set_to_bottom): Pass type to
+ set_varying.
+ * tree-ssa-threadedge.c (record_temporary_equivalences_from_phis):
+ Set VR_UNDEFINED if type is not supported.
+ * tree-ssanames.c (get_range_info): Pass type to set_varying.
+ * tree-vrp.c (value_range_base::check): Assert that a varying has
+ min/max set.
+ (value_range_base::equal_p): Early bail for undefines.
+ (value_range_base::set_varying): Accept a type.
+ (value_range::set_varying): Same.
+ (value_range_base::type): VARYING can have a type, while UNDEFINE
+ is typeless.
+ (value_range_base::dump): Print type for VARYING nodes.
+ (value_range_base::set): Add type to VARYING.
+ (extract_range_from_multiplicative_op): Pass type to set_varying.
+ (extract_range_from_binary_expr): Same.
+ (value_range_base::intersect_helper): Same.
+ (value_range_base::union_helper): Same.
+ (value_range_base::normalize_symbolics): Same.
+ (determine_value_range_1): Same.
+ * tree-vrp.h (class value_range_base): Add type to set_varying.
+ Add prototype for dump(void).
+ Add prototype for supports_type_p.
+ (class value_range): Add type to set_varying.
+ Add prototype for dump(void).
+ * vr-values.c (set_value_range_to_truthvalue): Pass type to
+ set_varying.
+ (vr_values::get_lattice_entry): Set varying even if propagation
+ finished.
+ Pass type to set_varying.
+ (vr_values::get_value_range): Remove vr_const_varying.
+ Reallocate the lattice if needed.
+ (vr_values::update_value_range): Pass type to set_varying.
+ (vr_values::extract_range_for_var_from_comparison_expr): Same.
+ (vr_values::extract_range_from_binary_expr): Same.
+ (vr_values::extract_range_from_unary_expr): Same.
+ (vr_values::extract_range_from_cond_expr): Same.
+ (vr_values::check_for_binary_op_overflow): Same.
+ (vr_values::extract_range_basic): Same.
+ (vr_values::extract_range_from_assignment): Same.
+ (vr_values::vr_values): Increase size of num_vr_values.
+ (vr_values::extract_range_from_phi_node): Pass type to
+ set_varying.
+
+2019-08-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/90878
+ * config/i386/i386.c (inline_memory_move_cost): Use hard_register
+ for costs of hard register moves.
+ (ix86_register_move_cost): Likewise.
+ * config/i386/i386.h (processor_costs): Move costs of hard
+ register moves to hard_register. Add int_load, int_store,
+ xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse,
+ sse_load, sse_store, sse_unaligned_load and sse_unaligned_store
+ for costs of RTL expressions.
+ * config/i386/x86-tune-costs.h: Move costs of hard register
+ moves to hard_register. Duplicate int_load, int_store,
+ xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse,
+ sse_load, sse_store for costs of RTL expressions.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * target.def (setup_incoming_vararg_bounds): Remove.
+ * doc/tm.texi.in (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Remove.
+ * doc/tm.texi: Regenerate.
+ * targhooks.c (default_setup_incoming_vararg_bounds): Delete.
+ * targhooks.h (default_setup_incoming_vararg_bounds): Likewise.
+ * config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
+ (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise.
+
+2019-08-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ MSP430: Fix lines over 80 characters long in
+ config/msp430/*.{c,h} files
+
+ * config/msp430/driver-msp430.c (msp430_select_cpu): Fix format
+ specifier in string.
+ (msp430_select_hwmult_lib): Split line more than 80 characters long.
+ * config/msp430/msp430-devices.c (msp430_extract_mcu_data): Remove
+ redundant old comment.
+ * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
+ Split line more than 80 characters long.
+ * config/msp430/msp430.c (msp430_option_override): Likewise.
+ (msp430_return_in_memory): Likewise.
+ (msp430_gimplify_va_arg_expr): Likewise.
+ (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Likewise.
+ (msp430_legitimate_constant): Likewise.
+ (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Likewise.
+ (msp430_attr): Likewise.
+ (msp430_data_attr): Likewise.
+ (msp430_start_function): Likewise.
+ (gen_prefix): Likewise.
+ (msp430_init_sections): Likewise.
+ (msp430_select_section): Likewise.
+ (msp430_function_section): Likewise.
+ (msp430_unique_section): Likewise.
+ (msp430_output_aligned_decl_common): Likewise.
+ (msp430_do_not_relax_short_jumps): Likewise.
+ (msp430_init_builtins): Likewise.
+ (msp430_expand_delay_cycles): Likewise.
+ (msp430_expand_prologue): Likewise.
+ (msp430_expand_epilogue): Likewise.
+ (msp430_expand_helper): Likewise.
+ (msp430_split_movsi): Likewise.
+ (msp430_print_operand): Likewise.
+ (msp430_return_addr_rtx): Likewise.
+ (msp430x_extendhisi): Likewise.
+ * config/msp430/msp430.h (STARTFILE_SPEC): Likewise.
+ (ASM_SPEC): Likewise.
+ Remove very obvious comments.
+ (LIB_SPEC): Split line more than 80 characters long.
+ (EH_RETURN_HANDLER_RTX): Likewise.
+ (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+
+2019-08-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ MSP430: Fix whitespace errors and incorrect indentation in
+ config/msp430/*.{c,h} files
+
+ * config/msp430/driver-msp430.c (msp430_select_cpu): Fix indentation.
+ (msp430_select_hwmult_lib): Likewise.
+ * config/msp430/msp430-devices.c (parse_devices_csv_1): Likewise.
+ (msp430_extract_mcu_data): Likewise.
+ (struct t_msp430_mcu_data): Likewise.
+ * config/msp430/msp430.c (struct machine_function): Remove whitespace
+ before left square bracket.
+ (msp430_option_override): Fix indentation.
+ (msp430_hard_regno_nregs_with_padding): Likewise.
+ (msp430_initial_elimination_offset): Likewise.
+ (msp430_special_register_convention_p): Remove whitespace before left
+ square bracket and after exclamation mark.
+ (msp430_evaluate_arg): Likewise.
+ (msp430_callee_copies): Fix indentation.
+ (msp430_gimplify_va_arg_expr): Likewise.
+ (msp430_function_arg_advance): Remove whitespace before left square
+ bracket.
+ (reg_ok_for_addr): Likewise.
+ (msp430_preserve_reg_p): Likewise.
+ (msp430_compute_frame_info): Likewise.
+ (msp430_asm_output_addr_const_extra): Add space between function name
+ and open parenthesis.
+ (has_section_name): Fix indentation.
+ (msp430_attr): Remove trailing whitespace.
+ (msp430_section_attr): Likewise.
+ (msp430_data_attr): Likewise.
+ (struct msp430_attribute_table): Fix comment and whitespace.
+ (msp430_start_function): Remove whitespace before left square bracket.
+ Add space between function name and open parenthesis.
+ (msp430_select_section): Remove trailing whitespace.
+ (msp430_section_type_flags): Remove trailing whitespace.
+ (msp430_unique_section): Remove space before closing parenthesis.
+ (msp430_output_aligned_decl_common): Change 8 spaces to a tab.
+ (msp430_builtins): Remove whitespace before left square bracket.
+ (msp430_init_builtins): Fix indentation.
+ (msp430_expand_prologue): Remove whitespace before left square bracket.
+ Remove space before closing parenthesis.
+ (msp430_expand_epilogue): Remove whitespace before left square bracket.
+ (msp430_split_movsi): Remove space before closing parenthesis.
+ (helper_function_name_mappings): Fix indentation.
+ (msp430_use_f5_series_hwmult): Fix whitespace.
+ (use_32bit_hwmult): Likewise.
+ (msp430_no_hwmult): Likewise.
+ (msp430_output_labelref): Remove whitespace before left square bracket.
+ (msp430_print_operand_raw): Likewise.
+ (msp430_print_operand_addr): Likewise.
+ (msp430_print_operand): Add two spaces after '.' in comment.
+ Fix trailing whitespace.
+ (msp430x_extendhisi): Fix indentation.
+ * config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Change 8 spaces to
+ tab.
+ (PC_REGNUM): Likewise.
+ (STACK_POINTER_REGNUM): Likewise.
+ (CC_REGNUM): Likewise.
+
+2019-08-15 Richard Biener <rguenther@suse.de>
+
+ PR target/91454
+ * config/i386/i386-features.c (gen_gpr_to_xmm_move_src): New
+ helper.
+ (general_scalar_chain::make_vector_copies): Use it.
+
+2019-08-15 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * function.c (assign_parm_setup_reg): Handle misaligned stack arguments.
+
+2019-08-15 Martin Liska <mliska@suse.cz>
+
+ * tree-ssa-dce.c (propagate_necessity): We can't reach now
+ operators with no arguments.
+ (eliminate_unnecessary_stmts): Likewise here.
+
+2019-08-15 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-features.c (general_scalar_chain::convert_insn)
+ <case COMPARE>: Revert 2019-08-14 change.
+ (convertible_comparison_p): Revert 2019-08-14 change. Return false
+ for (TARGET_64BIT || mode != DImode).
+
+2019-08-15 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (value_range_base::set): Merge in code from
+ value_range_base::set_and_canonicalize.
+ Enforce canonicalization at set time.
+ Normalize [MIN, MAX] into VARYING and ~[MIN, MAX] into UNDEFINED.
+ (value_range_base::set_undefined): Inline call to set().
+ (value_range_base::set_varying): Same.
+ (value_range_base::singleton_p): Handle VR_ANTI_RANGEs.
+ (vrp_val_max): New argument handle_pointers.
+ (vrp_val_min): Same.
+ (ranges_from_anti_range): Same.
+ (extract_range_into_wide_ints): Use tree argument instead of sign
+ and precision.
+ (extract_range_from_multiplicative_op): Take in tree type instead
+ of precision and sign. Adapt function for canonicalized ranges.
+ (extract_range_from_binary_expr): Pass type to
+ extract_range_from_multiplicative_op.
+ Adapt for canonicalized ranges.
+ (extract_range_from_unary_expr): Same.
+ (value_range_base::intersect_helper): Adjust for canonicalized
+ ranges.
+ (value_range_base::union_helper): Same.
+ (value_range_base::normalize_symbolics): New.
+ * tree-vrp.h (class value_range_base): Remove
+ set_and_canonicalize.
+ New prototype for normalize_symbolics.
+ (class value_range): Remove set_and_canonicalize.
+ (vrp_val_min): Adjust prototype.
+ (vrp_val_max): Same.
+ * vr-values.c
+ (vr_values::extract_range_for_var_from_comparison_expr): Call set
+ instead of set_and_canonicalize.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR middle-end/91444
+ * tree-vect-stmts.c (vectorizable_call): Check that the function
+ is a BUILT_IN_MD function before passing it to
+ targetm.vectorize.builtin_md_vectorized_function.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_sve_mode_p): Declare.
+ * config/aarch64/aarch64.c (aarch64_sve_mode_p): New function.
+ (aarch64_select_early_remat_modes): Use it.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Return
+ 16 for SVE predicates even if they are fixed-length.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (and<PRED_ALL:mode>3): Make the
+ operand order match the MOV /Z alias.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_output_sve_cnt_immediate): Take
+ the vector pattern as an aarch64_svpattern argument. Update the
+ overloaded caller accordingly.
+ (aarch64_output_sve_scalar_inc_dec): Update call accordingly.
+ (aarch64_output_sve_vector_inc_dec): Likewise.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_add_offset): In the fallback
+ multiplication case, try to compute VG * (lowest set bit) directly
+ rather than always basing the multiplication on VG. Use
+ expand_mult for the multiplication if we can.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-protos.h
+ (aarch64_sve_scalar_inc_dec_immediate_p): Declare.
+ (aarch64_sve_inc_dec_immediate_p): Rename to...
+ (aarch64_sve_vector_inc_dec_immediate_p): ...this.
+ (aarch64_output_sve_addvl_addpl): Take a single rtx argument.
+ (aarch64_output_sve_scalar_inc_dec): Declare.
+ (aarch64_output_sve_inc_dec_immediate): Rename to...
+ (aarch64_output_sve_vector_inc_dec): ...this.
+ * config/aarch64/aarch64.c (aarch64_sve_scalar_inc_dec_immediate_p)
+ (aarch64_output_sve_scalar_inc_dec): New functions.
+ (aarch64_output_sve_addvl_addpl): Remove the base and offset
+ arguments. Only handle true ADDVL and ADDPL instructions;
+ don't emit an INC or DEC.
+ (aarch64_sve_inc_dec_immediate_p): Rename to...
+ (aarch64_sve_vector_inc_dec_immediate_p): ...this.
+ (aarch64_output_sve_inc_dec_immediate): Rename to...
+ (aarch64_output_sve_vector_inc_dec): ...this. Update call to
+ aarch64_sve_vector_inc_dec_immediate_p.
+ * config/aarch64/predicates.md (aarch64_sve_scalar_inc_dec_immediate)
+ (aarch64_sve_plus_immediate): New predicates.
+ (aarch64_pluslong_operand): Accept aarch64_sve_plus_immediate
+ rather than aarch64_sve_addvl_addpl_immediate.
+ (aarch64_sve_inc_dec_immediate): Rename to...
+ (aarch64_sve_vector_inc_dec_immediate): ...this. Update call to
+ aarch64_sve_vector_inc_dec_immediate_p.
+ (aarch64_sve_add_operand): Update accordingly.
+ * config/aarch64/constraints.md (Uai): New constraint.
+ (vsi): Update call to aarch64_sve_vector_inc_dec_immediate_p.
+ * config/aarch64/aarch64.md (add<GPI:mode>3): Don't force the second
+ operand into a register if it satisfies aarch64_sve_plus_immediate.
+ (*add<GPI:mode>3_aarch64, *add<GPI:mode>3_poly_1): Add an alternative
+ for Uai. Update calls to aarch64_output_sve_addvl_addpl.
+ * config/aarch64/aarch64-sve.md (add<mode>3): Call
+ aarch64_output_sve_vector_inc_dec instead of
+ aarch64_output_sve_inc_dec_immediate.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/iterators.md (UNSPEC_REVB, UNSPEC_REVH)
+ (UNSPEC_REVW): New constants.
+ (elem_bits): New mode attribute.
+ (SVE_INT_UNARY): New int iterator.
+ (optab): Handle UNSPEC_REV[BHW].
+ (sve_int_op): New int attribute.
+ (min_elem_bits): Handle VNx16QI and the predicate modes.
+ * config/aarch64/aarch64-sve.md (*aarch64_sve_rev64<mode>)
+ (*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Delete.
+ (@aarch64_pred_<SVE_INT_UNARY:optab><SVE_I:mode>): New pattern.
+ * config/aarch64/aarch64.c (aarch64_sve_data_mode): New function.
+ (aarch64_sve_int_mode, aarch64_sve_rev_unspec): Likewise.
+ (aarch64_split_sve_subreg_move): Use UNSPEC_REV[BHW] instead of
+ unspecs based on the total width of the reversed data.
+ (aarch64_evpc_rev_local): Likewise (for SVE only). Use a
+ reinterpret followed by a subreg on big-endian targets.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md
+ (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Add /z
+ alternatives in which one of the inputs is in the same register
+ as the output.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_ext)
+ (*aarch64_sve_ext<mode>): Add MOVPRFX alternatives.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (*sub<SVE_F:mode>3): Remove immediate
+ FADD and FSUB alternatives. Add a MOVPRFX alternative for FSUBR.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (add<SVE_I:mode>3, sub<SVE_I:mode>3)
+ (<LOGICAL:optab><SVE_I:mode>3, *add<SVE_F:mode>3, *mul<SVE_F:mode>3)
+ (*fabd<SVE_F:mode>3): Add more MOVPRFX alternatives.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (*v<ASHIFT:optab><SVE_I:mode>3):
+ Add an alternative that uses reversed shifts.
+
+2019-08-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-cores.def (cortex-a76): Use neoversen1 tuning
+ struct.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (aarch64_<su>abd<mode>_3): Add
+ a commutativity marker.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-protos.h (aarch64_prepare_sve_int_fma)
+ (aarch64_prepare_sve_cond_int_fma): Declare.
+ * config/aarch64/aarch64.c (aarch64_convert_mult_to_shift)
+ (aarch64_prepare_sve_int_fma): New functions.
+ (aarch64_prepare_sve_cond_int_fma): Likewise.
+ * config/aarch64/aarch64-sve.md
+ (cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Add a "@" marker.
+ (fma<SVE_I:mode>4, cond_fma<SVE_I:mode>, *cond_fma<SVE_I:mode>_2)
+ (*cond_fma<SVE_I:mode>_4, *cond_fma<SVE_I:mode>_any, fnma<SVE_I:mode>4)
+ (cond_fnma<SVE_I:mode>, *cond_fnma<SVE_I:mode>_2)
+ (*cond_fnma<SVE_I:mode>_4, *cond_fnma<SVE_I:mode>_any): New patterns.
+ (*madd<mode>): Rename to...
+ (*fma<mode>4): ...this.
+ (*msub<mode>): Rename to...
+ (*fnma<mode>4): ...this.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64.c (aarch64_print_vector_float_operand):
+ Print 2.0 naturally.
+ (aarch64_sve_float_mul_immediate_p): Return true for 2.0.
+ * config/aarch64/predicates.md
+ (aarch64_sve_float_negated_arith_immediate): New predicate,
+ renamed from aarch64_sve_float_arith_with_sub_immediate.
+ (aarch64_sve_float_arith_with_sub_immediate): Test for both
+ positive and negative constants.
+ (aarch64_sve_float_arith_with_sub_operand): Redefine as a register
+ or an aarch64_sve_float_arith_with_sub_immediate.
+ * config/aarch64/constraints.md (vsN): Use
+ aarch64_sve_float_negated_arith_immediate.
+ * config/aarch64/iterators.md (SVE_COND_FP_BINARY_I1): New int
+ iterator.
+ (sve_pred_fp_rhs2_immediate): New int attribute.
+ * config/aarch64/aarch64-sve.md
+ (cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>): Use
+ sve_pred_fp_rhs1_operand and sve_pred_fp_rhs2_operand.
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_2_const)
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_any_const)
+ (*cond_add<SVE_F:mode>_2_const, *cond_add<SVE_F:mode>_any_const)
+ (*cond_sub<mode>_3_const, *cond_sub<mode>_any_const): New patterns.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (*aarch64_cond_abd<SVE_F:mode>_2)
+ (*aarch64_cond_abd<SVE_F:mode>_3)
+ (*aarch64_cond_abd<SVE_F:mode>_any): New patterns.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (*aarch64_cond_<su>abd<mode>_2)
+ (*aarch64_cond_<su>abd<mode>_any): New patterns.
+
+2019-08-15 Richard Sandiford <richard.sandiford@arm.com>
+ Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ * internal-fn.def (IFN_COND_SHL, IFN_COND_SHR): New internal functions.
+ * internal-fn.c (FOR_EACH_CODE_MAPPING): Handle shifts.
+ * match.pd (UNCOND_BINARY, COND_BINARY): Likewise.
+ * optabs.def (cond_ashl_optab, cond_ashr_optab, cond_lshr_optab): New
+ optabs.
+ * optabs.h (create_convert_operand_from): Expand comment.
+ * optabs.c (maybe_legitimize_operand): Allow implicit broadcasts
+ when mapping scalar rtxes to vector operands.
+ * config/aarch64/iterators.md (SVE_INT_BINARY): Add ashift,
+ ashiftrt and lshiftrt.
+ (sve_int_op, sve_int_op_rev, sve_pred_int_rhs2_operand): Handle them.
+ * config/aarch64/aarch64-sve.md (*cond_<optab><mode>_2_const)
+ (*cond_<optab><mode>_any_const): New patterns.
+
+2019-08-15 Martin Liska <mliska@suse.cz>
+
+ PR ipa/91438
+ * cgraph.c (cgraph_node::remove): When setting
+ n->origin = NULL for all nested functions, reset
+ also next_nested.
+
+2019-08-15 Martin Liska <mliska@suse.cz>
+
+ * cgraph.c (cgraph_node::verify_node): Verify origin, nested
+ and next_nested.
+
+2019-08-15 Martin Liska <mliska@suse.cz>
+
+ PR ipa/91404
+ * passes.c (order): Remove.
+ (uid_hash_t): Likewise).
+ (remove_cgraph_node_from_order): Remove from set
+ of pointers (cgraph_node *).
+ (insert_cgraph_node_to_order): New.
+ (duplicate_cgraph_node_to_order): New.
+ (do_per_function_toporder): Register all 3 cgraph hooks.
+ Skip removed_nodes now as we know about all of them.
+
+2019-08-14 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_vector_init_one_nonzero)
+ <case E_V8QImode>: Use vector_set path for
+ TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ (ix86_expand_vector_init_one_var) <case E_V8QImode>:
+ Do not widen for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+
+2019-08-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * builtins.c (expand_builtin_init_descriptor): Set memory alignment.
+
+2019-08-14 Martin Sebor <msebor@redhat.com>
+
+ PR tree-optimization/91294
+ * tree-ssa-strlen.c (handle_store): Avoid treating lower bound of
+ source length as exact.
+
+2019-08-14 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * doc/extend.texi: Add "noinit" attribute documentation.
+ * doc/sourcebuild.texi: Add noinit effective target documentation.
+ * varasm.c (default_section_type_flags): Add support for "noinit"
+ section.
+ (default_elf_select_section): Add support for "noinit" attribute.
+ * config/msp430/msp430.c (msp430_attribute_table): Remove
+ "noinit" entry.
+
+2019-08-14 Richard Biener <rguenther@suse.de>
+ Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/91154
+ * config/i386/i386-features.h (scalar_chain::scalar_chain): Add
+ mode arguments.
+ (scalar_chain::smode): New member.
+ (scalar_chain::vmode): Likewise.
+ (dimode_scalar_chain): Rename to...
+ (general_scalar_chain): ... this.
+ (general_scalar_chain::general_scalar_chain): Take mode arguments.
+ (timode_scalar_chain::timode_scalar_chain): Initialize scalar_chain
+ base with TImode and V1TImode.
+ * config/i386/i386-features.c (scalar_chain::scalar_chain): Adjust.
+ (general_scalar_chain::vector_const_cost): Adjust for SImode
+ chains.
+ (general_scalar_chain::compute_convert_gain): Likewise. Add
+ {S,U}{MIN,MAX} support.
+ (general_scalar_chain::replace_with_subreg): Use vmode/smode.
+ (general_scalar_chain::make_vector_copies): Likewise. Handle
+ non-DImode chains appropriately.
+ (general_scalar_chain::convert_reg): Likewise.
+ (general_scalar_chain::convert_op): Likewise.
+ (general_scalar_chain::convert_insn): Likewise. Add
+ fatal_insn_not_found if the result is not recognized.
+ (convertible_comparison_p): Pass in the scalar mode and use that.
+ (general_scalar_to_vector_candidate_p): Likewise. Rename from
+ dimode_scalar_to_vector_candidate_p. Add {S,U}{MIN,MAX} support.
+ (scalar_to_vector_candidate_p): Remove by inlining into single
+ caller.
+ (general_remove_non_convertible_regs): Rename from
+ dimode_remove_non_convertible_regs.
+ (remove_non_convertible_regs): Remove by inlining into single caller.
+ (convert_scalars_to_vector): Handle SImode and DImode chains
+ in addition to TImode chains.
+ * config/i386/i386.md (<maxmin><MAXMIN_IMODE>3): New expander.
+ (*<maxmin><MAXMIN_IMODE>3_1): New insn-and-split.
+ (*<maxmin>di3_doubleword): Likewise.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2)
+ (*cond_bic<mode>_any): New patterns.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_print_operand): Allow %e to
+ take the equivalent mask, as well as a bit count.
+ * config/aarch64/predicates.md (aarch64_sve_uxtb_immediate)
+ (aarch64_sve_uxth_immediate, aarch64_sve_uxt_immediate)
+ (aarch64_sve_pred_and_operand): New predicates.
+ * config/aarch64/iterators.md (sve_pred_int_rhs2_operand): New
+ code attribute.
+ * config/aarch64/aarch64-sve.md
+ (cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Use it.
+ (*cond_uxt<mode>_2, *cond_uxt<mode>_any): New patterns.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md
+ (*cond_<SVE_COND_FCVTI:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>)
+ (*cond_<SVE_COND_ICVTF:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>):
+ New patterns.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md
+ (*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_2): New pattern.
+ (*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_any): Likewise.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+ Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
+
+ * config/aarch64/aarch64-sve.md
+ (*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_2): New pattern.
+ (*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_any): Likewise.
+
+2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/iterators.md (SVE_COND_FP_ABS_CMP): New iterator.
+ * config/aarch64/aarch64-sve.md (*aarch64_pred_fac<cmp_op><mode>):
+ New pattern.
+
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
2019-08-13 Uroš Bizjak <ubizjak@gmail.com>
- * config/i386/i386.md (ix86_expand_vector_extract) <case E_V2SImode>:
- Use vec_extr path for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ * config/i386/i386-expand.c (ix86_expand_vector_extract)
+ <case E_V2SImode>: Use vec_extr path for
+ TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
<case E_V8QImode>: Ditto.
* config/i386/mmx.md (*mmx_pextrw_zext): Rename from mmx_pextrw.
Use SWI48 mode iterator. Use %k to output operand 0.
2019-08-13 Uroš Bizjak <ubizjak@gmail.com>
- * config/i386/i386.md (ix86_expand_vector_set) <case E_V2SImode>:
- Use vec_merge path for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ * config/i386/i386-expand.c (ix86_expand_vector_set)
+ <case E_V2SImode>: Use vec_merge path for
+ TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
<case E_V8QImode>: Ditto.
* config/i386/mmx.md (*mmx_pinsrd): New insn pattern.
(*mmx_pinsrb): Ditto.
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