[Arm] Add 16-bit thumb alternatives to iorsi3_compare0[_scratch]

[thirdparty/gcc.git] / gcc / ChangeLog

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ecb7c06507cb83e3c8f53ba07667ca34b0a9660a..93e8420ea93549588d7b6e8cb6fb090173456260 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,113 @@
+2019-08-22  Richard Earnshaw  <rearnsha@arm.com>
+
+       * config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb
+       insn.
+       (iorsi3_compare0_scratch): Likewise.
+
+2019-08-22  Sylvia Taylor  <sylvia.taylor@arm.com>
+
+       * config/aarch64/aarch64-simd-builtins.def:
+       (ld1x4): New.
+       (st1x4): Likewise.
+       * config/aarch64/aarch64-simd.md:
+       (aarch64_ld1x4<VALLDIF:mode>): New pattern.
+       (aarch64_st1x4<VALLDIF:mode>): Likewise.
+       (aarch64_ld1_x4_<mode>): Likewise.
+       (aarch64_st1_x4_<mode>): Likewise.
+       * config/aarch64/arm_neon.h:
+       (vld1_s8_x4): New function.
+       (vld1q_s8_x4): Likewise.
+       (vld1_s16_x4): Likewise.
+       (vld1q_s16_x4): Likewise.
+       (vld1_s32_x4): Likewise.
+       (vld1q_s32_x4): Likewise.
+       (vld1_u8_x4): Likewise.
+       (vld1q_u8_x4): Likewise.
+       (vld1_u16_x4): Likewise.
+       (vld1q_u16_x4): Likewise.
+       (vld1_u32_x4): Likewise.
+       (vld1q_u32_x4): Likewise.
+       (vld1_f16_x4): Likewise.
+       (vld1q_f16_x4): Likewise.
+       (vld1_f32_x4): Likewise.
+       (vld1q_f32_x4): Likewise.
+       (vld1_p8_x4): Likewise.
+       (vld1q_p8_x4): Likewise.
+       (vld1_p16_x4): Likewise.
+       (vld1q_p16_x4): Likewise.
+       (vld1_s64_x4): Likewise.
+       (vld1_u64_x4): Likewise.
+       (vld1_p64_x4): Likewise.
+       (vld1q_s64_x4): Likewise.
+       (vld1q_u64_x4): Likewise.
+       (vld1q_p64_x4): Likewise.
+       (vld1_f64_x4): Likewise.
+       (vld1q_f64_x4): Likewise.
+       (vst1_s8_x4): Likewise.
+       (vst1q_s8_x4): Likewise.
+       (vst1_s16_x4): Likewise.
+       (vst1q_s16_x4): Likewise.
+       (vst1_s32_x4): Likewise.
+       (vst1q_s32_x4): Likewise.
+       (vst1_u8_x4): Likewise.
+       (vst1q_u8_x4): Likewise.
+       (vst1_u16_x4): Likewise.
+       (vst1q_u16_x4): Likewise.
+       (vst1_u32_x4): Likewise.
+       (vst1q_u32_x4): Likewise.
+       (vst1_f16_x4): Likewise.
+       (vst1q_f16_x4): Likewise.
+       (vst1_f32_x4): Likewise.
+       (vst1q_f32_x4): Likewise.
+       (vst1_p8_x4): Likewise.
+       (vst1q_p8_x4): Likewise.
+       (vst1_p16_x4): Likewise.
+       (vst1q_p16_x4): Likewise.
+       (vst1_s64_x4): Likewise.
+       (vst1_u64_x4): Likewise.
+       (vst1_p64_x4): Likewise.
+       (vst1q_s64_x4): Likewise.
+       (vst1q_u64_x4): Likewise.
+       (vst1q_p64_x4): Likewise.
+       (vst1_f64_x4): Likewise.
+       (vst1q_f64_x4): Likewise.
+
+2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       * config/aarch64/aarch64-sve.md (vcond_mask): Add "@".
+
+2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+           Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR target/88839
+       * config/aarch64/aarch64.c (aarch64_evpc_sel): New function.
+       (aarch64_expand_vec_perm_const_1): Call aarch64_evpc_sel.
+
+2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       PR target/90724
+       * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
+       in reg if it fails aarch64_plus_operand predicate.
+
+2019-08-21  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/91482
+       * tree-ssa-ccp.c (ccp_folder::fold_stmt): Remove useless
+       BUILT_IN_ASSUME_ALIGNED calls.
+
+2019-08-21  Richard Biener  <rguenther@suse.de>
+
+       PR target/91498
+       PR target/91503
+       * config/i386/i386-features.c
+       (general_scalar_chain::make_vector_copies): Copy stack temporary
+       rtx when using it multiple times.
+       (general_scalar_chain::convert_reg): Likewise.
+
+2019-08-20  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+
+       * function.c (assign_parm_find_stack_rtl): Use known_eq instead of ==.
+
 2019-08-20  Matthew Beliveau  <mbelivea@redhat.com>
 
        * tree-ssa-dse.c (dse_optimize_redundant_stores): Improved check to