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6 months agoi386: Use "addr" attribute to limit address regclass to non-REX regs
Uros Bizjak [Mon, 6 Nov 2023 15:27:52 +0000 (16:27 +0100)] 
i386: Use "addr" attribute to limit address regclass to non-REX regs

Use "addr" attribute with "gpr8" value to limit address register class
to non-REX registers in instructions with high registers, where REX
registers can not be used in the address.

gcc/ChangeLog:

* config/i386/constraints.md (Bc): Remove constraint.
(Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
* config/i386/i386.cc (ix86_memory_address_reg_class):
Do not limit processing to TARGET_APX_EGPR.  Exit early for
NULL insn.  Do not check recog_data.insn before calling
extract_insn_cached.
(ix86_insn_base_reg_class): Handle ADDR_GPR8.
(ix86_regno_ok_for_insn_base_p): Ditto.
(ix86_insn_index_reg_class): Ditto.
* config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
Remove insn pattern and corresponding peephole2 pattern.
(*cmpi_ext<mode>_1): Remove (m,Q) alternative.
Change (QBc,Q) alternative to (QBn,Q).  Add "addr" attribute.
(*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
and corresponding peephole2 pattern.
(*cmpi_ext<mode>_3): Remove (Q,m) alternative.
Change (Q,QnBc) alternative to (Q,QnBn).  Add "addr" attribute.
(*extzvqi_mem_rex64): Remove insn pattern and
corresponding peephole2 pattern.
(*extzvqi): Remove (Q,m) alternative.  Change (Q,QnBc)
alternative to (Q,QnBn).  Add "addr" attribute.
(*insvqi_1_mem_rex64): Remove insn pattern and
corresponding peephole2 pattern.
(*insvqi_1): Remove (Q,m) alternative.  Change (Q,QnBc)
alternative to (Q,QnBn).  Add "addr" attribute.
(@insv<mode>_1): Ditto.
(*addqi_ext<mode>_0): Remove (m,0,Q) alternative.  Change (QBc,0,Q)
alternative to (QBn,0,Q).  Add "addr" attribute.
(*subqi_ext<mode>_0): Ditto.
(*andqi_ext<mode>_0): Ditto.
(*<any_or:code>qi_ext<mode>_0): Ditto.
(*addqi_ext<mode>_1): Remove (Q,0,m) alternative.  Change (Q,0,QnBc)
alternative to (Q,0,QnBn).  Add "addr" attribute.
(*andqi_ext<mode>_1): Ditto.
(*andqi_ext<mode>_1_cc): Ditto.
(*<any_or:code>qi_ext<mode>_1): Ditto.
(*xorqi_ext<mode>_1_cc): Ditto.
* config/i386/predicates.md (nonimm_x64constmem_operand):
Remove predicate.
(general_x64constmem_operand): Ditto.
(norex_memory_operand): Ditto.

6 months agoc: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]
Joseph Myers [Mon, 6 Nov 2023 15:01:22 +0000 (15:01 +0000)] 
c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]

At the June WG14 meeting, WG14 decided it preferred to keep C23 as the
informal name for the next revision of the C standard, despite
publication not being before 2024 (publication is due in 2024 whether
or not technical changes at the January meeting result in an FDIS
ballot being needed).  At the Cauldron I raised the question of
whether we should thus now add option names such as -std=c23 to GCC,
and there was support for doing so.

Add -std=c23, making -std=c2x a deprecated alias; also add the alias
-std=iso9899:2024.  Likewise, add -std=gnu23, making -std=gnu2x a
deprecated alias, and add -Wc11-c23-compat, making -Wc11-c2x-compat a
deprecated alias.

Here, I'm generally just adding the new options and making the minimum
changes required to do so, with documentation changed to refer to C23
instead of C2X only where directly associated with documentation of
these options.  It's intended that future changes will update
documentation, diagnostics, comments, variable names, testcase names,
etc. to refer consistently to C23.  When such changes are made, the
new tests c23-opts-3.c, c23-opts-5.c and gnu23-opts-2.c are intended
to keep using the old option names they are specifically testing,
while other tests would start using the c23/gnu23 versions of the
names (as well as the tests themselves being renamed).

Updating option names is independent of updating to the final
__STDC_VERSION__ value.  There, the question is whether we should
update the value now or wait for the remaining significant features to
be implemented first.  (I intend to review Martin's tag compatibility
patches for GCC 14.  I'm not aware of anyone working on #embed - or on
the [[unsequenced]] and [[reproducible]] attributes, though support
for standard attributes is optional.)

Bootstrapped with no regressions for x86_64-pc-linux-gnu.

PR c/107954

gcc/
* doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
-std=gnu23 instead of -std=c2x and -std=gnu2x.
* doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
instead of C2x and -std=c2x.
* doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
(-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
-std=gnu2x as deprecated aliases.  Update descriptions of C23.
* doc/standards.texi (Standards): Describe C23 with C2X as an old
name.

gcc/c-family/
* c.opt (Wc11-c2x-compat): Rename to Wc11-c23-compat and make into
a deprecated alias of Wc11-c23-compat.
(std=c2x): Rename to std=c23 and make into a deprecated alias of
std=c23.
(std=gnu2x): Rename to std=gnu23 and make into a deprecated alias
of std=gnu23.
(std=iso9899:2024): New option.  Alias of std=c23.
* c-lex.cc (interpret_float): Use OPT_Wc11_c23_compat instead of
OPT_Wc11_c2x_compat.
* c-opts.cc (c_common_handle_option): Use OPT_std_c23 instead of
OPT_std_c2x and OPT_std_gnu23 instead of OPT_std_gnu2x.

gcc/c/
* c-errors.cc (pedwarn_c11): Use OPT_Wc11_c23_compat instead of
OPT_Wc11_c2x_compat.
* c-typeck.cc (build_conditional_expr, convert_for_assignment):
Use OPT_Wc11_c23_compat instead of OPT_Wc11_c2x_compat.

gcc/testsuite/
* gcc.dg/c23-opts-1.c, gcc.dg/c23-opts-2.c, gcc.dg/c23-opts-3.c,
gcc.dg/c23-opts-4.c, gcc.dg/c23-opts-5.c, gcc.dg/gnu23-opts-1.c,
gcc.dg/gnu23-opts-2.c: New tests.

6 months agonvptx: Use the usual '#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)'
Thomas Schwinge [Thu, 14 Jul 2022 21:22:35 +0000 (23:22 +0200)] 
nvptx: Use the usual '#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)'

With this 'MAKE_DECL_ONE_ONLY' definition, we get 'SUPPORTS_ONE_ONLY', and thus
'__GXX_WEAK__', and thus '__GXX_TYPEINFO_EQUALITY_INLINE'.  This unblocks build
of 'libstdc++-v3/libsupc++/tinfo.cc', which otherwise depends on symbol alias
support, which GCC/nvptx doesn't generally provide.  Also, this gets us a
number of FAIL -> PASS progressions in the test suite.

Given that GCC/nvptx support for weak symbols isn't complete, we also get a few
more of the already-known
'error: PTX does not support weak declarations (only weak definitions)':

    [-PASS:-]{+FAIL:+} g++.old-deja/g++.other/crash11.C  -std=c++14 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.other/crash11.C  -std=c++17 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.other/crash11.C  -std=c++20 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.other/crash11.C  -std=c++98 (test for excess errors)

    [-PASS:-]{+FAIL:+} g++.old-deja/g++.pt/crash29.C  -std=c++14 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.pt/crash29.C  -std=c++17 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.pt/crash29.C  -std=c++20 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.pt/crash29.C  -std=c++98 (test for excess errors)

    [-PASS:-]{+FAIL:+} 23_containers/map/56613.cc  -std=gnu++17 (test for excess errors)

... as well as one more of the already-known
'sorry, unimplemented: target cannot support nonlocal goto':

    PASS: g++.dg/tree-ssa/pr22488.C  -std=gnu++14 (test for excess errors)
    PASS: g++.dg/tree-ssa/pr22488.C  -std=gnu++17 (test for excess errors)
    PASS: g++.dg/tree-ssa/pr22488.C  -std=gnu++20 (test for excess errors)
    [-PASS:-]{+FAIL:+} g++.dg/tree-ssa/pr22488.C  -std=gnu++98 (test for excess errors)

We shall look into these, later.

gcc/
* config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.

6 months agotree-optimization/112405 - SIMD clone calls with (loop) mask
Richard Biener [Mon, 6 Nov 2023 13:34:07 +0000 (14:34 +0100)] 
tree-optimization/112405 - SIMD clone calls with (loop) mask

The following fixes the mask argument generation for SIMD clone
calls under either loop masking or when the actual call is not
masked but only a inbranch simd clone is available.  The issue
was that we tried to directly convert the vector mask to the
call argument type but SIMD clone masks require 1 or 0 (which
could be even float) values for mask elements so we have to
resort to a VEC_COND_EXPR to generate them just like we do for
regular passing of the mask.

PR tree-optimization/112405
* tree-vect-stmts.cc (vectorizable_simd_clone_call):
Properly handle invariant and/or loop mask passing.

6 months agoRISC-V: Support FP round to i/l/ll diff size autovec
Pan Li [Mon, 6 Nov 2023 14:10:14 +0000 (22:10 +0800)] 
RISC-V: Support FP round to i/l/ll diff size autovec

This patch would like to support the FP below API auto vectorization
with different type size

+----------+-----------+----------+
| API      | RV64      | RV32     |
+----------+-----------+----------+
| iround   | DF => SI  | DF => SI |
| iroundf  | -         | -        |
| lround   | -         | DF => SI |
| lroundf  | SF => DI  | -        |
| llround  | -         | -        |
| llroundf | SF => DI  | SF => DI |
+----------+-----------+----------+

Given below code:
void
test_lroundf (long *out, float *in, unsigned count)
{
  for (unsigned i = 0; i < count; i++)
    out[i] = __builtin_lroundf (in[i]);
}

Before this patch:
.L3:
  flw      fa5,0(a1)
  addi     a1,a1,4
  addi     a0,a0,8
  fcvt.l.s a5,fa5,rmm
  sd       a5,-8(a0)
  bne      a4,a1,.L3

After this patch:
  fsrmi        4  // RMM rounding mode
  vsetivli     zero,16,e32,m4,ta,ma
.L4:
  vle32.v      v4,0(a5)
  addi         a5,a5,64
  vfwcvt.x.f.v v8,v4
  vse64.v      v8,0(a4)
  addi         a4,a4,128
  bne          a3,a5,.L4
  andi         a5,a2,15
  andi         a4,a2,-16
  beq          a5,zero,.L16

Unfortunately, the HF mode is not include due to it requires
additional middle-end support from internal-fun.def.

gcc/ChangeLog:

* config/riscv/autovec.md: Remove the size check of lround.
* config/riscv/riscv-v.cc (expand_vec_lround): Leverage
emit_vec_rounding_to_integer for round.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-iround-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-iround-run-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llroundf-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llroundf-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lround-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lround-rv32-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lroundf-rv64-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lroundf-rv64-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-iround-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agoRISC-V: Early expand DImode vec_duplicate in RV32 system
Juzhe-Zhong [Mon, 6 Nov 2023 14:12:48 +0000 (22:12 +0800)] 
RISC-V: Early expand DImode vec_duplicate in RV32 system

An ICE was discovered in recent rounding autovec support:

config/riscv/riscv-v.cc:4314
   65 | }
      | ^
0x1fa5223 riscv_vector::validate_change_or_fail(rtx_def*, rtx_def**,
rtx_def*, bool)
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-v.cc:4314
0x1fb1aa2 pre_vsetvl::remove_avl_operand()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3342
0x1fb18c1 pre_vsetvl::cleaup()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3308
0x1fb216d pass_vsetvl::lazy_vsetvl()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3480
0x1fb2214 pass_vsetvl::execute(function*)
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3504

The root cause is that the RA reload into (set (reg) vec_duplicate:DI). However, it is not valid in RV32 system
since we don't have a single broadcast instruction DI scalar in RV32 system.
We should expand it early for RV32 system.

gcc/ChangeLog:

* config/riscv/predicates.md: Adapt predicate.
* config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
* config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
* config/riscv/vector.md (vec_duplicate<mode>): New pattern.
(*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/sew64-rv32.c: New test.

6 months agotree-optimization/111950 - vectorizer loop copying
Richard Biener [Fri, 3 Nov 2023 13:24:10 +0000 (14:24 +0100)] 
tree-optimization/111950 - vectorizer loop copying

The following simplifies LC-PHI arg population during epilog peeling,
thereby fixing the testcase in this PR.

PR tree-optimization/111950
* tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
Remove.
(find_guard_arg): Likewise.
(slpeel_update_phi_nodes_for_guard2): Likewise.
(slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
slpeel_duplicate_current_defs_from_edges, do not elide
LC-PHIs for invariant values.
(vect_do_peeling): Materialize PHI arguments for the edge
around the epilog from the PHI defs of the main loop exit.

* gcc.dg/torture/pr111950.c: New testcase.

6 months agotree-optimization/112404 - two issues with SLP of .MASK_LOAD
Richard Biener [Mon, 6 Nov 2023 11:43:11 +0000 (12:43 +0100)] 
tree-optimization/112404 - two issues with SLP of .MASK_LOAD

The following fixes an oversight in vect_check_scalar_mask when
the mask is external or constant.  When doing BB vectorization
we need to provide a group_size, best via an overload accepting
the SLP node as argument.

When fixed we then run into the issue that we have not analyzed
alignment of the .MASK_LOADs because they were not identified
as loads by vect_gather_slp_loads.  Fixed by reworking the
detection.

PR tree-optimization/112404
* tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
overload with SLP node argument.
* tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
(vect_check_scalar_mask): Use it.
* tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
loads also for nodes with children, like .MASK_LOAD.
* tree-vect-loop.cc (vect_analyze_loop_2): Look at the
representative for load nodes and check whether it is a grouped
access before looking for load-lanes support.

* gfortran.dg/pr112404.f90: New testcase.

6 months agoC99 testsuite readiness: Some unverified test case un-reductions
Florian Weimer [Mon, 6 Nov 2023 11:57:12 +0000 (12:57 +0100)] 
C99 testsuite readiness: Some unverified test case un-reductions

gcc/testsuite/

* gcc.c-torture/compile/20000412-2.c (f): Call
__builtin_strlen instead of strlen.
* gcc.c-torture/compile/20000427-1.c (FindNearestPowerOf2):
Declare.
* gcc.c-torture/compile/20000802-1.c (bar): Call
__builtin_memcpy instead of memcpy.
* gcc.c-torture/compile/20010525-1.c (kind_varread): Likewise.
* gcc.c-torture/compile/20010706-1.c (foo): Add missing int
return type.
* gcc.c-torture/compile/20020314-1.c (add_output_space_event)
(del_tux_atom, add_req_to_workqueue): Declare.
* gcc.c-torture/compile/20020701-1.c (f): Call
__builtin_memcpy instead of memcpy.
* gcc.c-torture/compile/20021015-2.c (f): Call __builtin_bcmp
instead of bcmo.
* gcc.c-torture/compile/20030110-1.c (inb): Declare.
* gcc.c-torture/compile/20030314-1.c (bar): Add missing
void return type.
* gcc.c-torture/compile/20030405-1.c (bar): Add missing int
return type.
* gcc.c-torture/compile/20030416-1.c (bar): Declare.
(main): Add missing int return type.
* gcc.c-torture/compile/20030503-1.c (bar): Declare.
* gcc.c-torture/compile/20030530-1.c: (bar): Declare.
* gcc.c-torture/compile/20031031-2.c (foo, bar, baz): Declare.
* gcc.c-torture/compile/20040101-1.c (test16): Call
__builtin_printf instead of printf.
* gcc.c-torture/compile/20040124-1.c (f2, f3): Declare.
* gcc.c-torture/compile/20040304-1.c (macarg): Declare.
* gcc.c-torture/compile/20040705-1.c (f): Call
__builtin_memcpy instead of memcpy.
* gcc.c-torture/compile/20040908-1.c (bar): Declare.
* gcc.c-torture/compile/20050510-1.c (dont_remove): Declare.
* gcc.c-torture/compile/20051228-1.c (bar): Declare.
* gcc.c-torture/compile/20060109-1.c (cpp_interpret_string):
Declare.
(int_c_lex, cb_ident): Add missing void return type.
(cb_ident): Define as static.
* gcc.c-torture/compile/20060202-1.c (sarray_get): Declare.
* gcc.c-torture/compile/20070129.c (regcurly)
(reguni): Declare.
* gcc.c-torture/compile/20070529-1.c (__fswab16): Declare.
* gcc.c-torture/compile/20070529-2.c (kmem_free): Declare.
* gcc.c-torture/compile/20070605-1.c (quantize_fs_dither):
Add missing void return type.
* gcc.c-torture/compile/20071107-1.c
(settings_install_property_parser): Declare.
* gcc.c-torture/compile/20090907-1.c (load_waveform): Call
__builtin_abort instead of abort.
* gcc.c-torture/compile/20100907.c (t): Add missing void
types.
* gcc.c-torture/compile/20120524-1.c (build_packet): Call
__builtin_memcpy instead of memcpy.
* gcc.c-torture/compile/20120830-2.c
(ubidi_writeReordered_49): Add missing void return type.
* gcc.c-torture/compile/20121010-1.c (read_long): Add missing
int return type.
* gcc.c-torture/compile/920301-1.c (f, g): Add missing void
types.
* gcc.c-torture/compile/920409-1.c (x): Likewise.
* gcc.c-torture/compile/920410-1.c (main): Add missing int
return type.  Call __builtin_printf instead of printf.
* gcc.c-torture/compile/920410-2.c (joe): Add missing void
types.
* gcc.c-torture/compile/920411-2.c (x): Likewise.
* gcc.c-torture/compile/920413-1.c (f): Add missing int return
type.
* gcc.c-torture/compile/920428-3.c (x): Add missing int types.
* gcc.c-torture/compile/920428-4.c (x): Add missing void
return type and int parameter type.
* gcc.c-torture/compile/920501-10.c (x): Add missing int
types.
* gcc.c-torture/compile/920501-12.c (x, a, b, A, B): Likewise.
* gcc.c-torture/compile/920501-17.c (x): Add missing void
types.
* gcc.c-torture/compile/920501-19.c (y): Likewise.
* gcc.c-torture/compile/920501-22.c (x): Likewise.
* gcc.c-torture/compile/920501-3.c (x): Likewise.
* gcc.c-torture/compile/920501-4.c (foo): Likewise.
* gcc.c-torture/compile/920529-1.c (f): Call __builtin_abort
instead of abort.
* gcc.c-torture/compile/920615-1.c (f): Add missing void
types.
* gcc.c-torture/compile/920623-1.c (g): Likewise.
* gcc.c-torture/compile/920624-1.c (f): Likewise.
* gcc.c-torture/compile/920711-1.c (f): Add missing int types.
* gcc.c-torture/compile/920729-1.c (f): Add missing void
types.
* gcc.c-torture/compile/920806-1.c (f): Likewise.
* gcc.c-torture/compile/920821-2.c (f): Likewise.
* gcc.c-torture/compile/920825-1.c (f): Likewise.
* gcc.c-torture/compile/920825-2.c (f, g): Add missing void
return type.
* gcc.c-torture/compile/920826-1.c (f): Likewise.
* gcc.c-torture/compile/920828-1.c (f): Add missing int types.
* gcc.c-torture/compile/920829-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/920928-3.c (f): Likewise.
* gcc.c-torture/compile/921012-2.c (f): Likewise.
* gcc.c-torture/compile/921013-1.c (f): Likewise.
* gcc.c-torture/compile/921019-1.c (f): Add missing void
types.
* gcc.c-torture/compile/921026-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/921126-1.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/921227-1.c (f): Add missing void
types.
* gcc.c-torture/compile/930109-2.c (f): Add missing int types.
* gcc.c-torture/compile/930210-1.c (f): Add missing void
types.
* gcc.c-torture/compile/930222-1.c (g): Declare.
(f): Add missing int return type.
* gcc.c-torture/compile/930421-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/930503-1.c (f): Likewise.
* gcc.c-torture/compile/930513-1.c (f): Add missing int return
type.
* gcc.c-torture/compile/930513-3.c (test): Add missing void
types.
* gcc.c-torture/compile/930523-1.c (f): Likewise.
* gcc.c-torture/compile/930527-1.c (f): Likewise.
* gcc.c-torture/compile/930603-1.c (f): Likewise.
* gcc.c-torture/compile/930607-1.c (g): Likewise.
* gcc.c-torture/compile/930702-1.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/931018-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/931031-1.c (f): Likewise.
* gcc.c-torture/compile/931102-1.c (xxx): Add missing void
types.
* gcc.c-torture/compile/940611-1.c (f): Likewise.
* gcc.c-torture/compile/940712-1.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/950512-1.c (g): Declare.
(f): Add missing void return type.
* gcc.c-torture/compile/950530-1.c (f): Add missing int
return type.
* gcc.c-torture/compile/950610-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/950613-1.c (f): Add missing void
types.
* gcc.c-torture/compile/950816-1.c (f): Add missing int return
type and missing void.
* gcc.c-torture/compile/950816-2.c (func): Declare.
(f): Add missing void types.
* gcc.c-torture/compile/950816-3.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/950919-1.c (f): Add missing void
types.
* gcc.c-torture/compile/950921-1.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/951004-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/951116-1.c (f): Add missing int
return type and missing void.
* gcc.c-torture/compile/951128-1.c (f): Add missing void
return type.
* gcc.c-torture/compile/951220-1.c (f): Add missing int return
type.
* gcc.c-torture/compile/960220-1.c (f): Add missing void
types.
* gcc.c-torture/compile/960221-1.c (foo): Add missing void
return type.
* gcc.c-torture/compile/960704-1.c (main): Add missing int
return type and missing void.
* gcc.c-torture/compile/961031-1.c (f): Add missing void
types.
* gcc.c-torture/compile/961126-1.c (sub, sub2): Declare.
(main): Add missing int return type and missing void.
* gcc.c-torture/compile/961203-1.c (main): Call __builtin_exit
instead of exit.
* gcc.c-torture/compile/981001-1.c (main): Likewise.
* gcc.c-torture/compile/981107-1.c (call): Declare.
* gcc.c-torture/compile/990517-1.c (sdbm__splpage): Call
__builtin_memcpy instead of memcpy.
* gcc.c-torture/compile/990617-1.c (main): Call
__builtin_printf instead of printf.
* gcc.c-torture/compile/991026-2.c (detach): Add missing void
types.
* gcc.c-torture/compile/991229-1.c (ejEval): Likewise.
* gcc.c-torture/compile/991229-3.c (rand): Declare.

6 months agogcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prototype
Florian Weimer [Mon, 6 Nov 2023 11:57:12 +0000 (12:57 +0100)] 
gcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prototype

Current glibc headers only declare fputs_unlocked for _GNU_SOURCE,
so define it to obtain an official prototype.

Add a fallback prototype declaration for other systems that do not
have fputs_unlocked.  This seems to the most straightforward approach
to avoid an implicit function declaration, without reducing test
coverage and introducing ongoing maintenance requirements (e.g.,
FreeBSD added fputs_unlocked support fairly recently).

gcc/testsuite/

* gcc.c-torture/execute/builtins/fputs.c (_GNU_SOURCE):
Define.
(fputs_unlocked): Declare.

6 months agointernal-fn: Add VCOND_MASK_LEN.
Robin Dapp [Wed, 25 Oct 2023 20:19:43 +0000 (22:19 +0200)] 
internal-fn: Add VCOND_MASK_LEN.

In order to prevent simplification of a COND_OP with degenerate mask
(CONSTM1_RTX) into just an OP in the presence of length masking this
patch introduces a length-masked analog to VEC_COND_EXPR:
IFN_VCOND_MASK_LEN.

It also adds new match patterns that allow the combination of
unconditional unary, binary and ternay operations with the
VCOND_MASK_LEN into a conditional operation if the target supports it.

gcc/ChangeLog:

PR tree-optimization/111760

* config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
expander.
* config/riscv/riscv-protos.h (enum insn_type): Add.
* config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
* doc/md.texi: Add vcond_mask_len.
* gimple-match-exports.cc (maybe_resimplify_conditional_op):
Create VCOND_MASK_LEN when length masking.
* gimple-match.h (gimple_match_op::gimple_match_op): Always
initialize len and bias.
* internal-fn.cc (vec_cond_mask_len_direct): Add.
(direct_vec_cond_mask_len_optab_supported_p): Add.
(internal_fn_len_index): Add VCOND_MASK_LEN.
(internal_fn_mask_index): Ditto.
* internal-fn.def (VCOND_MASK_LEN): New internal function.
* match.pd: Combine unconditional unary, binary and ternary
operations into the respective COND_LEN operations.
* optabs.def (OPTAB_D): Add vcond_mask_len optab.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-cond-arith-2.c: No vect cost model for
riscv_v.

6 months agoexplow: Avoid unnecessary alignment operations
Richard Sandiford [Mon, 6 Nov 2023 10:49:59 +0000 (10:49 +0000)] 
explow: Avoid unnecessary alignment operations

align_dynamic_address would output alignment operations even
for a required alignment of 1 byte.

gcc/
* explow.cc (align_dynamic_address): Do nothing if the required
alignment is a byte.

6 months agoexplow: Allow dynamic allocations after vregs
Richard Sandiford [Mon, 6 Nov 2023 10:49:58 +0000 (10:49 +0000)] 
explow: Allow dynamic allocations after vregs

This patch allows allocate_dynamic_stack_space to be called before
or after virtual registers have been instantiated.  It uses the
same approach as allocate_stack_local, which already supported this.

gcc/
* function.h (get_stack_dynamic_offset): Declare.
* function.cc (get_stack_dynamic_offset): New function,
split out from...
(get_stack_dynamic_offset): ...here.
* explow.cc (allocate_dynamic_stack_space): Handle calls made
after virtual registers have been instantiated.

6 months agolibgfortran: Fix calloc call by swapping arg order [PR112364]
Tobias Burnus [Mon, 6 Nov 2023 10:34:31 +0000 (11:34 +0100)] 
libgfortran: Fix calloc call by swapping arg order [PR112364]

The prototype of calloc is
  void *calloc(size_t nmemb, size_t size);
denoting "an array of nmemb objects, each of whose size is size." (C23)

In order to follow the meaning of the argument names and to silence
a -Walloc-size warning, this commit swaps the order of the two args
to read now:  calloc (1, sizeof (transfer_queue));

libgfortran/ChangeLog:

PR libfortran/112364
* io/async.c (enqueue_transfer, enqueue_done_id, enqueue_done,
enqueue_close): Swap 1st and 2nd arg in calloc call.

6 months agoAvoid generating RTL code when d->testing_p.
liuhongt [Mon, 6 Nov 2023 02:58:15 +0000 (10:58 +0800)] 
Avoid generating RTL code when d->testing_p.

gcc/ChangeLog:

PR target/112393
* config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
Avoid generating RTL code when d->testing_p.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr112393.c: New test.

6 months agolibstdc++: Improve static assert messages for monadic operations
Jonathan Wakely [Wed, 1 Nov 2023 14:28:55 +0000 (14:28 +0000)] 
libstdc++: Improve static assert messages for monadic operations

The monadic operations for std::optional and std::expected make use of
internal helper traits __is_optional nad __is_expected, which are not
very user-friendly when shown in diagnostics. Add messages to the
assertions explaining the problem more clearly.

libstdc++-v3/ChangeLog:

* include/std/expected (expected::and_then, expected::or_else):
Add string literals to static assertions.
* include/std/optional (optional::and_then, optional::or_else):
Likewise.

6 months agotree-optimization/112369 - strip_float_extensions and vectors
Richard Biener [Mon, 6 Nov 2023 07:58:18 +0000 (08:58 +0100)] 
tree-optimization/112369 - strip_float_extensions and vectors

The following fixes an error in strip_float_extensions when facing
vector conversions.

PR tree-optimization/112369
* tree.cc (strip_float_extensions): Use element_precision.

* gcc.dg/pr112369.c: New testcase.

6 months agoRISC-V: Adjust FP rint round tests for RV32
Pan Li [Mon, 6 Nov 2023 08:26:09 +0000 (16:26 +0800)] 
RISC-V: Adjust FP rint round tests for RV32

The FP rint test cases for RV32 need some additional adjust
for types and data. This patch would like to fix this which
is missed in FP rint support PATCH for RV32 only by mistake.

Please note the math-llrintf-run-0.c will trigger one ICE in the
vsetvl pass in RV32 only.

./riscv32-unknown-elf-gcc -march=rv32gcv -mabi=ilp32d \
  -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math \
  gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrintf-run-0.c \
  -o test.elf -lm

Then there will have ICE similar as below, and will file bugzilla for it.

config/riscv/riscv-v.cc:4314
   65 | }
      | ^
0x1fa5223 riscv_vector::validate_change_or_fail(rtx_def*, rtx_def**,
rtx_def*, bool)
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-v.cc:4314
0x1fb1aa2 pre_vsetvl::remove_avl_operand()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3342
0x1fb18c1 pre_vsetvl::cleaup()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3308
0x1fb216d pass_vsetvl::lazy_vsetvl()
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3480
0x1fb2214 pass_vsetvl::execute(function*)
        /home/pli/repos/gcc/222/riscv-gnu-toolchain/gcc/__RISC-V_BUILD/../gcc/config/riscv/riscv-vsetvl.cc:3504

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-irint-run-0.c: Adjust
test cases.
* gcc.target/riscv/rvv/autovec/unop/math-llrintf-run-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-rv32-run-0.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agomiddle-end/112296 - __builtin_constant_p and side-effects
Richard Biener [Fri, 3 Nov 2023 07:11:05 +0000 (08:11 +0100)] 
middle-end/112296 - __builtin_constant_p and side-effects

The following tries to clarify the __builtin_constant_p documentation,
stating that the argument expression is not evaluated and side-effects
are discarded.  I'm struggling to find the correct terms matching
what the C language standard would call things so I'd appreciate
some help here.

OK for trunk?

Shall we diagnose arguments with side-effects?  It seems to me
such use is usually unintended?  I think rather than dropping
side-effects as a side-effect of folding the frontend should
discard them at parsing time instead, no?

Thanks,
Richard.

PR middle-end/112296
* doc/extend.texi (__builtin_constant_p): Clarify that
side-effects are discarded.

6 months agors6000: Consider inline asm as safe if no assembler complains [PR111828]
Kewen Lin [Mon, 6 Nov 2023 06:14:43 +0000 (00:14 -0600)] 
rs6000: Consider inline asm as safe if no assembler complains [PR111828]

As discussed in PR111828, rs6000_update_ipa_fn_target_info
is much conservative, currently for any non-empty inline
asm, without any parsing, it would take inline asm could
have HTM insns.  It means for one function attributed with
power8 having inline asm, even if it has no HTM insns, we
don't make a function attributed with power10 inline it.

Peter pointed out an inline asm parser can be a slippery
slope, and noticed that the current gnu assembler still
allows HTM insns even with power10 machine type, so he
suggested that we can aggressively ignore the handling on
inline asm, this patch goes for this suggestion.

Considering that there are a few assembler alternatives
and assembler can update its behaviors (complaining HTM
insns at power10 and later cpus sounds reasonable from a
certain point of view), this patch also checks assembler
complains on HTM insns at power10 or not.  For a case that
a caller attributed power10 calls a callee attributed
power8 having inline asm with HTM insn, without inlining
at least the compilation succeeds, but if assembler
complains HTM insns at power10, after inlining the
compilation would fail.

The two associated test cases are fine without and with
this patch (effective target takes effect or not).

PR target/111828

gcc/ChangeLog:

* config.in: Regenerate.
* config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
inline asm handling under !HAVE_AS_POWER10_HTM.
* configure: Regenerate.
* configure.ac: Detect assembler support for HTM insns at power10.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp
(check_effective_target_powerpc_as_p10_htm): New proc.
* g++.target/powerpc/pr111828-1.C: New test.
* g++.target/powerpc/pr111828-2.C: New test.

6 months agoRISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic
xuli [Mon, 30 Oct 2023 08:23:15 +0000 (08:23 +0000)] 
RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic

Update in v6:
* Rename maybe_require_frm_p to may_require_frm_p.
* Rename maybe_require_vxrm_p to may_require_vxrm_p.
* Move may_require_frm_p and may_require_vxrm_p to function_base.

Update in v5:
* Split has_vxrm_or_frm_p into maybe_require_frm_p and
  maybe_require_vxrm_p.
* Adjust comments.

Update in v4:
* Remove class function_resolver.
* Remove function get_non_overloaded_instance.
* Add overloaded hash traits for non-overloaded intrinsic.
* All overloaded intrinsics are implemented, and the tests pass.

Update in v3:

* Rewrite comment for overloaded function add.
* Move get_non_overloaded_instance to function_base.

Update in v2:

* Add get_non_overloaded_instance for function instance.
* Fix overload check for policy function.
* Enrich the test cases check.

Original log:

This patch would like add the framework to support the RVV overloaded
intrinsic API in riscv-xxx-xxx-gcc, like riscv-xxx-xxx-g++ did.

However, it almost leverage the hook TARGET_RESOLVE_OVERLOADED_BUILTIN
with below steps.

* Register overloaded functions.
* Add function_resolver for overloaded function resolving.
* Add resolve API for function shape with default implementation.
* Implement HOOK for navigating the overloaded API to non-overloaded API.

gcc/ChangeLog:

* config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
(riscv_register_pragmas): Register the hook.
* config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
* config/riscv/riscv-vector-builtins-bases.cc: New function impl.
* config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
* config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
New hash table.
(function_builder::add_function): Add overloaded arg.
(function_builder::add_unique_function): Map overloaded function to non-overloaded function.
(function_builder::add_overloaded_function): New API impl.
(registered_function::overloaded_hash): Calculate hash value.
(has_vxrm_or_frm_p): New function impl.
(non_overloaded_registered_function_hasher::hash): Ditto.
(non_overloaded_registered_function_hasher::equal): Ditto.
(handle_pragma_vector): Allocate space for hash table.
(resolve_overloaded_builtin): New function impl.
* config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
(function_base::may_require_vxrm_p): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/overloaded_rv32_vadd.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv32_vfadd.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv32_vget_vset.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv32_vloxseg2ei16.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv32_vmv.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv32_vreinterpret.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vadd.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vfadd.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vget_vset.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vloxseg2ei16.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vmv.c: New test.
* gcc.target/riscv/rvv/base/overloaded_rv64_vreinterpret.c: New test.
* gcc.target/riscv/rvv/base/overloaded_vadd.h: New test.
* gcc.target/riscv/rvv/base/overloaded_vfadd.h: New test.
* gcc.target/riscv/rvv/base/overloaded_vget_vset.h: New test.
* gcc.target/riscv/rvv/base/overloaded_vloxseg2ei16.h: New test.
* gcc.target/riscv/rvv/base/overloaded_vmv.h: New test.
* gcc.target/riscv/rvv/base/overloaded_vreinterpret.h: New test.

Signed-off-by: Li Xu <xuli1@eswincomputing.com>
Co-Authored-By: Pan Li <pan2.li@intel.com>
6 months agoPush no-evex512 target for 128/256 bit intrins
Haochen Jiang [Mon, 6 Nov 2023 01:38:31 +0000 (09:38 +0800)] 
Push no-evex512 target for 128/256 bit intrins

gcc/ChangeLog:

PR target/111889
* config/i386/avx512bf16intrin.h: Push no-evex512 target.
* config/i386/avx512bf16vlintrin.h: Ditto.
* config/i386/avx512bitalgvlintrin.h: Ditto.
* config/i386/avx512bwintrin.h: Ditto.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/avx512fp16intrin.h: Ditto.
* config/i386/avx512fp16vlintrin.h: Ditto.
* config/i386/avx512ifmavlintrin.h: Ditto.
* config/i386/avx512vbmi2vlintrin.h: Ditto.
* config/i386/avx512vbmivlintrin.h: Ditto.
* config/i386/avx512vlbwintrin.h: Ditto.
* config/i386/avx512vldqintrin.h: Ditto.
* config/i386/avx512vlintrin.h: Ditto.
* config/i386/avx512vnnivlintrin.h: Ditto.
* config/i386/avx512vp2intersectvlintrin.h: Ditto.
* config/i386/avx512vpopcntdqvlintrin.h: Ditto.

gcc/testsuite/ChangeLog:

PR target/111889
* gcc.target/i386/pr111889.c: New test.

6 months ago[PATCH 3/3] Change internal intrin call for AVX512 intrins
Haochen Jiang [Mon, 6 Nov 2023 01:38:12 +0000 (09:38 +0800)] 
[PATCH 3/3] Change internal intrin call for AVX512 intrins

gcc/ChangeLog:

* config/i386/avx512bf16vlintrin.h
(_mm_avx512_castsi128_ps): New.
(_mm256_avx512_castsi256_ps): Ditto.
(_mm_avx512_slli_epi32): Ditto.
(_mm256_avx512_slli_epi32): Ditto.
(_mm_avx512_cvtepi16_epi32): Ditto.
(_mm256_avx512_cvtepi16_epi32): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512bwintrin.h
(_mm_avx512_set_epi32): New.
(_mm_avx512_set_epi16): Ditto.
(_mm_avx512_set_epi8): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512fp16intrin.h: Ditto.
* config/i386/avx512fp16vlintrin.h
(_mm_avx512_set1_ps): New.
(_mm256_avx512_set1_ps): Ditto.
(_mm_avx512_and_si128): Ditto.
(_mm256_avx512_and_si256): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512vlbwintrin.h
(_mm_avx512_set1_epi32): New.
(_mm_avx512_set1_epi16): Ditto.
(_mm_avx512_set1_epi8): Ditto.
(_mm256_avx512_set_epi16): Ditto.
(_mm256_avx512_set_epi8): Ditto.
(_mm256_avx512_set1_epi16): Ditto.
(_mm256_avx512_set1_epi32): Ditto.
(_mm256_avx512_set1_epi8): Ditto.
(_mm_avx512_max_epi16): Ditto.
(_mm_avx512_min_epi16): Ditto.
(_mm_avx512_max_epu16): Ditto.
(_mm_avx512_min_epu16): Ditto.
(_mm_avx512_max_epi8): Ditto.
(_mm_avx512_min_epi8): Ditto.
(_mm_avx512_max_epu8): Ditto.
(_mm_avx512_min_epu8): Ditto.
(_mm256_avx512_max_epi16): Ditto.
(_mm256_avx512_min_epi16): Ditto.
(_mm256_avx512_max_epu16): Ditto.
(_mm256_avx512_min_epu16): Ditto.
(_mm256_avx512_insertf128_ps): Ditto.
(_mm256_avx512_extractf128_pd): Ditto.
(_mm256_avx512_extracti128_si256): Ditto.
(_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
(_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
(_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
(_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
(__attribute__): Change intrin call.

6 months ago[PATCH 2/3] Change internal intrin call for AVX512 intrins
Haochen Jiang [Mon, 6 Nov 2023 01:37:49 +0000 (09:37 +0800)] 
[PATCH 2/3] Change internal intrin call for AVX512 intrins

gcc/ChangeLog:

* config/i386/avx512bf16vlintrin.h: Change intrin call.
* config/i386/avx512fintrin.h
(_mm_avx512_undefined_ps): New.
(_mm_avx512_undefined_pd): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512vbmivlintrin.h: Ditto.
* config/i386/avx512vlbwintrin.h: Ditto.
* config/i386/avx512vldqintrin.h: Ditto.
* config/i386/avx512vlintrin.h
(_mm_avx512_undefined_si128): New.
(_mm256_avx512_undefined_ps): Ditto.
(_mm256_avx512_undefined_pd): Ditto.
(_mm256_avx512_undefined_si256): Ditto.
(__attribute__): Change intrin call.

6 months ago[PATCH 1/3] Change internal intrin call for AVX512 intrins
Haochen Jiang [Mon, 6 Nov 2023 01:37:31 +0000 (09:37 +0800)] 
[PATCH 1/3] Change internal intrin call for AVX512 intrins

The newly added  _mm{,256}_avx512* intrins are duplicated from their
_mm{,256}_* forms from AVX2 or before. We need to add them to prevent target
option mismatch when calling AVX512 intrins implemented with these intrins
under no-evex512 function attribute. All AVX512 intrins calling those AVX2
intrins or before will change their calls to these newly added AVX512 version.

gcc/ChangeLog:

* config/i386/avx512bitalgvlintrin.h: Change intrin call.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h:
(_mm_avx512_setzero_ps): New.
(_mm_avx512_setzero_pd): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512fp16intrin.h: Ditto.
* config/i386/avx512fp16vlintrin.h: Ditto.
* config/i386/avx512vbmi2vlintrin.h: Ditto.
* config/i386/avx512vbmivlintrin.h: Ditto.
* config/i386/avx512vlbwintrin.h: Ditto.
* config/i386/avx512vldqintrin.h: Ditto.
* config/i386/avx512vlintrin.h
(_mm_avx512_setzero_si128): New.
(_mm256_avx512_setzero_pd): Ditto.
(_mm256_avx512_setzero_ps): Ditto.
(_mm256_avx512_setzero_si256): Ditto.
(__attribute__): Change intrin call.
* config/i386/avx512vpopcntdqvlintrin.h: Ditto.
* config/i386/gfniintrin.h: Ditto.

6 months agoDaily bump.
GCC Administrator [Mon, 6 Nov 2023 00:18:16 +0000 (00:18 +0000)] 
Daily bump.

6 months agoTestsuite, i386: Mark test as requiring dfp
Francois-Xavier Coudert [Mon, 30 Oct 2023 14:14:42 +0000 (15:14 +0100)] 
Testsuite, i386: Mark test as requiring dfp

Test is currently failing on x86_64-apple-darwin with
"decimal floating-point not supported for this target".

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr111753.c: Require dfp.

6 months agoi386: Add LEGACY_INDEX_REG register class.
Uros Bizjak [Sun, 5 Nov 2023 19:53:02 +0000 (20:53 +0100)] 
i386: Add LEGACY_INDEX_REG register class.

Also rename LEGACY_REGS to LEGACY_GENERAL_REGS.

gcc/ChangeLog:

* config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
* config/i386/constraints.md ("R"): Update for rename.

6 months agomode-switching: Remove unused bbnum field
Richard Sandiford [Sun, 5 Nov 2023 18:28:46 +0000 (18:28 +0000)] 
mode-switching: Remove unused bbnum field

seginfo had an unused bbnum field, presumably dating from before
BB information was attached directly to insns.

gcc/
* mode-switching.cc: Remove unused forward references.
(seginfo): Remove bbnum.
(new_seginfo): Remove associated argument.
(optimize_mode_switching): Update calls accordingly.

6 months agoread-rtl: Fix infinite loop while parsing [...]
Richard Sandiford [Sun, 5 Nov 2023 18:24:40 +0000 (18:24 +0000)] 
read-rtl: Fix infinite loop while parsing [...]

read_rtx_operand would spin endlessly for:

   (unspec [(...))] UNSPEC_FOO)

because read_nested_rtx does nothing if the next character is not '('.

gcc/
* read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
invalid [...] operands.

6 months agoopenmp: Mention C attribute syntax in documentation
Jakub Jelinek [Sun, 5 Nov 2023 17:32:46 +0000 (18:32 +0100)] 
openmp: Mention C attribute syntax in documentation

This patch mentions the C attribute syntax support in the libgomp documentation.

2023-11-05  Jakub Jelinek  <jakub@redhat.com>

* libgomp.texi (Enabling OpenMP): Adjust wording for attribute syntax
supported also in C.

6 months agoopenmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp...
Jakub Jelinek [Sun, 5 Nov 2023 17:28:37 +0000 (18:28 +0100)] 
openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl

I forgot to tweak c_common_has_attribute for the C++ omp::decl addition and now
also for the C omp::{directive,sequence,decl} addition.

2023-11-05  Jakub Jelinek  <jakub@redhat.com>

* c-lex.cc (c_common_has_attribute): Return 1 for omp::directive
and omp::sequence with -fopenmp or -fopenmp-simd also for C, not
just for C++.  Return 1 for omp::decl with -fopenmp or -fopenmp-simd
for both C and C++.

* c-c++-common/gomp/attrs-1.c: Adjust for omp::directive and
omp::sequence being supported also in C and add tests for omp::decl.
* c-c++-common/gomp/attrs-2.c: Likewise.
* c-c++-common/gomp/attrs-3.c: Add tests for omp::decl.

6 months agoaarch64: Rework aarch64_modes_tieable_p [PR112105]
Richard Sandiford [Sun, 5 Nov 2023 12:08:02 +0000 (12:08 +0000)] 
aarch64: Rework aarch64_modes_tieable_p [PR112105]

On AArch64, can_change_mode_class and modes_tieable_p are
mostly answering the same questions:

(a) Do two modes have the same layout for the bytes that are
    common to both modes?

(b) Do all valid subregs involving the two modes behave as
    GCC would expect?

(c) Is there at least one register that can hold both modes?

These questions involve no class-dependent tests, and the relationship
is symmetrical.  This means we can do most of the checks in a common
subroutine.

can_change_mode_class is the hook that matters for correctness,
while modes_tieable_p is more for optimisation.  It was therefore
can_change_mode_class that had the more accurate tests.
modes_tieable_p was looser in some ways (e.g. it missed some
big-endian tests) and overly strict in others (it didn't allow
ties between a vector structure mode and the mode of a single lane).
The overly strict part caused a missed combination in the testcase.

I think the can_change_mode_class logic also needed some tweaks,
as described in the changelog.

gcc/
PR target/112105
* config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
function, with the core logic extracted from...
(aarch64_can_change_mode_class): ...here.  Extend the previous rules
to allow changes between partial SVE modes and other modes if
the other mode is no bigger than an element, and if no other rule
prevents it.  Use the aarch64_modes_tieable_p handling of
partial Advanced SIMD structure modes.
(aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
Allow all vector mode ties that it allows.

gcc/testsuite/
PR target/112105
* gcc.target/aarch64/pr112105.c: New test.
* gcc.target/aarch64/sve/pcs/struct_3_128.c: Expect a 32-bit spill
rather than a 16-bit spill.

6 months agoRISC-V: Support FP rint to i/l/ll diff size autovec
Pan Li [Sun, 5 Nov 2023 02:37:27 +0000 (10:37 +0800)] 
RISC-V: Support FP rint to i/l/ll diff size autovec

This patch would like to support the FP below API auto vectorization
with different type size

+---------+-----------+----------+
| API     | RV64      | RV32     |
+---------+-----------+----------+
| irint   | DF => SI  | DF => SI |
| irintf  | -         | -        |
| lrint   | -         | DF => SI |
| lrintf  | SF => DI  | -        |
| llrint  | -         | -        |
| llrintf | SF => DI  | SF => DI |
+---------+-----------+----------+

Given below code:
void
test_lrintf (long *out, float *in, unsigned count)
{
  for (unsigned i = 0; i < count; i++)
    out[i] = __builtin_lrintf (in[i]);
}

Before this patch:
test_lrintf:
  beq     a2,zero,.L8
  slli    a5,a2,32
  srli    a2,a5,30
  add     a4,a1,a2
.L3:
  flw     fa5,0(a1)
  addi    a1,a1,4
  addi    a0,a0,8
  fcvt.l.s a5,fa5,dyn
  sd      a5,-8(a0)
  bne     a1,a4,.L3

After this patch:
test_lrintf:
  beq     a2,zero,.L8
  slli    a2,a2,32
  srli    a2,a2,32
.L3:
  vsetvli a5,a2,e32,mf2,ta,ma
  vle32.v v2,0(a1)
  slli    a3,a5,2
  slli    a4,a5,3
  vfwcvt.x.f.v    v1,v2
  sub     a2,a2,a5
  vse64.v v1,0(a0)
  add     a1,a1,a3
  add     a0,a0,a4
  bne     a2,zero,.L3

Unfortunately, the HF mode is not include due to it requires
additional middle-end support from internal-fun.def.

gcc/ChangeLog:

* config/riscv/autovec.md: Remove the size check of lrint.
* config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
emit func impl.
(emit_vec_widden_cvt_x_f): New help emit func impl.
(emit_vec_rounding_to_integer): New func impl to emit the
rounding from FP to integer.
(expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
* config/riscv/vector.md: Take V_VLSF for vfncvt.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-irint-run-0.c:
* gcc.target/riscv/rvv/autovec/unop/math-irint-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-irintf-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llrintf-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llrintf-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-rv32-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrintf-rv64-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrintf-rv64-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-irint-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agoRISC-V: Fix bug of vlds attribute
Juzhe-Zhong [Sun, 5 Nov 2023 02:37:44 +0000 (10:37 +0800)] 
RISC-V: Fix bug of vlds attribute

This issue is noticed when support strided load/store auto-vectorization.
Commit it as it is obvious.

gcc/ChangeLog:

* config/riscv/vector.md: Fix bug.

6 months agoDaily bump.
GCC Administrator [Sun, 5 Nov 2023 00:17:12 +0000 (00:17 +0000)] 
Daily bump.

6 months agodiagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379]
Sergei Trofimovich [Sat, 4 Nov 2023 16:18:02 +0000 (16:18 +0000)] 
diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379]

Without the change `./configure --enable-checking=release` bootstrap
fails as:

    gcc/gcc-urlifier.cc:100:1: error: 'get_url_suffix_for_quoted_text()'
        defined but not used [-Werror=unused-function]

This happens because the helper is used only in `ASSERT` macros which
don't always get expanded to executable code.

The fix marks helper function with `ATTRIBUTE_UNUSED`.

gcc/
PR bootstrap/112379
* gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
ATTRIBUTE_UNUSED.

6 months agolibstdc++: Remove redundant partial specialization in _Nth_type
Feng Jisen [Fri, 3 Nov 2023 16:33:44 +0000 (16:33 +0000)] 
libstdc++: Remove redundant partial specialization in _Nth_type

libstdc++-v3/ChangeLog:

* include/bits/utility.h (_Nth_type): Remove redundant partial
specialization.

6 months agolibstdc++: Use strerror_r in std::generic_category()::message(int) [PR110133]
Jonathan Wakely [Fri, 3 Nov 2023 13:59:48 +0000 (13:59 +0000)] 
libstdc++: Use strerror_r in std::generic_category()::message(int) [PR110133]

Use strerror_r instead of strerror when available, due to the latter not
being thread-safe. This is complicated by Glibc providing a GNU-specific
strerror_r which is not compatible with POSIX strerror_r, so we need to
dispatch on the return type.

We can use the recently-added std::string::__resize_and_overwrite to
write directly into the string buffer when possible. Because we estimate
the initial buffer size we might end up with excess capacity in the
returned std::string. We can slightly tweak the std::system_error
constructors to make use of that excess capacity, so that in some cases
we require fewer allocations to construct the std::system_error::what()
string.

libstdc++-v3/ChangeLog:

PR libstdc++/110133
* include/std/system_error (system_error::system_error): Group
arguments so that concatenation can reuse rvalue's capacity.
* src/c++11/system_error.cc (strerror_string): New function.
[_GLIBCXX_HAVE_STRERROR_R] (use_strerror_result): New functions.
(generic_error_category::message): Use strerror_string.
(system_error_category::message): Likewise.

6 months agolibstdc++: Replace "_N" in examples of naming conventions
Jonathan Wakely [Fri, 3 Nov 2023 12:30:59 +0000 (12:30 +0000)] 
libstdc++: Replace "_N" in examples of naming conventions

The name "_N" is listed as a reserved name on Solaris, so we shouldn't
use it as an example of our naming conventions.

libstdc++-v3/ChangeLog:

* doc/xml/manual/appendix_contributing.xml: Replace example that
uses a BADNAME.
* doc/html/manual/source_code_style.html: Regenerate.

6 months agoopenmp: Add omp::decl support for C2X
Jakub Jelinek [Sat, 4 Nov 2023 08:14:08 +0000 (09:14 +0100)] 
openmp: Add omp::decl support for C2X

This patch adds omp::decl support which has been added recently for
C++ also to C.

2023-11-04  Jakub Jelinek  <jakub@redhat.com>

* c-parser.h (c_maybe_parse_omp_decl): Declare.
* c-parser.cc (struct c_parser): Add in_omp_decl_attribute member.
(c_parser_std_attribute): Uncoment omp::decl handling.
(c_parser_omp_var_list_parens): If parser->in_omp_decl_attribute
don't expect any arguments, instead create clause or TREE_LIST for
that decl.
(c_maybe_parse_omp_decl): New function.
(c_parser_omp_declare_target): If parser->in_omp_decl_attribute and
first token isn't name or comma invoke c_parser_omp_var_list_parens.
* c-decl.cc (c_decl_attributes): Uncomment omp::decl handling and
use *node rather than non-existing *decl.

* gcc.dg/gomp/attrs-19.c: New test.
* gcc.dg/gomp/attrs-20.c: New test.
* gcc.dg/gomp/attrs-21.c: New test.

6 months agoopenmp: Add support for omp::directive and omp::sequence attributes in C2X
Jakub Jelinek [Sat, 4 Nov 2023 08:09:08 +0000 (09:09 +0100)] 
openmp: Add support for omp::directive and omp::sequence attributes in C2X

The following patch adds support for attribute syntax which we have in C++11
and above since GCC 12 also for C, where OpenMP standard is going to add it
in OpenMP 6.0.

2023-11-04  Jakub Jelinek  <jakub@redhat.com>

gcc/c/
* c-tree.def: New file.
* c-tree.h (struct c_tree_token_vec): Forward declare.
(c_tree_size): Declare.
* c-lang.h (struct c_omp_declare_target_attr): Add attr_syntax member.
(struct c_omp_begin_assumes_data): New type.
(current_omp_begin_assumes): Change type from int to
vec<c_omp_begin_assumes_data, va_gc> *.
* c-lang.cc: Include c-family/c-pragma.h and c-parser.h.
* c-parser.h (struct c_tree_token_vec_struct): New type.
(C_TOKEN_VEC_TOKENS): New macro.
* c-parser.cc (struct c_parser): Add omp_attrs_forbidden_p and
in_omp_attribute_pragma members.
(c_parser_skip_until_found): Handle CPP_PRAGMA_EOL when
parser->in_omp_attribute_pragma.
(c_parser_skip_to_pragma_eol): Likewise.
(c_parser_translation_unit): Adjust for current_omp_begin_assumes
being a vector rather than counter.
(c_parser_declaration_or_fndef): Handle omp::directive and
omp::sequence attributes on attribute declaration and declare simd
or declare variant directives in those on function declarations.
(c_parser_check_balanced_raw_token_sequence): Forward declare.
(c_parser_omp_directive_args, c_parser_omp_sequence_args): New
functions.
(c_parser_std_attribute): Handle omp::directive and omp::sequence
attributes.
(struct c_omp_attribute_data): New type.
(c_parser_handle_statement_omp_attributes,
c_parser_handle_directive_omp_attributes): New functions.
(c_parser_compound_statement_nostart): Handle omp::directive and
omp::sequence attributes on statements.  Formatting fix.
(c_parser_all_labels): Handle omp::directive and omp::sequence
attributes on statements.
(c_parser_statement): Clear parser->omp_attrs_forbidden_p.
(c_parser_omp_variable_list): Handle parser->tokens
!= &parser->tokens_buf[0] by saving/restoring it.
(c_parser_omp_structured_block): Set parser->omp_attrs_forbidden_p.
(c_parser_omp_section_scan): New function.
(c_parser_omp_structured_block_sequence, c_parser_omp_sections_scope):
Use it.
(c_parser_omp_parallel): Set parser->omp_attrs_forbidden_p.
(c_parser_omp_task): Likewise.
(c_parser_omp_declare_simd): Handle function declaration after
std attributes.
(c_finish_omp_declare_simd): Don't assert all kinds are the same.
(c_parser_omp_declare_target): Also push attr_syntax flag.
(c_parser_omp_begin): Likewise.  Adjust for current_omp_begin_assumes
type change.
(c_parser_omp_end): Adjust for current_omp_begin_assumes type
change.  Diagnose mixing of attribute vs. pragma syntax on end assumes
or end declare target.
(c_parser_omp_declare_reduction): Handle parser->tokens
!= &parser->tokens_buf[0] by saving/restoring it.
* c-decl.cc: Include c-parser.h.
(current_omp_begin_assumes): Change type from int to
vec<c_omp_begin_assumes_data, va_gc> *.
(struct c_tree_token_vec): New type.  Add static assertions
for sizeof and offsetof.
(union lang_tree_node): Add c_token_vec member and adjust GTY
desc for it.
(c_tree_size): New function.
(c_decl_attributes): Diagnose invalid omp::directive attribute
uses.
* c-objc-common.h (LANG_HOOKS_TREE_SIZE): Redefine.
gcc/cp/
* parser.h (struct cp_parser): Adjust comment on omp_attrs_forbidden_p
member.
* parser.cc (cp_parser_omp_section_scan): Allow __directive__ spelling.
gcc/objc/
* objc-act.h (objc_common_tree_size): Remove.
* objc-act.cc (objc_common_tree_size): Remove.
* objc-lang.cc (LANG_HOOKS_TREE_SIZE): Remove.
gcc/testsuite/
* gcc.dg/gomp/attrs-1.c: New test.
* gcc.dg/gomp/attrs-2.c: New test.
* gcc.dg/gomp/attrs-3.c: New test.
* gcc.dg/gomp/attrs-4.c: New test.
* gcc.dg/gomp/attrs-5.c: New test.
* gcc.dg/gomp/attrs-6.c: New test.
* gcc.dg/gomp/attrs-7.c: New test.
* gcc.dg/gomp/attrs-8.c: New test.
* gcc.dg/gomp/attrs-9.c: New test.
* gcc.dg/gomp/attrs-10.c: New test.
* gcc.dg/gomp/attrs-11.c: New test.
* gcc.dg/gomp/attrs-12.c: New test.
* gcc.dg/gomp/attrs-13.c: New test.
* gcc.dg/gomp/attrs-14.c: New test.
* gcc.dg/gomp/attrs-15.c: New test.
* gcc.dg/gomp/attrs-16.c: New test.
* gcc.dg/gomp/attrs-17.c: New test.
* gcc.dg/gomp/attrs-18.c: New test.
* g++.dg/gomp/attrs-2.C: Enable for c++11 rather than just
c++17.  Avoid using omp : syntax for c++11, c++14 and c.

6 months agoRISC-V: Remove HF modes of FP to INT rounding autovec
Pan Li [Sat, 4 Nov 2023 00:39:06 +0000 (08:39 +0800)] 
RISC-V: Remove HF modes of FP to INT rounding autovec

The [i|l|ll][rint|round|ceil|floor] internal functions are
defined as DEF_INTERNAL_FLT_FN instead of DEF_INTERNAL_FLT_FLOATN_FN.
Then the *f16 (N=16 of FLOATN) format of these functions are not
available when try to get the ifn from the given cfn in the
vectorizable_call. Aka:

BUILT_IN_LRINTF16 => IFN_LAST (should be IFN_LRINT here)
BUILT_IN_RINTF16 => IFN_RINT

It is better to remove FP16 related modes until the additional
middle-end support is ready. This patch would like to clean the FP16
modes with some comments.

gcc/ChangeLog:

* config/riscv/vector-iterators.md: Remove HF modes.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agodiagnostics: add automatic URL-ification within messages
David Malcolm [Sat, 4 Nov 2023 01:46:53 +0000 (21:46 -0400)] 
diagnostics: add automatic URL-ification within messages

In r10-3781-gd26082357676a3 GCC's pretty-print framework gained
the ability to emit embedding URLs via escape sequences
for marking up text output..

In r10-3783-gb4c7ca2ef3915a GCC started using this for the
[-Wname-of-option] emitted at the end of each diagnostic so that it
becomes a hyperlink to the documentation for that option on the GCC
website.

This makes it much more convenient for the user to locate pertinent
documentation when a diagnostic is emitted.

The above involved special-casing in one specific place, but there is
plenty of quoted text throughout GCC's diagnostic messages that could
usefully have a documentation URL: references to options, pragmas, etc

This patch adds a new optional "urlifier" parameter to pp_format.
The idea is that a urlifier object has responsibility for mapping from
quoted strings in diagnostic messages to URLs, and pp_format has the
ability to automatically add URL escapes for strings that the urlifier
gives it URLs for.

For example, given the format string:

  "%<#pragma pack%> has no effect with %<-fpack-struct%>"

with this patch GCC is able to automatically linkify the "#pragma pack"
text to
  https://gcc.gnu.org/onlinedocs/gcc/Structure-Layout-Pragmas.html
and the "-fpack-struct" text to:
  https://gcc.gnu.org/onlinedocs/gcc/Code-Gen-Options.html#index-fpack-struct

and we don't have to modify the format string itself.

This is only done for the pp_format within
diagnostic_context::report_diagnostic i.e. just for the primary message
in each diagnostics, and not for other places within GCC that use pp
format internally.

"urlifier" is an abstract base class, with a GCC-specific subclass
implementing the logic for generating URLs into GCC's HTML
documentation via binary search in a data table.  This patch implements
the gcc_urlifier with a small table generated by hand; the data table in
this patch only covers various pragmas and the option referenced by the
above pragma message.

I have a followup patch that scripts the creation of this data by
directly scraping the output of "make html", thus automating all this,
and (I hope) minimizing the work of ensuring that documentation URLs
emitted by GCC match the generated documentation.

gcc/ChangeLog:
* Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
(OBJS): Likewise.

gcc/c-family/ChangeLog:
* c-pragma.cc:: (handle_pragma_push_options): Fix missing "GCC" in
name of pragma in "junk" message.
(handle_pragma_pop_options): Likewise.

gcc/ChangeLog:
* diagnostic.cc: Include "pretty-print-urlifier.h".
(diagnostic_context::initialize): Initialize m_urlifier.
(diagnostic_context::finish): Clean up m_urlifier
(diagnostic_report::diagnostic): m_urlifier to pp_format.
* diagnostic.h (diagnostic_context::m_urlifier): New field.
* gcc-urlifier.cc: New file.
* gcc-urlifier.def: New file.
* gcc-urlifier.h: New file.
* gcc.cc: Include "gcc-urlifier.h".
(driver::global_initializations): Initialize global_dc->m_urlifier.
* pretty-print-urlifier.h: New file.
* pretty-print.cc: Include "pretty-print-urlifier.h".
(obstack_append_string): New.
(urlify_quoted_string): New.
(pp_format): Add "urlifier" param and use it to implement optional
urlification of quoted text strings.
(pp_output_formatted_text): Make buffer a const pointer.
(selftest::pp_printf_with_urlifier): New.
(selftest::test_urlification): New.
(selftest::pretty_print_cc_tests): Call it.
* pretty-print.h (class urlifier): New forward declaration.
(pp_format): Add optional urlifier param.
* selftest-run-tests.cc (selftest::run_tests): Call
selftest::gcc_urlifier_cc_tests .
* selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
* toplev.cc: Include "gcc-urlifier.h".
(general_init): Initialize global_dc->m_urlifier.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
6 months agodiagnostics: convert diagnostic_context to a class
David Malcolm [Sat, 4 Nov 2023 01:46:47 +0000 (21:46 -0400)] 
diagnostics: convert diagnostic_context to a class

This patch:
- converts "struct diagnostic_context" to "class diagnostic_context".
- ensures all data members have an "m_" prefix, except for "printer",
  which has so many uses that renaming would be painful.
- makes most of the data members private
- converts much of the diagnostic_* functions to member functions of
  diagnostic_context, adding compatibility wrappers for users such as
  the Fortran frontend, and making as many as possible private.

No functional change intended.

gcc/ChangeLog:
* common.opt (fdiagnostics-text-art-charset=): Remove refererence
to diagnostic-text-art.h.
* coretypes.h (struct diagnostic_context): Replace forward decl
with...
(class diagnostic_context): ...this.
* diagnostic-format-json.cc: Update for changes to
diagnostic_context.
* diagnostic-format-sarif.cc: Likewise.
* diagnostic-show-locus.cc: Likewise.
* diagnostic-text-art.h: Deleted file, moving content...
(enum diagnostic_text_art_charset): ...to diagnostic.h,
(DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
(diagnostics_text_art_charset_init): ...deleting in favor of
diagnostic_context::set_text_art_charset.
* diagnostic.cc: Remove include of "diagnostic-text-art.h".
(pedantic_warning_kind): Update for field renaming.
(permissive_error_kind): Likewise.
(permissive_error_option): Likewise.
(diagnostic_initialize): Convert to...
(diagnostic_context::initialize): ...this, updating for field
renamings.
(diagnostic_color_init): Convert to...
(diagnostic_context::color_init): ...this.
(diagnostic_urls_init): Convert to...
(diagnostic_context::urls_init): ...this.
(diagnostic_initialize_input_context): Convert to...
(diagnostic_context::initialize_input_context): ...this.
(diagnostic_finish): Convert to...
(diagnostic_context::finish): ...this, updating for field
renamings.
(diagnostic_context::set_output_format): New.
(diagnostic_context::set_client_data_hooks): New.
(diagnostic_context::create_edit_context): New.
(diagnostic_converted_column): Convert to...
(diagnostic_context::converted_column): ...this.
(diagnostic_get_location_text): Update for field renaming.
(diagnostic_check_max_errors): Convert to...
(diagnostic_context::check_max_errors): ...this, updating for
field renamings.
(diagnostic_action_after_output): Convert to...
(diagnostic_context::action_after_output): ...this, updating for
field renamings.
(last_module_changed_p): Delete.
(set_last_module): Delete.
(includes_seen): Convert to...
(diagnostic_context::includes_seen_p): ...this, updating for field
renamings.
(diagnostic_report_current_module): Convert to...
(diagnostic_context::report_current_module): ...this, updating for
field renamings, and replacing uses of last_module_changed_p and
set_last_module to simple field accesses.
(diagnostic_show_any_path): Convert to...
(diagnostic_context::show_any_path): ...this.
(diagnostic_classify_diagnostic): Convert to...
(diagnostic_context::classify_diagnostic): ...this, updating for
field renamings.
(diagnostic_push_diagnostics): Convert to...
(diagnostic_context::push_diagnostics): ...this, updating for field
renamings.
(diagnostic_pop_diagnostics): Convert to...
(diagnostic_context::pop_diagnostics): ...this, updating for field
renamings.
(get_any_inlining_info): Convert to...
(diagnostic_context::get_any_inlining_info): ...this, updating for
field renamings.
(update_effective_level_from_pragmas): Convert to...
(diagnostic_context::update_effective_level_from_pragmas):
...this, updating for field renamings.
(print_any_cwe): Convert to...
(diagnostic_context::print_any_cwe): ...this.
(print_any_rules): Convert to...
(diagnostic_context::print_any_rules): ...this.
(print_option_information): Convert to...
(diagnostic_context::print_option_information): ...this, updating
for field renamings.
(diagnostic_enabled): Convert to...
(diagnostic_context::diagnostic_enabled): ...this, updating for
field renamings.
(warning_enabled_at): Convert to...
(diagnostic_context::warning_enabled_at): ...this.
(diagnostic_report_diagnostic): Convert to...
(diagnostic_context::report_diagnostic): ...this, updating for
field renamings and conversions to member functions.
(diagnostic_append_note): Update for field renaming.
(diagnostic_impl): Use diagnostic_context::report_diagnostic
directly.
(diagnostic_n_impl): Likewise.
(diagnostic_emit_diagram): Convert to...
(diagnostic_context::emit_diagram): ...this, updating for field
renamings.
(error_recursion): Convert to...
(diagnostic_context::error_recursion): ...this.
(diagnostic_text_output_format::~diagnostic_text_output_format):
Use accessor.
(diagnostics_text_art_charset_init): Convert to...
(diagnostic_context::set_text_art_charset): ...this.
(assert_location_text): Update for field renamings.
* diagnostic.h (enum diagnostic_text_art_charset): Move here from
diagnostic-text-art.h.
(struct diagnostic_context): Convert to...
(class diagnostic_context): ...this.
(diagnostic_context::ice_handler_callback_t): New typedef.
(diagnostic_context::set_locations_callback_t): New typedef.
(diagnostic_context::initialize): New decl.
(diagnostic_context::color_init): New decl.
(diagnostic_context::urls_init): New decl.
(diagnostic_context::file_cache_init): New decl.
(diagnostic_context::finish): New decl.
(diagnostic_context::set_set_locations_callback): New.
(diagnostic_context::initialize_input_context): New decl.
(diagnostic_context::warning_enabled_at): New decl.
(diagnostic_context::option_unspecified_p): New.
(diagnostic_context::report_diagnostic): New decl.
(diagnostic_context::report_current_module): New decl.
(diagnostic_context::check_max_errors): New decl.
(diagnostic_context::action_after_output): New decl.
(diagnostic_context::classify_diagnostic): New decl.
(diagnostic_context::push_diagnostics): New decl.
(diagnostic_context::pop_diagnostics): New decl.
(diagnostic_context::emit_diagram): New decl.
(diagnostic_context::set_output_format): New decl.
(diagnostic_context::set_text_art_charset): New decl.
(diagnostic_context::set_client_data_hooks): New decl.
(diagnostic_context::create_edit_context): New decl.
(diagnostic_context::set_warning_as_error_requested): New.
(diagnostic_context::set_report_bug): New.
(diagnostic_context::set_extra_output_kind): New.
(diagnostic_context::set_show_cwe): New.
(diagnostic_context::set_show_rules): New.
(diagnostic_context::set_path_format): New.
(diagnostic_context::set_show_path_depths): New.
(diagnostic_context::set_show_option_requested): New.
(diagnostic_context::set_max_errors): New.
(diagnostic_context::set_escape_format): New.
(diagnostic_context::set_ice_handler_callback): New.
(diagnostic_context::warning_as_error_requested_p): New.
(diagnostic_context::show_path_depths_p): New.
(diagnostic_context::get_path_format): New.
(diagnostic_context::get_escape_format): New.
(diagnostic_context::get_file_cache): New.
(diagnostic_context::get_edit_context): New.
(diagnostic_context::get_client_data_hooks): New.
(diagnostic_context::get_diagram_theme): New.
(diagnostic_context::converted_column): New decl.
(diagnostic_context::diagnostic_count): New.
(diagnostic_context::includes_seen_p): New decl.
(diagnostic_context::print_any_cwe): New decl.
(diagnostic_context::print_any_rules): New decl.
(diagnostic_context::print_option_information): New decl.
(diagnostic_context::show_any_path): New decl.
(diagnostic_context::error_recursion): New decl.
(diagnostic_context::diagnostic_enabled): New decl.
(diagnostic_context::get_any_inlining_info): New decl.
(diagnostic_context::update_effective_level_from_pragmas): New
decl.
(diagnostic_context::m_file_cache): Make private.
(diagnostic_context::diagnostic_count): Rename to...
(diagnostic_context::m_diagnostic_count): ...this and make
private.
(diagnostic_context::warning_as_error_requested): Rename to...
(diagnostic_context::m_warning_as_error_requested): ...this and
make private.
(diagnostic_context::n_opts): Rename to...
(diagnostic_context::m_n_opts): ...this and make private.
(diagnostic_context::classify_diagnostic): Rename to...
(diagnostic_context::m_classify_diagnostic): ...this and make
private.
(diagnostic_context::classification_history): Rename to...
(diagnostic_context::m_classification_history): ...this and make
private.
(diagnostic_context::n_classification_history): Rename to...
(diagnostic_context::m_n_classification_history): ...this and make
private.
(diagnostic_context::push_list): Rename to...
(diagnostic_context::m_push_list): ...this and make private.
(diagnostic_context::n_push): Rename to...
(diagnostic_context::m_n_push): ...this and make private.
(diagnostic_context::show_cwe): Rename to...
(diagnostic_context::m_show_cwe): ...this and make private.
(diagnostic_context::show_rules): Rename to...
(diagnostic_context::m_show_rules): ...this and make private.
(diagnostic_context::path_format): Rename to...
(diagnostic_context::m_path_format): ...this and make private.
(diagnostic_context::show_path_depths): Rename to...
(diagnostic_context::m_show_path_depths): ...this and make
private.
(diagnostic_context::show_option_requested): Rename to...
(diagnostic_context::m_show_option_requested): ...this and make
private.
(diagnostic_context::abort_on_error): Rename to...
(diagnostic_context::m_abort_on_error): ...this.
(diagnostic_context::show_column): Rename to...
(diagnostic_context::m_show_column): ...this.
(diagnostic_context::pedantic_errors): Rename to...
(diagnostic_context::m_pedantic_errors): ...this.
(diagnostic_context::permissive): Rename to...
(diagnostic_context::m_permissive): ...this.
(diagnostic_context::opt_permissive): Rename to...
(diagnostic_context::m_opt_permissive): ...this.
(diagnostic_context::fatal_errors): Rename to...
(diagnostic_context::m_fatal_errors): ...this.
(diagnostic_context::dc_inhibit_warnings): Rename to...
(diagnostic_context::m_inhibit_warnings): ...this.
(diagnostic_context::dc_warn_system_headers): Rename to...
(diagnostic_context::m_warn_system_headers): ...this.
(diagnostic_context::max_errors): Rename to...
(diagnostic_context::m_max_errors): ...this and make private.
(diagnostic_context::internal_error): Rename to...
(diagnostic_context::m_internal_error): ...this.
(diagnostic_context::option_enabled): Rename to...
(diagnostic_context::m_option_enabled): ...this.
(diagnostic_context::option_state): Rename to...
(diagnostic_context::m_option_state): ...this.
(diagnostic_context::option_name): Rename to...
(diagnostic_context::m_option_name): ...this.
(diagnostic_context::get_option_url): Rename to...
(diagnostic_context::m_get_option_url): ...this.
(diagnostic_context::print_path): Rename to...
(diagnostic_context::m_print_path): ...this.
(diagnostic_context::make_json_for_path): Rename to...
(diagnostic_context::m_make_json_for_path): ...this.
(diagnostic_context::x_data): Rename to...
(diagnostic_context::m_client_aux_data): ...this.
(diagnostic_context::last_location): Rename to...
(diagnostic_context::m_last_location): ...this.
(diagnostic_context::last_module): Rename to...
(diagnostic_context::m_last_module): ...this and make private.
(diagnostic_context::lock): Rename to...
(diagnostic_context::m_lock): ...this and make private.
(diagnostic_context::lang_mask): Rename to...
(diagnostic_context::m_lang_mask): ...this.
(diagnostic_context::inhibit_notes_p): Rename to...
(diagnostic_context::m_inhibit_notes_p): ...this.
(diagnostic_context::report_bug): Rename to...
(diagnostic_context::m_report_bug): ...this and make private.
(diagnostic_context::extra_output_kind): Rename to...
(diagnostic_context::m_extra_output_kind): ...this and make
private.
(diagnostic_context::column_unit): Rename to...
(diagnostic_context::m_column_unit): ...this and make private.
(diagnostic_context::column_origin): Rename to...
(diagnostic_context::m_column_origin): ...this and make private.
(diagnostic_context::tabstop): Rename to...
(diagnostic_context::m_tabstop): ...this and make private.
(diagnostic_context::escape_format): Rename to...
(diagnostic_context::m_escape_format): ...this and make private.
(diagnostic_context::edit_context_ptr): Rename to...
(diagnostic_context::m_edit_context_ptr): ...this and make
private.
(diagnostic_context::set_locations_cb): Rename to...
(diagnostic_context::m_set_locations_cb): ...this and make
private.
(diagnostic_context::ice_handler_cb): Rename to...
(diagnostic_context::m_ice_handler_cb): ...this and make private.
(diagnostic_context::includes_seen): Rename to...
(diagnostic_context::m_includes_seen): ...this and make private.
(diagnostic_inhibit_notes): Update for field renaming.
(diagnostic_context_auxiliary_data): Likewise.
(diagnostic_abort_on_error): Convert from macro to inline function
and update for field renaming.
(diagnostic_kind_count): Convert from macro to inline function and
use diagnostic_count accessor.
(diagnostic_report_warnings_p): Update for field renaming.
(diagnostic_initialize): Convert decl to inline function calling
into diagnostic_context.
(diagnostic_color_init): Likewise.
(diagnostic_urls_init): Likewise.
(diagnostic_urls_init): Likewise.
(diagnostic_finish): Likewise.
(diagnostic_report_current_module): Likewise.
(diagnostic_show_any_path): Delete decl.
(diagnostic_initialize_input_context): Convert decl to inline
function calling into diagnostic_context.
(diagnostic_classify_diagnostic): Likewise.
(diagnostic_push_diagnostics): Likewise.
(diagnostic_pop_diagnostics): Likewise.
(diagnostic_report_diagnostic): Likewise.
(diagnostic_action_after_output): Likewise.
(diagnostic_check_max_errors): Likewise.
(diagnostic_file_cache_fini): Delete decl.
(diagnostic_converted_column): Delete decl.
(warning_enabled_at): Convert decl to inline function calling into
diagnostic_context.
(option_unspecified_p): New.
(diagnostic_emit_diagram): Delete decl.
* gcc.cc: Remove include of "diagnostic-text-art.h".
Update for changes to diagnostic_context.
* input.cc (diagnostic_file_cache_init): Move implementation
to...
(diagnostic_context::file_cache_init): ...this new member
function.
(diagnostic_file_cache_fini): Delete.
(diagnostics_file_cache_forcibly_evict_file): Update for
m_file_cache becoming private.
(location_get_source_line): Likewise.
(get_source_file_content): Likewise.
(location_missing_trailing_newline): Likewise.
* input.h (diagnostics_file_cache_fini): Delete.
* langhooks.cc: Update for changes to diagnostic_context.
* lto-wrapper.cc: Likewise.
* opts.cc: Remove include of "diagnostic-text-art.h".
Update for changes to diagnostic_context.
* selftest-diagnostic.cc: Update for changes to
diagnostic_context.
* toplev.cc: Likewise.
* tree-diagnostic-path.cc: Likewise.
* tree-diagnostic.cc: Likewise.

gcc/ada/ChangeLog:
* gcc-interface/misc.cc: Update for changes to diagnostic_context.

gcc/analyzer/ChangeLog:
* bounds-checking.cc: Update for changes to diagnostic_context.

gcc/c-family/ChangeLog:
* c-common.cc: Update for changes to diagnostic_context.
* c-indentation.cc: Likewise.
* c-opts.cc: Likewise.
* c-warn.cc: Likewise.

gcc/cp/ChangeLog:
* call.cc: Update for changes to diagnostic_context.
* class.cc: Likewise.
* decl.cc: Likewise.
* error.cc: Likewise.
* except.cc: Likewise.
* pt.cc: Likewise.

gcc/fortran/ChangeLog:
* cpp.cc: Update for changes to diagnostic_context.
* error.cc: Likewise.
* options.cc: Likewise.

gcc/jit/ChangeLog:
* jit-playback.cc: Update for changes to diagnostic_context.
* jit-playback.h: Likewise.

gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic_group_plugin.c: Update for changes to
diagnostic_context.
* gcc.dg/plugin/diagnostic_plugin_test_text_art.c: Likewise.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
6 months agoDaily bump.
GCC Administrator [Sat, 4 Nov 2023 00:16:45 +0000 (00:16 +0000)] 
Daily bump.

6 months agoReduce false positives for -Wnonnull for VLA parameters [PR98541]
Martin Uecker [Thu, 13 Apr 2023 17:35:15 +0000 (19:35 +0200)] 
Reduce false positives for -Wnonnull for VLA parameters [PR98541]

This patch limits the warning about NULL arguments to VLA
parameters declared [static n].

PR c/98541

gcc/
* gimple-ssa-warn-access.cc
(pass_waccess::maybe_check_access_sizes): For VLA bounds
in parameters, only warn about null pointers with 'static'.

gcc/testsuite:
* gcc.dg/Wnonnull-4.c: Adapt test.
* gcc.dg/Wstringop-overflow-40.c: Adapt test.

6 months agoFortran: fix issue with multiple references of a procedure pointer [PR97245]
Harald Anlauf [Fri, 3 Nov 2023 18:41:54 +0000 (19:41 +0100)] 
Fortran: fix issue with multiple references of a procedure pointer [PR97245]

gcc/fortran/ChangeLog:

PR fortran/97245
* match.cc (gfc_match_call): If a procedure pointer has already been
resolved, do not create a new symbol in a procedure reference of
the same name shadowing the first one if it is host-associated.

gcc/testsuite/ChangeLog:

PR fortran/97245
* gfortran.dg/proc_ptr_53.f90: New test.

6 months agovect: allow using inbranch simdclones for masked loops
Andre Vieira [Fri, 3 Nov 2023 19:09:07 +0000 (19:09 +0000)] 
vect: allow using inbranch simdclones for masked loops

In a previous patch I did most of the work for this, but forgot to change the
check for number of arguments matching between call and simdclone.  This check
should accept calls without a mask to be matched against simdclones with mask
arguments.  I also added tests to verify this feature actually works.

gcc/ChangeLog:

* tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
calls to use masked simdclones.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-simd-clone-20.c: New file.
* gfortran.dg/simd-builtins-1.h: Adapt.
* gfortran.dg/simd-builtins-6.f90: Adapt.

6 months agodiagnostics: consolidate group-handling fields in diagnostic_context
David Malcolm [Fri, 3 Nov 2023 17:55:52 +0000 (13:55 -0400)] 
diagnostics: consolidate group-handling fields in diagnostic_context

No functional change intended.

gcc/ChangeLog:
* diagnostic.cc (diagnostic_initialize): Update for consolidation
of group-based fields.
(diagnostic_report_diagnostic): Likewise.
(diagnostic_context::begin_group): New, based on body of
auto_diagnostic_group's ctor.
(diagnostic_context::end_group): New, based on body of
auto_diagnostic_group's dtor.
(auto_diagnostic_group::auto_diagnostic_group): Convert to a call
to begin_group.
(auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
to end_group.
* diagnostic.h (diagnostic_context::begin_group): New decl.
(diagnostic_context::end_group): New decl.
(diagnostic_context::diagnostic_group_nesting_depth): Rename to...
(diagnostic_context::m_diagnostic_groups.m_nesting_depth):
...this.
(diagnostic_context::diagnostic_group_emission_count): Rename
to...
(diagnostic_context::m_diagnostic_groups::m_emission_count):
...this.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
6 months agoFortran: passing of allocatable/pointer arguments to OPTIONAL+VALUE [PR92887]
Harald Anlauf [Wed, 1 Nov 2023 21:55:36 +0000 (22:55 +0100)] 
Fortran: passing of allocatable/pointer arguments to OPTIONAL+VALUE [PR92887]

gcc/fortran/ChangeLog:

PR fortran/92887
* trans-expr.cc (conv_cond_temp): Helper function for creation of a
conditional temporary.
(gfc_conv_procedure_call): Handle passing of allocatable or pointer
actual argument to dummy with OPTIONAL + VALUE attribute.  Actual
arguments that are not allocated or associated are treated as not
present.

gcc/testsuite/ChangeLog:

PR fortran/92887
* gfortran.dg/value_optional_1.f90: New test.

6 months agoAdjust operators equal and not_equal to check bitmasks against constants
Andrew MacLeod [Wed, 25 Oct 2023 13:46:50 +0000 (09:46 -0400)] 
Adjust operators equal and not_equal to check bitmasks against constants

Check to see if a comparison to a constant can be determined to always
be not-equal based on the bitmask.

PR tree-optimization/111766
gcc/
* range-op.cc (operator_equal::fold_range): Check constants
against the bitmask.
(operator_not_equal::fold_range): Ditto.
* value-range.h (irange_bitmask::member_p): New.

gcc/testsuite/
* gcc.dg/pr111766.c: New.

6 months agoRemove simple ranges from trailing zero bitmasks.
Andrew MacLeod [Tue, 31 Oct 2023 15:51:34 +0000 (11:51 -0400)] 
Remove simple ranges from trailing zero bitmasks.

During the intersection operation, it can be helpful to remove any
low-end ranges when the bitmask has trailing zeros.  This prevents
obviously incorrect ranges from appearing without requiring a bitmask
check.

* value-range.cc (irange_bitmask::adjust_range): New.
(irange::intersect_bitmask): Call adjust_range.
* value-range.h (irange_bitmask::adjust_range): New prototype.

6 months agoi386: Handle multiple address register classes
Uros Bizjak [Fri, 3 Nov 2023 15:30:06 +0000 (16:30 +0100)] 
i386: Handle multiple address register classes

The patch generalizes address register class handling to allow multiple
register classes.  For APX EGPR targets, some instructions do not support
GPR32 registers, so it is necessary to limit address register set to
avoid them.  The same situation happens for instructions with high registers,
where REX registers can not be used in the address, so the existing
infrastructure can be adapted to also handle this case.

The patch is mostly a mechanical rename of "gpr32" attribute to "addr" and
introduces no functional changes, although it fixes a couple of inconsistent
attribute values in passing.

A follow-up patch will use the above infrastructure to limit address register
class to legacy registers for instructions with high registers.

gcc/ChangeLog:

* config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
Rename to ...
(ix86_memory_address_reg_class): ... this.  Generalize address
register class handling to allow multiple address register classes.
Return maximal class for unrecognized instructions.  Improve comments.
(ix86_insn_base_reg_class): Rewrite to handle
multiple address register classes.
(ix86_regno_ok_for_insn_base_p): Ditto.
(ix86_insn_index_reg_class): Ditto.
* config/i386/i386.md: Rename "gpr32" attribute to "addr"
and substitute its values with "0" -> "gpr16", "1" -> "*".
(addr): New attribute to limit allowed address register set.
(gpr32): Remove.
* config/i386/mmx.md: Rename "gpr32" attribute to "addr"
and substitute its values with "0" -> "gpr16", "1" -> "*".
* config/i386/sse.md: Ditto.

6 months agoTestcases for vectorizer peeling
Richard Biener [Fri, 3 Nov 2023 14:53:11 +0000 (15:53 +0100)] 
Testcases for vectorizer peeling

The following exercise otherwise not exercised paths in the
vectorizer peeling code, resulting in CPU 2017 build ICEs
when patching but no fallout in the testsuite.

* gfortran.dg/20231103-1.f90: New testcase.
* gfortran.dg/20231103-2.f90: Likewise.

6 months agoCleanup vectorizable_live_operation
Richard Biener [Fri, 3 Nov 2023 13:44:22 +0000 (14:44 +0100)] 
Cleanup vectorizable_live_operation

During analyzing PR111950 I found the loop live operation code-gen
odd, in particular only replacing a single PHI but then adjusting
possibly remaining PHIs afterwards where there shouldn't really
be any out-of-loop uses of the scalar in-loop def left.

* tree-vect-loop.cc (vectorizable_live_operation): Simplify
LC PHI replacement.

6 months agoGCN: Address undeclared 'NULL' usage in 'libgcc/config/gcn/gthr-gcn.h:__gthread_getsp...
Thomas Schwinge [Wed, 13 Jul 2022 16:17:30 +0000 (18:17 +0200)] 
GCN: Address undeclared 'NULL' usage in 'libgcc/config/gcn/gthr-gcn.h:__gthread_getspecific'

For 'libgcc/config/gcn/gthr-gcn.h' used in libstdc++ context (WIP), we have:

    [...]/build-gcc-offload-amdgcn-amdhsa/amdgcn-amdhsa/libstdc++-v3/include/amdgcn-amdhsa/bits/gthr-default.h: In function â€˜void* __gthread_getspecific(__gthread_key_t)’:
    [...]/build-gcc-offload-amdgcn-amdhsa/amdgcn-amdhsa/libstdc++-v3/include/amdgcn-amdhsa/bits/gthr-default.h:90:10: error: â€˜NULL’ was not declared in this scope
       90 |   return NULL;
          |          ^~~~

Resolve this with 's%NULL%0', as is used in
'libgcc/gthr-single.h:__gthread_getspecific', for example.

Follow-up to commit 76d463310787c8c7fd0c55cf88031b240311ab68
"Create GCN-specific gthreads".

libgcc/
* config/gcn/gthr-gcn.h (__gthread_getspecific): 's%NULL%0'.

6 months agoFormat gotools.sum closer to what DejaGnu does
Maxim Kuvyrkov [Thu, 2 Nov 2023 12:40:10 +0000 (12:40 +0000)] 
Format gotools.sum closer to what DejaGnu does

... to restore compatability with validate_failures.py .
The testsuite script validate_failures.py expects
"Running <sub-testsuite> ..." to extract <sub-testsuite> values,
and gotools.sum provided "Running <sub-testsuite>".

Note that libgo.sum, which also uses Makefile logic to generate
DejaGnu-like output, already has "..." suffix.

gotools/ChangeLog:

* Makefile.am: Update "Running <sub-testsuite> ..." output
* Makefile.in: Regenerate.

Signed-off-by: Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
6 months agoARC: Improve DImode left shift by a single bit.
Roger Sayle [Fri, 3 Nov 2023 14:32:26 +0000 (14:32 +0000)] 
ARC: Improve DImode left shift by a single bit.

This patch improves the code generated for x << 1 (and for x + x) when
X is 64-bit DImode, using the same two instruction code sequence used
for DImode addition.

For the test case:

long long foo(long long x) { return x << 1; }

GCC -O2 currently generates the following code:

foo:    lsr     r2,r0,31
        asl_s   r1,r1,1
        asl_s   r0,r0,1
        j_s.d   [blink]
        or_s    r1,r1,r2

and on CPU without a barrel shifter, i.e. -mcpu=em

foo: add.f   0,r0,r0
        asl_s   r1,r1
        rlc     r2,0
        asl_s   r0,r0
        j_s.d   [blink]
        or_s    r1,r1,r2

with this patch (both with and without a barrel shifter):

foo: add.f   r0,r0,r0
        j_s.d   [blink]
        adc     r1,r1,r1

A similar optimization is also applicable to H8300H, that could also use
a two instruction sequence (plus rts) but currently GCC generates 16
instructions (plus an rts) for foo above.

2023-11-03  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/arc/arc.md (addsi3): Fix GNU-style code formatting.
(adddi3): Change define_expand to generate a *adddi3.
(*adddi3): New define_insn_and_split to lower DImode additions
during the split1 pass (after combine and before reload).
(ashldi3): New define_expand to (only) generate *ashldi3_cnt1
for DImode left shifts by a single bit.
(*ashldi3_cnt1): New define_insn_and_split to lower DImode
left shifts by one bit to an *adddi3.

gcc/testsuite/ChangeLog
* gcc.target/arc/adddi3-1.c: New test case.
* gcc.target/arc/ashldi3-1.c: Likewise.

6 months agoaarch64: Remove unnecessary can_create_pseudo_p condition
Richard Sandiford [Fri, 3 Nov 2023 12:42:48 +0000 (12:42 +0000)] 
aarch64: Remove unnecessary can_create_pseudo_p condition

This patch removes a can_create_pseudo_p condition from
*cmov_uxtw_insn_insv, bringing it in line with *cmov<mode>_insn_insv.
The constraints correctly describe the requirements.

gcc/
* config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
can_create_pseudo_p condition.

6 months agoVECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask
Juzhe-Zhong [Fri, 3 Nov 2023 06:41:13 +0000 (14:41 +0800)] 
VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask

This patch fixes following FAILs for RVV:
FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects  scan-tree-dump vect "Loop contains only SLP stmts"
FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only SLP stmts"

Bootstrap on X86 and regtest passed.

Ok for trunk ?

        PR tree-optimization/111721

gcc/ChangeLog:

* tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
* tree-vect-stmts.cc (vectorizable_load): Ditto.

6 months agotree-optimization/112366 - remove assert for failed live lane code gen
Richard Biener [Fri, 3 Nov 2023 10:31:37 +0000 (11:31 +0100)] 
tree-optimization/112366 - remove assert for failed live lane code gen

The following removes a bogus assert constraining the uses that
could appear when a built from scalar defs SLP node constrains
code generation in a way so earlier uses of the vector CTOR
components fail to get vectorized.  We can't really constrain the
operation such use appears in.

PR tree-optimization/112366
* tree-vect-loop.cc (vectorizable_live_operation): Remove
assert.

6 months agoSkip a number of 'g++.dg/tree-prof/' test cases for '-fno-exceptions' testing
Thomas Schwinge [Wed, 14 Jun 2023 20:39:01 +0000 (22:39 +0200)] 
Skip a number of 'g++.dg/tree-prof/' test cases for '-fno-exceptions' testing

Running 'make check' with: 'RUNTESTFLAGS=--target_board=unix/-fno-exceptions',
'error: exception handling disabled' is triggered for C++ 'throw' etc. usage,
and per 'gcc/testsuite/lib/gcc-dg.exp:gcc-dg-prune':

    # If exceptions are disabled, mark tests expecting exceptions to be enabled
    # as unsupported.
    if { ![check_effective_target_exceptions_enabled] } {
        if [regexp "(^|\n)\[^\n\]*: error: exception handling disabled" $text] {
          return "::unsupported::exception handling disabled"
        }

..., which generally means:

    -PASS: [...] (test for excess errors)
    +UNSUPPORTED: [...]: exception handling disabled

However, this doesn't work for 'g++.dg/tree-prof/' test cases.  For example:

    [-PASS:-]{+UNSUPPORTED:+} g++.dg/tree-prof/indir-call-prof-2.C [-compilation,  -fprofile-generate -D_PROFILE_GENERATE-]{+compilation: exception handling disabled+}
    [-PASS:-]{+UNRESOLVED:+} g++.dg/tree-prof/indir-call-prof-2.C execution,    -fprofile-generate -D_PROFILE_GENERATE
    [-PASS:-]{+UNRESOLVED:+} g++.dg/tree-prof/indir-call-prof-2.C compilation,  -fprofile-use -D_PROFILE_USE
    [-PASS:-]{+UNRESOLVED:+} g++.dg/tree-prof/indir-call-prof-2.C execution,    -fprofile-use -D_PROFILE_USE

Dependent tests turn UNRESOLVED if the first "compilation" runs into the
expected 'UNSUPPORTED: [...] compile: exception handling disabled'.

Specify 'dg-require-effective-target exceptions_enabled' for those test cases.

gcc/testsuite/
* g++.dg/tree-prof/indir-call-prof-2.C: Specify
'dg-require-effective-target exceptions_enabled'.
* g++.dg/tree-prof/partition1.C: Likewise.
* g++.dg/tree-prof/partition2.C: Likewise.
* g++.dg/tree-prof/partition3.C: Likewise.
* g++.dg/tree-prof/pr51719.C: Likewise.
* g++.dg/tree-prof/pr57451.C: Likewise.
* g++.dg/tree-prof/pr59255.C: Likewise.

6 months agoSkip a number of 'g++.dg/lto/' test cases for '-fno-exceptions' testing
Thomas Schwinge [Wed, 7 Jun 2023 14:11:11 +0000 (16:11 +0200)] 
Skip a number of 'g++.dg/lto/' test cases for '-fno-exceptions' testing

Running 'make check' with: 'RUNTESTFLAGS=--target_board=unix/-fno-exceptions',
'error: exception handling disabled' is triggered for C++ 'throw' etc. usage,
and per 'gcc/testsuite/lib/gcc-dg.exp:gcc-dg-prune':

    # If exceptions are disabled, mark tests expecting exceptions to be enabled
    # as unsupported.
    if { ![check_effective_target_exceptions_enabled] } {
        if [regexp "(^|\n)\[^\n\]*: error: exception handling disabled" $text] {
          return "::unsupported::exception handling disabled"
        }

..., which generally means:

    -PASS: [...] (test for excess errors)
    +UNSUPPORTED: [...]: exception handling disabled

However, this doesn't work for "split files" test cases.  For example:

    [-PASS:-]{+UNSUPPORTED:+} g++.dg/lto/20081109-1 cp_lto_20081109-1_0.o [-assemble, -fPIC -flto -flto-partition=1to1-]{+assemble: exception handling disabled+}
    [-PASS:-]{+UNRESOLVED:+} g++.dg/lto/20081109-1 cp_lto_20081109-1_0.o-cp_lto_20081109-1_0.o [-link,-]{+link+} -fPIC -flto -flto-partition=1to1
    {+UNRESOLVED: g++.dg/lto/20081109-1 cp_lto_20081109-1_0.o-cp_lto_20081109-1_0.o execute -fPIC -flto -flto-partition=1to1+}

The "compile"/"assemble" tests (either continue to work, or) result in the
expected 'UNSUPPORTED: [...] compile: exception handling disabled', but
dependent "link" and "execute" tests then turn UNRESOLVED.

Specify 'dg-require-effective-target exceptions_enabled' for those test cases.

gcc/testsuite/
* g++.dg/lto/20081109-1_0.C: Specify
'dg-require-effective-target exceptions_enabled'.
* g++.dg/lto/20081109_0.C: Likewise.
* g++.dg/lto/20091026-1_0.C: Likewise.
* g++.dg/lto/pr87906_0.C: Likewise.
* g++.dg/lto/pr88046_0.C: Likewise.

6 months agoSkip a number of 'g++.dg/compat/' test cases for '-fno-exceptions' testing
Thomas Schwinge [Wed, 7 Jun 2023 14:11:11 +0000 (16:11 +0200)] 
Skip a number of 'g++.dg/compat/' test cases for '-fno-exceptions' testing

Running 'make check' with: 'RUNTESTFLAGS=--target_board=unix/-fno-exceptions',
'error: exception handling disabled' is triggered for C++ 'throw' etc. usage,
and per 'gcc/testsuite/lib/gcc-dg.exp:gcc-dg-prune':

    # If exceptions are disabled, mark tests expecting exceptions to be enabled
    # as unsupported.
    if { ![check_effective_target_exceptions_enabled] } {
        if [regexp "(^|\n)\[^\n\]*: error: exception handling disabled" $text] {
          return "::unsupported::exception handling disabled"
        }

..., which generally means:

    -PASS: [...] (test for excess errors)
    +UNSUPPORTED: [...]: exception handling disabled

However, this doesn't work for "split files" test cases.  For example:

    PASS: g++.dg/compat/eh/ctor1 cp_compat_main_tst.o compile
    [-PASS:-]{+UNSUPPORTED:+} g++.dg/compat/eh/ctor1 cp_compat_x_tst.o [-compile-]{+compile: exception handling disabled+}
    [-PASS:-]{+UNSUPPORTED:+} g++.dg/compat/eh/ctor1 cp_compat_y_tst.o [-compile-]{+compile: exception handling disabled+}
    [-PASS:-]{+UNRESOLVED:+} g++.dg/compat/eh/ctor1 cp_compat_x_tst.o-cp_compat_y_tst.o link
    [-PASS:-]{+UNRESOLVED:+} g++.dg/compat/eh/ctor1 cp_compat_x_tst.o-cp_compat_y_tst.o execute

The "compile"/"assemble" tests (either continue to work, or) result in the
expected 'UNSUPPORTED: [...] compile: exception handling disabled', but
dependent "link" and "execute" tests then turn UNRESOLVED.

Specify 'dg-require-effective-target exceptions_enabled' for those test cases.

gcc/testsuite/
* g++.dg/compat/eh/ctor1_main.C: Specify
'dg-require-effective-target exceptions_enabled'.
* g++.dg/compat/eh/ctor2_main.C: Likewise.
* g++.dg/compat/eh/dtor1_main.C: Likewise.
* g++.dg/compat/eh/filter1_main.C: Likewise.
* g++.dg/compat/eh/filter2_main.C: Likewise.
* g++.dg/compat/eh/new1_main.C: Likewise.
* g++.dg/compat/eh/nrv1_main.C: Likewise.
* g++.dg/compat/eh/spec3_main.C: Likewise.
* g++.dg/compat/eh/template1_main.C: Likewise.
* g++.dg/compat/eh/unexpected1_main.C: Likewise.
* g++.dg/compat/init/array5_main.C: Likewise.

6 months agoSkip a number of C++ test cases for '-fno-exceptions' testing
Thomas Schwinge [Wed, 7 Jun 2023 12:14:44 +0000 (14:14 +0200)] 
Skip a number of C++ test cases for '-fno-exceptions' testing

Running 'make check' with: 'RUNTESTFLAGS=--target_board=unix/-fno-exceptions',
'error: exception handling disabled' is triggered for C++ 'throw' etc. usage,
and per 'gcc/testsuite/lib/gcc-dg.exp:gcc-dg-prune':

    # If exceptions are disabled, mark tests expecting exceptions to be enabled
    # as unsupported.
    if { ![check_effective_target_exceptions_enabled] } {
if [regexp "(^|\n)\[^\n\]*: error: exception handling disabled" $text] {
    return "::unsupported::exception handling disabled"
}

..., which generally means:

    -PASS: [...] (test for excess errors)
    +UNSUPPORTED: [...]: exception handling disabled

However, if there are additional 'dg-error' etc. directives, these may regress
PASS -> FAIL (or similar) -- if their associated diagnostics are precluded by
'error: exception handling disabled'.  For example:

    PASS: g++.dg/cpp2a/explicit1.C    (test for errors, line 43)
    PASS: g++.dg/cpp2a/explicit1.C    (test for errors, line 47)
    [-PASS:-]{+FAIL:+} g++.dg/cpp2a/explicit1.C    (test for errors, line 50)
    [-PASS:-]{+FAIL:+} g++.dg/cpp2a/explicit1.C    (test for errors, line 51)
    PASS: g++.dg/cpp2a/explicit1.C    (test for errors, line 52)
    PASS: g++.dg/cpp2a/explicit1.C    (test for errors, line 53)
    PASS: g++.dg/cpp2a/explicit1.C    (test for errors, line 59)
    [-PASS:-]{+UNSUPPORTED:+} g++.dg/cpp2a/explicit1.C  [-(test for excess errors)-]{+: exception handling disabled+}

Specify 'dg-require-effective-target exceptions_enabled' for those test cases.

gcc/testsuite/
* g++.dg/cpp0x/catch1.C: Specify
'dg-require-effective-target exceptions_enabled'.
* g++.dg/cpp0x/constexpr-throw.C: Likewise.
* g++.dg/cpp1y/constexpr-89785-2.C: Likewise.
* g++.dg/cpp1y/constexpr-throw.C: Likewise.
* g++.dg/cpp1y/pr79393-3.C: Likewise.
* g++.dg/cpp2a/consteval-memfn1.C: Likewise.
* g++.dg/cpp2a/consteval11.C: Likewise.
* g++.dg/cpp2a/consteval34.C: Likewise.
* g++.dg/cpp2a/consteval9.C: Likewise.
* g++.dg/cpp2a/explicit1.C: Likewise.
* g++.dg/cpp2a/explicit2.C: Likewise.
* g++.dg/cpp2a/explicit5.C: Likewise.
* g++.dg/eh/builtin10.C: Likewise.
* g++.dg/eh/builtin11.C: Likewise.
* g++.dg/eh/builtin6.C: Likewise.
* g++.dg/eh/builtin7.C: Likewise.
* g++.dg/eh/builtin9.C: Likewise.
* g++.dg/eh/dtor4.C: Likewise.
* g++.dg/eh/pr42859.C: Likewise.
* g++.dg/ext/stmtexpr25.C: Likewise.
* g++.dg/ext/vla4.C: Likewise.
* g++.dg/init/placement4.C: Likewise.
* g++.dg/other/error32.C: Likewise.
* g++.dg/parse/crash55.C: Likewise.
* g++.dg/parse/pr31952-2.C: Likewise.
* g++.dg/parse/pr31952-3.C: Likewise.
* g++.dg/tm/noexcept-7.C: Likewise.
* g++.dg/torture/pr43257.C: Likewise.
* g++.dg/torture/pr56694.C: Likewise.
* g++.dg/torture/pr81659.C: Likewise.
* g++.dg/warn/Wcatch-value-1.C: Likewise.
* g++.dg/warn/Wcatch-value-2.C: Likewise.
* g++.dg/warn/Wcatch-value-3.C: Likewise.
* g++.dg/warn/Wcatch-value-3b.C: Likewise.
* g++.dg/warn/Wexceptions1.C: Likewise.
* g++.dg/warn/Wexceptions3.C: Likewise.
* g++.dg/warn/Winfinite-recursion-3.C: Likewise.
* g++.dg/warn/Wreturn-6.C: Likewise.
* g++.dg/warn/Wstringop-truncation-2.C: Likewise.
* g++.dg/warn/Wterminate1.C: Likewise.
* g++.old-deja/g++.eh/catch1.C: Likewise.
* g++.old-deja/g++.eh/catch10.C: Likewise.
* g++.old-deja/g++.eh/cond1.C: Likewise.
* g++.old-deja/g++.eh/ctor1.C: Likewise.
* g++.old-deja/g++.eh/throw2.C: Likewise.
* g++.old-deja/g++.other/cond5.C: Likewise.

6 months agotree-optimization/112310 - code hoisting undefined behavior
Richard Biener [Fri, 3 Nov 2023 09:45:18 +0000 (10:45 +0100)] 
tree-optimization/112310 - code hoisting undefined behavior

The following avoids hoisting expressions that may invoke undefined
behavior and are not computed on all paths.  This is realized by
noting that we have to avoid materializing expressions as part
of hoisting that are not part of the set of expressions we have
found eligible for hoisting.  Instead of picking the expression
corresponding to the hoistable values from the first successor
we now keep a union of the expressions so that hoisting can pick
the expression that has its dependences fully hoistable.

PR tree-optimization/112310
* tree-ssa-pre.cc (do_hoist_insertion): Keep the union
of expressions, validate dependences are contained within
the hoistable set before hoisting.

* gcc.dg/torture/pr112310.c: New testcase.

6 months agoFortran: Defined operators with unlimited polymorphic args [PR98498]
Paul Thomas [Fri, 3 Nov 2023 07:11:12 +0000 (07:11 +0000)] 
Fortran: Defined operators with unlimited polymorphic args [PR98498]

2023-11-03  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/98498
* interface.cc (upoly_ok): Defined operators using unlimited
polymorphic formal arguments must not override the intrinsic
operator use.

gcc/testsuite/
PR fortran/98498
* gfortran.dg/interface_50.f90: New test.

6 months agoRISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
Pan Li [Thu, 2 Nov 2023 10:40:10 +0000 (18:40 +0800)] 
RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator

Update in v2:

* Add mode size equal check to disable different mode size when expand,
  because the underlying codegen is not implemented yet.

Original log:

The previous rounding API start with i/l/ll only works on the same
mode types. For example as below, and we arrange the iterator similar
to fcvt.

* SF => SI
* DF => DI

After we refined this limination from middle-end, these API can also
vectorized with different type sizes, aka:

* HF => SI, HF => DI
* SF => DI, SF => SI
* DF => SI, DF => DI

Then the iterator cannot take care of this simply and this patch
would like to re-arrange the iterator in two items.

* V_VLS_F_CONVERT_SI: handle (HF, SF, DF) => SI
* V_VLS_F_CONVERT_DI: handle (HF, SF, DF) => DI

As well as related mode_attr to reconcile the new iterator.

gcc/ChangeLog:

* config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
(lround<mode><v_i_l_ll_convert>2): Ditto.
(lceil<mode><v_i_l_ll_convert>2): Ditto.
(lfloor<mode><v_i_l_ll_convert>2): Ditto.
(lrint<mode><v_f2si_convert>2): New pattern for cvt from
FP to SI.
(lround<mode><v_f2si_convert>2): Ditto.
(lceil<mode><v_f2si_convert>2): Ditto.
(lfloor<mode><v_f2si_convert>2): Ditto.
(lrint<mode><v_f2di_convert>2): New pattern for cvt from
FP to DI.
(lround<mode><v_f2di_convert>2): Ditto.
(lceil<mode><v_f2di_convert>2): Ditto.
(lfloor<mode><v_f2di_convert>2): Ditto.
* config/riscv/vector-iterators.md: Renew iterators for both
the SI and DI.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agoRISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]
Juzhe-Zhong [Fri, 3 Nov 2023 00:36:03 +0000 (08:36 +0800)] 
RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]

With compile option --param=riscv-autovec-preference=fixed-vlmax, we have
redundant AVL/VL toggling:

vsetvli a5,a3,e8,mf4,ta,ma -> should be changed into e32m1
vle32.v v1,0(a1)
vle32.v v2,0(a0)
vsetivli zero,4,e32,m1,ta,ma -> redundant
slli a2,a5,2
vadd.vv v1,v1,v2
sub a3,a3,a5
vsetvli zero,a5,e32,m1,ta,ma -> redundant
vse32.v v1,0(a4)
add a0,a0,a2
add a1,a1,a2
add a4,a4,a2
bne a3,zero,.L3

The root cause is because we simplify AVL into immediate AVL too early
in FIXED-VLMAX situation. The later avlprop PASS failed to propagate AVL
generated by (SELECT_VL/vsetvl VL, AVL) into the normal RVV instruction.

So we need to remove immedate AVL simplification in 'expand' stage.

After this patch:

   vsetvli a5,a3,e32,m1,ta,ma
slli a2,a5,2
vle32.v v1,0(a1)
vle32.v v2,0(a0)
sub a3,a3,a5
vadd.vv v1,v1,v2
vse32.v v1,0(a4)
add a0,a0,a2
add a1,a1,a2
add a4,a4,a2
bne a3,zero,.L3

After the removed simplification, the following situation should be fixed:
typedef int8_t vnx2qi __attribute__ ((vector_size (2)));

__attribute__ ((noipa)) void
f_vnx2qi (int8_t a, int8_t b, int8_t *out)
{
  vnx2qi v = {a, b};
  *(vnx2qi *) out = v;
}

We should use vsetvili zero, 2 instead of vsetvl a5,zero.
Such simplification is done in avlprop PASS which is also included in this patch
to fix regression of these situation.

PR target/112326

gcc/ChangeLog:

* config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
(simplify_replace_vlmax_avl): Ditto.
(pass_avlprop::execute): Add immediate AVL simplification.
* config/riscv/riscv-protos.h (imm_avl_p): Rename.
* config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
(imm_avl_p): Ditto.
(emit_vlmax_insn): Adapt for new interface name.
* config/riscv/vector.md (mode_idx): New attribute.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr112326.c: New test.

6 months agoRevert "RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator"
Pan Li [Fri, 3 Nov 2023 00:25:56 +0000 (08:25 +0800)] 
Revert "RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator"

This reverts commit 81a81abec5c28f2c08f986f1f17ac66e555cbd4b.

6 months agoDaily bump.
GCC Administrator [Fri, 3 Nov 2023 00:16:58 +0000 (00:16 +0000)] 
Daily bump.

6 months agoRISC-V: Add check for types without insn reservations
Edwin Lu [Wed, 1 Nov 2023 17:30:18 +0000 (10:30 -0700)] 
RISC-V: Add check for types without insn reservations

Now that all insns are guaranteed to have a type, ensure every insn
is associated with a cpu unit/insn reservation.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
6 months agoFortran: Fix for regression in ASSOCIATE [PR112316]
Paul Thomas [Thu, 2 Nov 2023 22:23:05 +0000 (22:23 +0000)] 
Fortran: Fix for regression in ASSOCIATE [PR112316]

2023-11-02  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/112316
* parse.cc (parse_associate): Remove condition that caused this
regression.

gcc/testsuite/
PR fortran/112316
* gfortran.dg/pr112316.f90: New test.

6 months agoc++: use hash_set in nrv_data
Jason Merrill [Thu, 2 Nov 2023 03:21:34 +0000 (23:21 -0400)] 
c++: use hash_set in nrv_data

I noticed we were using a hash_table directly here instead of the simpler
hash_set interface.  Also, let's check for the variable itself and repeats
earlier, since they should happen more often than any of the other cases.

gcc/cp/ChangeLog:

* semantics.cc (nrv_data): Change visited to hash_set.
(finalize_nrv_r): Reorganize.

6 months agoc++: retval dtor on rethrow [PR112301]
Jason Merrill [Mon, 30 Oct 2023 21:44:54 +0000 (17:44 -0400)] 
c++: retval dtor on rethrow [PR112301]

In r12-6333 for PR33799, I fixed the example in [except.ctor]/2.  In that
testcase, the exception is caught and the function returns again,
successfully.

In this testcase, however, the exception is rethrown, and hits two separate
cleanups: one in the try block and the other in the function body.  So we
destroy twice an object that was only constructed once.

Fortunately, the fix for the normal case is easy: we just need to clear the
"return value constructed by return" flag when we do it the first time.

This gets more complicated with the named return value optimization, since
we don't want to destroy the return value while the NRV variable is still in
scope.

PR c++/112301
PR c++/102191
PR c++/33799

gcc/cp/ChangeLog:

* except.cc (maybe_splice_retval_cleanup): Clear
current_retval_sentinel when destroying retval.
* semantics.cc (nrv_data): Add in_nrv_cleanup.
(finalize_nrv): Set it.
(finalize_nrv_r): Fix handling of throwing cleanups.

gcc/testsuite/ChangeLog:

* g++.dg/eh/return1.C: Add more cases.

6 months agolibstdc++: Add assertion to std::string_view::remove_suffix [PR112314]
Jonathan Wakely [Wed, 1 Nov 2023 15:01:22 +0000 (15:01 +0000)] 
libstdc++: Add assertion to std::string_view::remove_suffix [PR112314]

libstdc++-v3/ChangeLog:

PR libstdc++/112314
* include/std/string_view (string_view::remove_suffix): Add
debug assertion.
* testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc:
New test.
* testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc:
New test.

6 months agoc: Add missing conditions in Walloc-size to avoid ICEs [PR112347]
Martin Uecker [Thu, 2 Nov 2023 12:12:15 +0000 (13:12 +0100)] 
c: Add missing conditions in Walloc-size to avoid ICEs [PR112347]

Fix ICE because of forgotten checks for pointers to void
and incomplete arrays.

Committed as obvious.

PR c/112347

gcc/c:
* c-typeck.cc (convert_for_assignment): Add missing check.

gcc/testsuite:

* gcc.dg/Walloc-size-3.c: New test.

6 months agod: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7
Iain Buclaw [Thu, 2 Nov 2023 12:24:07 +0000 (13:24 +0100)] 
d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7

D front-end changes:

    - Suggested preview switches now give gdc flags (PR109681).
    - `new S[10]' is now lowered to `_d_newarrayT!S(10)'.

D runtime changes:

    - Runtime compiler library functions `_d_newarrayU', `_d_newarrayT',
      `_d_newarrayiT' have been converted to templates.

Phobos changes:

    - Add new `std.traits.Unshared' template.

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 643b1261bb.
* d-attribs.cc (build_attributes): Update for new front-end interface.
* d-lang.cc (d_post_options): Likewise.
* decl.cc (layout_class_initializer): Likewise.

libphobos/ChangeLog:

* libdruntime/MERGE: Merge upstream druntime 643b1261bb.
* libdruntime/Makefile.am (DRUNTIME_DSOURCES_FREEBSD): Add
core/sys/freebsd/ifaddrs.d, core/sys/freebsd/net/if_dl.d,
core/sys/freebsd/sys/socket.d, core/sys/freebsd/sys/types.d.
(DRUNTIME_DSOURCES_LINUX): Add core/sys/linux/linux/if_arp.d,
core/sys/linux/linux/if_packet.d.
* libdruntime/Makefile.in: Regenerate.
* src/MERGE: Merge upstream phobos 1c98326e7.

6 months agolibstdc++: Fix warning during configure
Jonathan Wakely [Wed, 1 Nov 2023 14:20:33 +0000 (14:20 +0000)] 
libstdc++: Fix warning during configure

The checks for snprintf give a -Wformat warning due to a missing
argument.

libstdc++-v3/ChangeLog:

* acinclude.m4 (GLIBCXX_ENABLE_C99): Fix snprintf checks.
* configure: Regenerate.

6 months ago[committed] Improve H8 sequences for single bit sign extractions
Jeff Law [Thu, 2 Nov 2023 13:25:39 +0000 (07:25 -0600)] 
[committed] Improve H8 sequences for single bit sign extractions

Spurred by Roger's recent work on ARC, this patch improves the code we
generation for single bit sign extractions.

The basic idea is to get the bit we want into C, the use a subx;ext.w;ext.l
sequence to sign extend it in a GPR.

For bits 0..15 we can use a bld instruction to get the bit we want into C.  For
bits 16..31, we can move the high word into the low word, then use bld.
There's a couple special cases where we can shift the bit we want from the high
word into C which is an instruction smaller.

Not surprisingly most cases seen in newlib and the test suite are extractions
from the low byte, HImode sign bit and top two bits of SImode.

Regression tested on the H8 with no regressions.  Installing on the trunk.

gcc/
* config/h8300/combiner.md: Add new patterns for single bit
sign extractions.

6 months agoanalyzer: fix clang warnings [PR112317]
David Malcolm [Thu, 2 Nov 2023 12:39:51 +0000 (08:39 -0400)] 
analyzer: fix clang warnings [PR112317]

No functional change intended.

gcc/analyzer/ChangeLog:
PR analyzer/112317
* access-diagram.cc (class x_aligned_x_ruler_widget): Eliminate
unused field "m_col_widths".
(access_diagram_impl::add_valid_vs_invalid_ruler): Update for
above change.
* region-model.cc
(check_one_function_attr_null_terminated_string_arg): Remove
unused variables "cd_unchecked", "strlen_sval", and
"limited_sval".
* region-model.h (region_model_context_decorator::warn): Add
missing "override".

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
6 months agoRISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
Pan Li [Thu, 2 Nov 2023 10:40:10 +0000 (18:40 +0800)] 
RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator

The previous rounding API start with i/l/ll only works on the same
mode types. For example as below, and we arrange the iterator similar
to fcvt.

* SF => SI
* DF => DI

After we refined this limination from middle-end, these API can also
vectorized with different type sizes, aka:

* HF => SI, HF => DI
* SF => DI, SF => SI
* DF => SI, DF => DI

Then the iterator cannot take care of this simply and this patch
would like to re-arrange the iterator in two items.

* V_VLS_F_CONVERT_SI: handle (HF, SF, DF) => SI
* V_VLS_F_CONVERT_DI: handle (HF, SF, DF) => DI

As well as related mode_attr to reconcile the new iterator.

gcc/ChangeLog:

* config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
(lround<mode><v_i_l_ll_convert>2): Ditto.
(lceil<mode><v_i_l_ll_convert>2): Ditto.
(lfloor<mode><v_i_l_ll_convert>2): Ditto.
(lrint<mode><v_f2si_convert>2): New pattern for cvt from
FP to SI.
(lround<mode><v_f2si_convert>2): Ditto.
(lceil<mode><v_f2si_convert>2): Ditto.
(lfloor<mode><v_f2si_convert>2): Ditto.
(lrint<mode><v_f2di_convert>2): New pattern for cvt from
FP to DI.
(lround<mode><v_f2di_convert>2): Ditto.
(lceil<mode><v_f2di_convert>2): Ditto.
(lfloor<mode><v_f2di_convert>2): Ditto.
* config/riscv/vector-iterators.md: Renew iterators for both
the SI and DI.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agodoc: explicitly say 'lifetime' for DCE
Sam James [Thu, 2 Nov 2023 09:02:30 +0000 (09:02 +0000)] 
doc: explicitly say 'lifetime' for DCE

Say 'memory lifetime' rather than 'memory life' as lifetime is the more
standard term nowadays (indeed we have e.g. -fno-lifetime-dse).

It's also easier to grep for if someone is looking for the documentation on
where we do that.

gcc/ChangeLog:
* doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
as this has become the standard term for what we're doing here.

Signed-off-by: Sam James <sam@gentoo.org>
6 months agoRISC-V: Fix bug of AVL propagation PASS
Juzhe-Zhong [Thu, 2 Nov 2023 11:30:23 +0000 (19:30 +0800)] 
RISC-V: Fix bug of AVL propagation PASS

A run FAIL suddenly shows up today to me:
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c execution test

that I didn't have before.

After investigation, I realize that there is a bug in AVL propagtion PASS.

gcc/ChangeLog:

* config/riscv/riscv-avlprop.cc
(pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
non-real insn AVL propation.

6 months agoifcvt/vect: Emit COND_OP for conditional scalar reduction.
Robin Dapp [Wed, 13 Sep 2023 20:19:35 +0000 (22:19 +0200)] 
ifcvt/vect: Emit COND_OP for conditional scalar reduction.

As described in PR111401 we currently emit a COND and a PLUS expression
for conditional reductions.  This makes it difficult to combine both
into a masked reduction statement later.
This patch improves that by directly emitting a COND_ADD/COND_OP during
ifcvt and adjusting some vectorizer code to handle it.

It also makes neutral_op_for_reduction return -0 if HONOR_SIGNED_ZEROS
is true.

gcc/ChangeLog:

PR middle-end/111401
* internal-fn.cc (internal_fn_else_index): New function.
* internal-fn.h (internal_fn_else_index): Define.
* tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
if supported.
(predicate_scalar_phi): Add whitespace.
* tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
(neutral_op_for_reduction): Return -0 for PLUS.
(check_reduction_path): Don't count else operand in COND_OP.
(vect_is_simple_reduction): Ditto.
(vect_create_epilog_for_reduction): Fix whitespace.
(vectorize_fold_left_reduction): Add COND_OP handling.
(vectorizable_reduction): Don't count else operand in COND_OP.
(vect_transform_reduction): Add COND_OP handling.
* tree-vectorizer.h (neutral_op_for_reduction): Add default
parameter.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-cond-reduc-in-order-2-signed-zero.c: New test.
* gcc.target/riscv/rvv/autovec/cond/pr111401.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-2.c: Adjust.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c: Ditto.

6 months agotree-optimization/112320 - bougs debug IL after SCCP
Richard Biener [Thu, 2 Nov 2023 09:39:03 +0000 (10:39 +0100)] 
tree-optimization/112320 - bougs debug IL after SCCP

The following addresses wrong debug IL created by SCCP rewriting stmts
to defined overflow.  I addressed another inefficiency there but
needed to adjust the API of rewrite_to_defined_overflow for this
which is now taking a stmt iterator for in-place operation and a
stmt for sequence producing because gsi_for_stmt doesn't work for
stmts not in the IL.

PR tree-optimization/112320
* gimple-fold.h (rewrite_to_defined_overflow): New overload
for in-place operation.
* gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
iterator argument to worker, define separate API for
in-place and not in-place operation.
* tree-if-conv.cc (predicate_statements): Simplify.
* tree-scalar-evolution.cc (final_value_replacement_loop):
Likewise.
* tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
* tree-ssa-reassoc.cc (update_range_test): Likewise.

* gcc.dg/pr112320.c: New testcase.

6 months agoi386: Move stack protector patterns above mov $0 -> xor peephole
Uros Bizjak [Thu, 2 Nov 2023 10:03:18 +0000 (11:03 +0100)] 
i386: Move stack protector patterns above mov $0 -> xor peephole

Move stack protector patterns above mov $0,%reg -> xor %reg,%reg
so the later won't interfere with stack protector peephole2s.

gcc/ChangeLog:

* config/i386/i386.md: Move stack protector patterns
above mov $0,%reg -> xor %reg,%reg peephole2 pattern.

6 months agoMake GCN target effective-target 'vect_gather_load_ifn'
Thomas Schwinge [Tue, 31 Oct 2023 13:31:37 +0000 (14:31 +0100)] 
Make GCN target effective-target 'vect_gather_load_ifn'

This fixes:

     PASS: gcc.dg/vect/vect-gather-2.c (test for excess errors)
    -FAIL: gcc.dg/vect/vect-gather-2.c scan-tree-dump vect "different gather base"
    -FAIL: gcc.dg/vect/vect-gather-2.c scan-tree-dump vect "different gather scale"
     PASS: gcc.dg/vect/vect-gather-2.c scan-tree-dump-not vect "Loop contains only SLP stmts"

..., and enables other test cases.

gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_gather_load_ifn): True for GCN
target.

6 months agoSupport cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction.
liuhongt [Wed, 1 Nov 2023 07:01:48 +0000 (15:01 +0800)] 
Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction.

gcc/ChangeLog:

* config/i386/mmx.md (cmlav4hf4): New expander.
(cmla_conjv4hf4): Ditto.
(cmulv4hf3): Ditto.
(cmul_conjv4hf3): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/part-vect-complexhf.c: New test.

6 months agoc++: Implement C++26 P2361R6 - Unevaluated strings [PR110342]
Jakub Jelinek [Thu, 2 Nov 2023 06:44:24 +0000 (07:44 +0100)] 
c++: Implement C++26 P2361R6 - Unevaluated strings [PR110342]

The following patch implements C++26 unevaluated-string.
As it seems to me just extra pedanticity, it is implemented only for
-std=c++26 or -std=gnu++26 and later and only if -pedantic/-pedantic-errors.
Nothing is done for inline asm, while the spec changes those, it changes it
to a balanced token sequence with implementation defined rules on what is
and isn't allowed (so pedantically accepting asm ("" : "+m" (x));
was accepts-invalid before C++26, but we didn't diagnose anything).
For the other spots mentioned in the paper, static_assert message,
linkage specification, deprecated/nodiscard attributes it enforces the
requirements (no prefixes, udlit suffixes, no octal/hexadecimal escapes
(conditional escape sequences were rejected with pedantic already before).
For the deprecated operator "" identifier case I've kept things as is,
because everything seems to have been diagnosed already (a lot being implied
from the string having to be empty).

2023-11-02  Jakub Jelinek  <jakub@redhat.com>

PR c++/110342
gcc/cp/
* parser.cc: Implement C++26 P2361R6 - Unevaluated strings.
(uneval_string_attr): New enumerator.
(cp_parser_string_literal_common): Add UNEVAL argument.  If true,
pass CPP_UNEVAL_STRING rather than CPP_STRING to
cpp_interpret_string_notranslate.
(cp_parser_string_literal, cp_parser_userdef_string_literal): Adjust
callers of cp_parser_string_literal_common.
(cp_parser_unevaluated_string_literal): New function.
(cp_parser_parenthesized_expression_list): Handle uneval_string_attr.
(cp_parser_linkage_specification): Use
cp_parser_unevaluated_string_literal for C++26.
(cp_parser_static_assert): Likewise.
(cp_parser_std_attribute): Use uneval_string_attr for standard
deprecated and nodiscard attributes.
gcc/testsuite/
* g++.dg/cpp26/unevalstr1.C: New test.
* g++.dg/cpp26/unevalstr2.C: New test.
* g++.dg/cpp0x/udlit-error1.C (lol): Expect an error for C++26
about user-defined literal in deprecated attribute.
libcpp/
* include/cpplib.h (TTYPE_TABLE): Add CPP_UNEVAL_STRING literal
entry.  Use C++11 instead of C++-0x in comments.
* charset.cc (convert_escape): Add UNEVAL argument, if true,
pedantically diagnose numeric escape sequences.
(cpp_interpret_string_1): Formatting fix.  Adjust convert_escape
caller.
(cpp_interpret_string): Formatting string.
(cpp_interpret_string_notranslate): Pass type through to
cpp_interpret_string if it is CPP_UNEVAL_STRING.

6 months agoRISC-V: Fix redundant attributes
Juzhe-Zhong [Thu, 2 Nov 2023 02:46:51 +0000 (10:46 +0800)] 
RISC-V: Fix redundant attributes

Notice that there are some reundant 'vimov' codes in attribute.

Committed as it is obvious.

gcc/ChangeLog:

* config/riscv/vector.md: Fix redundant codes in attributes.

6 months agoRISC-V: Support vcreate intrinsics for non-tuple types
xuli [Thu, 2 Nov 2023 01:12:48 +0000 (01:12 +0000)] 
RISC-V: Support vcreate intrinsics for non-tuple types

https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/288

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
* config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
* config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
* config/riscv/riscv-vector-builtins.cc: Add arg types.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/tuple_create.c: Rename to vcreate.c.
* gcc.target/riscv/rvv/base/vcreate.c: New test.

6 months agoVECT: Refine the type size restriction of call vectorizer
Pan Li [Mon, 30 Oct 2023 07:29:21 +0000 (15:29 +0800)] 
VECT: Refine the type size restriction of call vectorizer

Update in v4:

* Append the check to vectorizable_internal_function.

Update in v3:

* Add func to predicate type size is legal or not for vectorizer call.

Update in v2:

* Fix one ICE of type assertion.
* Adjust some test cases for aarch64 sve and riscv vector.

Original log:

The vectoriable_call has one restriction of the size of data type.
Aka DF to DI is allowed but SF to DI isn't. You may see below message
when try to vectorize function call like lrintf.

void
test_lrintf (long *out, float *in, unsigned count)
{
  for (unsigned i = 0; i < count; i++)
    out[i] = __builtin_lrintf (in[i]);
}

lrintf.c:5:26: missed: couldn't vectorize loop
lrintf.c:5:26: missed: not vectorized: unsupported data-type

Then the standard name pattern like lrintmn2 cannot work for different
data type size like SF => DI. This patch would like to refine this data
type size check and unblock the standard name like lrintmn2 on conditions.

The type size of vectype_out need to be exactly the same as the type
size of vectype_in when the vectype_out size isn't participating in
the optab selection. While there is no such restriction when the
vectype_out is somehow a part of the optab query.

The below test are passed for this patch.

* The risc-v regression tests.
* Ensure the lrintf standard name in risc-v.

The below test are ongoing.

* The x86 bootstrap and regression test.
* The aarch64 regression test.

gcc/ChangeLog:

* tree-vect-stmts.cc (vectorizable_internal_function): Add type
size check for vectype_out doesn't participating for optab query.
(vectorizable_call): Remove the type size check.

Signed-off-by: Pan Li <pan2.li@intel.com>
6 months agoRISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruc...
Juzhe-Zhong [Wed, 1 Nov 2023 06:56:39 +0000 (14:56 +0800)] 
RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327]

Consider this following intrinsic code:

void rvv_dot_prod(int16_t *pSrcA, int16_t *pSrcB, uint32_t n, int64_t *result)
{
    size_t vl;
    vint16m4_t vSrcA, vSrcB;
    vint64m1_t vSum = __riscv_vmv_s_x_i64m1(0, 1);
    while (n > 0) {
        vl = __riscv_vsetvl_e16m4(n);
        vSrcA = __riscv_vle16_v_i16m4(pSrcA, vl);
        vSrcB = __riscv_vle16_v_i16m4(pSrcB, vl);
        vSum = __riscv_vwredsum_vs_i32m8_i64m1(__riscv_vwmul_vv_i32m8(vSrcA, vSrcB, vl), vSum, vl);
        pSrcA += vl;
        pSrcB += vl;
        n -= vl;
    }
    *result = __riscv_vmv_x_s_i64m1_i64(vSum);
}

https://godbolt.org/z/vWd35W7G6

Before this patch:

...
Loop:
...
vmv1r.v v2,v1
...
vwredsum.vs     v1,v8,v2
...

After this patch:

...
Loop:
...
vwredsum.vs v1,v8,v1
...

PR target/112327

gcc/ChangeLog:

* config/riscv/vector.md: Add '0'.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112327-1.c: New test.
* gcc.target/riscv/rvv/base/pr112327-2.c: New test.

6 months agoDaily bump.
GCC Administrator [Thu, 2 Nov 2023 00:17:30 +0000 (00:17 +0000)] 
Daily bump.

6 months agoMinor formatting fix for newly-added file from previous commit
Eric Gallager [Wed, 1 Nov 2023 23:28:56 +0000 (19:28 -0400)] 
Minor formatting fix for newly-added file from previous commit

Committing under the "obvious" rule.

ChangeLog:

* .github/CONTRIBUTING.md: Wrap lines more tightly.

6 months agoAdd files to discourage submissions of PRs to the GitHub mirror.
Eric Gallager [Mon, 16 Oct 2023 23:22:17 +0000 (19:22 -0400)] 
Add files to discourage submissions of PRs to the GitHub mirror.

Currently there is an unofficial mirror of GCC on GitHub that people
sometimes submit pull requests to:
https://github.com/gcc-mirror/gcc
However, this is not the proper way to contribute to GCC, so that means
that someone (usually Jonathan Wakely) has to go through the PRs and
manually tell people that they're sending their PRs to the wrong place.
One thing that would help mitigate this problem would be files in a
special .github directory that GitHub would automatically open when
contributors attempt to open a PR, that would then tell them the proper
way to contribute instead. This patch attempts to add two such files.
They are written in Markdown, which I'm realizing might require some
special handling in this repository, since the ".md" extension is also
used for GCC's "Machine Description" files here, but I'm not quite sure
how to go about handling that. Also note that I adapted these files from
equivalent files in the git repository for Git itself:
https://github.com/git/git/blob/master/.github/CONTRIBUTING.md
https://github.com/git/git/blob/master/.github/PULL_REQUEST_TEMPLATE.md
What do people think?

ChangeLog:

* .github/CONTRIBUTING.md: New file.
* .github/PULL_REQUEST_TEMPLATE.md: New file.

6 months agoPR target/110551: Tweak mulx register allocation using peephole2.
Roger Sayle [Wed, 1 Nov 2023 22:33:45 +0000 (22:33 +0000)] 
PR target/110551: Tweak mulx register allocation using peephole2.

This patch is a follow-up to my previous PR target/110551 patch, this
time to address the additional move after mulx, seen on TARGET_BMI2
architectures (such as -march=haswell).  The complication here is
that the flexible multiple-set mulx instruction is introduced into
RTL after reload, by split2, and therefore can't benefit from register
preferencing.  This results in RTL like the following:

(insn 32 31 17 2 (parallel [
            (set (reg:DI 4 si [orig:101 r ] [101])
                (mult:DI (reg:DI 1 dx [109])
                    (reg:DI 5 di [109])))
            (set (reg:DI 5 di [ r+8 ])
                (umul_highpart:DI (reg:DI 1 dx [109])
                    (reg:DI 5 di [109])))
        ]) "pr110551-2.c":8:17 -1
     (nil))

(insn 17 32 9 2 (set (reg:DI 0 ax [107])
        (reg:DI 5 di [ r+8 ])) "pr110551-2.c":9:40 90 {*movdi_internal}
     (expr_list:REG_DEAD (reg:DI 5 di [ r+8 ])
        (nil)))

Here insn 32, the mulx instruction, places its results in si and di,
and then immediately after decides to move di to ax, with di now dead.
This can be trivially cleaned up by a peephole2.  I've added an
additional constraint that the two SET_DESTs can't be the same
register to avoid confusing the middle-end, but this has well-defined
behaviour on x86_64/BMI2, encoding a umul_highpart.

For the new test case, compiled on x86_64 with -O2 -march=haswell:

Before:
mulx64: movabsq $-7046029254386353131, %rdx
        mulx    %rdi, %rsi, %rdi
        movq    %rdi, %rax
        xorq    %rsi, %rax
        ret

After:
mulx64: movabsq $-7046029254386353131, %rdx
        mulx    %rdi, %rsi, %rax
        xorq    %rsi, %rax
        ret

2023-11-01  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
PR target/110551
* config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
as operands[2] with predicate register_operand must be !MEM_P.
(peephole2): Optimize a mulx followed by a register-to-register
move, to place result in the correct destination if possible.

gcc/testsuite/ChangeLog
PR target/110551
* gcc.target/i386/pr110551-2.c: New test case.

6 months agoRISC-V: Use riscv_subword_address for atomic_test_and_set
Patrick O'Neill [Tue, 31 Oct 2023 20:18:53 +0000 (13:18 -0700)] 
RISC-V: Use riscv_subword_address for atomic_test_and_set

Other subword atomic patterns use riscv_subword_address to calculate
the aligned address, shift amount, mask and !mask. atomic_test_and_set
was implemented before the common function was added. After this patch
all subword atomic patterns use riscv_subword_address.

gcc/ChangeLog:

* config/riscv/sync.md:  Use riscv_subword_address function to
calculate the address and shift in atomic_test_and_set.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>