sysdeps/hppa/hppa1.1/mul_1.S

   1 ;! HP-PA-1.1 __mpn_mul_1 -- Multiply a limb vector with a limb and store
   2 ;! the result in a second limb vector.
   3
   4 ;! Copyright (C) 1992-2019 Free Software Foundation, Inc.
   5
   6 ;! This file is part of the GNU MP Library.
   7
   8 ;! The GNU MP Library is free software; you can redistribute it and/or modify
   9 ;! it under the terms of the GNU Lesser General Public License as published by
  10 ;! the Free Software Foundation; either version 2.1 of the License, or (at your
  11 ;! option) any later version.
  12
  13 ;! The GNU MP Library is distributed in the hope that it will be useful, but
  14 ;! WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15 ;! or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
  16 ;! License for more details.
  17
  18 ;! You should have received a copy of the GNU Lesser General Public License
  19 ;! along with the GNU MP Library.  If not, see
  20 ;! <http://www.gnu.org/licenses/>.
  21
  22
  23 ;! INPUT PARAMETERS
  24 ;! res_ptr      r26
  25 ;! s1_ptr       r25
  26 ;! size         r24
  27 ;! s2_limb      r23
  28
  29 ;! This runs at 9 cycles/limb on a PA7000.  With the used instructions, it can
  30 ;! not become faster due to data cache contention after a store.  On the
  31 ;! PA7100 it runs at 7 cycles/limb, and that can not be improved either, since
  32 ;! only the xmpyu does not need the integer pipeline, so the only dual-issue
  33 ;! we will get are addc+xmpyu.  Unrolling would not help either CPU.
  34
  35 ;! We could use fldds to read two limbs at a time from the S1 array, and that
  36 ;! could bring down the times to 8.5 and 6.5 cycles/limb for the PA7000 and
  37 ;! PA7100, respectively.  We don't do that since it does not seem worth the
  38 ;! (alignment) troubles...
  39
  40 ;! At least the PA7100 is rumored to be able to deal with cache-misses
  41 ;! without stalling instruction issue.  If this is true, and the cache is
  42 ;! actually also lockup-free, we should use a deeper software pipeline, and
  43 ;! load from S1 very early;  (The loads and stores to -12(sp) will surely be
  44 ;! in the cache.)
  45
  46         .text
  47         .export         __mpn_mul_1
  48 __mpn_mul_1:
  49         .proc
  50         .callinfo       frame=64,no_calls
  51         .entry
  52
  53         ldo             64(%r30),%r30
  54         fldws,ma        4(%r25),%fr5
  55         stw             %r23,-16(%r30)          ;! move s2_limb ...
  56         addib,=         -1,%r24,L$just_one_limb
  57          fldws          -16(%r30),%fr4          ;! ... into fr4
  58         add             %r0,%r0,%r0             ;! clear carry
  59         xmpyu           %fr4,%fr5,%fr6
  60         fldws,ma        4(%r25),%fr7
  61         fstds           %fr6,-16(%r30)
  62         xmpyu           %fr4,%fr7,%fr8
  63         ldw             -12(%r30),%r20          ;! least significant limb in product
  64         ldw             -16(%r30),%r28
  65
  66         fstds           %fr8,-16(%r30)
  67         addib,=         -1,%r24,L$end
  68          ldw            -12(%r30),%r1
  69
  70 ;! Main loop
  71 L$loop:
  72         fldws,ma        4(%r25),%fr5
  73         stws,ma         %r20,4(%r26)
  74         addc            %r28,%r1,%r20
  75         xmpyu           %fr4,%fr5,%fr6
  76         ldw             -16(%r30),%r28
  77         fstds           %fr6,-16(%r30)
  78         addib,<>        -1,%r24,L$loop
  79          ldw            -12(%r30),%r1
  80
  81 L$end:
  82         stws,ma         %r20,4(%r26)
  83         addc            %r28,%r1,%r20
  84         ldw             -16(%r30),%r28
  85         stws,ma         %r20,4(%r26)
  86         addc            %r0,%r28,%r28
  87         bv              0(%r2)
  88          ldo            -64(%r30),%r30
  89
  90 L$just_one_limb:
  91         xmpyu           %fr4,%fr5,%fr6
  92         fstds           %fr6,-16(%r30)
  93         ldw             -16(%r30),%r28
  94         ldo             -64(%r30),%r30
  95         bv              0(%r2)
  96          fstws          %fr6R,0(%r26)
  97
  98         .exit
  99         .procend