sysdeps/i386/i686/multiarch/strspn.S

   1 /* Multiple versions of strspn
   2    Copyright (C) 2009,2010,2012 Free Software Foundation, Inc.
   3    Contributed by Intel Corporation.
   4    This file is part of the GNU C Library.
   5
   6    The GNU C Library is free software; you can redistribute it and/or
   7    modify it under the terms of the GNU Lesser General Public
   8    License as published by the Free Software Foundation; either
   9    version 2.1 of the License, or (at your option) any later version.
  10
  11    The GNU C Library is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    Lesser General Public License for more details.
  15
  16    You should have received a copy of the GNU Lesser General Public
  17    License along with the GNU C Library; if not, see
  18    <http://www.gnu.org/licenses/>.  */
  19
  20 #include <config.h>
  21
  22 #ifdef HAVE_SSE4_SUPPORT
  23
  24 #include <sysdep.h>
  25 #include <init-arch.h>
  26
  27 /* Define multiple versions only for the definition in libc.  */
  28 #ifndef NOT_IN_libc
  29 # ifdef SHARED
  30         .text
  31 ENTRY(strspn)
  32         .type   strspn, @gnu_indirect_function
  33         pushl   %ebx
  34         cfi_adjust_cfa_offset (4)
  35         cfi_rel_offset (ebx, 0)
  36         LOAD_PIC_REG(bx)
  37         cmpl    $0, KIND_OFFSET+__cpu_features@GOTOFF(%ebx)
  38         jne     1f
  39         call    __init_cpu_features
  40 1:      leal    __strspn_ia32@GOTOFF(%ebx), %eax
  41         testl   $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
  42         jz      2f
  43         leal    __strspn_sse42@GOTOFF(%ebx), %eax
  44 2:      popl    %ebx
  45         cfi_adjust_cfa_offset (-4);
  46         cfi_restore (ebx)
  47         ret
  48 END(strspn)
  49 # else
  50         .text
  51 ENTRY(strspn)
  52         .type   strspn, @gnu_indirect_function
  53         cmpl    $0, KIND_OFFSET+__cpu_features
  54         jne     1f
  55         call    __init_cpu_features
  56 1:      leal    __strspn_ia32, %eax
  57         testl   $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
  58         jz      2f
  59         leal    __strspn_sse42, %eax
  60 2:      ret
  61 END(strspn)
  62 # endif
  63
  64 # undef ENTRY
  65 # define ENTRY(name) \
  66         .type __strspn_ia32, @function; \
  67         .globl __strspn_ia32; \
  68         .p2align 4; \
  69 __strspn_ia32: cfi_startproc; \
  70         CALL_MCOUNT
  71 # undef END
  72 # define END(name) \
  73         cfi_endproc; .size __strspn_ia32, .-__strspn_ia32
  74 # undef libc_hidden_builtin_def
  75 /* IFUNC doesn't work with the hidden functions in shared library since
  76    they will be called without setting up EBX needed for PLT which is
  77    used by IFUNC.  */
  78 # define libc_hidden_builtin_def(name) \
  79         .globl __GI_strspn; __GI_strspn = __strspn_ia32
  80 #endif
  81
  82 #endif /* HAVE_SSE4_SUPPORT */
  83
  84 #include "../../strspn.S"