sysdeps/powerpc/powerpc32/e500/nofpu/spe-raise.c

   1 /* Raise given exceptions, given the SPEFSCR bits for those exceptions.
   2    Copyright (C) 1997-2015 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #include <fenv_libc.h>
  20
  21 int
  22 __FERAISEEXCEPT_INTERNAL (int excepts)
  23 {
  24   unsigned long f;
  25
  26   f = fegetenv_register ();
  27   f |= (excepts & SPEFSCR_ALL_EXCEPT);
  28   fesetenv_register (f);
  29
  30   /* Force the operations that cause the exceptions.  */
  31   if ((SPEFSCR_FINVS & excepts) != 0)
  32     /* 0 / 0 */
  33     asm volatile ("efsdiv %0,%0,%1" : : "r" (0), "r" (0));
  34
  35   if ((SPEFSCR_FDBZS & excepts) != 0)
  36     /* 1.0 / 0.0 */
  37     asm volatile ("efsdiv %0,%0,%1" : : "r" (1.0F), "r" (0));
  38
  39   if ((SPEFSCR_FOVFS & excepts) != 0)
  40     /* Largest normalized number plus itself.  */
  41     asm volatile ("efsadd %0,%0,%1" : : "r" (0x7f7fffff), "r" (0x7f7fffff));
  42
  43   if ((SPEFSCR_FUNFS & excepts) != 0)
  44     /* Smallest normalized number times itself.  */
  45     asm volatile ("efsmul %0,%0,%1" : : "r" (0x800000), "r" (0x800000));
  46
  47   if ((SPEFSCR_FINXS & excepts) != 0)
  48     /* Smallest normalized minus 1.0 raises the inexact flag.  */
  49     asm volatile ("efssub %0,%0,%1" : : "r" (0x00800000), "r" (1.0F));
  50
  51   /* Success.  */
  52   return 0;
  53 }