sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S

   1 /* Round float to int floating-point values without generating
   2    an inexact exception, sparc32 v9 vis3 version.
   3
   4    Copyright (C) 2013-2019 Free Software Foundation, Inc.
   5    This file is part of the GNU C Library.
   6    Contributed by David S. Miller <davem@davemloft.net>, 2013.
   7
   8    The GNU C Library is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU Lesser General Public
  10    License as published by the Free Software Foundation; either
  11    version 2.1 of the License, or (at your option) any later version.
  12
  13    The GNU C Library is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    Lesser General Public License for more details.
  17
  18    You should have received a copy of the GNU Lesser General Public
  19    License along with the GNU C Library; if not, see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #include <sysdep.h>
  23 #include <math_ldbl_opt.h>
  24
  25         /* We pop constants into the FPU registers using the incoming
  26            argument stack slots, since this avoid having to use any PIC
  27            references.  We also thus avoid having to allocate a register
  28            window.
  29
  30            VIS instructions are used to facilitate the formation of
  31            easier constants, and the propagation of the sign bit.  */
  32
  33 #define TWO_FIFTYTWO    0x43300000              /* 2**52 */
  34
  35 #define ZERO            %f10                    /* 0.0 */
  36 #define SIGN_BIT        %f12                    /* -0.0 */
  37
  38 ENTRY (__nearbyint_vis3)
  39         sllx    %o0, 32, %o0
  40         or      %o0, %o1, %o0
  41         movxtod %o0, %f0
  42         fcmpd   %fcc3, %f0, %f0                 /* Check for sNaN */
  43         st      %fsr, [%sp + 88]
  44         sethi   %hi(TWO_FIFTYTWO), %o2
  45         sethi   %hi(0xf8003e0), %o5
  46         ld      [%sp + 88], %o4
  47         or      %o5, %lo(0xf8003e0), %o5
  48         andn    %o4, %o5, %o4
  49         fzero   ZERO
  50         st      %o4, [%sp + 80]
  51         sllx    %o2, 32, %o2
  52         fnegd   ZERO, SIGN_BIT
  53         ld      [%sp + 80], %fsr
  54         movxtod %o2, %f16
  55         fabsd   %f0, %f14
  56         fcmpd   %fcc3, %f14, %f16
  57         fmovduge %fcc3, ZERO, %f16
  58         fand    %f0, SIGN_BIT, SIGN_BIT
  59         for     %f16, SIGN_BIT, %f16
  60         faddd   %f0, %f16, %f6
  61         fsubd   %f6, %f16, %f0
  62         fabsd   %f0, %f0
  63         for     %f0, SIGN_BIT, %f0
  64         retl
  65          ld     [%sp + 88], %fsr
  66 END (__nearbyint_vis3)