sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S

   1 /* Round float to int floating-point values without generating
   2    an inexact exception, sparc32 v9 vis3 version.
   3
   4    Copyright (C) 2013-2016 Free Software Foundation, Inc.
   5    This file is part of the GNU C Library.
   6    Contributed by David S. Miller <davem@davemloft.net>, 2013.
   7
   8    The GNU C Library is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU Lesser General Public
  10    License as published by the Free Software Foundation; either
  11    version 2.1 of the License, or (at your option) any later version.
  12
  13    The GNU C Library is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    Lesser General Public License for more details.
  17
  18    You should have received a copy of the GNU Lesser General Public
  19    License along with the GNU C Library; if not, see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #include <sysdep.h>
  23
  24         /* We pop constants into the FPU registers using the incoming
  25            argument stack slots, since this avoid having to use any PIC
  26            references.  We also thus avoid having to allocate a register
  27            window.
  28
  29            VIS instructions are used to facilitate the formation of
  30            easier constants, and the propagation of the sign bit.  */
  31
  32 #define TWO_TWENTYTHREE 0x4b000000              /* 2**23 */
  33
  34 #define ZERO            %f10                    /* 0.0 */
  35 #define SIGN_BIT        %f12                    /* -0.0 */
  36
  37 ENTRY (__nearbyintf_vis3)
  38         st      %fsr, [%sp + 88]
  39         movwtos %o0, %f1
  40         sethi   %hi(TWO_TWENTYTHREE), %o2
  41         sethi   %hi(0xf8003e0), %o5
  42         ld      [%sp + 88], %o4
  43         fzeros  ZERO
  44         or      %o5, %lo(0xf8003e0), %o5
  45         fnegs   ZERO, SIGN_BIT
  46         andn    %o4, %o5, %o4
  47         st      %o4, [%sp + 80]
  48         ld      [%sp + 80], %fsr
  49         movwtos %o2, %f16
  50         fabss   %f1, %f14
  51         fcmps   %fcc3, %f14, %f16
  52         fmovsuge %fcc3, ZERO, %f16
  53         fands   %f1, SIGN_BIT, SIGN_BIT
  54         fors    %f16, SIGN_BIT, %f16
  55         fadds   %f1, %f16, %f5
  56         fsubs   %f5, %f16, %f0
  57         fabss   %f0, %f0
  58         fors    %f0, SIGN_BIT, %f0
  59         retl
  60          ld     [%sp + 88], %fsr
  61 END (__nearbyintf_vis3)