sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S

   1 /* Float ceil function, sparc64 vis2 version.
   2    Copyright (C) 2012-2014 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4    Contributed by David S. Miller <davem@davemloft.net>, 2012.
   5
   6    The GNU C Library is free software; you can redistribute it and/or
   7    modify it under the terms of the GNU Lesser General Public
   8    License as published by the Free Software Foundation; either
   9    version 2.1 of the License, or (at your option) any later version.
  10
  11    The GNU C Library is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    Lesser General Public License for more details.
  15
  16    You should have received a copy of the GNU Lesser General Public
  17    License along with the GNU C Library; if not, see
  18    <http://www.gnu.org/licenses/>.  */
  19
  20 #include <sysdep.h>
  21
  22         /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
  23            the rounding mode during this routine.
  24
  25            We add then subtract (or subtract than add if the initial
  26            value was negative) 2**23 to the value, then subtract it
  27            back out.
  28
  29            This will clear out the fractional portion of the value and,
  30            with suitable 'siam' initiated rouding mode settings, round
  31            the final result in the proper direction.  */
  32
  33 #define TWO_TWENTYTHREE 0x4b000000              /* 2**23 */
  34
  35 #define ZERO            %f10                    /* 0.0 */
  36 #define SIGN_BIT        %f12                    /* -0.0 */
  37
  38 ENTRY (__ceilf_vis2)
  39         sethi   %hi(TWO_TWENTYTHREE), %o2
  40         fzeros  ZERO
  41         fnegs   ZERO, SIGN_BIT
  42         st      %o2, [%sp + STACK_BIAS + 128]
  43         fabss   %f1, %f14
  44         ld      [%sp + STACK_BIAS + 128], %f16
  45         fcmps   %fcc3, %f14, %f16
  46         fmovsuge %fcc3, ZERO, %f16
  47         fands   %f1, SIGN_BIT, SIGN_BIT
  48         fors    %f16, SIGN_BIT, %f16
  49         siam    (1 << 2) | 2
  50         fadds   %f1, %f16, %f5
  51         siam    (1 << 2) | 0
  52         fsubs   %f5, %f16, %f5
  53         siam    (0 << 2)
  54         retl
  55          fors   %f5, SIGN_BIT, %f0
  56 END (__ceilf_vis2)