[powerpc] add 'volatile' to asm

Add 'volatile' keyword to a few asm statements, to force the compiler
to generate the instructions therein.

Some instances were implicitly volatile, but adding keyword for consistency.

2019-06-19  Paul A. Clarke  <pc@us.ibm.com>

	* sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'.
	* sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise.
	(__FPU_MFFSL): Likewise.
	(_FPU_SETCW): Likewise.

diff --git a/ChangeLog b/ChangeLog
index 5438ff14551c2be34a1fa677078ded326d412351..f47c0239aba71e80637e15ec10e48fd70a843631 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2019-06-19  Paul A. Clarke  <pc@us.ibm.com>
+
+       * sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'.
+       * sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise.
+       (__FPU_MFFSL): Likewise.
+       (_FPU_SETCW): Likewise.
+
 2019-06-19  Stan Shebs  <stanshebs@google.com>
            Raoni Fassina Firmino  <raoni@linux.ibm.com>
 

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index f8dd1b7a8b31c54d19843fb3d4e9fbcaa6644411..f66bf246cb89c2b53b5ceae0a8c2ca4c6d1cd54e 100644 (file)
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -56,9 +56,9 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 #define relax_fenv_state() \
        do { \
           if (GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
-            asm (".machine push; .machine \"power6\"; " \
+            asm volatile (".machine push; .machine \"power6\"; " \
                  "mtfsfi 7,0,1; .machine pop"); \
-          asm ("mtfsfi 7,0"); \
+          asm volatile ("mtfsfi 7,0"); \
        } while(0)
 
 /* Set/clear a particular FPSCR bit (for instance,

diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h
index 07ccc849d99d292d8283b1c2e72e365dda158469..fa04a67643599973a3e15c1aaab59993cfc678be 100644 (file)
--- a/sysdeps/powerpc/fpu_control.h
+++ b/sysdeps/powerpc/fpu_control.h
@@ -67,7 +67,7 @@ typedef unsigned int fpu_control_t;
 /* Macros for accessing the hardware control word.  */
 # define __FPU_MFFS()                                          \
   ({register double __fr;                                      \
-    __asm__ ("mffs %0" : "=f" (__fr));                         \
+    __asm__ __volatile__("mffs %0" : "=f" (__fr));             \
     __fr;                                                      \
   })
 
@@ -81,7 +81,7 @@ typedef unsigned int fpu_control_t;
 #ifdef _ARCH_PWR9
 # define __FPU_MFFSL()                                         \
   ({register double __fr;                                      \
-    __asm__ ("mffsl %0" : "=f" (__fr));                                \
+    __asm__ __volatile__("mffsl %0" : "=f" (__fr));            \
     __fr;                                                      \
   })
 #else
@@ -101,7 +101,7 @@ typedef unsigned int fpu_control_t;
     __u.__ll = 0xfff80000LL << 32; /* This is a QNaN.  */      \
     __u.__ll |= (cw) & 0xffffffffLL;                           \
     __fr = __u.__d;                                            \
-    __asm__ ("mtfsf 255,%0" : : "f" (__fr));                   \
+    __asm__ __volatile__("mtfsf 255,%0" : : "f" (__fr));       \
   }
 
 /* Default control word set at startup.  */