the value of
.IR arg2 ,
which must be
-.BR PR_SPEC_STORE_BYPASS .
-Otherwise the call fails with the error
-.BR ENODEV .
-The return value uses bit 0-3 with the following meaning:
+.BR PR_SPEC_STORE_BYPASS
+(otherwise the call fails with the error
+.BR ENODEV ).
+.IP
+The return value uses bits 0-3 with the following meaning:
.RS
.TP
.BR PR_SPEC_PRCTL
-Mitigation can be controlled per task by
+Mitigation can be controlled per thread by
.B PR_SET_SPECULATION_CTRL
.TP
.BR PR_SPEC_ENABLE
but cannot be undone.
.RE
.IP
-If all bits are
-0
+If all bits are 0,
then the CPU is not affected by the speculation misfeature.
.IP
If
.B PR_SPEC_PRCTL
-is set, then the per task control of the mitigation is available.
+is set, then per-thread control of the mitigation is available.
If not set,
.BR prctl ()
for the speculation misfeature will fail.
the value of
.IR arg2 ,
which must be
-.B PR_SPEC_STORE_BYPASS.
-Otherwise the call fails with the error
-.BR ENODEV .
-This control is per task.
+.B PR_SPEC_STORE_BYPASS
+(otherwise the call fails with the error
+.BR ENODEV ).
+This control is per thread.
The
.IR arg3
-is used to hand in the control value, which can be either:
+argument is used to hand in the control value, which can be either:
.RS
.TP
.BR PR_SPEC_ENABLE
A subsequent
.B
prctl(..., PR_SPEC_ENABLE)
-will fail with
+will fail with the error
.BR EPERM .
.RE
.IP
Any other value in
.IR arg3
-will result in the call failure with the error
+will result in the call failing with the error
.BR ERANGE .
Also
-.I arg4,
+.I arg4
and
.I arg5
-must be specified as 0, otherwise the call fails with ethe rror
+must be specified as 0, otherwise the call fails with the rror
.BR EINVAL .
.IP
Furtheremore this speculation feature can also be controlled by the boot-time