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Yet another pread/pwrite fix, this time for libc5.
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
044ed538 2 * $Id: lspci.c,v 1.32 2000/01/13 22:50:13 mj Exp $
98e39e09
MM		 3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
6ece6bc6 6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
98e39e09
MM		 7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
727ce158 14#include <stdarg.h>
98e39e09 15#include <unistd.h>
98e39e09
MM		 16
17#include "pciutils.h"
18
19/* Options */
20
21static int verbose; /* Show detailed information */
22static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 24static struct pci_filter filter; /* Device filter */
6d0dc0fd 25static int show_tree; /* Show bus tree */
0a33d0ec 26static int machine_readable; /* Generate machine-readable output */
1812a795 27static int map_mode; /* Bus mapping mode enabled */
98e39e09 28
1812a795 29static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
98e39e09
MM		 30
31static char help_msg[] = "\
32Usage: lspci [<switches>]\n\
33\n\
e4842ff3
MM		 34-v\t\tBe verbose\n\
35-n\t\tShow numeric ID's\n\
36-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
3b89d8e4 37-x\t\tShow hex-dump of config space\n\
e4842ff3
MM		 38-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39-d [<vendor>]:[<device>]\tShow only selected devices\n\
40-t\t\tShow bus tree\n\
41-m\t\tProduce machine-readable output\n\
1812a795
MM		 42-i <file>\tUse specified ID database instead of %s\n\
43-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
727ce158
MM		 44GENERIC_HELP
45;
98e39e09 46
727ce158
MM		 47/* Communication with libpci */
48
49static struct pci_access *pacc;
50
51/* Format strings used for IRQ numbers and memory addresses */
f17b962b 52
2f48f637 53#ifdef ARCH_SPARC64
f17b962b
MM		 54#define IRQ_FORMAT "%08x"
55#else
56#define IRQ_FORMAT "%d"
57#endif
58
f3395cc5 59#ifdef HAVE_64BIT_ADDRESS
e95c8373 60#ifdef HAVE_LONG_ADDRESS
f3395cc5 61#define ADDR_FORMAT "%016Lx"
727ce158 62#else
e95c8373
MM		 63#define ADDR_FORMAT "%016lx"
64#endif
65#else
f3395cc5 66#define ADDR_FORMAT "%08lx"
727ce158
MM		 67#endif
68
dec16943
MM		 69#ifdef ARCH_SPARC64
70#define IO_FORMAT "%016Lx"
044ed538 71#elif defined(HAVE_LONG_ADDRESS)
dec16943
MM		 72#define IO_FORMAT "%04Lx"
73#else
74#define IO_FORMAT "%04lx"
75#endif
76
98e39e09
MM		 77/* Our view of the PCI bus */
78
79struct device {
80 struct device *next;
727ce158 81 struct pci_dev *dev;
b5137411 82 unsigned int config_cnt;
98e39e09
MM		 83 byte config[256];
84};
85
727ce158 86static struct device *first_dev;
98e39e09 87
1812a795
MM		 88static struct device *
89scan_device(struct pci_dev *p)
90{
91 int how_much = (show_hex > 2) ? 256 : 64;
92 struct device *d;
93
94 if (!pci_filter_match(&filter, p))
95 return NULL;
96 d = xmalloc(sizeof(struct device));
97 bzero(d, sizeof(*d));
98 d->dev = p;
99 if (!pci_read_block(p, 0, d->config, how_much))
100 die("Unable to read %d bytes of configuration space.", how_much);
101 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
102 {
103 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
104 if (!pci_read_block(p, 0, d->config+64, 64))
105 die("Unable to read cardbus bridge extension data.");
106 how_much = 128;
107 }
108 d->config_cnt = how_much;
109 pci_setup_cache(p, d->config, d->config_cnt);
e95c8373 110 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
1812a795
MM		 111 return d;
112}
113
98e39e09 114static void
727ce158 115scan_devices(void)
98e39e09
MM		 116{
117 struct device *d;
727ce158 118 struct pci_dev *p;
98e39e09 119
727ce158
MM		 120 pci_scan_bus(pacc);
121 for(p=pacc->devices; p; p=p->next)
1812a795
MM		 122 if (d = scan_device(p))
123 {
124 d->next = first_dev;
125 first_dev = d;
126 }
98e39e09
MM		 127}
128
b5137411
MM		 129static int
130check_root(void)
131{
132 static int is_root = -1;
133
134 if (is_root < 0)
135 is_root = !geteuid();
136 return is_root;
137}
138
139static int
140config_fetch(struct device *d, unsigned int pos, unsigned int len)
141{
142 if (pos + len < d->config_cnt)
143 return 1;
144 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
145 return 0;
146 return pci_read_block(d->dev, pos, d->config + pos, len);
147}
148
98e39e09
MM		 149/* Config space accesses */
150
151static inline byte
152get_conf_byte(struct device *d, unsigned int pos)
153{
154 return d->config[pos];
155}
156
157static word
158get_conf_word(struct device *d, unsigned int pos)
159{
160 return d->config[pos] | (d->config[pos+1] << 8);
161}
162
163static u32
164get_conf_long(struct device *d, unsigned int pos)
165{
166 return d->config[pos] |
167 (d->config[pos+1] << 8) |
168 (d->config[pos+2] << 16) |
169 (d->config[pos+3] << 24);
170}
171
172/* Sorting */
173
174static int
175compare_them(const void *A, const void *B)
176{
727ce158
MM		 177 const struct pci_dev *a = (*(const struct device **)A)->dev;
178 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09
MM		 179
180 if (a->bus < b->bus)
181 return -1;
182 if (a->bus > b->bus)
183 return 1;
727ce158
MM		 184 if (a->dev < b->dev)
185 return -1;
186 if (a->dev > b->dev)
187 return 1;
188 if (a->func < b->func)
98e39e09 189 return -1;
727ce158 190 if (a->func > b->func)
98e39e09
MM		 191 return 1;
192 return 0;
193}
194
195static void
196sort_them(void)
197{
727ce158 198 struct device **index, **h, **last_dev;
98e39e09
MM		 199 int cnt;
200 struct device *d;
201
202 cnt = 0;
203 for(d=first_dev; d; d=d->next)
204 cnt++;
205 h = index = alloca(sizeof(struct device *) * cnt);
206 for(d=first_dev; d; d=d->next)
207 *h++ = d;
208 qsort(index, cnt, sizeof(struct device *), compare_them);
209 last_dev = &first_dev;
210 h = index;
211 while (cnt--)
212 {
213 *last_dev = *h;
214 last_dev = &(*h)->next;
215 h++;
216 }
217 *last_dev = NULL;
218}
219
6d0dc0fd 220/* Normal output */
98e39e09 221
1c31d620
MM		 222#define FLAG(x,y) ((x & y) ? '+' : '-')
223
98e39e09
MM		 224static void
225show_terse(struct device *d)
226{
227 int c;
727ce158
MM		 228 struct pci_dev *p = d->dev;
229 byte classbuf[128], devbuf[128];
98e39e09
MM		 230
231 printf("%02x:%02x.%x %s: %s",
727ce158
MM		 232 p->bus,
233 p->dev,
234 p->func,
235 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
236 PCI_LOOKUP_CLASS,
d4798a32 237 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158
MM		 238 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
239 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 240 p->vendor_id, p->device_id, 0, 0));
98e39e09
MM		 241 if (c = get_conf_byte(d, PCI_REVISION_ID))
242 printf(" (rev %02x)", c);
8d047897 243 if (verbose)
d4798a32 244 {
8d047897
MM		 245 char *x;
246 c = get_conf_byte(d, PCI_CLASS_PROG);
247 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
248 PCI_LOOKUP_PROGIF,
249 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
250 if (c || x)
251 {
252 printf(" (prog-if %02x", c);
253 if (x)
254 printf(" [%s]", x);
255 putchar(')');
256 }
d4798a32 257 }
98e39e09
MM		 258 putchar('\n');
259}
260
e95c8373
MM		 261static void
262show_size(pciaddr_t x)
263{
c36c0862
MM		 264 if (!x)
265 return;
e95c8373
MM		 266 printf(" [size=");
267 if (x < 1024)
268 printf("%d", (int) x);
269 else if (x < 1048576)
270 printf("%dK", (int)(x / 1024));
271 else if (x < 0x80000000)
272 printf("%dM", (int)(x / 1048576));
273 else
274 printf(ADDR_FORMAT, x);
275 putchar(']');
276}
277
98e39e09
MM		 278static void
279show_bases(struct device *d, int cnt)
280{
727ce158 281 struct pci_dev *p = d->dev;
98e39e09
MM		 282 word cmd = get_conf_word(d, PCI_COMMAND);
283 int i;
284
96e4f295 285 for(i=0; i<cnt; i++)
98e39e09 286 {
f3395cc5 287 pciaddr_t pos = p->base_addr[i];
e95c8373 288 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
f3395cc5 289 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
727ce158
MM		 290 if (flg == 0xffffffff)
291 flg = 0;
e95c8373 292 if (!pos && !flg && !len)
98e39e09 293 continue;
072c77e5
MM		 294 if (verbose > 1)
295 printf("\tRegion %d: ", i);
296 else
297 putchar('\t');
727ce158
MM		 298 if (pos && !flg) /* Reported by the OS, but not by the device */
299 {
300 printf("[virtual] ");
301 flg = pos;
302 }
98e39e09 303 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b 304 {
dec16943 305 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
072c77e5
MM		 306 printf("I/O ports at ");
307 if (a)
dec16943 308 printf(IO_FORMAT, a);
727ce158
MM		 309 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
310 printf("<ignored>");
072c77e5
MM		 311 else
312 printf("<unassigned>");
313 if (!(cmd & PCI_COMMAND_IO))
314 printf(" [disabled]");
f17b962b 315 }
072c77e5 316 else
98e39e09
MM		 317 {
318 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
f3395cc5 319 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
727ce158
MM		 320 int done = 0;
321 u32 z = 0;
322
98e39e09
MM		 323 printf("Memory at ");
324 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
325 {
727ce158
MM		 326 if (i >= cnt - 1)
327 {
e95c8373 328 printf("<invalid-64bit-slot>");
727ce158
MM		 329 done = 1;
330 }
331 else
98e39e09
MM		 332 {
333 i++;
072c77e5
MM		 334 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
335 if (buscentric_view)
727ce158
MM		 336 {
337 if (a || z)
b801b390 338 printf("%08x" ADDR_FORMAT, z, a);
727ce158
MM		 339 else
340 printf("<unassigned>");
341 done = 1;
342 }
98e39e09 343 }
727ce158
MM		 344 }
345 if (!done)
346 {
347 if (a)
f3395cc5 348 printf(ADDR_FORMAT, a);
98e39e09 349 else
727ce158 350 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
98e39e09 351 }
072c77e5 352 printf(" (%s, %sprefetchable)",
98e39e09
MM		 353 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
354 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
072c77e5 355 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
f17b962b 356 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
072c77e5
MM		 357 if (!(cmd & PCI_COMMAND_MEMORY))
358 printf(" [disabled]");
98e39e09 359 }
c36c0862 360 show_size(len);
072c77e5 361 putchar('\n');
98e39e09
MM		 362 }
363}
364
1c31d620
MM		 365static void
366show_pm(struct device *d, int where, int cap)
367{
368 int t;
369
370 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
371 if (verbose < 2)
372 return;
373 printf("\t\tFlags: PMEClk%c AuxPwr%c DSI%c D1%c D2%c PME%c\n",
374 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
375 FLAG(cap, PCI_PM_CAP_AUX_POWER),
376 FLAG(cap, PCI_PM_CAP_DSI),
377 FLAG(cap, PCI_PM_CAP_D1),
378 FLAG(cap, PCI_PM_CAP_D2),
379 FLAG(cap, PCI_PM_CAP_PME));
380 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
381 t = get_conf_word(d, where + PCI_PM_CTRL);
382 printf("\t\tStatus: D%d PME-Enable%c DSel=%x DScale=%x PME%c\n",
383 t & PCI_PM_CTRL_STATE_MASK,
384 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
385 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
386 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
387 FLAG(t, PCI_PM_CTRL_PME_STATUS));
388}
389
390static void
391show_agp(struct device *d, int where, int cap)
392{
393 u32 t;
394
395 t = cap & 0xff;
396 printf("AGP version %x.%x\n", cap/16, cap%16);
397 if (verbose < 2)
398 return;
399 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
400 t = get_conf_long(d, where + PCI_AGP_STATUS);
401 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s%s%s\n",
402 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
403 FLAG(t, PCI_AGP_STATUS_SBA),
404 FLAG(t, PCI_AGP_STATUS_64BIT),
405 FLAG(t, PCI_AGP_STATUS_FW),
406 (t & PCI_AGP_STATUS_RATE4) ? "4" : "",
407 (t & PCI_AGP_STATUS_RATE2) ? "2" : "",
408 (t & PCI_AGP_STATUS_RATE1) ? "1" : "");
84b10481 409 t = get_conf_long(d, where + PCI_AGP_COMMAND);
1c31d620
MM		 410 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s%s%s\n",
411 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
412 FLAG(t, PCI_AGP_COMMAND_SBA),
413 FLAG(t, PCI_AGP_COMMAND_AGP),
414 FLAG(t, PCI_AGP_COMMAND_64BIT),
415 FLAG(t, PCI_AGP_COMMAND_FW),
416 (t & PCI_AGP_COMMAND_RATE4) ? "4" : "",
417 (t & PCI_AGP_COMMAND_RATE2) ? "2" : "",
418 (t & PCI_AGP_COMMAND_RATE1) ? "1" : "");
419}
420
98e39e09 421static void
e95c8373 422show_rom(struct device *d)
98e39e09 423{
e95c8373
MM		 424 struct pci_dev *p = d->dev;
425 pciaddr_t rom = p->rom_base_addr;
426 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
98e39e09 427
e95c8373
MM		 428 if (!rom && !len)
429 return;
430 printf("\tExpansion ROM at ");
431 if (rom & PCI_ROM_ADDRESS_MASK)
432 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
433 else
434 printf("<unassigned>");
435 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
436 printf(" [disabled]");
437 show_size(len);
438 putchar('\n');
439}
440
441static void
442show_msi(struct device *d, int where, int cap)
443{
444 int is64;
445 u32 t;
446 u16 w;
447
448 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
449 FLAG(cap, PCI_MSI_FLAGS_64BIT),
450 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
451 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
452 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
453 if (verbose < 2)
454 return;
455 is64 = cap & PCI_MSI_FLAGS_64BIT;
456 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
457 printf("\t\tAddress: ");
458 if (is64)
459 {
460 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
461 w = get_conf_word(d, where + PCI_MSI_DATA_64);
462 printf("%08x", t);
463 }
464 else
465 w = get_conf_word(d, where + PCI_MSI_DATA_32);
466 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
467 printf("%08x Data: %04x\n", t, w);
468}
469
470static void
471show_slotid(int cap)
472{
473 int esr = cap & 0xff;
474 int chs = cap >> 8;
475
476 printf("Slot ID: %d slots, First%c, chassis %02x\n",
477 esr & PCI_SID_ESR_NSLOTS,
478 FLAG(esr, PCI_SID_ESR_FIC),
479 chs);
480}
481
482static void
483show_caps(struct device *d)
484{
b5137411
MM		 485 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
486 {
e95c8373 487 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
b5137411
MM		 488 while (where)
489 {
1c31d620 490 int id, next, cap;
b5137411
MM		 491 printf("\tCapabilities: ");
492 if (!config_fetch(d, where, 4))
493 {
494 puts("<available only to root>");
495 break;
496 }
1c31d620 497 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
e95c8373 498 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
1c31d620
MM		 499 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
500 printf("[%02x] ", where);
b5137411
MM		 501 if (id == 0xff)
502 {
1c31d620 503 printf("<chain broken>\n");
b5137411
MM		 504 break;
505 }
506 switch (id)
507 {
1c31d620
MM		 508 case PCI_CAP_ID_PM:
509 show_pm(d, where, cap);
510 break;
511 case PCI_CAP_ID_AGP:
512 show_agp(d, where, cap);
b5137411 513 break;
e95c8373
MM		 514 case PCI_CAP_ID_VPD:
515 printf("Vital Product Data\n");
516 break;
517 case PCI_CAP_ID_SLOTID:
518 show_slotid(cap);
519 break;
520 case PCI_CAP_ID_MSI:
521 show_msi(d, where, cap);
522 break;
b5137411 523 default:
e95c8373 524 printf("#%02x [%04x]\n", id, cap);
b5137411 525 }
b5137411
MM		 526 where = next;
527 }
528 }
98e39e09
MM		 529}
530
e95c8373
MM		 531static void
532show_htype0(struct device *d)
533{
534 show_bases(d, 6);
535 show_rom(d);
536 show_caps(d);
537}
538
98e39e09
MM		 539static void
540show_htype1(struct device *d)
541{
542 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
543 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
544 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
545 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
546 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
547 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
548 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
549 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
550 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
98e39e09 551 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 552 int verb = verbose > 2;
98e39e09
MM		 553
554 show_bases(d, 2);
555 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
556 get_conf_byte(d, PCI_PRIMARY_BUS),
557 get_conf_byte(d, PCI_SECONDARY_BUS),
558 get_conf_byte(d, PCI_SUBORDINATE_BUS),
559 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
560
561 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
562 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
563 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
564 else
565 {
566 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
567 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
568 if (io_type == PCI_IO_RANGE_TYPE_32)
569 {
570 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
571 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
572 }
e306e911 573 if (io_base <= io_limit || verb)
98e39e09
MM		 574 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
575 }
576
577 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
578 mem_type)
579 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 580 else
98e39e09
MM		 581 {
582 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
583 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM		 584 if (mem_base <= mem_limit || verb)
585 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM		 586 }
587
588 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
589 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
590 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 591 else
98e39e09
MM		 592 {
593 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
594 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM		 595 if (pref_base <= pref_limit || verb)
596 {
597 if (pref_type == PCI_PREF_RANGE_TYPE_32)
598 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
599 else
600 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
601 get_conf_long(d, PCI_PREF_BASE_UPPER32),
602 pref_base,
603 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
604 pref_limit);
605 }
98e39e09
MM		 606 }
607
608 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
609 printf("\tSecondary status: SERR\n");
610
e95c8373 611 show_rom(d);
98e39e09
MM		 612
613 if (verbose > 1)
614 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
1c31d620
MM		 615 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
616 FLAG(brc, PCI_BRIDGE_CTL_SERR),
617 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
618 FLAG(brc, PCI_BRIDGE_CTL_VGA),
619 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
620 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
621 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
e95c8373
MM		 622
623 show_caps(d);
98e39e09
MM		 624}
625
2f48f637
MM		 626static void
627show_htype2(struct device *d)
628{
96e4f295
MM		 629 int i;
630 word cmd = get_conf_word(d, PCI_COMMAND);
631 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
632 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
e306e911 633 int verb = verbose > 2;
96e4f295
MM		 634
635 show_bases(d, 1);
636 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
637 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
638 get_conf_byte(d, PCI_CB_CARD_BUS),
639 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
640 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
641 for(i=0; i<2; i++)
642 {
643 int p = 8*i;
644 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
645 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 646 if (limit > base || verb)
96e4f295
MM		 647 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
648 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
649 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
650 }
651 for(i=0; i<2; i++)
652 {
653 int p = 8*i;
654 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
655 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
656 if (!(base & PCI_IO_RANGE_TYPE_32))
657 {
658 base &= 0xffff;
659 limit &= 0xffff;
660 }
661 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 662 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM		 663 if (base <= limit || verb)
664 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
665 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM		 666 }
667
668 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
669 printf("\tSecondary status: SERR\n");
670 if (verbose > 1)
671 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM		 672 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
673 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
674 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
675 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
676 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
677 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
678 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
679 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
96e4f295
MM		 680 if (exca)
681 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM		 682}
683
98e39e09
MM		 684static void
685show_verbose(struct device *d)
686{
727ce158 687 struct pci_dev *p = d->dev;
98e39e09
MM		 688 word status = get_conf_word(d, PCI_STATUS);
689 word cmd = get_conf_word(d, PCI_COMMAND);
690 word class = get_conf_word(d, PCI_CLASS_DEVICE);
691 byte bist = get_conf_byte(d, PCI_BIST);
692 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
693 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
694 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
695 byte max_lat, min_gnt;
696 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 697 unsigned int irq = p->irq;
98e39e09 698 word subsys_v, subsys_d;
727ce158 699 char ssnamebuf[256];
98e39e09
MM		 700
701 show_terse(d);
702
98e39e09
MM		 703 switch (htype)
704 {
2f48f637
MM		 705 case PCI_HEADER_TYPE_NORMAL:
706 if (class == PCI_CLASS_BRIDGE_PCI)
707 {
708 badhdr:
709 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
710 return;
711 }
98e39e09
MM		 712 max_lat = get_conf_byte(d, PCI_MAX_LAT);
713 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
714 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
715 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
716 break;
2f48f637
MM		 717 case PCI_HEADER_TYPE_BRIDGE:
718 if (class != PCI_CLASS_BRIDGE_PCI)
719 goto badhdr;
727ce158 720 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM		 721 subsys_v = subsys_d = 0;
722 break;
723 case PCI_HEADER_TYPE_CARDBUS:
724 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
725 goto badhdr;
96e4f295
MM		 726 min_gnt = max_lat = 0;
727 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
728 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM		 729 break;
730 default:
731 printf("\t!!! Unknown header type %02x\n", htype);
732 return;
733 }
734
e306e911 735 if (subsys_v && subsys_v != 0xffff)
727ce158
MM		 736 printf("\tSubsystem: %s\n",
737 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
738 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 739 p->vendor_id, p->device_id, subsys_v, subsys_d));
ce503b7f 740
98e39e09
MM		 741 if (verbose > 1)
742 {
98e39e09 743 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
1c31d620
MM		 744 FLAG(cmd, PCI_COMMAND_IO),
745 FLAG(cmd, PCI_COMMAND_MEMORY),
746 FLAG(cmd, PCI_COMMAND_MASTER),
747 FLAG(cmd, PCI_COMMAND_SPECIAL),
748 FLAG(cmd, PCI_COMMAND_INVALIDATE),
749 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
750 FLAG(cmd, PCI_COMMAND_PARITY),
751 FLAG(cmd, PCI_COMMAND_WAIT),
752 FLAG(cmd, PCI_COMMAND_SERR),
753 FLAG(cmd, PCI_COMMAND_FAST_BACK));
b5137411 754 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
1c31d620
MM		 755 FLAG(status, PCI_STATUS_CAP_LIST),
756 FLAG(status, PCI_STATUS_66MHZ),
757 FLAG(status, PCI_STATUS_UDF),
758 FLAG(status, PCI_STATUS_FAST_BACK),
759 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM		 760 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
761 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
762 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM		 763 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
764 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
765 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
766 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
767 FLAG(status, PCI_STATUS_DETECTED_PARITY));
98e39e09
MM		 768 if (cmd & PCI_COMMAND_MASTER)
769 {
770 printf("\tLatency: ");
771 if (min_gnt)
772 printf("%d min, ", min_gnt);
773 if (max_lat)
774 printf("%d max, ", max_lat);
775 printf("%d set", latency);
776 if (cache_line)
777 printf(", cache line size %02x", cache_line);
778 putchar('\n');
779 }
727ce158
MM		 780 if (int_pin || irq)
781 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
782 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM		 783 }
784 else
785 {
786 printf("\tFlags: ");
787 if (cmd & PCI_COMMAND_MASTER)
788 printf("bus master, ");
789 if (cmd & PCI_COMMAND_VGA_PALETTE)
790 printf("VGA palette snoop, ");
791 if (cmd & PCI_COMMAND_WAIT)
792 printf("stepping, ");
793 if (cmd & PCI_COMMAND_FAST_BACK)
794 printf("fast Back2Back, ");
795 if (status & PCI_STATUS_66MHZ)
796 printf("66Mhz, ");
797 if (status & PCI_STATUS_UDF)
798 printf("user-definable features, ");
799 printf("%s devsel",
800 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
801 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
802 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
803 if (cmd & PCI_COMMAND_MASTER)
804 printf(", latency %d", latency);
727ce158
MM		 805 if (irq)
806 printf(", IRQ " IRQ_FORMAT, irq);
98e39e09
MM		 807 putchar('\n');
808 }
809
810 if (bist & PCI_BIST_CAPABLE)
811 {
812 if (bist & PCI_BIST_START)
813 printf("\tBIST is running\n");
814 else
815 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
816 }
817
818 switch (htype)
819 {
2f48f637 820 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM		 821 show_htype0(d);
822 break;
2f48f637 823 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM		 824 show_htype1(d);
825 break;
2f48f637
MM		 826 case PCI_HEADER_TYPE_CARDBUS:
827 show_htype2(d);
828 break;
98e39e09
MM		 829 }
830}
831
832static void
833show_hex_dump(struct device *d)
834{
b5137411 835 unsigned int i;
98e39e09 836
727ce158 837 for(i=0; i<d->config_cnt; i++)
98e39e09
MM		 838 {
839 if (! (i & 15))
840 printf("%02x:", i);
841 printf(" %02x", get_conf_byte(d, i));
842 if ((i & 15) == 15)
843 putchar('\n');
844 }
845}
846
0a33d0ec
MM		 847static void
848show_machine(struct device *d)
849{
727ce158 850 struct pci_dev *p = d->dev;
0a33d0ec 851 int c;
ce503b7f 852 word sv_id=0, sd_id=0;
727ce158 853 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f
MM		 854
855 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
856 {
857 case PCI_HEADER_TYPE_NORMAL:
858 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
859 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
860 break;
861 case PCI_HEADER_TYPE_CARDBUS:
862 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
863 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
864 break;
865 }
0a33d0ec
MM		 866
867 if (verbose)
868 {
727ce158
MM		 869 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
870 printf("Class:\t%s\n",
d4798a32 871 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
727ce158 872 printf("Vendor:\t%s\n",
d4798a32 873 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
727ce158 874 printf("Device:\t%s\n",
d4798a32 875 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
ce503b7f
MM		 876 if (sv_id && sv_id != 0xffff)
877 {
727ce158 878 printf("SVendor:\t%s\n",
d4798a32 879 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
727ce158 880 printf("SDevice:\t%s\n",
d4798a32 881 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 882 }
0a33d0ec
MM		 883 if (c = get_conf_byte(d, PCI_REVISION_ID))
884 printf("Rev:\t%02x\n", c);
885 if (c = get_conf_byte(d, PCI_CLASS_PROG))
886 printf("ProgIf:\t%02x\n", c);
887 }
888 else
889 {
727ce158 890 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
0a33d0ec 891 printf("\"%s\" \"%s\" \"%s\"",
727ce158 892 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
d4798a32 893 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158 894 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
d4798a32 895 p->vendor_id, p->device_id, 0, 0),
727ce158 896 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
d4798a32 897 p->vendor_id, p->device_id, 0, 0));
0a33d0ec
MM		 898 if (c = get_conf_byte(d, PCI_REVISION_ID))
899 printf(" -r%02x", c);
900 if (c = get_conf_byte(d, PCI_CLASS_PROG))
901 printf(" -p%02x", c);
ce503b7f 902 if (sv_id && sv_id != 0xffff)
727ce158 903 printf(" \"%s\" \"%s\"",
d4798a32
MM		 904 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
905 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f
MM		 906 else
907 printf(" \"\" \"\"");
0a33d0ec
MM		 908 putchar('\n');
909 }
910}
911
1812a795
MM		 912static void
913show_device(struct device *d)
914{
915 if (machine_readable)
916 show_machine(d);
917 else if (verbose)
918 show_verbose(d);
919 else
920 show_terse(d);
921 if (show_hex)
922 show_hex_dump(d);
923 if (verbose || show_hex)
924 putchar('\n');
925}
926
98e39e09
MM		 927static void
928show(void)
929{
930 struct device *d;
931
932 for(d=first_dev; d; d=d->next)
1812a795 933 show_device(d);
98e39e09
MM		 934}
935
6d0dc0fd
MM		 936/* Tree output */
937
938struct bridge {
939 struct bridge *chain; /* Single-linked list of bridges */
940 struct bridge *next, *child; /* Tree of bridges */
941 struct bus *first_bus; /* List of busses connected to this bridge */
942 unsigned int primary, secondary, subordinate; /* Bus numbers */
943 struct device *br_dev;
944};
945
946struct bus {
947 unsigned int number;
948 struct bus *sibling;
949 struct device *first_dev, **last_dev;
950};
951
952static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
953
954static struct bus *
955find_bus(struct bridge *b, unsigned int n)
956{
957 struct bus *bus;
958
959 for(bus=b->first_bus; bus; bus=bus->sibling)
960 if (bus->number == n)
961 break;
962 return bus;
963}
964
965static struct bus *
966new_bus(struct bridge *b, unsigned int n)
967{
968 struct bus *bus = xmalloc(sizeof(struct bus));
969
970 bus = xmalloc(sizeof(struct bus));
971 bus->number = n;
972 bus->sibling = b->first_bus;
973 bus->first_dev = NULL;
974 bus->last_dev = &bus->first_dev;
975 b->first_bus = bus;
976 return bus;
977}
978
979static void
980insert_dev(struct device *d, struct bridge *b)
981{
727ce158 982 struct pci_dev *p = d->dev;
6d0dc0fd
MM		 983 struct bus *bus;
984
727ce158 985 if (! (bus = find_bus(b, p->bus)))
6d0dc0fd
MM		 986 {
987 struct bridge *c;
988 for(c=b->child; c; c=c->next)
727ce158 989 if (c->secondary <= p->bus && p->bus <= c->subordinate)
6d0dc0fd 990 return insert_dev(d, c);
727ce158 991 bus = new_bus(b, p->bus);
6d0dc0fd
MM		 992 }
993 /* Simple insertion at the end _does_ guarantee the correct order as the
994 * original device list was sorted by (bus, devfn) lexicographically
995 * and all devices on the new list have the same bus number.
996 */
997 *bus->last_dev = d;
998 bus->last_dev = &d->next;
999 d->next = NULL;
1000}
1001
1002static void
1003grow_tree(void)
1004{
1005 struct device *d, *d2;
008407bd 1006 struct bridge **last_br, *b;
6d0dc0fd
MM		 1007
1008 /* Build list of bridges */
1009
008407bd 1010 last_br = &host_bridge.chain;
6d0dc0fd
MM		 1011 for(d=first_dev; d; d=d->next)
1012 {
1013 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM		 1014 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1015 if (class == PCI_CLASS_BRIDGE_PCI &&
1016 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM		 1017 {
1018 b = xmalloc(sizeof(struct bridge));
96e4f295
MM		 1019 if (ht == PCI_HEADER_TYPE_BRIDGE)
1020 {
1021 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1022 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1023 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1024 }
1025 else
1026 {
1027 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1028 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1029 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1030 }
008407bd
MM		 1031 *last_br = b;
1032 last_br = &b->chain;
6d0dc0fd
MM		 1033 b->next = b->child = NULL;
1034 b->first_bus = NULL;
1035 b->br_dev = d;
1036 }
1037 }
008407bd 1038 *last_br = NULL;
6d0dc0fd
MM		 1039
1040 /* Create a bridge tree */
1041
008407bd 1042 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1043 {
1044 struct bridge *c, *best;
1045 best = NULL;
008407bd 1046 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM		 1047 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1048 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1049 best = c;
1050 if (best)
1051 {
1052 b->next = best->child;
1053 best->child = b;
1054 }
1055 }
1056
1057 /* Insert secondary bus for each bridge */
1058
008407bd 1059 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1060 if (!find_bus(b, b->secondary))
1061 new_bus(b, b->secondary);
1062
1063 /* Create bus structs and link devices */
1064
1065 for(d=first_dev; d;)
1066 {
1067 d2 = d->next;
1068 insert_dev(d, &host_bridge);
1069 d = d2;
1070 }
1071}
1072
1073static void
1074print_it(byte *line, byte *p)
1075{
1076 *p++ = '\n';
1077 *p = 0;
1078 fputs(line, stdout);
1079 for(p=line; *p; p++)
008407bd 1080 if (*p == '+' || *p == '|')
6d0dc0fd
MM		 1081 *p = '|';
1082 else
1083 *p = ' ';
1084}
1085
1086static void show_tree_bridge(struct bridge *, byte *, byte *);
1087
1088static void
1089show_tree_dev(struct device *d, byte *line, byte *p)
1090{
727ce158 1091 struct pci_dev *q = d->dev;
6d0dc0fd 1092 struct bridge *b;
727ce158 1093 char namebuf[256];
6d0dc0fd 1094
727ce158 1095 p += sprintf(p, "%02x.%x", q->dev, q->func);
6d0dc0fd
MM		 1096 for(b=&host_bridge; b; b=b->chain)
1097 if (b->br_dev == d)
1098 {
008407bd
MM		 1099 if (b->secondary == b->subordinate)
1100 p += sprintf(p, "-[%02x]-", b->secondary);
1101 else
1102 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM		 1103 show_tree_bridge(b, line, p);
1104 return;
1105 }
18928b91 1106 if (verbose)
727ce158
MM		 1107 p += sprintf(p, " %s",
1108 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1109 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 1110 q->vendor_id, q->device_id, 0, 0));
6d0dc0fd
MM		 1111 print_it(line, p);
1112}
1113
1114static void
1115show_tree_bus(struct bus *b, byte *line, byte *p)
1116{
1117 if (!b->first_dev)
1118 print_it(line, p);
1119 else if (!b->first_dev->next)
1120 {
1121 *p++ = '-';
1122 *p++ = '-';
1123 show_tree_dev(b->first_dev, line, p);
1124 }
1125 else
1126 {
1127 struct device *d = b->first_dev;
1128 while (d->next)
1129 {
1130 p[0] = '+';
1131 p[1] = '-';
1132 show_tree_dev(d, line, p+2);
1133 d = d->next;
1134 }
1135 p[0] = '\\';
1136 p[1] = '-';
1137 show_tree_dev(d, line, p+2);
1138 }
1139}
1140
1141static void
1142show_tree_bridge(struct bridge *b, byte *line, byte *p)
1143{
1144 *p++ = '-';
1145 if (!b->first_bus->sibling)
1146 {
1147 if (b == &host_bridge)
1148 p += sprintf(p, "[%02x]-", b->first_bus->number);
1149 show_tree_bus(b->first_bus, line, p);
1150 }
1151 else
1152 {
1153 struct bus *u = b->first_bus;
1154 byte *k;
1155
1156 while (u->sibling)
1157 {
1158 k = p + sprintf(p, "+-[%02x]-", u->number);
1159 show_tree_bus(u, line, k);
1160 u = u->sibling;
1161 }
1162 k = p + sprintf(p, "\\-[%02x]-", u->number);
1163 show_tree_bus(u, line, k);
1164 }
1165}
1166
1167static void
1168show_forest(void)
1169{
1170 char line[256];
1171
1172 grow_tree();
1173 show_tree_bridge(&host_bridge, line, line);
1174}
1175
1812a795
MM		 1176/* Bus mapping mode */
1177
1178struct bus_bridge {
1179 struct bus_bridge *next;
1c31d620 1180 byte this, dev, func, first, last, bug;
1812a795
MM		 1181};
1182
1183struct bus_info {
1184 byte exists;
1c31d620
MM		 1185 byte guestbook;
1186 struct bus_bridge *bridges, *via;
1812a795
MM		 1187};
1188
1189static struct bus_info *bus_info;
1190
1191static void
1192map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1193{
1194 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1195 struct pci_dev *p = d->dev;
1812a795
MM		 1196
1197 b->next = bi->bridges;
1198 bi->bridges = b;
1c31d620
MM		 1199 b->this = get_conf_byte(d, np);
1200 b->dev = p->dev;
1201 b->func = p->func;
1812a795
MM		 1202 b->first = get_conf_byte(d, ns);
1203 b->last = get_conf_byte(d, nl);
1204 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1c31d620
MM		 1205 p->bus, p->dev, p->func, b->this, b->first, b->last);
1206 if (b->this != p->bus)
1812a795
MM		 1207 printf("!!! Bridge points to invalid primary bus.\n");
1208 if (b->first > b->last)
1209 {
1210 printf("!!! Bridge points to invalid bus range.\n");
1211 b->last = b->first;
1212 }
1213}
1214
1215static void
1216do_map_bus(int bus)
1217{
1218 int dev, func;
1219 int verbose = pacc->debugging;
1220 struct bus_info *bi = bus_info + bus;
1221 struct device *d;
1222
1223 if (verbose)
1224 printf("Mapping bus %02x\n", bus);
1225 for(dev = 0; dev < 32; dev++)
1226 if (filter.slot < 0 || filter.slot == dev)
1227 {
f3395cc5
MM		 1228 int func_limit = 1;
1229 for(func = 0; func < func_limit; func++)
1812a795
MM		 1230 if (filter.func < 0 || filter.func == func)
1231 {
1232 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1233 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1234 if (vendor && vendor != 0xffff)
1235 {
f3395cc5
MM		 1236 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1237 func_limit = 8;
1812a795
MM		 1238 if (verbose)
1239 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1240 bi->exists = 1;
1241 if (d = scan_device(p))
1242 {
1243 show_device(d);
1244 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1245 {
1246 case PCI_HEADER_TYPE_BRIDGE:
1247 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1248 break;
1249 case PCI_HEADER_TYPE_CARDBUS:
1250 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1251 break;
1252 }
1253 free(d);
1254 }
1255 else if (verbose)
1256 printf("But it was filtered out.\n");
1257 }
1258 pci_free_dev(p);
1259 }
1260 }
1261}
1262
1c31d620
MM		 1263static void
1264do_map_bridges(int bus, int min, int max)
1265{
1266 struct bus_info *bi = bus_info + bus;
1267 struct bus_bridge *b;
1268
1269 bi->guestbook = 1;
1270 for(b=bi->bridges; b; b=b->next)
1271 {
1272 if (bus_info[b->first].guestbook)
1273 b->bug = 1;
1274 else if (b->first < min || b->last > max)
1275 b->bug = 2;
1276 else
1277 {
1278 bus_info[b->first].via = b;
1279 do_map_bridges(b->first, b->first, b->last);
1280 }
1281 }
1282}
1283
1284static void
1285map_bridges(void)
1286{
1287 int i;
1288
1289 printf("\nSummary of buses:\n\n");
1290 for(i=0; i<256; i++)
1291 if (bus_info[i].exists && !bus_info[i].guestbook)
1292 do_map_bridges(i, 0, 255);
1293 for(i=0; i<256; i++)
1294 {
1295 struct bus_info *bi = bus_info + i;
1296 struct bus_bridge *b = bi->via;
1297
1298 if (bi->exists)
1299 {
1300 printf("%02x: ", i);
1301 if (b)
1302 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1303 else if (!i)
1304 printf("Primary host bus\n");
1305 else
1306 printf("Secondary host bus (?)\n");
1307 }
1308 for(b=bi->bridges; b; b=b->next)
1309 {
1310 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1311 switch (b->bug)
1312 {
1313 case 1:
1314 printf(" <overlap bug>");
1315 break;
1316 case 2:
1317 printf(" <crossing bug>");
1318 break;
1319 }
1320 putchar('\n');
1321 }
1322 }
1323}
1324
1812a795
MM		 1325static void
1326map_the_bus(void)
1327{
1328 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1329 pacc->method == PCI_ACCESS_DUMP)
1330 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1331 else if (!check_root())
1332 die("Only root can map the bus.");
1333 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1334 bzero(bus_info, sizeof(struct bus_info) * 256);
1335 if (filter.bus >= 0)
1336 do_map_bus(filter.bus);
1337 else
1338 {
1339 int bus;
1340 for(bus=0; bus<256; bus++)
1341 do_map_bus(bus);
1342 }
1c31d620 1343 map_bridges();
1812a795
MM		 1344}
1345
98e39e09
MM		 1346/* Main */
1347
1348int
1349main(int argc, char **argv)
1350{
1351 int i;
e4842ff3 1352 char *msg;
98e39e09 1353
496d4021
MM		 1354 if (argc == 2 && !strcmp(argv[1], "--version"))
1355 {
1356 puts("lspci version " PCIUTILS_VERSION);
1357 return 0;
1358 }
727ce158
MM		 1359
1360 pacc = pci_alloc();
1361 pacc->error = die;
1362 pci_filter_init(pacc, &filter);
1363
98e39e09
MM		 1364 while ((i = getopt(argc, argv, options)) != -1)
1365 switch (i)
1366 {
1367 case 'n':
727ce158 1368 pacc->numeric_ids = 1;
98e39e09
MM		 1369 break;
1370 case 'v':
1371 verbose++;
1372 break;
1373 case 'b':
727ce158 1374 pacc->buscentric = 1;
98e39e09
MM		 1375 buscentric_view = 1;
1376 break;
e4842ff3 1377 case 's':
727ce158
MM		 1378 if (msg = pci_filter_parse_slot(&filter, optarg))
1379 die("-f: %s", msg);
98e39e09 1380 break;
e4842ff3 1381 case 'd':
727ce158
MM		 1382 if (msg = pci_filter_parse_id(&filter, optarg))
1383 die("-d: %s", msg);
98e39e09
MM		 1384 break;
1385 case 'x':
1386 show_hex++;
1387 break;
6d0dc0fd
MM		 1388 case 't':
1389 show_tree++;
1390 break;
18928b91 1391 case 'i':
727ce158 1392 pacc->id_file_name = optarg;
18928b91 1393 break;
0a33d0ec
MM		 1394 case 'm':
1395 machine_readable++;
1396 break;
1812a795
MM		 1397 case 'M':
1398 map_mode++;
1399 break;
98e39e09 1400 default:
727ce158
MM		 1401 if (parse_generic_option(i, pacc, optarg))
1402 break;
98e39e09 1403 bad:
727ce158 1404 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM		 1405 return 1;
1406 }
1407 if (optind < argc)
1408 goto bad;
1409
727ce158 1410 pci_init(pacc);
1812a795
MM		 1411 if (map_mode)
1412 map_the_bus();
6d0dc0fd 1413 else
1812a795
MM		 1414 {
1415 scan_devices();
1416 sort_them();
1417 if (show_tree)
1418 show_forest();
1419 else
1420 show();
1421 }
727ce158 1422 pci_cleanup(pacc);
98e39e09
MM		 1423
1424 return 0;
1425}
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