ls-ecaps.c

   1 /*
   2  *      The PCI Utilities -- Show Extended Capabilities
   3  *
   4  *      Copyright (c) 1997--2010 Martin Mares <mj@ucw.cz>
   5  *
   6  *      Can be freely distributed and used under the terms of the GNU GPL.
   7  */
   8
   9 #include <stdio.h>
  10 #include <string.h>
  11
  12 #include "lspci.h"
  13
  14 static void
  15 cap_tph(struct device *d, int where)
  16 {
  17   u32 tph_cap;
  18   printf("Transaction Processing Hints\n");
  19   if (verbose < 2)
  20     return;
  21
  22   if (!config_fetch(d, where + PCI_TPH_CAPABILITIES, 4))
  23     return;
  24
  25   tph_cap = get_conf_long(d, where + PCI_TPH_CAPABILITIES);
  26
  27   if (tph_cap & PCI_TPH_INTVEC_SUP)
  28     printf("\t\tInterrupt vector mode supported\n");
  29   if (tph_cap & PCI_TPH_DEV_SUP)
  30     printf("\t\tDevice specific mode supported\n");
  31   if (tph_cap & PCI_TPH_EXT_REQ_SUP)
  32     printf("\t\tExtended requester support\n");
  33
  34   switch (tph_cap & PCI_TPH_ST_LOC_MASK) {
  35   case PCI_TPH_ST_NONE:
  36     printf("\t\tNo steering table available\n");
  37     break;
  38   case PCI_TPH_ST_CAP:
  39     printf("\t\tSteering table in TPH capability structure\n");
  40     break;
  41   case PCI_TPH_ST_MSIX:
  42     printf("\t\tSteering table in MSI-X table\n");
  43     break;
  44   default:
  45     printf("\t\tReserved steering table location\n");
  46     break;
  47   }
  48 }
  49
  50 static u32
  51 cap_ltr_scale(u8 scale)
  52 {
  53   return 1 << (scale * 5);
  54 }
  55
  56 static void
  57 cap_ltr(struct device *d, int where)
  58 {
  59   u32 scale;
  60   u16 snoop, nosnoop;
  61   printf("Latency Tolerance Reporting\n");
  62   if (verbose < 2)
  63     return;
  64
  65   if (!config_fetch(d, where + PCI_LTR_MAX_SNOOP, 4))
  66     return;
  67
  68   snoop = get_conf_word(d, where + PCI_LTR_MAX_SNOOP);
  69   scale = cap_ltr_scale((snoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK);
  70   printf("\t\tMax snoop latency: %lldns\n",
  71          ((unsigned long long)snoop & PCI_LTR_VALUE_MASK) * scale);
  72
  73   nosnoop = get_conf_word(d, where + PCI_LTR_MAX_NOSNOOP);
  74   scale = cap_ltr_scale((nosnoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK);
  75   printf("\t\tMax no snoop latency: %lldns\n",
  76          ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale);
  77 }
  78
  79 static void
  80 cap_dsn(struct device *d, int where)
  81 {
  82   u32 t1, t2;
  83   if (!config_fetch(d, where + 4, 8))
  84     return;
  85   t1 = get_conf_long(d, where + 4);
  86   t2 = get_conf_long(d, where + 8);
  87   printf("Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x\n",
  88         t2 >> 24, (t2 >> 16) & 0xff, (t2 >> 8) & 0xff, t2 & 0xff,
  89         t1 >> 24, (t1 >> 16) & 0xff, (t1 >> 8) & 0xff, t1 & 0xff);
  90 }
  91
  92 static void
  93 cap_aer(struct device *d, int where)
  94 {
  95   u32 l;
  96
  97   printf("Advanced Error Reporting\n");
  98   if (verbose < 2)
  99     return;
 100
 101   if (!config_fetch(d, where + PCI_ERR_UNCOR_STATUS, 24))
 102     return;
 103
 104   l = get_conf_long(d, where + PCI_ERR_UNCOR_STATUS);
 105   printf("\t\tUESta:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
 106         "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
 107         FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
 108         FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
 109         FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
 110         FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
 111   l = get_conf_long(d, where + PCI_ERR_UNCOR_MASK);
 112   printf("\t\tUEMsk:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
 113         "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
 114         FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
 115         FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
 116         FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
 117         FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
 118   l = get_conf_long(d, where + PCI_ERR_UNCOR_SEVER);
 119   printf("\t\tUESvrt:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
 120         "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
 121         FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
 122         FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
 123         FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
 124         FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
 125   l = get_conf_long(d, where + PCI_ERR_COR_STATUS);
 126   printf("\t\tCESta:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n",
 127         FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP),
 128         FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE));
 129   l = get_conf_long(d, where + PCI_ERR_COR_MASK);
 130   printf("\t\tCEMsk:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n",
 131         FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP),
 132         FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE));
 133   l = get_conf_long(d, where + PCI_ERR_CAP);
 134   printf("\t\tAERCap:\tFirst Error Pointer: %02x, GenCap%c CGenEn%c ChkCap%c ChkEn%c\n",
 135         PCI_ERR_CAP_FEP(l), FLAG(l, PCI_ERR_CAP_ECRC_GENC), FLAG(l, PCI_ERR_CAP_ECRC_GENE),
 136         FLAG(l, PCI_ERR_CAP_ECRC_CHKC), FLAG(l, PCI_ERR_CAP_ECRC_CHKE));
 137
 138 }
 139
 140 static void
 141 cap_acs(struct device *d, int where)
 142 {
 143   u16 w;
 144
 145   printf("Access Control Services\n");
 146   if (verbose < 2)
 147     return;
 148
 149   if (!config_fetch(d, where + PCI_ACS_CAP, 4))
 150     return;
 151
 152   w = get_conf_word(d, where + PCI_ACS_CAP);
 153   printf("\t\tACSCap:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
 154         "DirectTrans%c\n",
 155         FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED),
 156         FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS),
 157         FLAG(w, PCI_ACS_CAP_TRANS));
 158   w = get_conf_word(d, where + PCI_ACS_CTRL);
 159   printf("\t\tACSCtl:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
 160         "DirectTrans%c\n",
 161         FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED),
 162         FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS),
 163         FLAG(w, PCI_ACS_CTRL_TRANS));
 164 }
 165
 166 static void
 167 cap_ari(struct device *d, int where)
 168 {
 169   u16 w;
 170
 171   printf("Alternative Routing-ID Interpretation (ARI)\n");
 172   if (verbose < 2)
 173     return;
 174
 175   if (!config_fetch(d, where + PCI_ARI_CAP, 4))
 176     return;
 177
 178   w = get_conf_word(d, where + PCI_ARI_CAP);
 179   printf("\t\tARICap:\tMFVC%c ACS%c, Next Function: %d\n",
 180         FLAG(w, PCI_ARI_CAP_MFVC), FLAG(w, PCI_ARI_CAP_ACS),
 181         PCI_ARI_CAP_NFN(w));
 182   w = get_conf_word(d, where + PCI_ARI_CTRL);
 183   printf("\t\tARICtl:\tMFVC%c ACS%c, Function Group: %d\n",
 184         FLAG(w, PCI_ARI_CTRL_MFVC), FLAG(w, PCI_ARI_CTRL_ACS),
 185         PCI_ARI_CTRL_FG(w));
 186 }
 187
 188 static void
 189 cap_ats(struct device *d, int where)
 190 {
 191   u16 w;
 192
 193   printf("Address Translation Service (ATS)\n");
 194   if (verbose < 2)
 195     return;
 196
 197   if (!config_fetch(d, where + PCI_ATS_CAP, 4))
 198     return;
 199
 200   w = get_conf_word(d, where + PCI_ATS_CAP);
 201   printf("\t\tATSCap:\tInvalidate Queue Depth: %02x\n", PCI_ATS_CAP_IQD(w));
 202   w = get_conf_word(d, where + PCI_ATS_CTRL);
 203   printf("\t\tATSCtl:\tEnable%c, Smallest Translation Unit: %02x\n",
 204         FLAG(w, PCI_ATS_CTRL_ENABLE), PCI_ATS_CTRL_STU(w));
 205 }
 206
 207 static void
 208 cap_pri(struct device *d, int where)
 209 {
 210   u16 w;
 211   u32 l;
 212
 213   printf("Page Request Interface (PRI)\n");
 214   if (verbose < 2)
 215     return;
 216
 217   if (!config_fetch(d, where + PCI_PRI_CTRL, 0xc))
 218     return;
 219
 220   w = get_conf_word(d, where + PCI_PRI_CTRL);
 221   printf("\t\tPRICtl: Enable%c, Reset%c\n",
 222         FLAG(w, PCI_PRI_CTRL_ENABLE), FLAG(w, PCI_PRI_CTRL_RESET));
 223   w = get_conf_word(d, where + PCI_PRI_STATUS);
 224   printf("\t\tPRISta: RF%c, UPRGI%c, Stopped%c\n",
 225         FLAG(w, PCI_PRI_STATUS_RF), FLAG(w, PCI_PRI_STATUS_UPRGI),
 226         FLAG(w, PCI_PRI_STATUS_STOPPED));
 227   l = get_conf_long(d, where + PCI_PRI_MAX_REQ);
 228   printf("\t\tPage Request Capacity: %08x, ", l);
 229   l = get_conf_long(d, where + PCI_PRI_ALLOC_REQ);
 230   printf("Page Request Allocation: %08x\n", l);
 231 }
 232
 233 static void
 234 cap_pasid(struct device *d, int where)
 235 {
 236   u16 w;
 237
 238   printf("Process Address Space ID (PASID)\n");
 239   if (verbose < 2)
 240     return;
 241
 242   if (!config_fetch(d, where + PCI_PASID_CAP, 4))
 243     return;
 244
 245   w = get_conf_word(d, where + PCI_PASID_CAP);
 246   printf("\t\tPASIDCap: Exec%c, Priv%c, Max PASID Width: %02x\n",
 247         FLAG(w, PCI_PASID_CAP_EXEC), FLAG(w, PCI_PASID_CAP_PRIV),
 248         PCI_PASID_CAP_WIDTH(w));
 249   w = get_conf_word(d, where + PCI_PASID_CTRL);
 250   printf("\t\tPASIDCtl: Enable%c, Exec%c, Priv%c\n",
 251         FLAG(w, PCI_PASID_CTRL_ENABLE), FLAG(w, PCI_PASID_CTRL_EXEC),
 252         FLAG(w, PCI_PASID_CTRL_PRIV));
 253 }
 254
 255 static void
 256 cap_sriov(struct device *d, int where)
 257 {
 258   u16 b;
 259   u16 w;
 260   u32 l;
 261   int i;
 262
 263   printf("Single Root I/O Virtualization (SR-IOV)\n");
 264   if (verbose < 2)
 265     return;
 266
 267   if (!config_fetch(d, where + PCI_IOV_CAP, 0x3c))
 268     return;
 269
 270   l = get_conf_long(d, where + PCI_IOV_CAP);
 271   printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n",
 272         FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l));
 273   w = get_conf_word(d, where + PCI_IOV_CTRL);
 274   printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n",
 275         FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME),
 276         FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE),
 277         FLAG(w, PCI_IOV_CTRL_ARI));
 278   w = get_conf_word(d, where + PCI_IOV_STATUS);
 279   printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS));
 280   w = get_conf_word(d, where + PCI_IOV_INITIALVF);
 281   printf("\t\tInitial VFs: %d, ", w);
 282   w = get_conf_word(d, where + PCI_IOV_TOTALVF);
 283   printf("Total VFs: %d, ", w);
 284   w = get_conf_word(d, where + PCI_IOV_NUMVF);
 285   printf("Number of VFs: %d, ", w);
 286   b = get_conf_byte(d, where + PCI_IOV_FDL);
 287   printf("Function Dependency Link: %02x\n", b);
 288   w = get_conf_word(d, where + PCI_IOV_OFFSET);
 289   printf("\t\tVF offset: %d, ", w);
 290   w = get_conf_word(d, where + PCI_IOV_STRIDE);
 291   printf("stride: %d, ", w);
 292   w = get_conf_word(d, where + PCI_IOV_DID);
 293   printf("Device ID: %04x\n", w);
 294   l = get_conf_long(d, where + PCI_IOV_SUPPS);
 295   printf("\t\tSupported Page Size: %08x, ", l);
 296   l = get_conf_long(d, where + PCI_IOV_SYSPS);
 297   printf("System Page Size: %08x\n", l);
 298
 299   for (i=0; i < PCI_IOV_NUM_BAR; i++)
 300     {
 301       u32 addr;
 302       int type;
 303       u32 h;
 304       l = get_conf_long(d, where + PCI_IOV_BAR_BASE + 4*i);
 305       if (l == 0xffffffff)
 306         l = 0;
 307       if (!l)
 308         continue;
 309       printf("\t\tRegion %d: Memory at ", i);
 310       addr = l & PCI_ADDR_MEM_MASK;
 311       type = l & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
 312       if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
 313         {
 314           i++;
 315           h = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4));
 316           printf("%08x", h);
 317         }
 318       printf("%08x (%s-bit, %sprefetchable)\n",
 319         addr,
 320         (type == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32" : "64",
 321         (l & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
 322     }
 323
 324   l = get_conf_long(d, where + PCI_IOV_MSAO);
 325   printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
 326         PCI_IOV_MSA_BIR(l));
 327 }
 328
 329 static void
 330 cap_vc(struct device *d, int where)
 331 {
 332   u32 cr1, cr2;
 333   u16 ctrl, status;
 334   int evc_cnt;
 335   int arb_table_pos;
 336   int i, j;
 337   static const char ref_clocks[][6] = { "100ns" };
 338   static const char arb_selects[8][7] = { "Fixed", "WRR32", "WRR64", "WRR128", "??4", "??5", "??6", "??7" };
 339   static const char vc_arb_selects[8][8] = { "Fixed", "WRR32", "WRR64", "WRR128", "TWRR128", "WRR256", "??6", "??7" };
 340   char buf[8];
 341
 342   printf("Virtual Channel\n");
 343   if (verbose < 2)
 344     return;
 345
 346   if (!config_fetch(d, where + 4, 0x1c - 4))
 347     return;
 348
 349   cr1 = get_conf_long(d, where + PCI_VC_PORT_REG1);
 350   cr2 = get_conf_long(d, where + PCI_VC_PORT_REG2);
 351   ctrl = get_conf_word(d, where + PCI_VC_PORT_CTRL);
 352   status = get_conf_word(d, where + PCI_VC_PORT_STATUS);
 353
 354   evc_cnt = BITS(cr1, 0, 3);
 355   printf("\t\tCaps:\tLPEVC=%d RefClk=%s PATEntryBits=%d\n",
 356     BITS(cr1, 4, 3),
 357     TABLE(ref_clocks, BITS(cr1, 8, 2), buf),
 358     1 << BITS(cr1, 10, 2));
 359
 360   printf("\t\tArb:");
 361   for (i=0; i<8; i++)
 362     if (arb_selects[i][0] != '?' || cr2 & (1 << i))
 363       printf("%c%s%c", (i ? ' ' : '\t'), arb_selects[i], FLAG(cr2, 1 << i));
 364   arb_table_pos = BITS(cr2, 24, 8);
 365
 366   printf("\n\t\tCtrl:\tArbSelect=%s\n", TABLE(arb_selects, BITS(ctrl, 1, 3), buf));
 367   printf("\t\tStatus:\tInProgress%c\n", FLAG(status, 1));
 368
 369   if (arb_table_pos)
 370     {
 371       arb_table_pos = where + 16*arb_table_pos;
 372       printf("\t\tPort Arbitration Table [%x] <?>\n", arb_table_pos);
 373     }
 374
 375   for (i=0; i<=evc_cnt; i++)
 376     {
 377       int pos = where + PCI_VC_RES_CAP + 12*i;
 378       u32 rcap, rctrl;
 379       u16 rstatus;
 380       int pat_pos;
 381
 382       printf("\t\tVC%d:\t", i);
 383       if (!config_fetch(d, pos, 12))
 384         {
 385           printf("<unreadable>\n");
 386           continue;
 387         }
 388       rcap = get_conf_long(d, pos);
 389       rctrl = get_conf_long(d, pos+4);
 390       rstatus = get_conf_word(d, pos+10);
 391
 392       pat_pos = BITS(rcap, 24, 8);
 393       printf("Caps:\tPATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c\n",
 394         pat_pos,
 395         BITS(rcap, 16, 6) + 1,
 396         FLAG(rcap, 1 << 15));
 397
 398       printf("\t\t\tArb:");
 399       for (j=0; j<8; j++)
 400         if (vc_arb_selects[j][0] != '?' || rcap & (1 << j))
 401           printf("%c%s%c", (j ? ' ' : '\t'), vc_arb_selects[j], FLAG(rcap, 1 << j));
 402
 403       printf("\n\t\t\tCtrl:\tEnable%c ID=%d ArbSelect=%s TC/VC=%02x\n",
 404         FLAG(rctrl, 1 << 31),
 405         BITS(rctrl, 24, 3),
 406         TABLE(vc_arb_selects, BITS(rctrl, 17, 3), buf),
 407         BITS(rctrl, 0, 8));
 408
 409       printf("\t\t\tStatus:\tNegoPending%c InProgress%c\n",
 410         FLAG(rstatus, 2),
 411         FLAG(rstatus, 1));
 412
 413       if (pat_pos)
 414         printf("\t\t\tPort Arbitration Table <?>\n");
 415     }
 416 }
 417
 418 static void
 419 cap_rclink(struct device *d, int where)
 420 {
 421   u32 esd;
 422   int num_links;
 423   int i;
 424   static const char elt_types[][9] = { "Config", "Egress", "Internal" };
 425   char buf[8];
 426
 427   printf("Root Complex Link\n");
 428   if (verbose < 2)
 429     return;
 430
 431   if (!config_fetch(d, where + 4, PCI_RCLINK_LINK1 - 4))
 432     return;
 433
 434   esd = get_conf_long(d, where + PCI_RCLINK_ESD);
 435   num_links = BITS(esd, 8, 8);
 436   printf("\t\tDesc:\tPortNumber=%02x ComponentID=%02x EltType=%s\n",
 437     BITS(esd, 24, 8),
 438     BITS(esd, 16, 8),
 439     TABLE(elt_types, BITS(esd, 0, 8), buf));
 440
 441   for (i=0; i<num_links; i++)
 442     {
 443       int pos = where + PCI_RCLINK_LINK1 + i*PCI_RCLINK_LINK_SIZE;
 444       u32 desc;
 445       u32 addr_lo, addr_hi;
 446
 447       printf("\t\tLink%d:\t", i);
 448       if (!config_fetch(d, pos, PCI_RCLINK_LINK_SIZE))
 449         {
 450           printf("<unreadable>\n");
 451           return;
 452         }
 453       desc = get_conf_long(d, pos + PCI_RCLINK_LINK_DESC);
 454       addr_lo = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR);
 455       addr_hi = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR + 4);
 456
 457       printf("Desc:\tTargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c\n",
 458         BITS(desc, 24, 8),
 459         BITS(desc, 16, 8),
 460         FLAG(desc, 4),
 461         ((desc & 2) ? "Config" : "MemMapped"),
 462         FLAG(desc, 1));
 463
 464       if (desc & 2)
 465         {
 466           int n = addr_lo & 7;
 467           if (!n)
 468             n = 8;
 469           printf("\t\t\tAddr:\t%02x:%02x.%d  CfgSpace=%08x%08x\n",
 470             BITS(addr_lo, 20, n),
 471             BITS(addr_lo, 15, 5),
 472             BITS(addr_lo, 12, 3),
 473             addr_hi, addr_lo);
 474         }
 475       else
 476         printf("\t\t\tAddr:\t%08x%08x\n", addr_hi, addr_lo);
 477     }
 478 }
 479
 480 static void
 481 cap_evendor(struct device *d, int where)
 482 {
 483   u32 hdr;
 484
 485   printf("Vendor Specific Information: ");
 486   if (!config_fetch(d, where + PCI_EVNDR_HEADER, 4))
 487     {
 488       printf("<unreadable>\n");
 489       return;
 490     }
 491
 492   hdr = get_conf_long(d, where + PCI_EVNDR_HEADER);
 493   printf("ID=%04x Rev=%d Len=%03x <?>\n",
 494     BITS(hdr, 0, 16),
 495     BITS(hdr, 16, 4),
 496     BITS(hdr, 20, 12));
 497 }
 498
 499 static void
 500 cap_l1pm(struct device *d, int where)
 501 {
 502   u32 l1_cap;
 503   int power_on_scale;
 504
 505   printf("L1 PM Substates\n");
 506
 507   if (verbose < 2)
 508     return;
 509
 510   if (!config_fetch(d, where + 4, 4))
 511     {
 512       printf("\t\t<unreadable>\n");
 513       return;
 514     }
 515
 516   l1_cap = get_conf_long(d, where + 4);
 517   printf("\t\tL1SubCap: ");
 518   printf("PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c\n",
 519     FLAG(l1_cap, 1),
 520     FLAG(l1_cap, 2),
 521     FLAG(l1_cap, 4),
 522     FLAG(l1_cap, 8),
 523     FLAG(l1_cap, 16));
 524
 525   if (BITS(l1_cap, 0, 1) || BITS(l1_cap, 2, 1))
 526     {
 527       printf("\t\t\t  PortCommonModeRestoreTime=%dus ",
 528         BITS(l1_cap, 8,8));
 529
 530       power_on_scale = BITS(l1_cap, 16, 2);
 531
 532       printf("PortTPowerOnTime=");
 533       switch (power_on_scale)
 534         {
 535           case 0:
 536             printf("%dus\n", BITS(l1_cap, 19, 5) * 2);
 537             break;
 538           case 1:
 539             printf("%dus\n", BITS(l1_cap, 19, 5) * 10);
 540             break;
 541           case 2:
 542             printf("%dus\n", BITS(l1_cap, 19, 5) * 100);
 543             break;
 544           default:
 545             printf("<error>\n");
 546             break;
 547         }
 548     }
 549 }
 550
 551 void
 552 show_ext_caps(struct device *d)
 553 {
 554   int where = 0x100;
 555   char been_there[0x1000];
 556   memset(been_there, 0, 0x1000);
 557   do
 558     {
 559       u32 header;
 560       int id, version;
 561
 562       if (!config_fetch(d, where, 4))
 563         break;
 564       header = get_conf_long(d, where);
 565       if (!header)
 566         break;
 567       id = header & 0xffff;
 568       version = (header >> 16) & 0xf;
 569       printf("\tCapabilities: [%03x", where);
 570       if (verbose > 1)
 571         printf(" v%d", version);
 572       printf("] ");
 573       if (been_there[where]++)
 574         {
 575           printf("<chain looped>\n");
 576           break;
 577         }
 578       switch (id)
 579         {
 580           case PCI_EXT_CAP_ID_AER:
 581             cap_aer(d, where);
 582             break;
 583           case PCI_EXT_CAP_ID_VC:
 584           case PCI_EXT_CAP_ID_VC2:
 585             cap_vc(d, where);
 586             break;
 587           case PCI_EXT_CAP_ID_DSN:
 588             cap_dsn(d, where);
 589             break;
 590           case PCI_EXT_CAP_ID_PB:
 591             printf("Power Budgeting <?>\n");
 592             break;
 593           case PCI_EXT_CAP_ID_RCLINK:
 594             cap_rclink(d, where);
 595             break;
 596           case PCI_EXT_CAP_ID_RCILINK:
 597             printf("Root Complex Internal Link <?>\n");
 598             break;
 599           case PCI_EXT_CAP_ID_RCECOLL:
 600             printf("Root Complex Event Collector <?>\n");
 601             break;
 602           case PCI_EXT_CAP_ID_MFVC:
 603             printf("Multi-Function Virtual Channel <?>\n");
 604             break;
 605           case PCI_EXT_CAP_ID_RBCB:
 606             printf("Root Bridge Control Block <?>\n");
 607             break;
 608           case PCI_EXT_CAP_ID_VNDR:
 609             cap_evendor(d, where);
 610             break;
 611           case PCI_EXT_CAP_ID_ACS:
 612             cap_acs(d, where);
 613             break;
 614           case PCI_EXT_CAP_ID_ARI:
 615             cap_ari(d, where);
 616             break;
 617           case PCI_EXT_CAP_ID_ATS:
 618             cap_ats(d, where);
 619             break;
 620           case PCI_EXT_CAP_ID_SRIOV:
 621             cap_sriov(d, where);
 622             break;
 623           case PCI_EXT_CAP_ID_PRI:
 624             cap_pri(d, where);
 625             break;
 626           case PCI_EXT_CAP_ID_TPH:
 627             cap_tph(d, where);
 628             break;
 629           case PCI_EXT_CAP_ID_LTR:
 630             cap_ltr(d, where);
 631             break;
 632           case PCI_EXT_CAP_ID_PASID:
 633             cap_pasid(d, where);
 634             break;
 635           case PCI_EXT_CAP_ID_L1PM:
 636             cap_l1pm(d, where);
 637             break;
 638           default:
 639             printf("#%02x\n", id);
 640             break;
 641         }
 642       where = (header >> 20) & ~3;
 643     } while (where);
 644 }