]> git.ipfire.org Git - thirdparty/pciutils.git/blob - lspci.c
maint/release: Perl does not have "." in @INC any longer
[thirdparty/pciutils.git] / lspci.c
1 /*
2 * The PCI Utilities -- List All PCI Devices
3 *
4 * Copyright (c) 1997--2016 Martin Mares <mj@ucw.cz>
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9 #include <stdio.h>
10 #include <string.h>
11 #include <stdlib.h>
12 #include <stdarg.h>
13
14 #include "lspci.h"
15
16 /* Options */
17
18 int verbose; /* Show detailed information */
19 static int opt_hex; /* Show contents of config space as hexadecimal numbers */
20 struct pci_filter filter; /* Device filter */
21 static int opt_tree; /* Show bus tree */
22 static int opt_machine; /* Generate machine-readable output */
23 static int opt_map_mode; /* Bus mapping mode enabled */
24 static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
25 static int opt_kernel; /* Show kernel drivers */
26 static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
27 static int opt_query_all; /* Query the DNS for all entries */
28 char *opt_pcimap; /* Override path to Linux modules.pcimap */
29
30 const char program_name[] = "lspci";
31
32 static char options[] = "nvbxs:d:ti:mgp:qkMDQ" GENERIC_OPTIONS ;
33
34 static char help_msg[] =
35 "Usage: lspci [<switches>]\n"
36 "\n"
37 "Basic display modes:\n"
38 "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
39 "-t\t\tShow bus tree\n"
40 "\n"
41 "Display options:\n"
42 "-v\t\tBe verbose (-vv for very verbose)\n"
43 #ifdef PCI_OS_LINUX
44 "-k\t\tShow kernel drivers handling each device\n"
45 #endif
46 "-x\t\tShow hex-dump of the standard part of the config space\n"
47 "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
48 "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
49 "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
50 "-D\t\tAlways show domain numbers\n"
51 "\n"
52 "Resolving of device ID's to names:\n"
53 "-n\t\tShow numeric ID's\n"
54 "-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
55 #ifdef PCI_USE_DNS
56 "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
57 "-qq\t\tAs above, but re-query locally cached entries\n"
58 "-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
59 #endif
60 "\n"
61 "Selection of devices:\n"
62 "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
63 "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
64 "\n"
65 "Other options:\n"
66 "-i <file>\tUse specified ID database instead of %s\n"
67 #ifdef PCI_OS_LINUX
68 "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
69 #endif
70 "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
71 "\n"
72 "PCI access options:\n"
73 GENERIC_HELP
74 ;
75
76 /*** Our view of the PCI bus ***/
77
78 struct pci_access *pacc;
79 struct device *first_dev;
80 static int seen_errors;
81
82 int
83 config_fetch(struct device *d, unsigned int pos, unsigned int len)
84 {
85 unsigned int end = pos+len;
86 int result;
87
88 while (pos < d->config_bufsize && len && d->present[pos])
89 pos++, len--;
90 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
91 len--;
92 if (!len)
93 return 1;
94
95 if (end > d->config_bufsize)
96 {
97 int orig_size = d->config_bufsize;
98 while (end > d->config_bufsize)
99 d->config_bufsize *= 2;
100 d->config = xrealloc(d->config, d->config_bufsize);
101 d->present = xrealloc(d->present, d->config_bufsize);
102 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
103 }
104 result = pci_read_block(d->dev, pos, d->config + pos, len);
105 if (result)
106 memset(d->present + pos, 1, len);
107 return result;
108 }
109
110 struct device *
111 scan_device(struct pci_dev *p)
112 {
113 struct device *d;
114
115 if (p->domain && !opt_domains)
116 opt_domains = 1;
117 if (!pci_filter_match(&filter, p))
118 return NULL;
119 d = xmalloc(sizeof(struct device));
120 memset(d, 0, sizeof(*d));
121 d->dev = p;
122 d->config_cached = d->config_bufsize = 64;
123 d->config = xmalloc(64);
124 d->present = xmalloc(64);
125 memset(d->present, 1, 64);
126 if (!pci_read_block(p, 0, d->config, 64))
127 {
128 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
129 p->domain, p->bus, p->dev, p->func);
130 seen_errors++;
131 return NULL;
132 }
133 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
134 {
135 /* For cardbus bridges, we need to fetch 64 bytes more to get the
136 * full standard header... */
137 if (config_fetch(d, 64, 64))
138 d->config_cached += 64;
139 }
140 pci_setup_cache(p, d->config, d->config_cached);
141 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
142 return d;
143 }
144
145 static void
146 scan_devices(void)
147 {
148 struct device *d;
149 struct pci_dev *p;
150
151 pci_scan_bus(pacc);
152 for (p=pacc->devices; p; p=p->next)
153 if (d = scan_device(p))
154 {
155 d->next = first_dev;
156 first_dev = d;
157 }
158 }
159
160 /*** Config space accesses ***/
161
162 static void
163 check_conf_range(struct device *d, unsigned int pos, unsigned int len)
164 {
165 while (len)
166 if (!d->present[pos])
167 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
168 else
169 pos++, len--;
170 }
171
172 byte
173 get_conf_byte(struct device *d, unsigned int pos)
174 {
175 check_conf_range(d, pos, 1);
176 return d->config[pos];
177 }
178
179 word
180 get_conf_word(struct device *d, unsigned int pos)
181 {
182 check_conf_range(d, pos, 2);
183 return d->config[pos] | (d->config[pos+1] << 8);
184 }
185
186 u32
187 get_conf_long(struct device *d, unsigned int pos)
188 {
189 check_conf_range(d, pos, 4);
190 return d->config[pos] |
191 (d->config[pos+1] << 8) |
192 (d->config[pos+2] << 16) |
193 (d->config[pos+3] << 24);
194 }
195
196 /*** Sorting ***/
197
198 static int
199 compare_them(const void *A, const void *B)
200 {
201 const struct pci_dev *a = (*(const struct device **)A)->dev;
202 const struct pci_dev *b = (*(const struct device **)B)->dev;
203
204 if (a->domain < b->domain)
205 return -1;
206 if (a->domain > b->domain)
207 return 1;
208 if (a->bus < b->bus)
209 return -1;
210 if (a->bus > b->bus)
211 return 1;
212 if (a->dev < b->dev)
213 return -1;
214 if (a->dev > b->dev)
215 return 1;
216 if (a->func < b->func)
217 return -1;
218 if (a->func > b->func)
219 return 1;
220 return 0;
221 }
222
223 static void
224 sort_them(void)
225 {
226 struct device **index, **h, **last_dev;
227 int cnt;
228 struct device *d;
229
230 cnt = 0;
231 for (d=first_dev; d; d=d->next)
232 cnt++;
233 h = index = alloca(sizeof(struct device *) * cnt);
234 for (d=first_dev; d; d=d->next)
235 *h++ = d;
236 qsort(index, cnt, sizeof(struct device *), compare_them);
237 last_dev = &first_dev;
238 h = index;
239 while (cnt--)
240 {
241 *last_dev = *h;
242 last_dev = &(*h)->next;
243 h++;
244 }
245 *last_dev = NULL;
246 }
247
248 /*** Normal output ***/
249
250 static void
251 show_slot_name(struct device *d)
252 {
253 struct pci_dev *p = d->dev;
254
255 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
256 printf("%04x:", p->domain);
257 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
258 }
259
260 void
261 get_subid(struct device *d, word *subvp, word *subdp)
262 {
263 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
264
265 if (htype == PCI_HEADER_TYPE_NORMAL)
266 {
267 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
268 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
269 }
270 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
271 {
272 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
273 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
274 }
275 else
276 *subvp = *subdp = 0xffff;
277 }
278
279 static void
280 show_terse(struct device *d)
281 {
282 int c;
283 struct pci_dev *p = d->dev;
284 char classbuf[128], devbuf[128];
285
286 show_slot_name(d);
287 printf(" %s: %s",
288 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
289 PCI_LOOKUP_CLASS,
290 p->device_class),
291 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
292 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
293 p->vendor_id, p->device_id));
294 if (c = get_conf_byte(d, PCI_REVISION_ID))
295 printf(" (rev %02x)", c);
296 if (verbose)
297 {
298 char *x;
299 c = get_conf_byte(d, PCI_CLASS_PROG);
300 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
301 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
302 p->device_class, c);
303 if (c || x)
304 {
305 printf(" (prog-if %02x", c);
306 if (x)
307 printf(" [%s]", x);
308 putchar(')');
309 }
310 }
311 putchar('\n');
312
313 if (verbose || opt_kernel)
314 {
315 word subsys_v, subsys_d;
316 char ssnamebuf[256];
317
318 pci_fill_info(p, PCI_FILL_LABEL);
319
320 if (p->label)
321 printf("\tDeviceName: %s", p->label);
322 get_subid(d, &subsys_v, &subsys_d);
323 if (subsys_v && subsys_v != 0xffff)
324 printf("\tSubsystem: %s\n",
325 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
326 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
327 p->vendor_id, p->device_id, subsys_v, subsys_d));
328 }
329 }
330
331 /*** Verbose output ***/
332
333 static void
334 show_size(u64 x)
335 {
336 static const char suffix[][2] = { "", "K", "M", "G", "T" };
337 unsigned i;
338 if (!x)
339 return;
340 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
341 if (x % 1024)
342 break;
343 x /= 1024;
344 }
345 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
346 }
347
348 static void
349 show_range(char *prefix, u64 base, u64 limit, int is_64bit)
350 {
351 if (base > limit)
352 {
353 if (!verbose)
354 return;
355 else if (verbose < 3)
356 {
357 printf("%s: None\n", prefix);
358 return;
359 }
360 }
361
362 printf("%s: ", prefix);
363 if (is_64bit)
364 printf("%016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
365 else
366 printf("%08x-%08x", (unsigned) base, (unsigned) limit);
367 if (base <= limit)
368 show_size(limit - base + 1);
369 else
370 printf(" [empty]");
371 putchar('\n');
372 }
373
374 static void
375 show_bases(struct device *d, int cnt)
376 {
377 struct pci_dev *p = d->dev;
378 word cmd = get_conf_word(d, PCI_COMMAND);
379 int i;
380 int virtual = 0;
381
382 for (i=0; i<cnt; i++)
383 {
384 pciaddr_t pos = p->base_addr[i];
385 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
386 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
387 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
388 if (flg == 0xffffffff)
389 flg = 0;
390 if (!pos && !flg && !len)
391 continue;
392 if (verbose > 1)
393 printf("\tRegion %d: ", i);
394 else
395 putchar('\t');
396 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
397 printf("[enhanced] ");
398 else if (pos && !(flg & ((flg & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)))
399 {
400 /* Reported by the OS, but not by the device */
401 printf("[virtual] ");
402 flg = pos;
403 virtual = 1;
404 }
405 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
406 {
407 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
408 printf("I/O ports at ");
409 if (a || (cmd & PCI_COMMAND_IO))
410 printf(PCIADDR_PORT_FMT, a);
411 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
412 printf("<ignored>");
413 else
414 printf("<unassigned>");
415 if (!virtual && !(cmd & PCI_COMMAND_IO))
416 printf(" [disabled]");
417 }
418 else
419 {
420 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
421 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
422 int done = 0;
423 u32 z = 0;
424
425 printf("Memory at ");
426 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
427 {
428 if (i >= cnt - 1)
429 {
430 printf("<invalid-64bit-slot>");
431 done = 1;
432 }
433 else
434 {
435 i++;
436 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
437 }
438 }
439 if (!done)
440 {
441 if (a)
442 printf(PCIADDR_T_FMT, a);
443 else
444 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
445 }
446 printf(" (%s, %sprefetchable)",
447 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
448 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
449 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
450 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
451 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
452 printf(" [disabled]");
453 }
454 show_size(len);
455 putchar('\n');
456 }
457 }
458
459 static void
460 show_rom(struct device *d, int reg)
461 {
462 struct pci_dev *p = d->dev;
463 pciaddr_t rom = p->rom_base_addr;
464 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
465 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
466 u32 flg = get_conf_long(d, reg);
467 word cmd = get_conf_word(d, PCI_COMMAND);
468 int virtual = 0;
469
470 if (!rom && !flg && !len)
471 return;
472 putchar('\t');
473 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
474 printf("[enhanced] ");
475 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
476 {
477 printf("[virtual] ");
478 flg = rom;
479 virtual = 1;
480 }
481 printf("Expansion ROM at ");
482 if (rom & PCI_ROM_ADDRESS_MASK)
483 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
484 else if (flg & PCI_ROM_ADDRESS_MASK)
485 printf("<ignored>");
486 else
487 printf("<unassigned>");
488 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
489 printf(" [disabled]");
490 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
491 printf(" [disabled by cmd]");
492 show_size(len);
493 putchar('\n');
494 }
495
496 static void
497 show_htype0(struct device *d)
498 {
499 show_bases(d, 6);
500 show_rom(d, PCI_ROM_ADDRESS);
501 show_caps(d, PCI_CAPABILITY_LIST);
502 }
503
504 static void
505 show_htype1(struct device *d)
506 {
507 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
508 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
509 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
510 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
511 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
512 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
513 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
514 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
515 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
516 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
517 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
518
519 show_bases(d, 2);
520 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
521 get_conf_byte(d, PCI_PRIMARY_BUS),
522 get_conf_byte(d, PCI_SECONDARY_BUS),
523 get_conf_byte(d, PCI_SUBORDINATE_BUS),
524 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
525
526 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
527 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
528 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
529 else
530 {
531 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
532 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
533 if (io_type == PCI_IO_RANGE_TYPE_32)
534 {
535 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
536 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
537 }
538 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
539 }
540
541 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
542 mem_type)
543 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
544 else
545 {
546 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
547 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
548 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
549 }
550
551 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
552 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
553 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
554 else
555 {
556 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
557 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
558 if (pref_type == PCI_PREF_RANGE_TYPE_64)
559 {
560 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
561 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
562 }
563 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
564 }
565
566 if (verbose > 1)
567 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
568 FLAG(sec_stat, PCI_STATUS_66MHZ),
569 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
570 FLAG(sec_stat, PCI_STATUS_PARITY),
571 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
572 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
573 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
574 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
575 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
576 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
577 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
578 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
579
580 show_rom(d, PCI_ROM_ADDRESS1);
581
582 if (verbose > 1)
583 {
584 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
585 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
586 FLAG(brc, PCI_BRIDGE_CTL_SERR),
587 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
588 FLAG(brc, PCI_BRIDGE_CTL_VGA),
589 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
590 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
591 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
592 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
593 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
594 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
595 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
596 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
597 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
598 }
599
600 show_caps(d, PCI_CAPABILITY_LIST);
601 }
602
603 static void
604 show_htype2(struct device *d)
605 {
606 int i;
607 word cmd = get_conf_word(d, PCI_COMMAND);
608 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
609 word exca;
610 int verb = verbose > 2;
611
612 show_bases(d, 1);
613 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
614 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
615 get_conf_byte(d, PCI_CB_CARD_BUS),
616 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
617 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
618 for (i=0; i<2; i++)
619 {
620 int p = 8*i;
621 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
622 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
623 limit = limit + 0xfff;
624 if (base <= limit || verb)
625 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
626 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
627 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
628 }
629 for (i=0; i<2; i++)
630 {
631 int p = 8*i;
632 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
633 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
634 if (!(base & PCI_IO_RANGE_TYPE_32))
635 {
636 base &= 0xffff;
637 limit &= 0xffff;
638 }
639 base &= PCI_CB_IO_RANGE_MASK;
640 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
641 if (base <= limit || verb)
642 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
643 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
644 }
645
646 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
647 printf("\tSecondary status: SERR\n");
648 if (verbose > 1)
649 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
650 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
651 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
652 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
653 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
654 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
655 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
656 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
657 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
658
659 if (d->config_cached < 128)
660 {
661 printf("\t<access denied to the rest>\n");
662 return;
663 }
664
665 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
666 if (exca)
667 printf("\t16-bit legacy interface ports at %04x\n", exca);
668 show_caps(d, PCI_CB_CAPABILITY_LIST);
669 }
670
671 static void
672 show_verbose(struct device *d)
673 {
674 struct pci_dev *p = d->dev;
675 word status = get_conf_word(d, PCI_STATUS);
676 word cmd = get_conf_word(d, PCI_COMMAND);
677 word class = p->device_class;
678 byte bist = get_conf_byte(d, PCI_BIST);
679 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
680 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
681 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
682 byte max_lat, min_gnt;
683 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
684 unsigned int irq;
685 char *dt_node;
686
687 show_terse(d);
688
689 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
690 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
691 irq = p->irq;
692
693 switch (htype)
694 {
695 case PCI_HEADER_TYPE_NORMAL:
696 if (class == PCI_CLASS_BRIDGE_PCI)
697 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
698 max_lat = get_conf_byte(d, PCI_MAX_LAT);
699 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
700 break;
701 case PCI_HEADER_TYPE_BRIDGE:
702 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
703 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
704 min_gnt = max_lat = 0;
705 break;
706 case PCI_HEADER_TYPE_CARDBUS:
707 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
708 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
709 min_gnt = max_lat = 0;
710 break;
711 default:
712 printf("\t!!! Unknown header type %02x\n", htype);
713 return;
714 }
715
716 if (p->phy_slot)
717 printf("\tPhysical Slot: %s\n", p->phy_slot);
718
719 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
720 printf("\tDevice tree node: %s\n", dt_node);
721
722 if (verbose > 1)
723 {
724 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
725 FLAG(cmd, PCI_COMMAND_IO),
726 FLAG(cmd, PCI_COMMAND_MEMORY),
727 FLAG(cmd, PCI_COMMAND_MASTER),
728 FLAG(cmd, PCI_COMMAND_SPECIAL),
729 FLAG(cmd, PCI_COMMAND_INVALIDATE),
730 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
731 FLAG(cmd, PCI_COMMAND_PARITY),
732 FLAG(cmd, PCI_COMMAND_WAIT),
733 FLAG(cmd, PCI_COMMAND_SERR),
734 FLAG(cmd, PCI_COMMAND_FAST_BACK),
735 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
736 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
737 FLAG(status, PCI_STATUS_CAP_LIST),
738 FLAG(status, PCI_STATUS_66MHZ),
739 FLAG(status, PCI_STATUS_UDF),
740 FLAG(status, PCI_STATUS_FAST_BACK),
741 FLAG(status, PCI_STATUS_PARITY),
742 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
743 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
744 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
745 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
746 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
747 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
748 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
749 FLAG(status, PCI_STATUS_DETECTED_PARITY),
750 FLAG(status, PCI_STATUS_INTx));
751 if (cmd & PCI_COMMAND_MASTER)
752 {
753 printf("\tLatency: %d", latency);
754 if (min_gnt || max_lat)
755 {
756 printf(" (");
757 if (min_gnt)
758 printf("%dns min", min_gnt*250);
759 if (min_gnt && max_lat)
760 printf(", ");
761 if (max_lat)
762 printf("%dns max", max_lat*250);
763 putchar(')');
764 }
765 if (cache_line)
766 printf(", Cache Line Size: %d bytes", cache_line * 4);
767 putchar('\n');
768 }
769 if (int_pin || irq)
770 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
771 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
772 if (p->numa_node != -1)
773 printf("\tNUMA node: %d\n", p->numa_node);
774 }
775 else
776 {
777 printf("\tFlags: ");
778 if (cmd & PCI_COMMAND_MASTER)
779 printf("bus master, ");
780 if (cmd & PCI_COMMAND_VGA_PALETTE)
781 printf("VGA palette snoop, ");
782 if (cmd & PCI_COMMAND_WAIT)
783 printf("stepping, ");
784 if (cmd & PCI_COMMAND_FAST_BACK)
785 printf("fast Back2Back, ");
786 if (status & PCI_STATUS_66MHZ)
787 printf("66MHz, ");
788 if (status & PCI_STATUS_UDF)
789 printf("user-definable features, ");
790 printf("%s devsel",
791 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
792 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
793 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
794 if (cmd & PCI_COMMAND_MASTER)
795 printf(", latency %d", latency);
796 if (irq)
797 printf(", IRQ " PCIIRQ_FMT, irq);
798 if (p->numa_node != -1)
799 printf(", NUMA node %d", p->numa_node);
800 putchar('\n');
801 }
802
803 if (bist & PCI_BIST_CAPABLE)
804 {
805 if (bist & PCI_BIST_START)
806 printf("\tBIST is running\n");
807 else
808 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
809 }
810
811 switch (htype)
812 {
813 case PCI_HEADER_TYPE_NORMAL:
814 show_htype0(d);
815 break;
816 case PCI_HEADER_TYPE_BRIDGE:
817 show_htype1(d);
818 break;
819 case PCI_HEADER_TYPE_CARDBUS:
820 show_htype2(d);
821 break;
822 }
823 }
824
825 /*** Machine-readable dumps ***/
826
827 static void
828 show_hex_dump(struct device *d)
829 {
830 unsigned int i, cnt;
831
832 cnt = d->config_cached;
833 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
834 {
835 cnt = 256;
836 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
837 cnt = 4096;
838 }
839
840 for (i=0; i<cnt; i++)
841 {
842 if (! (i & 15))
843 printf("%02x:", i);
844 printf(" %02x", get_conf_byte(d, i));
845 if ((i & 15) == 15)
846 putchar('\n');
847 }
848 }
849
850 static void
851 print_shell_escaped(char *c)
852 {
853 printf(" \"");
854 while (*c)
855 {
856 if (*c == '"' || *c == '\\')
857 putchar('\\');
858 putchar(*c++);
859 }
860 putchar('"');
861 }
862
863 static void
864 show_machine(struct device *d)
865 {
866 struct pci_dev *p = d->dev;
867 int c;
868 word sv_id, sd_id;
869 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
870 char *dt_node;
871
872 get_subid(d, &sv_id, &sd_id);
873
874 if (verbose)
875 {
876 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
877 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
878 show_slot_name(d);
879 putchar('\n');
880 printf("Class:\t%s\n",
881 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
882 printf("Vendor:\t%s\n",
883 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
884 printf("Device:\t%s\n",
885 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
886 if (sv_id && sv_id != 0xffff)
887 {
888 printf("SVendor:\t%s\n",
889 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
890 printf("SDevice:\t%s\n",
891 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
892 }
893 if (p->phy_slot)
894 printf("PhySlot:\t%s\n", p->phy_slot);
895 if (c = get_conf_byte(d, PCI_REVISION_ID))
896 printf("Rev:\t%02x\n", c);
897 if (c = get_conf_byte(d, PCI_CLASS_PROG))
898 printf("ProgIf:\t%02x\n", c);
899 if (opt_kernel)
900 show_kernel_machine(d);
901 if (p->numa_node != -1)
902 printf("NUMANode:\t%d\n", p->numa_node);
903 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
904 printf("DTNode:\t%s\n", dt_node);
905 }
906 else
907 {
908 show_slot_name(d);
909 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
910 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
911 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
912 if (c = get_conf_byte(d, PCI_REVISION_ID))
913 printf(" -r%02x", c);
914 if (c = get_conf_byte(d, PCI_CLASS_PROG))
915 printf(" -p%02x", c);
916 if (sv_id && sv_id != 0xffff)
917 {
918 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
919 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
920 }
921 else
922 printf(" \"\" \"\"");
923 putchar('\n');
924 }
925 }
926
927 /*** Main show function ***/
928
929 void
930 show_device(struct device *d)
931 {
932 if (opt_machine)
933 show_machine(d);
934 else
935 {
936 if (verbose)
937 show_verbose(d);
938 else
939 show_terse(d);
940 if (opt_kernel || verbose)
941 show_kernel(d);
942 }
943 if (opt_hex)
944 show_hex_dump(d);
945 if (verbose || opt_hex)
946 putchar('\n');
947 }
948
949 static void
950 show(void)
951 {
952 struct device *d;
953
954 for (d=first_dev; d; d=d->next)
955 show_device(d);
956 }
957
958 /* Main */
959
960 int
961 main(int argc, char **argv)
962 {
963 int i;
964 char *msg;
965
966 if (argc == 2 && !strcmp(argv[1], "--version"))
967 {
968 puts("lspci version " PCIUTILS_VERSION);
969 return 0;
970 }
971
972 pacc = pci_alloc();
973 pacc->error = die;
974 pci_filter_init(pacc, &filter);
975
976 while ((i = getopt(argc, argv, options)) != -1)
977 switch (i)
978 {
979 case 'n':
980 pacc->numeric_ids++;
981 break;
982 case 'v':
983 verbose++;
984 break;
985 case 'b':
986 pacc->buscentric = 1;
987 break;
988 case 's':
989 if (msg = pci_filter_parse_slot(&filter, optarg))
990 die("-s: %s", msg);
991 break;
992 case 'd':
993 if (msg = pci_filter_parse_id(&filter, optarg))
994 die("-d: %s", msg);
995 break;
996 case 'x':
997 opt_hex++;
998 break;
999 case 't':
1000 opt_tree++;
1001 break;
1002 case 'i':
1003 pci_set_name_list_path(pacc, optarg, 0);
1004 break;
1005 case 'm':
1006 opt_machine++;
1007 break;
1008 case 'p':
1009 opt_pcimap = optarg;
1010 break;
1011 #ifdef PCI_OS_LINUX
1012 case 'k':
1013 opt_kernel++;
1014 break;
1015 #endif
1016 case 'M':
1017 opt_map_mode++;
1018 break;
1019 case 'D':
1020 opt_domains = 2;
1021 break;
1022 #ifdef PCI_USE_DNS
1023 case 'q':
1024 opt_query_dns++;
1025 break;
1026 case 'Q':
1027 opt_query_all = 1;
1028 break;
1029 #else
1030 case 'q':
1031 case 'Q':
1032 die("DNS queries are not available in this version");
1033 #endif
1034 default:
1035 if (parse_generic_option(i, pacc, optarg))
1036 break;
1037 bad:
1038 fprintf(stderr, help_msg, pacc->id_file_name);
1039 return 1;
1040 }
1041 if (optind < argc)
1042 goto bad;
1043
1044 if (opt_query_dns)
1045 {
1046 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1047 if (opt_query_dns > 1)
1048 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1049 }
1050 if (opt_query_all)
1051 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1052
1053 pci_init(pacc);
1054 if (opt_map_mode)
1055 map_the_bus();
1056 else
1057 {
1058 scan_devices();
1059 sort_them();
1060 if (opt_tree)
1061 show_forest();
1062 else
1063 show();
1064 }
1065 show_kernel_cleanup();
1066 pci_cleanup(pacc);
1067
1068 return (seen_errors ? 2 : 0);
1069 }