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lspci: Do not access config space when it is emulated
[thirdparty/pciutils.git] / lspci.c
1 /*
2 * The PCI Utilities -- List All PCI Devices
3 *
4 * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9 #include <stdio.h>
10 #include <string.h>
11 #include <stdlib.h>
12 #include <stdarg.h>
13
14 #include "lspci.h"
15
16 /* Options */
17
18 int verbose; /* Show detailed information */
19 static int opt_hex; /* Show contents of config space as hexadecimal numbers */
20 struct pci_filter filter; /* Device filter */
21 static int opt_filter; /* Any filter was given */
22 static int opt_tree; /* Show bus tree */
23 static int opt_path; /* Show bridge path */
24 static int opt_machine; /* Generate machine-readable output */
25 static int opt_map_mode; /* Bus mapping mode enabled */
26 static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
27 static int opt_kernel; /* Show kernel drivers */
28 static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
29 static int opt_query_all; /* Query the DNS for all entries */
30 char *opt_pcimap; /* Override path to Linux modules.pcimap */
31
32 const char program_name[] = "lspci";
33
34 static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
35
36 static char help_msg[] =
37 "Usage: lspci [<switches>]\n"
38 "\n"
39 "Basic display modes:\n"
40 "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
41 "-t\t\tShow bus tree\n"
42 "\n"
43 "Display options:\n"
44 "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n"
45 #ifdef PCI_OS_LINUX
46 "-k\t\tShow kernel drivers handling each device\n"
47 #endif
48 "-x\t\tShow hex-dump of the standard part of the config space\n"
49 "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
50 "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
51 "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
52 "-D\t\tAlways show domain numbers\n"
53 "-P\t\tDisplay bridge path in addition to bus and device number\n"
54 "-PP\t\tDisplay bus path in addition to bus and device number\n"
55 "\n"
56 "Resolving of device ID's to names:\n"
57 "-n\t\tShow numeric ID's\n"
58 "-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
59 #ifdef PCI_USE_DNS
60 "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
61 "-qq\t\tAs above, but re-query locally cached entries\n"
62 "-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
63 #endif
64 "\n"
65 "Selection of devices:\n"
66 "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
67 "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
68 "\n"
69 "Other options:\n"
70 "-i <file>\tUse specified ID database instead of %s\n"
71 #ifdef PCI_OS_LINUX
72 "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
73 #endif
74 "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
75 "\n"
76 "PCI access options:\n"
77 GENERIC_HELP
78 ;
79
80 /*** Our view of the PCI bus ***/
81
82 struct pci_access *pacc;
83 struct device *first_dev;
84 static int seen_errors;
85 static int need_topology;
86
87 int
88 config_fetch(struct device *d, unsigned int pos, unsigned int len)
89 {
90 unsigned int end = pos+len;
91 int result;
92
93 while (pos < d->config_bufsize && len && d->present[pos])
94 pos++, len--;
95 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
96 len--;
97 if (!len)
98 return 1;
99
100 if (end > d->config_bufsize)
101 {
102 int orig_size = d->config_bufsize;
103 while (end > d->config_bufsize)
104 d->config_bufsize *= 2;
105 d->config = xrealloc(d->config, d->config_bufsize);
106 d->present = xrealloc(d->present, d->config_bufsize);
107 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
108 }
109 result = pci_read_block(d->dev, pos, d->config + pos, len);
110 if (result)
111 memset(d->present + pos, 1, len);
112 return result;
113 }
114
115 struct device *
116 scan_device(struct pci_dev *p)
117 {
118 struct device *d;
119
120 if (p->domain && !opt_domains)
121 opt_domains = 1;
122 if (!pci_filter_match(&filter, p) && !need_topology)
123 return NULL;
124 d = xmalloc(sizeof(struct device));
125 memset(d, 0, sizeof(*d));
126 d->dev = p;
127 d->no_config_access = p->no_config_access;
128 d->config_cached = d->config_bufsize = 64;
129 d->config = xmalloc(64);
130 d->present = xmalloc(64);
131 memset(d->present, 1, 64);
132 if (!d->no_config_access && !pci_read_block(p, 0, d->config, 64))
133 {
134 d->no_config_access = 1;
135 d->config_cached = d->config_bufsize = 0;
136 memset(d->present, 0, 64);
137 }
138 if (!d->no_config_access && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
139 {
140 /* For cardbus bridges, we need to fetch 64 bytes more to get the
141 * full standard header... */
142 if (config_fetch(d, 64, 64))
143 d->config_cached += 64;
144 }
145 pci_setup_cache(p, d->config, d->config_cached);
146 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0));
147 return d;
148 }
149
150 static void
151 scan_devices(void)
152 {
153 struct device *d;
154 struct pci_dev *p;
155
156 pci_scan_bus(pacc);
157 for (p=pacc->devices; p; p=p->next)
158 if (d = scan_device(p))
159 {
160 d->next = first_dev;
161 first_dev = d;
162 }
163 }
164
165 /*** Config space accesses ***/
166
167 static void
168 check_conf_range(struct device *d, unsigned int pos, unsigned int len)
169 {
170 while (len)
171 if (!d->present[pos])
172 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
173 else
174 pos++, len--;
175 }
176
177 byte
178 get_conf_byte(struct device *d, unsigned int pos)
179 {
180 check_conf_range(d, pos, 1);
181 return d->config[pos];
182 }
183
184 word
185 get_conf_word(struct device *d, unsigned int pos)
186 {
187 check_conf_range(d, pos, 2);
188 return d->config[pos] | (d->config[pos+1] << 8);
189 }
190
191 u32
192 get_conf_long(struct device *d, unsigned int pos)
193 {
194 check_conf_range(d, pos, 4);
195 return d->config[pos] |
196 (d->config[pos+1] << 8) |
197 (d->config[pos+2] << 16) |
198 (d->config[pos+3] << 24);
199 }
200
201 /*** Sorting ***/
202
203 static int
204 compare_them(const void *A, const void *B)
205 {
206 const struct pci_dev *a = (*(const struct device **)A)->dev;
207 const struct pci_dev *b = (*(const struct device **)B)->dev;
208
209 if (a->domain < b->domain)
210 return -1;
211 if (a->domain > b->domain)
212 return 1;
213 if (a->bus < b->bus)
214 return -1;
215 if (a->bus > b->bus)
216 return 1;
217 if (a->dev < b->dev)
218 return -1;
219 if (a->dev > b->dev)
220 return 1;
221 if (a->func < b->func)
222 return -1;
223 if (a->func > b->func)
224 return 1;
225 return 0;
226 }
227
228 static void
229 sort_them(void)
230 {
231 struct device **index, **h, **last_dev;
232 int cnt;
233 struct device *d;
234
235 cnt = 0;
236 for (d=first_dev; d; d=d->next)
237 cnt++;
238 h = index = alloca(sizeof(struct device *) * cnt);
239 for (d=first_dev; d; d=d->next)
240 *h++ = d;
241 qsort(index, cnt, sizeof(struct device *), compare_them);
242 last_dev = &first_dev;
243 h = index;
244 while (cnt--)
245 {
246 *last_dev = *h;
247 last_dev = &(*h)->next;
248 h++;
249 }
250 *last_dev = NULL;
251 }
252
253 /*** Normal output ***/
254
255 static void
256 show_slot_path(struct device *d)
257 {
258 struct pci_dev *p = d->dev;
259
260 if (opt_path)
261 {
262 struct bus *bus = d->parent_bus;
263 struct bridge *br = bus->parent_bridge;
264
265 if (br && br->br_dev)
266 {
267 show_slot_path(br->br_dev);
268 if (opt_path > 1)
269 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
270 else
271 printf("/%02x.%d", p->dev, p->func);
272 return;
273 }
274 }
275 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
276 }
277
278 static void
279 show_slot_name(struct device *d)
280 {
281 struct pci_dev *p = d->dev;
282
283 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
284 printf("%04x:", p->domain);
285 show_slot_path(d);
286 }
287
288 static void
289 show_terse(struct device *d)
290 {
291 int c;
292 struct pci_dev *p = d->dev;
293 char classbuf[128], devbuf[128];
294
295 show_slot_name(d);
296 printf(" %s: %s",
297 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
298 PCI_LOOKUP_CLASS,
299 p->device_class),
300 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
301 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
302 p->vendor_id, p->device_id));
303 if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id)
304 printf(" (rev %02x)", p->rev_id);
305 if (verbose)
306 {
307 char *x;
308 c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0;
309 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
310 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
311 p->device_class, c);
312 if (c || x)
313 {
314 printf(" (prog-if %02x", c);
315 if (x)
316 printf(" [%s]", x);
317 putchar(')');
318 }
319 }
320 putchar('\n');
321
322 if (verbose || opt_kernel)
323 {
324 char ssnamebuf[256];
325
326 pci_fill_info(p, PCI_FILL_LABEL);
327
328 if (p->label)
329 printf("\tDeviceName: %s", p->label);
330 if ((p->known_fields & PCI_FILL_SUBSYS) &&
331 p->subsys_vendor_id && p->subsys_vendor_id != 0xffff)
332 printf("\tSubsystem: %s\n",
333 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
334 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
335 p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id));
336 }
337 }
338
339 /*** Verbose output ***/
340
341 static void
342 show_size(u64 x)
343 {
344 static const char suffix[][2] = { "", "K", "M", "G", "T" };
345 unsigned i;
346 if (!x)
347 return;
348 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
349 if (x % 1024)
350 break;
351 x /= 1024;
352 }
353 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
354 }
355
356 static void
357 show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled)
358 {
359 printf("%s:", prefix);
360 if (base <= limit || verbose > 2)
361 printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit);
362 if (!disabled && base <= limit)
363 show_size(limit - base + 1);
364 else
365 printf(" [disabled]");
366 if (bits)
367 printf(" [%d-bit]", bits);
368 putchar('\n');
369 }
370
371 static u32
372 ioflg_to_pciflg(pciaddr_t ioflg)
373 {
374 u32 flg;
375
376 if (ioflg & PCI_IORESOURCE_IO)
377 flg = PCI_BASE_ADDRESS_SPACE_IO;
378 else if (!(ioflg & PCI_IORESOURCE_MEM))
379 flg = 0;
380 else
381 {
382 flg = PCI_BASE_ADDRESS_SPACE_MEMORY;
383 if (ioflg & PCI_IORESOURCE_MEM_64)
384 flg |= PCI_BASE_ADDRESS_MEM_TYPE_64;
385 else
386 flg |= PCI_BASE_ADDRESS_MEM_TYPE_32;
387 if (ioflg & PCI_IORESOURCE_PREFETCH)
388 flg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
389 }
390
391 return flg;
392 }
393
394 static void
395 show_bases(struct device *d, int cnt, int without_config_data)
396 {
397 struct pci_dev *p = d->dev;
398 word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND);
399 int i;
400 int virtual = 0;
401
402 for (i=0; i<cnt; i++)
403 {
404 pciaddr_t pos = p->base_addr[i];
405 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
406 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
407 u32 flg = without_config_data ? ioflg_to_pciflg(ioflg) : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
408 u32 hw_lower;
409 u32 hw_upper = 0;
410 int broken = 0;
411
412 if (flg == 0xffffffff)
413 flg = 0;
414 if (!pos && !flg && !len)
415 continue;
416
417 if (verbose > 1)
418 printf("\tRegion %d: ", i);
419 else
420 putchar('\t');
421
422 /* Read address as seen by the hardware */
423 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
424 hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK;
425 else
426 {
427 hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK;
428 if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
429 {
430 if (i >= cnt - 1)
431 broken = 1;
432 else
433 {
434 i++;
435 if (!without_config_data)
436 hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
437 }
438 }
439 }
440
441 /* Detect virtual regions, which are reported by the OS, but unassigned in the device */
442 if (!without_config_data && pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
443 {
444 flg = pos;
445 virtual = 1;
446 }
447
448 /* Print base address */
449 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
450 {
451 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
452 printf("I/O ports at ");
453 if (a || (cmd & PCI_COMMAND_IO))
454 printf(PCIADDR_PORT_FMT, a);
455 else if (hw_lower)
456 printf("<ignored>");
457 else
458 printf("<unassigned>");
459 if (virtual)
460 printf(" [virtual]");
461 else if (!(cmd & PCI_COMMAND_IO))
462 printf(" [disabled]");
463 }
464 else
465 {
466 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
467 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
468
469 printf("Memory at ");
470 if (broken)
471 printf("<broken-64-bit-slot>");
472 else if (a)
473 printf(PCIADDR_T_FMT, a);
474 else if (hw_lower || hw_upper)
475 printf("<ignored>");
476 else
477 printf("<unassigned>");
478 printf(" (%s, %sprefetchable)",
479 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
480 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
481 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
482 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
483 if (virtual)
484 printf(" [virtual]");
485 else if (!(cmd & PCI_COMMAND_MEMORY))
486 printf(" [disabled]");
487 }
488
489 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
490 printf(" [enhanced]");
491
492 show_size(len);
493 putchar('\n');
494 }
495 }
496
497 static void
498 show_rom(struct device *d, int reg)
499 {
500 struct pci_dev *p = d->dev;
501 pciaddr_t rom = p->rom_base_addr;
502 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
503 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
504 u32 flg = reg >= 0 ? get_conf_long(d, reg) : ioflg_to_pciflg(ioflg);
505 word cmd = reg >= 0 ? get_conf_word(d, PCI_COMMAND) : PCI_COMMAND_MEMORY;
506 int virtual = 0;
507
508 if (!rom && !flg && !len)
509 return;
510
511 if (reg >= 0 && (rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
512 {
513 flg = rom;
514 virtual = 1;
515 }
516
517 printf("\tExpansion ROM at ");
518 if (rom & PCI_ROM_ADDRESS_MASK)
519 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
520 else if (flg & PCI_ROM_ADDRESS_MASK)
521 printf("<ignored>");
522 else
523 printf("<unassigned>");
524
525 if (virtual)
526 printf(" [virtual]");
527
528 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
529 printf(" [disabled]");
530 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
531 printf(" [disabled by cmd]");
532
533 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
534 printf(" [enhanced]");
535
536 show_size(len);
537 putchar('\n');
538 }
539
540 static void
541 show_htype0(struct device *d)
542 {
543 show_bases(d, 6, 0);
544 show_rom(d, PCI_ROM_ADDRESS);
545 show_caps(d, PCI_CAPABILITY_LIST);
546 }
547
548 static void
549 show_htype1(struct device *d)
550 {
551 struct pci_dev *p = d->dev;
552 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
553 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
554 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
555 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
556 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
557 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
558 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
559 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
560 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
561 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
562 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
563 int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0];
564 int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1];
565 int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2];
566 int io_bits, pref_bits;
567
568 show_bases(d, 2, 0);
569 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
570 get_conf_byte(d, PCI_PRIMARY_BUS),
571 get_conf_byte(d, PCI_SECONDARY_BUS),
572 get_conf_byte(d, PCI_SUBORDINATE_BUS),
573 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
574
575 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled)
576 {
577 io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK;
578 io_limit = io_base + p->bridge_size[0] - 1;
579 io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK;
580 io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16;
581 show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled);
582 }
583 else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
584 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
585 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
586 else
587 {
588 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
589 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
590 if (io_type == PCI_IO_RANGE_TYPE_32)
591 {
592 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
593 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
594 }
595 /* I/O is unsupported if both base and limit are zeros and resource is disabled */
596 if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled))
597 {
598 io_limit += 0xfff;
599 io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16;
600 show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled);
601 }
602 }
603
604 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled)
605 {
606 mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK;
607 mem_limit = mem_base + p->bridge_size[1] - 1;
608 show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled);
609 }
610 else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
611 mem_type)
612 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
613 else
614 {
615 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
616 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
617 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled);
618 }
619
620 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled)
621 {
622 u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK;
623 u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1;
624 pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK;
625 pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32;
626 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled);
627 }
628 else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
629 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
630 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
631 else
632 {
633 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
634 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
635 if (pref_type == PCI_PREF_RANGE_TYPE_64)
636 {
637 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
638 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
639 }
640 /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */
641 if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled))
642 {
643 pref_limit_64 += 0xfffff;
644 pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32;
645 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled);
646 }
647 }
648
649 if (verbose > 1)
650 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
651 FLAG(sec_stat, PCI_STATUS_66MHZ),
652 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
653 FLAG(sec_stat, PCI_STATUS_PARITY),
654 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
655 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
656 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
657 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
658 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
659 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
660 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
661 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
662
663 show_rom(d, PCI_ROM_ADDRESS1);
664
665 if (verbose > 1)
666 {
667 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
668 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
669 FLAG(brc, PCI_BRIDGE_CTL_SERR),
670 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
671 FLAG(brc, PCI_BRIDGE_CTL_VGA),
672 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
673 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
674 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
675 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
676 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
677 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
678 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
679 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
680 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
681 }
682
683 show_caps(d, PCI_CAPABILITY_LIST);
684 }
685
686 static void
687 show_htype2(struct device *d)
688 {
689 int i;
690 word cmd = get_conf_word(d, PCI_COMMAND);
691 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
692 word exca;
693 int verb = verbose > 2;
694
695 show_bases(d, 1, 0);
696 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
697 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
698 get_conf_byte(d, PCI_CB_CARD_BUS),
699 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
700 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
701 for (i=0; i<2; i++)
702 {
703 int p = 8*i;
704 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
705 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
706 limit = limit + 0xfff;
707 if (base <= limit || verb)
708 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
709 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
710 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
711 }
712 for (i=0; i<2; i++)
713 {
714 int p = 8*i;
715 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
716 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
717 if (!(base & PCI_IO_RANGE_TYPE_32))
718 {
719 base &= 0xffff;
720 limit &= 0xffff;
721 }
722 base &= PCI_CB_IO_RANGE_MASK;
723 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
724 if (base <= limit || verb)
725 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
726 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
727 }
728
729 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
730 printf("\tSecondary status: SERR\n");
731 if (verbose > 1)
732 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
733 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
734 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
735 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
736 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
737 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
738 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
739 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
740 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
741
742 if (d->config_cached < 128)
743 {
744 printf("\t<access denied to the rest>\n");
745 return;
746 }
747
748 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
749 if (exca)
750 printf("\t16-bit legacy interface ports at %04x\n", exca);
751 show_caps(d, PCI_CB_CAPABILITY_LIST);
752 }
753
754 static void
755 show_htype_unknown(struct device *d)
756 {
757 struct pci_dev *p = d->dev;
758 u64 base, limit, flags;
759 const char *str;
760 int i, bits;
761
762 if (pacc->buscentric)
763 return;
764
765 show_bases(d, 6, 1);
766 for (i = 0; i < 4; i++)
767 {
768 if (!p->bridge_base_addr[i])
769 continue;
770 base = p->bridge_base_addr[i];
771 limit = base + p->bridge_size[i] - 1;
772 flags = p->bridge_flags[i];
773 if (flags & PCI_IORESOURCE_IO)
774 {
775 bits = (flags & PCI_IORESOURCE_IO_16BIT_ADDR) ? 16 : 32;
776 str = "\tI/O behind bridge";
777 }
778 else if (flags & PCI_IORESOURCE_MEM)
779 {
780 bits = (flags & PCI_IORESOURCE_MEM_64) ? 64 : 32;
781 if (flags & PCI_IORESOURCE_PREFETCH)
782 str = "\tPrefetchable memory behind bridge";
783 else
784 str = "\tMemory behind bridge";
785 }
786 else
787 {
788 bits = 0;
789 str = "\tUnknown resource behind bridge";
790 }
791 show_range(str, base, limit, bits, 0);
792 }
793 show_rom(d, -1);
794 }
795
796 static void
797 show_verbose(struct device *d)
798 {
799 struct pci_dev *p = d->dev;
800 int unknown_config_data = 0;
801 word class = p->device_class;
802 byte htype = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f);
803 byte bist;
804 byte max_lat, min_gnt;
805 char *dt_node, *iommu_group;
806
807 show_terse(d);
808
809 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
810 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP |
811 PCI_FILL_BRIDGE_BASES | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS);
812
813 switch (htype)
814 {
815 case PCI_HEADER_TYPE_NORMAL:
816 if (class == PCI_CLASS_BRIDGE_PCI)
817 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
818 bist = get_conf_byte(d, PCI_BIST);
819 max_lat = get_conf_byte(d, PCI_MAX_LAT);
820 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
821 break;
822 case PCI_HEADER_TYPE_BRIDGE:
823 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
824 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
825 bist = get_conf_byte(d, PCI_BIST);
826 min_gnt = max_lat = 0;
827 break;
828 case PCI_HEADER_TYPE_CARDBUS:
829 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
830 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
831 bist = get_conf_byte(d, PCI_BIST);
832 min_gnt = max_lat = 0;
833 break;
834 default:
835 if (!d->no_config_access)
836 printf("\t!!! Unknown header type %02x\n", htype);
837 bist = 0;
838 min_gnt = max_lat = 0;
839 unknown_config_data = 1;
840 }
841
842 if (p->phy_slot)
843 printf("\tPhysical Slot: %s\n", p->phy_slot);
844
845 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
846 printf("\tDevice tree node: %s\n", dt_node);
847
848 if (!unknown_config_data && verbose > 1)
849 {
850 word cmd = get_conf_word(d, PCI_COMMAND);
851 word status = get_conf_word(d, PCI_STATUS);
852 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
853 FLAG(cmd, PCI_COMMAND_IO),
854 FLAG(cmd, PCI_COMMAND_MEMORY),
855 FLAG(cmd, PCI_COMMAND_MASTER),
856 FLAG(cmd, PCI_COMMAND_SPECIAL),
857 FLAG(cmd, PCI_COMMAND_INVALIDATE),
858 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
859 FLAG(cmd, PCI_COMMAND_PARITY),
860 FLAG(cmd, PCI_COMMAND_WAIT),
861 FLAG(cmd, PCI_COMMAND_SERR),
862 FLAG(cmd, PCI_COMMAND_FAST_BACK),
863 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
864 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
865 FLAG(status, PCI_STATUS_CAP_LIST),
866 FLAG(status, PCI_STATUS_66MHZ),
867 FLAG(status, PCI_STATUS_UDF),
868 FLAG(status, PCI_STATUS_FAST_BACK),
869 FLAG(status, PCI_STATUS_PARITY),
870 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
871 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
872 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
873 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
874 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
875 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
876 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
877 FLAG(status, PCI_STATUS_DETECTED_PARITY),
878 FLAG(status, PCI_STATUS_INTx));
879 if (cmd & PCI_COMMAND_MASTER)
880 {
881 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
882 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
883 printf("\tLatency: %d", latency);
884 if (min_gnt || max_lat)
885 {
886 printf(" (");
887 if (min_gnt)
888 printf("%dns min", min_gnt*250);
889 if (min_gnt && max_lat)
890 printf(", ");
891 if (max_lat)
892 printf("%dns max", max_lat*250);
893 putchar(')');
894 }
895 if (cache_line)
896 printf(", Cache Line Size: %d bytes", cache_line * 4);
897 putchar('\n');
898 }
899 }
900
901 if (verbose > 1)
902 {
903 byte int_pin = unknown_config_data ? 0 : get_conf_byte(d, PCI_INTERRUPT_PIN);
904 if (int_pin || p->irq)
905 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
906 (int_pin ? 'A' + int_pin - 1 : '?'), p->irq);
907 if (p->numa_node != -1)
908 printf("\tNUMA node: %d\n", p->numa_node);
909 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
910 printf("\tIOMMU group: %s\n", iommu_group);
911 }
912
913 if (!unknown_config_data && verbose <= 1)
914 {
915 word cmd = get_conf_word(d, PCI_COMMAND);
916 word status = get_conf_word(d, PCI_STATUS);
917 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
918 printf("\tFlags: ");
919 if (cmd & PCI_COMMAND_MASTER)
920 printf("bus master, ");
921 if (cmd & PCI_COMMAND_VGA_PALETTE)
922 printf("VGA palette snoop, ");
923 if (cmd & PCI_COMMAND_WAIT)
924 printf("stepping, ");
925 if (cmd & PCI_COMMAND_FAST_BACK)
926 printf("fast Back2Back, ");
927 if (status & PCI_STATUS_66MHZ)
928 printf("66MHz, ");
929 if (status & PCI_STATUS_UDF)
930 printf("user-definable features, ");
931 printf("%s devsel",
932 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
933 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
934 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
935 if (cmd & PCI_COMMAND_MASTER)
936 printf(", latency %d", latency);
937 if (p->irq)
938 printf(", IRQ " PCIIRQ_FMT, p->irq);
939 if (p->numa_node != -1)
940 printf(", NUMA node %d", p->numa_node);
941 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
942 printf(", IOMMU group %s", iommu_group);
943 putchar('\n');
944 }
945
946 if (bist & PCI_BIST_CAPABLE)
947 {
948 if (bist & PCI_BIST_START)
949 printf("\tBIST is running\n");
950 else
951 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
952 }
953
954 switch (htype)
955 {
956 case PCI_HEADER_TYPE_NORMAL:
957 show_htype0(d);
958 break;
959 case PCI_HEADER_TYPE_BRIDGE:
960 show_htype1(d);
961 break;
962 case PCI_HEADER_TYPE_CARDBUS:
963 show_htype2(d);
964 break;
965 default:
966 show_htype_unknown(d);
967 }
968 }
969
970 /*** Machine-readable dumps ***/
971
972 static void
973 show_hex_dump(struct device *d)
974 {
975 unsigned int i, cnt;
976
977 if (d->no_config_access)
978 {
979 printf("WARNING: Cannot show hex-dump of the config space\n");
980 return;
981 }
982
983 cnt = d->config_cached;
984 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
985 {
986 cnt = 256;
987 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
988 cnt = 4096;
989 }
990
991 for (i=0; i<cnt; i++)
992 {
993 if (! (i & 15))
994 printf("%02x:", i);
995 printf(" %02x", get_conf_byte(d, i));
996 if ((i & 15) == 15)
997 putchar('\n');
998 }
999 }
1000
1001 static void
1002 print_shell_escaped(char *c)
1003 {
1004 printf(" \"");
1005 while (*c)
1006 {
1007 if (*c == '"' || *c == '\\')
1008 putchar('\\');
1009 putchar(*c++);
1010 }
1011 putchar('"');
1012 }
1013
1014 static void
1015 show_machine(struct device *d)
1016 {
1017 struct pci_dev *p = d->dev;
1018 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
1019 char *dt_node, *iommu_group;
1020
1021 if (verbose)
1022 {
1023 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
1024 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
1025 show_slot_name(d);
1026 putchar('\n');
1027 printf("Class:\t%s\n",
1028 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
1029 printf("Vendor:\t%s\n",
1030 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
1031 printf("Device:\t%s\n",
1032 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
1033 if ((p->known_fields & PCI_FILL_SUBSYS) &&
1034 p->subsys_vendor_id && p->subsys_vendor_id != 0xffff)
1035 {
1036 printf("SVendor:\t%s\n",
1037 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id));
1038 printf("SDevice:\t%s\n",
1039 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id));
1040 }
1041 if (p->phy_slot)
1042 printf("PhySlot:\t%s\n", p->phy_slot);
1043 if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id)
1044 printf("Rev:\t%02x\n", p->rev_id);
1045 if (p->known_fields & PCI_FILL_CLASS_EXT)
1046 printf("ProgIf:\t%02x\n", p->prog_if);
1047 if (opt_kernel)
1048 show_kernel_machine(d);
1049 if (p->numa_node != -1)
1050 printf("NUMANode:\t%d\n", p->numa_node);
1051 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
1052 printf("DTNode:\t%s\n", dt_node);
1053 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
1054 printf("IOMMUGroup:\t%s\n", iommu_group);
1055 }
1056 else
1057 {
1058 show_slot_name(d);
1059 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
1060 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
1061 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
1062 if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id)
1063 printf(" -r%02x", p->rev_id);
1064 if (p->known_fields & PCI_FILL_CLASS_EXT)
1065 printf(" -p%02x", p->prog_if);
1066 if ((p->known_fields & PCI_FILL_SUBSYS) &&
1067 p->subsys_vendor_id && p->subsys_vendor_id != 0xffff)
1068 {
1069 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id));
1070 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id));
1071 }
1072 else
1073 printf(" \"\" \"\"");
1074 putchar('\n');
1075 }
1076 }
1077
1078 /*** Main show function ***/
1079
1080 void
1081 show_device(struct device *d)
1082 {
1083 if (opt_machine)
1084 show_machine(d);
1085 else
1086 {
1087 if (verbose)
1088 show_verbose(d);
1089 else
1090 show_terse(d);
1091 if (opt_kernel || verbose)
1092 show_kernel(d);
1093 }
1094 if (opt_hex)
1095 show_hex_dump(d);
1096 if (verbose || opt_hex)
1097 putchar('\n');
1098 }
1099
1100 static void
1101 show(void)
1102 {
1103 struct device *d;
1104
1105 for (d=first_dev; d; d=d->next)
1106 if (pci_filter_match(&filter, d->dev))
1107 show_device(d);
1108 }
1109
1110 /* Main */
1111
1112 int
1113 main(int argc, char **argv)
1114 {
1115 int i;
1116 char *msg;
1117
1118 if (argc == 2 && !strcmp(argv[1], "--version"))
1119 {
1120 puts("lspci version " PCIUTILS_VERSION);
1121 return 0;
1122 }
1123
1124 pacc = pci_alloc();
1125 pacc->error = die;
1126 pci_filter_init(pacc, &filter);
1127
1128 while ((i = getopt(argc, argv, options)) != -1)
1129 switch (i)
1130 {
1131 case 'n':
1132 pacc->numeric_ids++;
1133 break;
1134 case 'v':
1135 verbose++;
1136 break;
1137 case 'b':
1138 pacc->buscentric = 1;
1139 break;
1140 case 's':
1141 if (msg = pci_filter_parse_slot(&filter, optarg))
1142 die("-s: %s", msg);
1143 opt_filter = 1;
1144 break;
1145 case 'd':
1146 if (msg = pci_filter_parse_id(&filter, optarg))
1147 die("-d: %s", msg);
1148 opt_filter = 1;
1149 break;
1150 case 'x':
1151 opt_hex++;
1152 break;
1153 case 'P':
1154 opt_path++;
1155 need_topology = 1;
1156 break;
1157 case 't':
1158 opt_tree++;
1159 need_topology = 1;
1160 break;
1161 case 'i':
1162 pci_set_name_list_path(pacc, optarg, 0);
1163 break;
1164 case 'm':
1165 opt_machine++;
1166 break;
1167 case 'p':
1168 opt_pcimap = optarg;
1169 break;
1170 #ifdef PCI_OS_LINUX
1171 case 'k':
1172 opt_kernel++;
1173 break;
1174 #endif
1175 case 'M':
1176 opt_map_mode++;
1177 break;
1178 case 'D':
1179 opt_domains = 2;
1180 break;
1181 #ifdef PCI_USE_DNS
1182 case 'q':
1183 opt_query_dns++;
1184 break;
1185 case 'Q':
1186 opt_query_all = 1;
1187 break;
1188 #else
1189 case 'q':
1190 case 'Q':
1191 die("DNS queries are not available in this version");
1192 #endif
1193 default:
1194 if (parse_generic_option(i, pacc, optarg))
1195 break;
1196 bad:
1197 fprintf(stderr, help_msg, pacc->id_file_name);
1198 return 1;
1199 }
1200 if (optind < argc)
1201 goto bad;
1202
1203 if (opt_query_dns)
1204 {
1205 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1206 if (opt_query_dns > 1)
1207 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1208 }
1209 if (opt_query_all)
1210 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1211
1212 pci_init(pacc);
1213 if (opt_map_mode)
1214 {
1215 if (need_topology)
1216 die("Bus mapping mode does not recognize bus topology");
1217 map_the_bus();
1218 }
1219 else
1220 {
1221 scan_devices();
1222 sort_them();
1223 if (need_topology)
1224 grow_tree();
1225 if (opt_tree)
1226 show_forest(opt_filter ? &filter : NULL);
1227 else
1228 show();
1229 }
1230 show_kernel_cleanup();
1231 pci_cleanup(pacc);
1232
1233 return (seen_errors ? 2 : 0);
1234 }