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Cleaned up dumping of I/O and memory regions
[thirdparty/pciutils.git] / lspci.c
1 /*
2 * The PCI Utilities -- List All PCI Devices
3 *
4 * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9 #include <stdio.h>
10 #include <string.h>
11 #include <stdlib.h>
12 #include <stdarg.h>
13
14 #include "lspci.h"
15
16 /* Options */
17
18 int verbose; /* Show detailed information */
19 static int opt_hex; /* Show contents of config space as hexadecimal numbers */
20 struct pci_filter filter; /* Device filter */
21 static int opt_filter; /* Any filter was given */
22 static int opt_tree; /* Show bus tree */
23 static int opt_path; /* Show bridge path */
24 static int opt_machine; /* Generate machine-readable output */
25 static int opt_map_mode; /* Bus mapping mode enabled */
26 static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
27 static int opt_kernel; /* Show kernel drivers */
28 static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
29 static int opt_query_all; /* Query the DNS for all entries */
30 char *opt_pcimap; /* Override path to Linux modules.pcimap */
31
32 const char program_name[] = "lspci";
33
34 static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
35
36 static char help_msg[] =
37 "Usage: lspci [<switches>]\n"
38 "\n"
39 "Basic display modes:\n"
40 "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
41 "-t\t\tShow bus tree\n"
42 "\n"
43 "Display options:\n"
44 "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n"
45 #ifdef PCI_OS_LINUX
46 "-k\t\tShow kernel drivers handling each device\n"
47 #endif
48 "-x\t\tShow hex-dump of the standard part of the config space\n"
49 "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
50 "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
51 "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
52 "-D\t\tAlways show domain numbers\n"
53 "-P\t\tDisplay bridge path in addition to bus and device number\n"
54 "-PP\t\tDisplay bus path in addition to bus and device number\n"
55 "\n"
56 "Resolving of device ID's to names:\n"
57 "-n\t\tShow numeric ID's\n"
58 "-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
59 #ifdef PCI_USE_DNS
60 "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
61 "-qq\t\tAs above, but re-query locally cached entries\n"
62 "-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
63 #endif
64 "\n"
65 "Selection of devices:\n"
66 "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
67 "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
68 "\n"
69 "Other options:\n"
70 "-i <file>\tUse specified ID database instead of %s\n"
71 #ifdef PCI_OS_LINUX
72 "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
73 #endif
74 "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
75 "\n"
76 "PCI access options:\n"
77 GENERIC_HELP
78 ;
79
80 /*** Our view of the PCI bus ***/
81
82 struct pci_access *pacc;
83 struct device *first_dev;
84 static int seen_errors;
85 static int need_topology;
86
87 int
88 config_fetch(struct device *d, unsigned int pos, unsigned int len)
89 {
90 unsigned int end = pos+len;
91 int result;
92
93 while (pos < d->config_bufsize && len && d->present[pos])
94 pos++, len--;
95 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
96 len--;
97 if (!len)
98 return 1;
99
100 if (end > d->config_bufsize)
101 {
102 int orig_size = d->config_bufsize;
103 while (end > d->config_bufsize)
104 d->config_bufsize *= 2;
105 d->config = xrealloc(d->config, d->config_bufsize);
106 d->present = xrealloc(d->present, d->config_bufsize);
107 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
108 }
109 result = pci_read_block(d->dev, pos, d->config + pos, len);
110 if (result)
111 memset(d->present + pos, 1, len);
112 return result;
113 }
114
115 struct device *
116 scan_device(struct pci_dev *p)
117 {
118 struct device *d;
119
120 if (p->domain && !opt_domains)
121 opt_domains = 1;
122 if (!pci_filter_match(&filter, p) && !need_topology)
123 return NULL;
124 d = xmalloc(sizeof(struct device));
125 memset(d, 0, sizeof(*d));
126 d->dev = p;
127 d->config_cached = d->config_bufsize = 64;
128 d->config = xmalloc(64);
129 d->present = xmalloc(64);
130 memset(d->present, 1, 64);
131 if (!pci_read_block(p, 0, d->config, 64))
132 {
133 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
134 p->domain, p->bus, p->dev, p->func);
135 seen_errors++;
136 return NULL;
137 }
138 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
139 {
140 /* For cardbus bridges, we need to fetch 64 bytes more to get the
141 * full standard header... */
142 if (config_fetch(d, 64, 64))
143 d->config_cached += 64;
144 }
145 pci_setup_cache(p, d->config, d->config_cached);
146 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
147 return d;
148 }
149
150 static void
151 scan_devices(void)
152 {
153 struct device *d;
154 struct pci_dev *p;
155
156 pci_scan_bus(pacc);
157 for (p=pacc->devices; p; p=p->next)
158 if (d = scan_device(p))
159 {
160 d->next = first_dev;
161 first_dev = d;
162 }
163 }
164
165 /*** Config space accesses ***/
166
167 static void
168 check_conf_range(struct device *d, unsigned int pos, unsigned int len)
169 {
170 while (len)
171 if (!d->present[pos])
172 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
173 else
174 pos++, len--;
175 }
176
177 byte
178 get_conf_byte(struct device *d, unsigned int pos)
179 {
180 check_conf_range(d, pos, 1);
181 return d->config[pos];
182 }
183
184 word
185 get_conf_word(struct device *d, unsigned int pos)
186 {
187 check_conf_range(d, pos, 2);
188 return d->config[pos] | (d->config[pos+1] << 8);
189 }
190
191 u32
192 get_conf_long(struct device *d, unsigned int pos)
193 {
194 check_conf_range(d, pos, 4);
195 return d->config[pos] |
196 (d->config[pos+1] << 8) |
197 (d->config[pos+2] << 16) |
198 (d->config[pos+3] << 24);
199 }
200
201 /*** Sorting ***/
202
203 static int
204 compare_them(const void *A, const void *B)
205 {
206 const struct pci_dev *a = (*(const struct device **)A)->dev;
207 const struct pci_dev *b = (*(const struct device **)B)->dev;
208
209 if (a->domain < b->domain)
210 return -1;
211 if (a->domain > b->domain)
212 return 1;
213 if (a->bus < b->bus)
214 return -1;
215 if (a->bus > b->bus)
216 return 1;
217 if (a->dev < b->dev)
218 return -1;
219 if (a->dev > b->dev)
220 return 1;
221 if (a->func < b->func)
222 return -1;
223 if (a->func > b->func)
224 return 1;
225 return 0;
226 }
227
228 static void
229 sort_them(void)
230 {
231 struct device **index, **h, **last_dev;
232 int cnt;
233 struct device *d;
234
235 cnt = 0;
236 for (d=first_dev; d; d=d->next)
237 cnt++;
238 h = index = alloca(sizeof(struct device *) * cnt);
239 for (d=first_dev; d; d=d->next)
240 *h++ = d;
241 qsort(index, cnt, sizeof(struct device *), compare_them);
242 last_dev = &first_dev;
243 h = index;
244 while (cnt--)
245 {
246 *last_dev = *h;
247 last_dev = &(*h)->next;
248 h++;
249 }
250 *last_dev = NULL;
251 }
252
253 /*** Normal output ***/
254
255 static void
256 show_slot_path(struct device *d)
257 {
258 struct pci_dev *p = d->dev;
259
260 if (opt_path)
261 {
262 struct bus *bus = d->parent_bus;
263 struct bridge *br = bus->parent_bridge;
264
265 if (br && br->br_dev)
266 {
267 show_slot_path(br->br_dev);
268 if (opt_path > 1)
269 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
270 else
271 printf("/%02x.%d", p->dev, p->func);
272 return;
273 }
274 }
275 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
276 }
277
278 static void
279 show_slot_name(struct device *d)
280 {
281 struct pci_dev *p = d->dev;
282
283 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
284 printf("%04x:", p->domain);
285 show_slot_path(d);
286 }
287
288 void
289 get_subid(struct device *d, word *subvp, word *subdp)
290 {
291 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
292
293 if (htype == PCI_HEADER_TYPE_NORMAL)
294 {
295 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
296 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
297 }
298 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
299 {
300 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
301 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
302 }
303 else
304 *subvp = *subdp = 0xffff;
305 }
306
307 static void
308 show_terse(struct device *d)
309 {
310 int c;
311 struct pci_dev *p = d->dev;
312 char classbuf[128], devbuf[128];
313
314 show_slot_name(d);
315 printf(" %s: %s",
316 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
317 PCI_LOOKUP_CLASS,
318 p->device_class),
319 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
320 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
321 p->vendor_id, p->device_id));
322 if (c = get_conf_byte(d, PCI_REVISION_ID))
323 printf(" (rev %02x)", c);
324 if (verbose)
325 {
326 char *x;
327 c = get_conf_byte(d, PCI_CLASS_PROG);
328 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
329 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
330 p->device_class, c);
331 if (c || x)
332 {
333 printf(" (prog-if %02x", c);
334 if (x)
335 printf(" [%s]", x);
336 putchar(')');
337 }
338 }
339 putchar('\n');
340
341 if (verbose || opt_kernel)
342 {
343 word subsys_v, subsys_d;
344 char ssnamebuf[256];
345
346 pci_fill_info(p, PCI_FILL_LABEL);
347
348 if (p->label)
349 printf("\tDeviceName: %s", p->label);
350 get_subid(d, &subsys_v, &subsys_d);
351 if (subsys_v && subsys_v != 0xffff)
352 printf("\tSubsystem: %s\n",
353 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
354 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
355 p->vendor_id, p->device_id, subsys_v, subsys_d));
356 }
357 }
358
359 /*** Verbose output ***/
360
361 static void
362 show_size(u64 x)
363 {
364 static const char suffix[][2] = { "", "K", "M", "G", "T" };
365 unsigned i;
366 if (!x)
367 return;
368 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
369 if (x % 1024)
370 break;
371 x /= 1024;
372 }
373 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
374 }
375
376 static void
377 show_range(char *prefix, u64 base, u64 limit, int is_64bit)
378 {
379 printf("%s:", prefix);
380 if (base <= limit || verbose > 2)
381 {
382 if (is_64bit)
383 printf(" %016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
384 else
385 printf(" %08x-%08x", (unsigned) base, (unsigned) limit);
386 }
387 if (base <= limit)
388 show_size(limit - base + 1);
389 else
390 printf(" [disabled]");
391 putchar('\n');
392 }
393
394 static void
395 show_bases(struct device *d, int cnt)
396 {
397 struct pci_dev *p = d->dev;
398 word cmd = get_conf_word(d, PCI_COMMAND);
399 int i;
400 int virtual = 0;
401
402 for (i=0; i<cnt; i++)
403 {
404 pciaddr_t pos = p->base_addr[i];
405 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
406 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
407 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
408 u32 hw_lower;
409 u32 hw_upper = 0;
410 int broken = 0;
411
412 if (flg == 0xffffffff)
413 flg = 0;
414 if (!pos && !flg && !len)
415 continue;
416
417 if (verbose > 1)
418 printf("\tRegion %d: ", i);
419 else
420 putchar('\t');
421
422 /* Read address as seen by the hardware */
423 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
424 hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK;
425 else
426 {
427 hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK;
428 if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
429 {
430 if (i >= cnt - 1)
431 broken = 1;
432 else
433 {
434 i++;
435 hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
436 }
437 }
438 }
439
440 /* Detect virtual regions, which are reported by the OS, but unassigned in the device */
441 if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
442 {
443 flg = pos;
444 virtual = 1;
445 }
446
447 /* Print base address */
448 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
449 {
450 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
451 printf("I/O ports at ");
452 if (a || (cmd & PCI_COMMAND_IO))
453 printf(PCIADDR_PORT_FMT, a);
454 else if (hw_lower)
455 printf("<ignored>");
456 else
457 printf("<unassigned>");
458 if (virtual)
459 printf(" [virtual]");
460 else if (!(cmd & PCI_COMMAND_IO))
461 printf(" [disabled]");
462 }
463 else
464 {
465 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
466 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
467
468 printf("Memory at ");
469 if (broken)
470 printf("<broken-64-bit-slot>");
471 else if (a)
472 printf(PCIADDR_T_FMT, a);
473 else if (hw_lower || hw_upper)
474 printf("<ignored>");
475 else
476 printf("<unassigned>");
477 printf(" (%s, %sprefetchable)",
478 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
479 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
480 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
481 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
482 if (virtual)
483 printf(" [virtual]");
484 else if (!(cmd & PCI_COMMAND_MEMORY))
485 printf(" [disabled]");
486 }
487
488 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
489 printf(" [enhanced]");
490
491 show_size(len);
492 putchar('\n');
493 }
494 }
495
496 static void
497 show_rom(struct device *d, int reg)
498 {
499 struct pci_dev *p = d->dev;
500 pciaddr_t rom = p->rom_base_addr;
501 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
502 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
503 u32 flg = get_conf_long(d, reg);
504 word cmd = get_conf_word(d, PCI_COMMAND);
505 int virtual = 0;
506
507 if (!rom && !flg && !len)
508 return;
509 putchar('\t');
510 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
511 printf("[enhanced] ");
512 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
513 {
514 printf("[virtual] ");
515 flg = rom;
516 virtual = 1;
517 }
518 printf("Expansion ROM at ");
519 if (rom & PCI_ROM_ADDRESS_MASK)
520 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
521 else if (flg & PCI_ROM_ADDRESS_MASK)
522 printf("<ignored>");
523 else
524 printf("<unassigned>");
525 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
526 printf(" [disabled]");
527 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
528 printf(" [disabled by cmd]");
529 show_size(len);
530 putchar('\n');
531 }
532
533 static void
534 show_htype0(struct device *d)
535 {
536 show_bases(d, 6);
537 show_rom(d, PCI_ROM_ADDRESS);
538 show_caps(d, PCI_CAPABILITY_LIST);
539 }
540
541 static void
542 show_htype1(struct device *d)
543 {
544 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
545 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
546 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
547 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
548 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
549 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
550 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
551 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
552 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
553 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
554 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
555
556 show_bases(d, 2);
557 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
558 get_conf_byte(d, PCI_PRIMARY_BUS),
559 get_conf_byte(d, PCI_SECONDARY_BUS),
560 get_conf_byte(d, PCI_SUBORDINATE_BUS),
561 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
562
563 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
564 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
565 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
566 else
567 {
568 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
569 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
570 if (io_type == PCI_IO_RANGE_TYPE_32)
571 {
572 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
573 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
574 }
575 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
576 }
577
578 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
579 mem_type)
580 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
581 else
582 {
583 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
584 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
585 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
586 }
587
588 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
589 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
590 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
591 else
592 {
593 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
594 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
595 if (pref_type == PCI_PREF_RANGE_TYPE_64)
596 {
597 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
598 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
599 }
600 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
601 }
602
603 if (verbose > 1)
604 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
605 FLAG(sec_stat, PCI_STATUS_66MHZ),
606 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
607 FLAG(sec_stat, PCI_STATUS_PARITY),
608 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
609 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
610 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
611 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
612 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
613 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
614 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
615 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
616
617 show_rom(d, PCI_ROM_ADDRESS1);
618
619 if (verbose > 1)
620 {
621 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
622 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
623 FLAG(brc, PCI_BRIDGE_CTL_SERR),
624 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
625 FLAG(brc, PCI_BRIDGE_CTL_VGA),
626 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
627 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
628 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
629 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
630 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
631 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
632 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
633 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
634 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
635 }
636
637 show_caps(d, PCI_CAPABILITY_LIST);
638 }
639
640 static void
641 show_htype2(struct device *d)
642 {
643 int i;
644 word cmd = get_conf_word(d, PCI_COMMAND);
645 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
646 word exca;
647 int verb = verbose > 2;
648
649 show_bases(d, 1);
650 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
651 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
652 get_conf_byte(d, PCI_CB_CARD_BUS),
653 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
654 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
655 for (i=0; i<2; i++)
656 {
657 int p = 8*i;
658 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
659 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
660 limit = limit + 0xfff;
661 if (base <= limit || verb)
662 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
663 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
664 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
665 }
666 for (i=0; i<2; i++)
667 {
668 int p = 8*i;
669 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
670 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
671 if (!(base & PCI_IO_RANGE_TYPE_32))
672 {
673 base &= 0xffff;
674 limit &= 0xffff;
675 }
676 base &= PCI_CB_IO_RANGE_MASK;
677 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
678 if (base <= limit || verb)
679 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
680 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
681 }
682
683 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
684 printf("\tSecondary status: SERR\n");
685 if (verbose > 1)
686 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
687 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
688 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
689 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
690 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
691 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
692 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
693 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
694 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
695
696 if (d->config_cached < 128)
697 {
698 printf("\t<access denied to the rest>\n");
699 return;
700 }
701
702 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
703 if (exca)
704 printf("\t16-bit legacy interface ports at %04x\n", exca);
705 show_caps(d, PCI_CB_CAPABILITY_LIST);
706 }
707
708 static void
709 show_verbose(struct device *d)
710 {
711 struct pci_dev *p = d->dev;
712 word status = get_conf_word(d, PCI_STATUS);
713 word cmd = get_conf_word(d, PCI_COMMAND);
714 word class = p->device_class;
715 byte bist = get_conf_byte(d, PCI_BIST);
716 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
717 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
718 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
719 byte max_lat, min_gnt;
720 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
721 unsigned int irq;
722 char *dt_node;
723
724 show_terse(d);
725
726 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
727 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
728 irq = p->irq;
729
730 switch (htype)
731 {
732 case PCI_HEADER_TYPE_NORMAL:
733 if (class == PCI_CLASS_BRIDGE_PCI)
734 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
735 max_lat = get_conf_byte(d, PCI_MAX_LAT);
736 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
737 break;
738 case PCI_HEADER_TYPE_BRIDGE:
739 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
740 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
741 min_gnt = max_lat = 0;
742 break;
743 case PCI_HEADER_TYPE_CARDBUS:
744 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
745 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
746 min_gnt = max_lat = 0;
747 break;
748 default:
749 printf("\t!!! Unknown header type %02x\n", htype);
750 return;
751 }
752
753 if (p->phy_slot)
754 printf("\tPhysical Slot: %s\n", p->phy_slot);
755
756 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
757 printf("\tDevice tree node: %s\n", dt_node);
758
759 if (verbose > 1)
760 {
761 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
762 FLAG(cmd, PCI_COMMAND_IO),
763 FLAG(cmd, PCI_COMMAND_MEMORY),
764 FLAG(cmd, PCI_COMMAND_MASTER),
765 FLAG(cmd, PCI_COMMAND_SPECIAL),
766 FLAG(cmd, PCI_COMMAND_INVALIDATE),
767 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
768 FLAG(cmd, PCI_COMMAND_PARITY),
769 FLAG(cmd, PCI_COMMAND_WAIT),
770 FLAG(cmd, PCI_COMMAND_SERR),
771 FLAG(cmd, PCI_COMMAND_FAST_BACK),
772 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
773 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
774 FLAG(status, PCI_STATUS_CAP_LIST),
775 FLAG(status, PCI_STATUS_66MHZ),
776 FLAG(status, PCI_STATUS_UDF),
777 FLAG(status, PCI_STATUS_FAST_BACK),
778 FLAG(status, PCI_STATUS_PARITY),
779 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
780 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
781 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
782 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
783 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
784 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
785 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
786 FLAG(status, PCI_STATUS_DETECTED_PARITY),
787 FLAG(status, PCI_STATUS_INTx));
788 if (cmd & PCI_COMMAND_MASTER)
789 {
790 printf("\tLatency: %d", latency);
791 if (min_gnt || max_lat)
792 {
793 printf(" (");
794 if (min_gnt)
795 printf("%dns min", min_gnt*250);
796 if (min_gnt && max_lat)
797 printf(", ");
798 if (max_lat)
799 printf("%dns max", max_lat*250);
800 putchar(')');
801 }
802 if (cache_line)
803 printf(", Cache Line Size: %d bytes", cache_line * 4);
804 putchar('\n');
805 }
806 if (int_pin || irq)
807 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
808 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
809 if (p->numa_node != -1)
810 printf("\tNUMA node: %d\n", p->numa_node);
811 }
812 else
813 {
814 printf("\tFlags: ");
815 if (cmd & PCI_COMMAND_MASTER)
816 printf("bus master, ");
817 if (cmd & PCI_COMMAND_VGA_PALETTE)
818 printf("VGA palette snoop, ");
819 if (cmd & PCI_COMMAND_WAIT)
820 printf("stepping, ");
821 if (cmd & PCI_COMMAND_FAST_BACK)
822 printf("fast Back2Back, ");
823 if (status & PCI_STATUS_66MHZ)
824 printf("66MHz, ");
825 if (status & PCI_STATUS_UDF)
826 printf("user-definable features, ");
827 printf("%s devsel",
828 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
829 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
830 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
831 if (cmd & PCI_COMMAND_MASTER)
832 printf(", latency %d", latency);
833 if (irq)
834 printf(", IRQ " PCIIRQ_FMT, irq);
835 if (p->numa_node != -1)
836 printf(", NUMA node %d", p->numa_node);
837 putchar('\n');
838 }
839
840 if (bist & PCI_BIST_CAPABLE)
841 {
842 if (bist & PCI_BIST_START)
843 printf("\tBIST is running\n");
844 else
845 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
846 }
847
848 switch (htype)
849 {
850 case PCI_HEADER_TYPE_NORMAL:
851 show_htype0(d);
852 break;
853 case PCI_HEADER_TYPE_BRIDGE:
854 show_htype1(d);
855 break;
856 case PCI_HEADER_TYPE_CARDBUS:
857 show_htype2(d);
858 break;
859 }
860 }
861
862 /*** Machine-readable dumps ***/
863
864 static void
865 show_hex_dump(struct device *d)
866 {
867 unsigned int i, cnt;
868
869 cnt = d->config_cached;
870 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
871 {
872 cnt = 256;
873 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
874 cnt = 4096;
875 }
876
877 for (i=0; i<cnt; i++)
878 {
879 if (! (i & 15))
880 printf("%02x:", i);
881 printf(" %02x", get_conf_byte(d, i));
882 if ((i & 15) == 15)
883 putchar('\n');
884 }
885 }
886
887 static void
888 print_shell_escaped(char *c)
889 {
890 printf(" \"");
891 while (*c)
892 {
893 if (*c == '"' || *c == '\\')
894 putchar('\\');
895 putchar(*c++);
896 }
897 putchar('"');
898 }
899
900 static void
901 show_machine(struct device *d)
902 {
903 struct pci_dev *p = d->dev;
904 int c;
905 word sv_id, sd_id;
906 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
907 char *dt_node;
908
909 get_subid(d, &sv_id, &sd_id);
910
911 if (verbose)
912 {
913 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
914 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
915 show_slot_name(d);
916 putchar('\n');
917 printf("Class:\t%s\n",
918 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
919 printf("Vendor:\t%s\n",
920 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
921 printf("Device:\t%s\n",
922 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
923 if (sv_id && sv_id != 0xffff)
924 {
925 printf("SVendor:\t%s\n",
926 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
927 printf("SDevice:\t%s\n",
928 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
929 }
930 if (p->phy_slot)
931 printf("PhySlot:\t%s\n", p->phy_slot);
932 if (c = get_conf_byte(d, PCI_REVISION_ID))
933 printf("Rev:\t%02x\n", c);
934 if (c = get_conf_byte(d, PCI_CLASS_PROG))
935 printf("ProgIf:\t%02x\n", c);
936 if (opt_kernel)
937 show_kernel_machine(d);
938 if (p->numa_node != -1)
939 printf("NUMANode:\t%d\n", p->numa_node);
940 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
941 printf("DTNode:\t%s\n", dt_node);
942 }
943 else
944 {
945 show_slot_name(d);
946 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
947 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
948 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
949 if (c = get_conf_byte(d, PCI_REVISION_ID))
950 printf(" -r%02x", c);
951 if (c = get_conf_byte(d, PCI_CLASS_PROG))
952 printf(" -p%02x", c);
953 if (sv_id && sv_id != 0xffff)
954 {
955 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
956 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
957 }
958 else
959 printf(" \"\" \"\"");
960 putchar('\n');
961 }
962 }
963
964 /*** Main show function ***/
965
966 void
967 show_device(struct device *d)
968 {
969 if (opt_machine)
970 show_machine(d);
971 else
972 {
973 if (verbose)
974 show_verbose(d);
975 else
976 show_terse(d);
977 if (opt_kernel || verbose)
978 show_kernel(d);
979 }
980 if (opt_hex)
981 show_hex_dump(d);
982 if (verbose || opt_hex)
983 putchar('\n');
984 }
985
986 static void
987 show(void)
988 {
989 struct device *d;
990
991 for (d=first_dev; d; d=d->next)
992 if (pci_filter_match(&filter, d->dev))
993 show_device(d);
994 }
995
996 /* Main */
997
998 int
999 main(int argc, char **argv)
1000 {
1001 int i;
1002 char *msg;
1003
1004 if (argc == 2 && !strcmp(argv[1], "--version"))
1005 {
1006 puts("lspci version " PCIUTILS_VERSION);
1007 return 0;
1008 }
1009
1010 pacc = pci_alloc();
1011 pacc->error = die;
1012 pci_filter_init(pacc, &filter);
1013
1014 while ((i = getopt(argc, argv, options)) != -1)
1015 switch (i)
1016 {
1017 case 'n':
1018 pacc->numeric_ids++;
1019 break;
1020 case 'v':
1021 verbose++;
1022 break;
1023 case 'b':
1024 pacc->buscentric = 1;
1025 break;
1026 case 's':
1027 if (msg = pci_filter_parse_slot(&filter, optarg))
1028 die("-s: %s", msg);
1029 opt_filter = 1;
1030 break;
1031 case 'd':
1032 if (msg = pci_filter_parse_id(&filter, optarg))
1033 die("-d: %s", msg);
1034 opt_filter = 1;
1035 break;
1036 case 'x':
1037 opt_hex++;
1038 break;
1039 case 'P':
1040 opt_path++;
1041 need_topology = 1;
1042 break;
1043 case 't':
1044 opt_tree++;
1045 need_topology = 1;
1046 break;
1047 case 'i':
1048 pci_set_name_list_path(pacc, optarg, 0);
1049 break;
1050 case 'm':
1051 opt_machine++;
1052 break;
1053 case 'p':
1054 opt_pcimap = optarg;
1055 break;
1056 #ifdef PCI_OS_LINUX
1057 case 'k':
1058 opt_kernel++;
1059 break;
1060 #endif
1061 case 'M':
1062 opt_map_mode++;
1063 break;
1064 case 'D':
1065 opt_domains = 2;
1066 break;
1067 #ifdef PCI_USE_DNS
1068 case 'q':
1069 opt_query_dns++;
1070 break;
1071 case 'Q':
1072 opt_query_all = 1;
1073 break;
1074 #else
1075 case 'q':
1076 case 'Q':
1077 die("DNS queries are not available in this version");
1078 #endif
1079 default:
1080 if (parse_generic_option(i, pacc, optarg))
1081 break;
1082 bad:
1083 fprintf(stderr, help_msg, pacc->id_file_name);
1084 return 1;
1085 }
1086 if (optind < argc)
1087 goto bad;
1088
1089 if (opt_query_dns)
1090 {
1091 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1092 if (opt_query_dns > 1)
1093 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1094 }
1095 if (opt_query_all)
1096 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1097
1098 pci_init(pacc);
1099 if (opt_map_mode)
1100 {
1101 if (need_topology)
1102 die("Bus mapping mode does not recognize bus topology");
1103 map_the_bus();
1104 }
1105 else
1106 {
1107 scan_devices();
1108 sort_them();
1109 if (need_topology)
1110 grow_tree();
1111 if (opt_tree)
1112 show_forest(opt_filter ? &filter : NULL);
1113 else
1114 show();
1115 }
1116 show_kernel_cleanup();
1117 pci_cleanup(pacc);
1118
1119 return (seen_errors ? 2 : 0);
1120 }