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rtc: ds3232/ds3231: Add support to generate 32KHz output for driver module
[thirdparty/u-boot.git] / drivers / rtc / ds3231.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2006
4 * Markus Klotzbuecher, mk@denx.de
5 *
6 * (C) Copyright 2019 NXP
7 * Chuanhua Han <chuanhua.han@nxp.com>
8 */
9
10 /*
11 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
12 * Extremly Accurate DS3231 Real Time Clock (RTC).
13 *
14 * copied from ds1337.c
15 */
16
17 #include <common.h>
18 #include <command.h>
19 #include <dm.h>
20 #include <rtc.h>
21 #include <i2c.h>
22
23 /*
24 * RTC register addresses
25 */
26 #define RTC_SEC_REG_ADDR 0x0
27 #define RTC_MIN_REG_ADDR 0x1
28 #define RTC_HR_REG_ADDR 0x2
29 #define RTC_DAY_REG_ADDR 0x3
30 #define RTC_DATE_REG_ADDR 0x4
31 #define RTC_MON_REG_ADDR 0x5
32 #define RTC_YR_REG_ADDR 0x6
33 #define RTC_CTL_REG_ADDR 0x0e
34 #define RTC_STAT_REG_ADDR 0x0f
35
36
37 /*
38 * RTC control register bits
39 */
40 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
41 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
42 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
43 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
44 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
45 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
46
47 /*
48 * RTC status register bits
49 */
50 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
51 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
52 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
53 #define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
54 #define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
55
56
57 #if !CONFIG_IS_ENABLED(DM_RTC)
58 static uchar rtc_read (uchar reg);
59 static void rtc_write (uchar reg, uchar val);
60
61
62 /*
63 * Get the current time from the RTC
64 */
65 int rtc_get (struct rtc_time *tmp)
66 {
67 int rel = 0;
68 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
69
70 control = rtc_read (RTC_CTL_REG_ADDR);
71 status = rtc_read (RTC_STAT_REG_ADDR);
72 sec = rtc_read (RTC_SEC_REG_ADDR);
73 min = rtc_read (RTC_MIN_REG_ADDR);
74 hour = rtc_read (RTC_HR_REG_ADDR);
75 wday = rtc_read (RTC_DAY_REG_ADDR);
76 mday = rtc_read (RTC_DATE_REG_ADDR);
77 mon_cent = rtc_read (RTC_MON_REG_ADDR);
78 year = rtc_read (RTC_YR_REG_ADDR);
79
80 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
81 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
82 year, mon_cent, mday, wday, hour, min, sec, control, status);
83
84 if (status & RTC_STAT_BIT_OSF) {
85 printf ("### Warning: RTC oscillator has stopped\n");
86 /* clear the OSF flag */
87 rtc_write (RTC_STAT_REG_ADDR,
88 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
89 rel = -1;
90 }
91
92 tmp->tm_sec = bcd2bin (sec & 0x7F);
93 tmp->tm_min = bcd2bin (min & 0x7F);
94 tmp->tm_hour = bcd2bin (hour & 0x3F);
95 tmp->tm_mday = bcd2bin (mday & 0x3F);
96 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
97 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
98 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
99 tmp->tm_yday = 0;
100 tmp->tm_isdst= 0;
101
102 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
103 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
104 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
105
106 return rel;
107 }
108
109
110 /*
111 * Set the RTC
112 */
113 int rtc_set (struct rtc_time *tmp)
114 {
115 uchar century;
116
117 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
118 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
119 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
120
121 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
122
123 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
124 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
125
126 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
127 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
128 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
129 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
130 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
131
132 return 0;
133 }
134
135
136 /*
137 * Reset the RTC. We also enable the oscillator output on the
138 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
139 * according to the datasheet, turning on the square wave output
140 * increases the current drain on the backup battery from about
141 * 600 nA to 2uA.
142 */
143 void rtc_reset (void)
144 {
145 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
146 }
147
148 /*
149 * Enable 32KHz output
150 */
151 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
152 void rtc_enable_32khz_output(void)
153 {
154 rtc_write(RTC_STAT_REG_ADDR,
155 RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
156 }
157 #endif
158
159 /*
160 * Helper functions
161 */
162
163 static
164 uchar rtc_read (uchar reg)
165 {
166 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
167 }
168
169
170 static void rtc_write (uchar reg, uchar val)
171 {
172 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
173 }
174 #else
175 static int ds3231_rtc_get(struct udevice *dev, struct rtc_time *tmp)
176 {
177 uchar sec, min, hour, mday, wday, mon_cent, year, status;
178
179 status = dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR);
180 sec = dm_i2c_reg_read(dev, RTC_SEC_REG_ADDR);
181 min = dm_i2c_reg_read(dev, RTC_MIN_REG_ADDR);
182 hour = dm_i2c_reg_read(dev, RTC_HR_REG_ADDR);
183 wday = dm_i2c_reg_read(dev, RTC_DAY_REG_ADDR);
184 mday = dm_i2c_reg_read(dev, RTC_DATE_REG_ADDR);
185 mon_cent = dm_i2c_reg_read(dev, RTC_MON_REG_ADDR);
186 year = dm_i2c_reg_read(dev, RTC_YR_REG_ADDR);
187
188 if (status & RTC_STAT_BIT_OSF) {
189 printf("### Warning: RTC oscillator has stopped\n");
190 /* clear the OSF flag */
191 dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
192 dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR)
193 & ~RTC_STAT_BIT_OSF);
194 return -EINVAL;
195 }
196
197 tmp->tm_sec = bcd2bin(sec & 0x7F);
198 tmp->tm_min = bcd2bin(min & 0x7F);
199 tmp->tm_hour = bcd2bin(hour & 0x3F);
200 tmp->tm_mday = bcd2bin(mday & 0x3F);
201 tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
202 tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
203 tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
204 tmp->tm_yday = 0;
205 tmp->tm_isdst = 0;
206
207 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
208 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
209 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
210
211 return 0;
212 }
213
214 static int ds3231_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
215 {
216 uchar century;
217
218 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
219 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
220 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
221
222 dm_i2c_reg_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
223
224 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
225 dm_i2c_reg_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
226
227 dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
228 dm_i2c_reg_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
229 dm_i2c_reg_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
230 dm_i2c_reg_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
231 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
232
233 return 0;
234 }
235
236 static int ds3231_rtc_reset(struct udevice *dev)
237 {
238 int ret;
239
240 ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
241 RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
242 if (ret < 0)
243 return ret;
244
245 return 0;
246 }
247
248 static int ds3231_probe(struct udevice *dev)
249 {
250 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
251 DM_I2C_CHIP_WR_ADDRESS);
252
253 return 0;
254 }
255
256 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
257 int rtc_enable_32khz_output(int busnum, int chip_addr)
258 {
259 int ret;
260 struct udevice *dev;
261
262 ret = i2c_get_chip_for_busnum(busnum, chip_addr, 1, &dev);
263 if (!ret)
264 ret = dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
265 RTC_STAT_BIT_BB32KHZ |
266 RTC_STAT_BIT_EN32KHZ);
267 return ret;
268 }
269 #endif
270
271 static const struct rtc_ops ds3231_rtc_ops = {
272 .get = ds3231_rtc_get,
273 .set = ds3231_rtc_set,
274 .reset = ds3231_rtc_reset,
275 };
276
277 static const struct udevice_id ds3231_rtc_ids[] = {
278 { .compatible = "dallas,ds3231" },
279 { .compatible = "dallas,ds3232" },
280 { }
281 };
282
283 U_BOOT_DRIVER(rtc_ds3231) = {
284 .name = "rtc-ds3231",
285 .id = UCLASS_RTC,
286 .probe = ds3231_probe,
287 .of_match = ds3231_rtc_ids,
288 .ops = &ds3231_rtc_ops,
289 };
290 #endif