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x86: correct MPX insn w/o base or index encoding in 16-bit mode
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a23b33b3
JB		 12020-03-06 Jan Beulich <jbeulich@suse.com>
2
3 * config/tc-i386.c (i386_addressing_mode): For 32-bit
4 addressing for MPX insns without base/index.
5 * testsuite/gas/i386/mpx-16bit.s,
6 * testsuite/gas/i386/mpx-16bit.d: New.
7 * testsuite/gas/i386/i386.exp: Run new test.
8
a0497384
JB		 92020-03-06 Jan Beulich <jbeulich@suse.com>
10
11 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
12 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
13 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
14 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
15 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
16 as well as a BSWAP one.
17 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
18 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
19 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
20 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
21 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
22 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
23 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
24 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
25 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
26 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
27 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
28 testsuite/gas/i386/vmx.d: Adjust expectations.
29
b630c145
JB		 302020-03-06 Jan Beulich <jbeulich@suse.com>
31
32 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
33 from having their operands swapped.
34 * testsuite/gas/i386/waitpkg.s,
35 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
36 3-operand cases as well as testing of 16-bit code generation.
37 * testsuite/gas/i386/waitpkg.d,
38 testsuite/gas/i386/waitpkg-intel.d,
39 testsuite/gas/i386/x86-64-waitpkg.d,
40 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
41
de48783e
NC		 422020-03-04 Nelson Chu <nelson.chu@sifive.com>
43
dee35d02
NC		 44 * config/tc-riscv.c (percent_op_utype): Support the modifier
45 %got_pcrel_hi.
46 * doc/c-riscv.texi: Add documentation.
47 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
48 modifier %got_pcrel_hi.
49 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
50 * testsuite/gas/riscv/relax-reloc.d: Likewise.
51 * testsuite/gas/riscv/relax-reloc.s: Likewise.
52
de48783e
NC		 53 * doc/c-riscv.texi (relocation modifiers): Add documentation.
54 (RISC-V-Formats): Update the section name from "Instruction Formats"
55 to "RISC-V Instruction Formats".
56
749479c8
AO		 572020-03-04 Alexandre Oliva <oliva@adacore.com>
58
59 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
60 detected in a section which does not have at least 4 byte
61 alignment.
62 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
63 * testsuite/gas/arm/ldr-t.s: Likewise.
64 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
65 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
66 disassembly, ignoring any NOPs that may have been inserted because
67 of section alignment.
68 * testsuite/gas/arm/ldr-t.d: Likewise.
69
a847e322
JB		 702020-03-04 Jan Beulich <jbeulich@suse.com>
71
72 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
73 * doc/c-i386.texi: Mention sev_es.
74 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
75 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
76 expectations.
77 * testsuite/gas/i386/arch-13-znver1.d,
78 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
79
3cd7f3e3
L		 802020-03-03 H.J. Lu <hongjiu.lu@intel.com>
81
82 * config/tc-i386.c (match_template): Replace ignoresize and
83 defaultsize with mnemonicsize.
84 (process_suffix): Likewise.
85
b8ba1385
SB		 862020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
87
88 PR 25627
89 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
90 instruction LD IY,(HL).
91 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
92 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
93 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
94 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
95
10d97a0f
L		 962020-03-03 H.J. Lu <hongjiu.lu@intel.com>
97
98 PR gas/25622
99 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
100 x86-64-default-suffix-avx.
101 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
102 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
103 * testsuite/gas/i386/noreg64.d: Updated.
104 * testsuite/gas/i386/noreg64.l: Likewise.
105 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
106 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
107 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
108
8326546e
SB		 1092020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
110
111 PR 25604
112 * config/tc-z80.c (contains_register): Prevent an illegal memory
113 access when checking an expression for a register name.
114
e3e896e6
AM		 1152020-03-03 Alan Modra <amodra@gmail.com>
116
117 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
118 support.
119
a4dd6c97
AM		 1202020-03-02 Alan Modra <amodra@gmail.com>
121
122 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
123 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
124 and .sbss sections.
125 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
126 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
127 (s3_s_score_lcomm): Likewise.
128 * config/tc-score7.c: Similarly.
129 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
130
dec7b24b
YS		 1312020-02-28 YunQiang Su <syq@debian.org>
132
133 PR gas/25539
134 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
135 to handle multi-labels.
136 (has_label_name): New.
137
cceb53b8
MM		 1382020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
139
140 * config/tc-arm.c (enum pred_instruction_type): Remove
141 NEUTRAL_IT_NO_VPT_INSN predication type.
142 (cxn_handle_predication): Modify to require condition suffixes.
143 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
144 * testsuite/gas/arm/cde-scalar.s: Update test.
145 * testsuite/gas/arm/cde-warnings.l: Update test.
146 * testsuite/gas/arm/cde-warnings.s: Update test.
147
da3ec71f
AM		 1482020-02-26 Alan Modra <amodra@gmail.com>
149
150 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
151 N_() on empty string.
152
42135cad
AM		 1532020-02-26 Alan Modra <amodra@gmail.com>
154
155 * read.c (read_a_source_file): Call strncpy with length one
156 less than size of original_case_string.
157
dc1e8a47
AM		 1582020-02-26 Alan Modra <amodra@gmail.com>
159
160 * config/obj-elf.c: Indent labels correctly.
161 * config/obj-macho.c: Likewise.
162 * config/tc-aarch64.c: Likewise.
163 * config/tc-alpha.c: Likewise.
164 * config/tc-arm.c: Likewise.
165 * config/tc-cr16.c: Likewise.
166 * config/tc-crx.c: Likewise.
167 * config/tc-frv.c: Likewise.
168 * config/tc-i386-intel.c: Likewise.
169 * config/tc-i386.c: Likewise.
170 * config/tc-ia64.c: Likewise.
171 * config/tc-mn10200.c: Likewise.
172 * config/tc-mn10300.c: Likewise.
173 * config/tc-nds32.c: Likewise.
174 * config/tc-riscv.c: Likewise.
175 * config/tc-s12z.c: Likewise.
176 * config/tc-xtensa.c: Likewise.
177 * config/tc-z80.c: Likewise.
178 * read.c: Likewise.
179 * symbols.c: Likewise.
180 * write.c: Likewise.
181
bd0cf5a6
NC		 1822020-02-20 Nelson Chu <nelson.chu@sifive.com>
183
54b2aec1
NC		 184 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
185 we are assembling instruction with CSR. Call riscv_csr_read_only_check
186 after parsing all arguments.
187 (enum csr_insn_type): New enum is used to classify the CSR instruction.
188 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
189 are used to check if we write a read-only CSR by the CSR instruction.
190 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
191 all CSR for the read-only CSR checking.
192 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
193 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
194 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
195 all CSR instructions for the read-only CSR checking.
196 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
197 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
198
2ca89224
NC		 199 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
200 (riscv_opts): Initialize it.
201 (reg_lookup_internal): Check the `riscv_opts.csr_check`
202 before doing the CSR checking.
203 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
204 (md_longopts): Add mcsr-check and mno-csr-check.
205 (md_parse_option): Handle new enum option values.
206 (s_riscv_option): Handle new long options.
207 * doc/c-riscv.texi: Add description for the new .option and assembler
208 options.
209 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
210 the CSR checking.
211 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
212
bd0cf5a6
NC		 213 * config/tc-riscv.c (csr_extra_hash): New.
214 (enum riscv_csr_class): New enum. Used to decide
215 whether or not this CSR is legal in the current ISA string.
216 (struct riscv_csr_extra): New structure to hold all extra information
217 of CSR.
218 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
219 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
220 Call hash_reg_name to insert CSR address into reg_names_hash.
221 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
222 Decide whether the CSR is valid according to the csr_extra_hash.
223 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
224 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
225 not a boolean. This is same as riscv_init_csr_hash, so keep the
226 consistent usage.
227 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
228 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
229 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
230 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
231 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
232 f-ext CSR are not allowed.
233 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
234 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
235 source file is `priv-reg.s`, and the ISA is rv64if, so the
236 rv32-only CSR are not allowed.
237 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
238
10a95fcc
AM		 2392020-02-21 Alan Modra <amodra@gmail.com>
240
241 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
242 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
243
dda2980f
AM		 2442020-02-21 Alan Modra <amodra@gmail.com>
245
246 PR 25569
247 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
248 on section size adjustment, instead perform another write if
249 exec header size is larger than section size.
250
bd3380bc
NC		 2512020-02-19 Nelson Chu <nelson.chu@sifive.com>
252
253 * doc/c-riscv.texi: Add the doc entries for -march-attr/
254 -mno-arch-attr command line options.
255
fa164239
JW		 2562020-02-19 Nelson Chu <nelson.chu@sifive.com>
257
258 * testsuite/gas/riscv/c-add-addi.d: New testcase.
259 * testsuite/gas/riscv/c-add-addi.s: Likewise.
260
fcaaac0a
SB		 2612020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
262
263 PR 25576
264 * config/tc-z80.c (md_parse_option): Do not use an underscore
265 prefix for local labels in SDCC compatability mode.
266 (z80_start_line_hook): Remove SDCC dollar label support.
267 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
268 * testsuite/gas/z80/sdcc.s: Likewise.
269
2702020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
271
272 PR 25517
273 * config/tc-z80.c: Add -march option.
274 * doc/as.texi: Update Z80 documentation.
275 * doc/c-z80.texi: Likewise.
276 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
277 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
278 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
279 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
280 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
281 * testsuite/gas/z80/gbz80_all.d: Likewise.
282 * testsuite/gas/z80/r800_extra.d: Likewise.
283 * testsuite/gas/z80/r800_ii8.d: Likewise.
284 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
285 * testsuite/gas/z80/sdcc.d: Likewise.
286 * testsuite/gas/z80/z180.d: Likewise.
287 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
288 * testsuite/gas/z80/z80_doc.d: Likewise.
289 * testsuite/gas/z80/z80_ii8.d: Likewise.
290 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
291 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
292 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
293 * testsuite/gas/z80/z80_sli.d: Likewise.
294 * testsuite/gas/z80/z80n_all.d: Likewise.
295 * testsuite/gas/z80/z80n_reloc.d: Likewise.
296
a7e12755
L		 2972020-02-19 H.J. Lu <hongjiu.lu@intel.com>
298
299 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
300 with GNU_PROPERTY_X86_FEATURE_2_MMX.
301 * testsuite/gas/i386/i386.exp: Run property-3 and
302 x86-64-property-3.
303 * testsuite/gas/i386/property-3.d: New file.
304 * testsuite/gas/i386/property-3.s: Likewise.
305 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
306
272a84b1
L		 3072020-02-17 H.J. Lu <hongjiu.lu@intel.com>
308
309 * config/tc-i386.c (cpu_arch): Add .popcnt.
310 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
311 Add a tab before @samp{.sse4a}.
312
c8f8eebc
JB		 3132020-02-17 Jan Beulich <jbeulich@suse.com>
314
315 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
316 for AddrPrefixOpReg templates. Combine the two pieces of
317 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
318 mode.
319
eedb0f2c
JB		 3202020-02-17 Jan Beulich <jbeulich@suse.com>
321
322 PR gas/14439
323 * config/tc-i386.c (md_assemble): Also suppress operand
324 swapping for MONITOR{,X} and MWAIT{,X}.
325 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
326 Add Intel syntax monitor/mwait tests.
327 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
328 Adjust expectations.
329 *testsuite/gas/i386/sse3-intel.d,
330 testsuite/gas/i386/x86-64-sse3-intel.d: New.
331 * testsuite/gas/i386/i386.exp: Run new tests.
332
b9915cbc
JB		 3332020-02-17 Jan Beulich <jbeulich@suse.com>
334
335 PR gas/6518
336 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
337 [XYZ]MMWord memory operand ambiguity recognition logic (largely
338 re-indentation).
339 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
340 cases.
341 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
342 * testsuite/gas/i386/avx512dq-inval.l,
343 testsuite/gas/i386/inval-avx.l,
344 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
345 * testsuite/gas/i386/avx512vl-ambig.s,
346 testsuite/gas/i386/avx512vl-ambig.l: New.
347 * testsuite/gas/i386/i386.exp: Run new test.
348
af5c13b0
L		 3492020-02-16 H.J. Lu <hongjiu.lu@intel.com>
350
351 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
352 nosse4.
353 * doc/c-i386.texi: Document sse4a and nosse4a.
354
07d98387
L		 3552020-02-14 H.J. Lu <hongjiu.lu@intel.com>
356
357 * doc/c-i386.texi: Remove the old movsx and movzx documentation
358 for AT&T syntax.
359
65fca059
JB		 3602020-02-14 Jan Beulich <jbeulich@suse.com>
361
362 PR gas/25438
363 * config/tc-i386.c (md_assemble): Move movsx/movzx special
364 casing ...
365 (process_suffix): ... here. Consider just the first operand
366 initially.
367 (check_long_reg): Drop opcode 0x63 special case again.
368 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
369 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
370 Move ambiguous operand size tests ...
371 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
372 testsuite/gas/i386/noreg64.s: ... here.
373 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
374 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
375 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
376 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
377 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
378 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
379 testsuite/gas/i386/x86-64-movsxd.d,
380 testsuite/gas/i386/x86-64-movsxd-intel.d,
381 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
382 Adjust expectations.
383 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
384 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
385 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
386 * testsuite/gas/i386/i386.exp: Run new tests.
387
b6773884
JB		 3882020-02-14 Jan Beulich <jbeulich@suse.com>
389
390 * config/tc-i386.c (process_operands): Also skip segment
391 override prefix emission if it matches an already present one.
392 * testsuite/gas/i386/prefix32.s: Add double segment override
393 cases.
394 * testsuite/gas/i386/prefix32.l: Adjust expectations.
395
92334ad2
JB		 3962020-02-14 Jan Beulich <jbeulich@suse.com>
397
398 * config/tc-i386.c (process_operands): Drop ineffectual segment
399 overrides when optimizing.
400 * testsuite/gas/i386/lea-optimize.d: New.
401 * testsuite/gas/i386/i386.exp: Run new test.
402
4032020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 404
405 * config/tc-i386.c (process_operands): Also check insn prefix
406 for ineffectual segment override warning. Don't cover possible
407 VEX/EVEX encoded insns there.
408 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
409 testsuite/gas/i386/lea.e: New.
410 * testsuite/gas/i386/i386.exp: Run new test.
411
0e6724de
L		 4122020-02-14 H.J. Lu <hongjiu.lu@intel.com>
413
414 PR gas/25438
415 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
416 syntax.
417
292676c1
L		 4182020-02-13 Fangrui Song <maskray@google.com>
419 H.J. Lu <hongjiu.lu@intel.com>
420
421 PR gas/25551
422 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
423 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
424 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
425 * testsuite/gas/i386/relax-5.d: New file.
426 * testsuite/gas/i386/relax-5.s: Likewise.
427 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
428 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
429
7deea9aa
JB		 4302020-02-13 Jan Beulich <jbeulich@suse.com>
431
432 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
433 "nosse4" entry.
434
6c0946d0
JB		 4352020-02-12 Jan Beulich <jbeulich@suse.com>
436
437 * config/tc-i386.c (avx512): New (at file scope), moved from
438 (check_VecOperands): ... here.
439 (process_suffix): Add [XYZ]MMword operand size handling.
440 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
441 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
442 tests.
443 * testsuite/gas/i386/avx512dq-inval.l,
444 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
445
5990e377
JB		 4462020-02-12 Jan Beulich <jbeulich@suse.com>
447
448 PR gas/24546
449 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
450 code only.
451 * config/tc-i386-intel.c (i386_intel_operand): Also handle
452 CALL/JMP in O_tbyte_ptr case.
453 * doc/c-i386.texi: Mention far call and full pointer load ISA
454 differences.
455 * testsuite/gas/i386/x86-64-branch-3.s,
456 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
457 * testsuite/gas/i386/x86-64-branch-3.d,
458 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
459 * testsuite/gas/i386/x86-64-branch-5.l,
460 testsuite/gas/i386/x86-64-branch-5.s: New.
461 * testsuite/gas/i386/i386.exp: Run new test.
462
9706160a
JB		 4632020-02-12 Jan Beulich <jbeulich@suse.com>
464
465 PR gas/25438
466 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
467 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
468 64-bit-only warning.
469 (check_word_reg): Consistently error on mismatching register
470 size and suffix.
471 * testsuite/gas/i386/general.s: Replace dword GPR with word one
472 for movw. Replace suffix / GPR for orb.
473 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
474 byte GPRs as well as ones for inb/outb with a word accumulator.
475 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
476 testsuite/gas/i386/inval.l: Adjust expectations.
477
5de4d9ef
JB		 4782020-02-12 Jan Beulich <jbeulich@suse.com>
479
480 * config/tc-i386.c (operand_type_register_match): Also fall
481 through initial two if()-s when the template allows for a GPR
482 operand. Adjust comment.
483
50128d0c
JB		 4842020-02-11 Jan Beulich <jbeulich@suse.com>
485
486 (struct _i386_insn): New field "short_form".
487 (optimize_encoding): Drop setting of shortform field.
488 (process_suffix): Set i.short_form. Replace shortform use.
489 (process_operands): Replace shortform use.
490
1ed818b4
MM		 4912020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
492
493 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
494 loop initial declaration.
495
5aae9ae9
MM		 4962020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
497
498 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
499 instructions that can have 5 arguments.
500 (enum operand_parse_code): Add new operands.
501 (parse_operands): Account for new operands.
502 (S5): New macro.
503 (enum neon_shape_el): Introduce P suffixes for coprocessor.
504 (neon_select_shape): Account for P suffix.
505 (LOW1): Move macro to global position.
506 (HI4): Move macro to global position.
507 (vcx_assign_vec_d): New.
508 (vcx_assign_vec_m): New.
509 (vcx_assign_vec_n): New.
510 (enum vcx_reg_type): New.
511 (vcx_get_reg_type): New.
512 (vcx_size_pos): New.
513 (vcx_vec_pos): New.
514 (vcx_handle_shape): New.
515 (vcx_ensure_register_in_range): New.
516 (vcx_handle_register_arguments): New.
517 (vcx_handle_insn_block): New.
518 (vcx_handle_common_checks): New.
519 (do_vcx1): New.
520 (do_vcx2): New.
521 (do_vcx3): New.
522 * testsuite/gas/arm/cde-missing-fp.d: New test.
523 * testsuite/gas/arm/cde-missing-fp.l: New test.
524 * testsuite/gas/arm/cde-missing-mve.d: New test.
525 * testsuite/gas/arm/cde-missing-mve.l: New test.
526 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
527 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
528 * testsuite/gas/arm/cde-mve.s: New test.
529 * testsuite/gas/arm/cde-warnings.l:
530 * testsuite/gas/arm/cde-warnings.s:
531 * testsuite/gas/arm/cde.d:
532 * testsuite/gas/arm/cde.s:
533
4934a27c
MM		 5342020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
535 Matthew Malcomson <matthew.malcomson@arm.com>
536
537 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
538 CDE coprocessor that can be enabled.
539 (enum pred_instruction_type): New pred type.
540 (BAD_NO_VPT): New error message.
541 (BAD_CDE): New error message.
542 (BAD_CDE_COPROC): New error message.
543 (enum operand_parse_code): Add new immediate operands.
544 (parse_operands): Account for new immediate operands.
545 (check_cde_operand): New.
546 (cde_coproc_enabled): New.
547 (cde_coproc_pos): New.
548 (cde_handle_coproc): New.
549 (cxn_handle_predication): New.
550 (do_custom_instruction_1): New.
551 (do_custom_instruction_2): New.
552 (do_custom_instruction_3): New.
553 (do_cx1): New.
554 (do_cx1a): New.
555 (do_cx1d): New.
556 (do_cx1da): New.
557 (do_cx2): New.
558 (do_cx2a): New.
559 (do_cx2d): New.
560 (do_cx2da): New.
561 (do_cx3): New.
562 (do_cx3a): New.
563 (do_cx3d): New.
564 (do_cx3da): New.
565 (handle_pred_state): Define new IT block behaviour.
566 (insns): Add newn CX*{,d}{,a} instructions.
567 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
568 Define new cdecp extension strings.
569 * doc/c-arm.texi: Document new cdecp extension arguments.
570 * testsuite/gas/arm/cde-scalar.d: New test.
571 * testsuite/gas/arm/cde-scalar.s: New test.
572 * testsuite/gas/arm/cde-warnings.d: New test.
573 * testsuite/gas/arm/cde-warnings.l: New test.
574 * testsuite/gas/arm/cde-warnings.s: New test.
575 * testsuite/gas/arm/cde.d: New test.
576 * testsuite/gas/arm/cde.s: New test.
577
4b5aaf5f
L		 5782020-02-10 H.J. Lu <hongjiu.lu@intel.com>
579
580 PR gas/25516
581 * config/tc-i386.c (intel64): Renamed to ...
582 (isa64): This.
583 (match_template): Accept Intel64 only instruction by default.
584 (i386_displacement): Updated.
585 (md_parse_option): Updated.
586 * c-i386.texi: Update -mamd64/-mintel64 documentation.
587 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
588 -mamd64 to x86-64-sysenter-amd.
589 * testsuite/gas/i386/x86-64-sysenter.d: New file.
590
33176d91
AM		 5912020-02-10 Alan Modra <amodra@gmail.com>
592
593 * config/obj-elf.c (obj_elf_change_section): Error for section
594 type, attr or entsize changes in assembly.
595 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
596 * testsuite/gas/elf/section5.l: Update.
597
82194874
AM		 5982020-02-10 Alan Modra <amodra@gmail.com>
599
600 * output-file.c (output_file_close): Do a normal close when
601 flag_always_generate_output.
602 * write.c (write_object_file): Don't stop output when
603 flag_always_generate_output.
604
9fc0b501
SB		 6052020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
606
607 PR 25469
608 * config/tc-z80.c: Add -gbz80 command line option to generate code
609 for the GameBoy Z80. Add support for generating DWARF.
610 * config/tc-z80.h: Add support for DWARF debug information
611 generation.
612 * doc/c-z80.texi: Document new command line option.
613 * testsuite/gas/z80/gbz80_all.d: New file.
614 * testsuite/gas/z80/gbz80_all.s: New file.
615 * testsuite/gas/z80/z80.exp: Run the new tests.
616 * testsuite/gas/z80/z80n_all.d: New file.
617 * testsuite/gas/z80/z80n_all.s: New file.
618 * testsuite/gas/z80/z80n_reloc.d: New file.
619
b7d07216
L		 6202020-02-06 H.J. Lu <hongjiu.lu@intel.com>
621
622 PR gas/25381
623 * config/obj-elf.c (get_section): Also check
624 linked_to_symbol_name.
625 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
626 (obj_elf_parse_section_letters): Handle the 'o' flag.
627 (build_group_lists): Renamed to ...
628 (build_additional_section_info): This. Set elf_linked_to_section
629 from map_head.linked_to_symbol_name.
630 (elf_adjust_symtab): Updated.
631 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
632 * doc/as.texi: Document the 'o' flag.
633 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
634 * testsuite/gas/elf/section18.d: New file.
635 * testsuite/gas/elf/section18.s: Likewise.
636 * testsuite/gas/elf/section19.d: Likewise.
637 * testsuite/gas/elf/section19.s: Likewise.
638 * testsuite/gas/elf/section20.d: Likewise.
639 * testsuite/gas/elf/section20.s: Likewise.
640 * testsuite/gas/elf/section21.d: Likewise.
641 * testsuite/gas/elf/section21.l: Likewise.
642 * testsuite/gas/elf/section21.s: Likewise.
643
5eb617a7
L		 6442020-02-06 H.J. Lu <hongjiu.lu@intel.com>
645
646 * NEWS: Mention x86 assembler options to align branches for
647 binutils 2.34.
648
986ac314
L		 6492020-02-06 H.J. Lu <hongjiu.lu@intel.com>
650
651 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
652 only for ELF targets.
653 * testsuite/gas/i386/unique.d: Don't xfail.
654 * testsuite/gas/i386/x86-64-unique.d: Likewise.
655
19234a6d
AM		 6562020-02-06 Alan Modra <amodra@gmail.com>
657
658 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
659 * testsuite/gas/i386/x86-64-unique.d: Likewise.
660
02e0be69
AM		 6612020-02-06 Alan Modra <amodra@gmail.com>
662
663 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
664 xfail, and rename test.
665 * testsuite/gas/elf/section12b.d: Likewise.
666 * testsuite/gas/elf/section16a.d: Likewise.
667 * testsuite/gas/elf/section16b.d: Likewise.
668
a8c4d40b
L		 6692020-02-02 H.J. Lu <hongjiu.lu@intel.com>
670
671 PR gas/25380
672 * config/obj-elf.c (section_match): Removed.
673 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
674 section_id.
675 (obj_elf_change_section): Replace info and group_name arguments
676 with match_p. Also update the section ID and flags from match_p.
677 (obj_elf_section): Handle "unique,N". Update call to
678 obj_elf_change_section.
679 * config/obj-elf.h (elf_section_match): New.
680 (obj_elf_change_section): Updated.
681 * config/tc-arm.c (start_unwind_section): Update call to
682 obj_elf_change_section.
683 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
684 * config/tc-microblaze.c (microblaze_s_data): Likewise.
685 (microblaze_s_sdata): Likewise.
686 (microblaze_s_rdata): Likewise.
687 (microblaze_s_bss): Likewise.
688 * config/tc-mips.c (s_change_section): Likewise.
689 * config/tc-msp430.c (msp430_profiler): Likewise.
690 * config/tc-rx.c (parse_rx_section): Likewise.
691 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
692 * doc/as.texi: Document "unique,N" in .section directive.
693 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
694 * testsuite/gas/elf/section15.d: New file.
695 * testsuite/gas/elf/section15.s: Likewise.
696 * testsuite/gas/elf/section16.s: Likewise.
697 * testsuite/gas/elf/section16a.d: Likewise.
698 * testsuite/gas/elf/section16b.d: Likewise.
699 * testsuite/gas/elf/section17.d: Likewise.
700 * testsuite/gas/elf/section17.l: Likewise.
701 * testsuite/gas/elf/section17.s: Likewise.
702 * testsuite/gas/i386/unique.d: Likewise.
703 * testsuite/gas/i386/unique.s: Likewise.
704 * testsuite/gas/i386/x86-64-unique.d: Likewise.
705 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
706
575d37ae
L		 7072020-02-02 H.J. Lu <hongjiu.lu@intel.com>
708
709 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
710
2384096c
G		 7112020-02-01 Anthony Green <green@moxielogic.com>
712
713 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
714
95441c43
SL		 7152020-01-31 Sandra Loosemore <sandra@codesourcery.com>
716
717 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
718 %tls_ldo.
719
d465d695
AV		 7202020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
721
722 PR gas/25472
723 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
724 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
725 +mve.
726 * testsuite/gas/arm/mve_dsp.d: New test.
727
d26cc8a9
NC		 7282020-01-31 Nick Clifton <nickc@redhat.com>
729
730 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
731 rather than BFD_RELOC_NONE.
732
90e9955a
SP		 7332020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
734
735 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
736 to support VLDMIA instruction for MVE.
737 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
738 instruction for MVE.
739 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
740 instruction for MVE.
741 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
742 instruction for MVE.
743 * testsuite/gas/arm/mve-ldst.d: New test.
744 * testsuite/gas/arm/mve-ldst.s: Likewise.
745
53943f32
NC		 7462020-01-31 Nick Clifton <nickc@redhat.com>
747
748 * po/fr.po: Updated French translation.
749 * po/ru.po: Updated Russian translation.
750
c3036ed0
RS		 7512020-01-31 Richard Sandiford <richard.sandiford@arm.com>
752
753 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
754 .s for the movprfx.
755 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
756 * testsuite/gas/aarch64/sve-movprfx_28.d,
757 * testsuite/gas/aarch64/sve-movprfx_28.l,
758 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
759
2ae4c703
JB		 7602020-01-30 Jan Beulich <jbeulich@suse.com>
761
762 * config/tc-i386.c (output_disp): Tighten base_opcode check.
763 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
764 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
765 Adjust expectations.
766
bd434cc4
JM		 7672020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
768
769 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
770 * testsuite/gas/bpf/alu-be.d: Likewise.
771 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
772 * testsuite/gas/bpf/alu32-be.d: Likewise.
773
aeab2b26
JB		 7742020-01-30 Jan Beulich <jbeulich@suse.com>
775
776 * testsuite/gas/i386/x86-64-branch-2.s,
777 testsuite/gas/i386/x86-64-branch-4.s,
778 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
779 * testsuite/gas/i386/ilp32/x86-64-branch.d,
780 testsuite/gas/i386/x86-64-branch-2.d,
781 testsuite/gas/i386/x86-64-branch-4.l,
782 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
783
873494c8
JB		 7842020-01-30 Jan Beulich <jbeulich@suse.com>
785
786 * config/tc-i386.c (process_suffix): .
787 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
788 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
789 Add LRETQ case.
790 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
791 suffix.
792 testsuite/gas/i386/x86_64.s: Add RETF cases.
793 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
794 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
795 testsuite/gas/i386/x86-64-opcode.d,
796 testsuite/gas/i386/x86-64-suffix-intel.d,
797 testsuite/gas/i386/x86-64-suffix.d,
798 testsuite/gas/i386/x86_64-intel.d
799 testsuite/gas/i386/x86_64.d: Adjust expectations.
800 * testsuite/gas/i386/x86-64-suffix.e,
801 testsuite/gas/i386/x86_64.e: New.
802
62b3f548
JB		 8032020-01-30 Jan Beulich <jbeulich@suse.com>
804
805 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
806 special case.
807
bc31405e
L		 8082020-01-27 H.J. Lu <hongjiu.lu@intel.com>
809
810 PR binutils/25445
811 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
812 movsxd.
813 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
814 differences. Document movslq and movsxd.
815 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
816 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
817 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
818 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
819 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
820 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
821 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
822 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
823 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
824 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
825 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
826
e3696f67
AM		 8272020-01-27 Alan Modra <amodra@gmail.com>
828
829 * testsuite/gas/all/gas.exp: Replace case statements with switch
830 statements.
831 * testsuite/gas/elf/elf.exp: Likewise.
832 * testsuite/gas/macros/macros.exp: Likewise.
833 * testsuite/lib/gas-defs.exp: Likewise.
834
7568c93b
TC		 8352020-01-27 Tamar Christina <tamar.christina@arm.com>
836
837 PR 25403
838 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
839 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
840
403d1bd9
JW		 8412020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
842
843 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
844 s exts must be known, so rename *ok* to *fail*.
845 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
846 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
847 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
848 above change.
849 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
850 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
851
be4c5e58
L		 8522020-01-22 H.J. Lu <hongjiu.lu@intel.com>
853
854 PR gas/25438
855 * config/tc-i386.c (check_long_reg): Always disallow double word
856 suffix in mnemonic with word general register.
857 * testsuite/gas/i386/general.s: Replace word general register
858 with double word general register for movl.
859 * testsuite/gas/i386/inval.s: Add tests for movl with word general
860 register.
861 * testsuite/gas/i386/general.l: Updated.
862 * testsuite/gas/i386/inval.l: Likewise.
863
9e7028aa
AM		 8642020-01-22 Alan Modra <amodra@gmail.com>
865
866 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
867 __tls_get_addr_desc and __tls_get_addr_opt.
868
e3ed17f3
JB		 8692020-01-21 Jan Beulich <jbeulich@suse.com>
870
871 * testsuite/gas/i386/inval-crc32.s,
872 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
873 * testsuite/gas/i386/inval-crc32.l,
874 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
875
1a035124
JB		 8762020-01-21 Jan Beulich <jbeulich@suse.com>
877
878 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
879 generic code path. Deal with No_lSuf being set in a template.
880 * testsuite/gas/i386/inval-crc32.l,
881 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
882 instead of error(s) when operand size is ambiguous.
883 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
884 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
885 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
886 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
887 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
888 Adjust expectations.
889
c006a730
JB		 8902020-01-21 Jan Beulich <jbeulich@suse.com>
891
892 * config/tc-i386.c (process_suffix): Drop SYSRET special case
893 and an intel_syntax check. Re-write lack-of-suffix processing
894 logic.
895 * doc/c-i386.texi: Document operand size defaults for suffix-
896 less AT&T syntax insns.
897 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
898 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
899 testsuite/gas/i386/x86-64-avx-scalar.s,
900 testsuite/gas/i386/x86-64-avx.s,
901 testsuite/gas/i386/x86-64-bundle.s,
902 testsuite/gas/i386/x86-64-intel64.s,
903 testsuite/gas/i386/x86-64-lock-1.s,
904 testsuite/gas/i386/x86-64-opcode.s,
905 testsuite/gas/i386/x86-64-sse2avx.s,
906 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
907 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
908 testsuite/gas/i386/x86-64-nops.s,
909 testsuite/gas/i386/x86-64-ptwrite.s,
910 testsuite/gas/i386/x86-64-simd.s,
911 testsuite/gas/i386/x86-64-sse-noavx.s,
912 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
913 insns.
914 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
915 testsuite/gas/i386/noreg64.s: Add further tests.
916 * testsuite/gas/i386/ilp32/x86-64-nops.d,
917 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
918 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
919 testsuite/gas/i386/sse-noavx.d,
920 testsuite/gas/i386/x86-64-intel64.d,
921 testsuite/gas/i386/x86-64-nops.d,
922 testsuite/gas/i386/x86-64-opcode.d,
923 testsuite/gas/i386/x86-64-ptwrite-intel.d,
924 testsuite/gas/i386/x86-64-ptwrite.d,
925 testsuite/gas/i386/x86-64-simd-intel.d,
926 testsuite/gas/i386/x86-64-simd-suffix.d,
927 testsuite/gas/i386/x86-64-simd.d,
928 testsuite/gas/i386/x86-64-sse-noavx.d
929 testsuite/gas/i386/x86-64-suffix.d,
930 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
931 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
932 testsuite/gas/i386/noreg64.l: New.
933 * testsuite/gas/i386/i386.exp: Run new tests.
934
c906a69a
JB		 9352020-01-21 Jan Beulich <jbeulich@suse.com>
936
937 * testsuite/gas/i386/avx512_bf16_vl.s,
938 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
939 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
940 broadcast forms of VCVTNEPS2BF16.
941 * testsuite/gas/i386/avx512_bf16_vl.d,
942 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
943
26916852
NC		 9442020-01-20 Nick Clifton <nickc@redhat.com>
945
946 * po/uk.po: Updated Ukranian translation.
947
14470f07
L		 9482020-01-20 H.J. Lu <hongjiu.lu@intel.com>
949
950 PR ld/25416
951 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
952 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
953 x32 object.
954 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
955 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
956 R_X86_64_GOTPC32_TLSDESC relocation.
957
1b1bb2c6
NC		 9582020-01-18 Nick Clifton <nickc@redhat.com>
959
960 * configure: Regenerate.
961 * po/gas.pot: Regenerate.
962
ae774686
NC		 9632020-01-18 Nick Clifton <nickc@redhat.com>
964
965 Binutils 2.34 branch created.
966
42e04b36
L		 9672020-01-17 H.J. Lu <hongjiu.lu@intel.com>
968
969 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
970 with vex_encoding_vex.
971 (parse_insn): Likewise.
972 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
973 and {vex3} documentation.
974 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
975 {vex}.
976 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
977
2da2eaf4
AV		 9782020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
979
980 PR 25376
981 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
982 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
983 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
984 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
985 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
986 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
987
45a4bb20
JB		 9882020-01-16 Jan Beulich <jbeulich@suse.com>
989
990 * config/tc-i386.c (match_template): Drop found_cpu_match local
991 variable.
992
4814632e
JB		 9932020-01-16 Jan Beulich <jbeulich@suse.com>
994
995 * testsuite/gas/i386/avx512dq-inval.l,
996 testsuite/gas/i386/avx512dq-inval.s: New.
997 * testsuite/gas/i386/i386.exp: Run new test.
998
131cb553
JL		 9992020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1000
1001 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1002 relocations when the target is 430X, except when extracting part of an
1003 expression.
1004 (msp430_srcoperand): Adjust comment.
1005 Initialize the expp member of the msp430_operand_s struct as
1006 appropriate.
1007 (msp430_dstoperand): Likewise.
1008 * testsuite/gas/msp430/msp430.exp: Run new test.
1009 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1010 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1011
c24d0e8d
AM		 10122020-01-15 Alan Modra <amodra@gmail.com>
1013
1014 * configure.tgt: Add sparc-*-freebsd case.
1015
e44925ae
LC		 10162020-01-14 Lili Cui <lili.cui@intel.com>
1017
1018 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1019 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1020 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1021 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1022 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1023 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1024 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1025 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1026 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1027 * testsuite/gas/i386/align-branch-5.d: Likewise.
1028 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1029 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1030 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1031 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1032 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1033 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1034 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1035 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1036 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1037 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1038 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1039 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1040
7a6bf3be
SB		 10412020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1042
1043 PR 25377
1044 * config/tc-z80.c: Add support for half precision, single
1045 precision and double precision floating point values.
1046 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1047 * doc/as.texi: Add new z80 command line options.
1048 * doc/c-z80.texi: Document new z80 command line options.
1049 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1050 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1051 * testsuite/gas/z80/z80.exp: Run the new test.
1052 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1053 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1054 * testsuite/gas/z80/strings.d: Update expected output.
1055
82e9597c
MM		 10562020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1057
1058 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1059 dependency.
1060
5e4f7e05
CZ		 10612020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1062
1063 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1064 the CPU.
1065 * config/tc-arc.h: Add header if/defs.
1066 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1067
febda64f
AM		 10682020-01-13 Alan Modra <amodra@gmail.com>
1069
1070 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1071
5496abe1
AM		 10722020-01-13 Alan Modra <amodra@gmail.com>
1073
1074 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1075 insertion.
1076
ec4181f2
AM		 10772020-01-10 Alan Modra <amodra@gmail.com>
1078
1079 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1080 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1081
40c75bc8
SB		 10822020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1083
1084 PR 25224
1085 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1086 opcode byte values.
1087 (emit_ld_r_r): Likewise.
1088 (emit_ld_rr_m): Likewise.
1089 (emit_ld_rr_nn): Likewise.
1090
72aea328
JB		 10912020-01-09 Jan Beulich <jbeulich@suse.com>
1092
1093 * config/tc-i386.c (optimize_encoding): Add
1094 is_any_vex_encoding() invocations. Drop respective
1095 i.tm.extension_opcode == None checks.
1096
3f93af61
JB		 10972020-01-09 Jan Beulich <jbeulich@suse.com>
1098
1099 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1100 REX transformations. Correct comment indentation.
1101
7697afb6
JB		 11022020-01-09 Jan Beulich <jbeulich@suse.com>
1103
1104 * config/tc-i386.c (optimize_encoding): Generalize register
1105 transformation for TEST optimization.
1106
d835a58b
JB		 11072020-01-09 Jan Beulich <jbeulich@suse.com>
1108
1109 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1110 testsuite/gas/i386/x86-64-sysenter-amd.d,
1111 testsuite/gas/i386/x86-64-sysenter-amd.l,
1112 testsuite/gas/i386/x86-64-sysenter-intel.d,
1113 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1114 * testsuite/gas/i386/i386.exp: Run new tests.
1115
915808f6
NC		 11162020-01-08 Nick Clifton <nickc@redhat.com>
1117
1118 PR 25284
1119 * doc/as.texi (Align): Document the fact that all arguments can be
1120 omitted.
1121 (Balign): Likewise.
1122 (P2align): Likewise.
1123
f1f28025
NC		 11242020-01-08 Nick Clifton <nickc@redhat.com>
1125
1126 PR 14891
1127 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1128 already defined as a different symbol type.
1129 * testsuite/gas/elf/pr14891.s: New test source file.
1130 * testsuite/gas/elf/pr14891.d: New test driver.
1131 * testsuite/gas/elf/pr14891.s: New test expected error output.
1132 * testsuite/gas/elf/elf.exp: Run the new test.
1133
030a2e78
AM		 11342020-01-08 Alan Modra <amodra@gmail.com>
1135
1136 * config/tc-z8k.c (md_begin): Make idx unsigned.
1137 (get_specific): Likewise for this_index.
1138
2a1ebfb2
CZ		 11392020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1140
1141 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1142 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1143 (md_operand): Set X_md to absent.
1144 (arc_parse_name): Check for X_md.
1145
16d87673
SB		 11462020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1147
1148 PR 25311
1149 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1150 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1151 NO_STRING_ESCAPES.
1152 * read.c (next_char_of_string): Likewise.
1153 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1154 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1155
a2322019
NC		 11562020-01-03 Nick Clifton <nickc@redhat.com>
1157
1158 * po/sv.po: Updated Swedish translation.
1159
5437a02a
JB		 11602020-01-03 Jan Beulich <jbeulich@suse.com>
1161
1162 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1163 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1164
567dfba2
JB		 11652020-01-03 Jan Beulich <jbeulich@suse.com>
1166
1167 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1168 by-element usdot. Add 64-bit form tests for by-element sudot.
1169 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1170
8c45011a
JB		 11712020-01-03 Jan Beulich <jbeulich@suse.com>
1172
1173 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1174 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1175
f4950f76
JB		 11762020-01-03 Jan Beulich <jbeulich@suse.com>
1177
1178 * testsuite/gas/aarch64/f64mm.d,
1179 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1180
6655dba2
SB		 11812020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1182
1183 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1184 support for assembler code generated by SDCC. Add new relocation
1185 types. Add z80-elf target support.
1186 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1187 labels. Local labels starts from ".L".
1188 * NEWS: Mention the new support.
1189 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1190 * testsuite/gas/all/fwdexp.s: Likewise.
1191 * testsuite/gas/all/cond.l: Likewise.
1192 * testsuite/gas/all/cond.s: Likewise.
1193 * testsuite/gas/all/fwdexp.d: Likewise.
1194 * testsuite/gas/all/fwdexp.s: Likewise.
1195 * testsuite/gas/elf/section2.e-mips: Likewise.
1196 * testsuite/gas/elf/section2.l: Likewise.
1197 * testsuite/gas/elf/section2.s: Likewise.
1198 * testsuite/gas/macros/app1.d: Likewise.
1199 * testsuite/gas/macros/app1.s: Likewise.
1200 * testsuite/gas/macros/app2.d: Likewise.
1201 * testsuite/gas/macros/app2.s: Likewise.
1202 * testsuite/gas/macros/app3.d: Likewise.
1203 * testsuite/gas/macros/app3.s: Likewise.
1204 * testsuite/gas/macros/app4.d: Likewise.
1205 * testsuite/gas/macros/app4.s: Likewise.
1206 * testsuite/gas/macros/app4b.s: Likewise.
1207 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1208 * testsuite/gas/z80/z80.exp: Add new tests
1209 * testsuite/gas/z80/dollar.d: New file.
1210 * testsuite/gas/z80/dollar.s: New file.
1211 * testsuite/gas/z80/ez80_adl_all.d: New file.
1212 * testsuite/gas/z80/ez80_adl_all.s: New file.
1213 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1214 * testsuite/gas/z80/ez80_isuf.s: New file.
1215 * testsuite/gas/z80/ez80_z80_all.d: New file.
1216 * testsuite/gas/z80/ez80_z80_all.s: New file.
1217 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1218 * testsuite/gas/z80/r800_extra.d: New file.
1219 * testsuite/gas/z80/r800_extra.s: New file.
1220 * testsuite/gas/z80/r800_ii8.d: New file.
1221 * testsuite/gas/z80/r800_z80_doc.d: New file.
1222 * testsuite/gas/z80/z180.d: New file.
1223 * testsuite/gas/z80/z180.s: New file.
1224 * testsuite/gas/z80/z180_z80_doc.d: New file.
1225 * testsuite/gas/z80/z80_doc.d: New file.
1226 * testsuite/gas/z80/z80_doc.s: New file.
1227 * testsuite/gas/z80/z80_ii8.d: New file.
1228 * testsuite/gas/z80/z80_ii8.s: New file.
1229 * testsuite/gas/z80/z80_in_f_c.d: New file.
1230 * testsuite/gas/z80/z80_in_f_c.s: New file.
1231 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1232 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1233 * testsuite/gas/z80/z80_out_c_0.d: New file.
1234 * testsuite/gas/z80/z80_out_c_0.s: New file.
1235 * testsuite/gas/z80/z80_reloc.d: New file.
1236 * testsuite/gas/z80/z80_reloc.s: New file.
1237 * testsuite/gas/z80/z80_sli.d: New file.
1238 * testsuite/gas/z80/z80_sli.s: New file.
1239
a65b5de6
SN		 12402020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1241
1242 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1243 REGLIST_RN.
1244
b14ce8bf
AM		 12452020-01-01 Alan Modra <amodra@gmail.com>
1246
1247 Update year range in copyright notice of all files.
1248
0b114740 1249For older changes see ChangeLog-2019
3499769a 1250\f
0b114740 1251Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1252
1253Copying and distribution of this file, with or without modification,
1254are permitted in any medium without royalty provided the copyright
1255notice and this notice are preserved.
1256
1257Local Variables:
1258mode: change-log
1259left-margin: 8
1260fill-column: 74
1261version-control: never
1262End:
A mirror of the official binutils-gdb repository