[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (sysret): Drop DefaultSize.
	* i386-tbl.h: Re-generate.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	Dword.
	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	* i386-tbl.h: Re-generate.

2020-01-20  Nick Clifton  <nickc@redhat.com>

	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	* po/uk.po: Updated Ukranian translation.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* hppa-dis.c (fput_const): Remove useless cast.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* arm-dis.c (print_insn_arm): Wrap 'T' value.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
c006a730 JB	1	2020-01-21 Jan Beulich <jbeulich@suse.com>
	2
	3	* i386-opc.tbl (sysret): Drop DefaultSize.
	4	* i386-tbl.h: Re-generate.
	5
c906a69a JB	6	2020-01-21 Jan Beulich <jbeulich@suse.com>
	7
	8	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	9	Dword.
	10	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	11	* i386-tbl.h: Re-generate.
	12
26916852 NC	13	2020-01-20 Nick Clifton <nickc@redhat.com>
	14
	15	* po/de.po: Updated German translation.
	16	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	17	* po/uk.po: Updated Ukranian translation.
	18
4d6cbb64 AM	19	2020-01-20 Alan Modra <amodra@gmail.com>
	20
	21	* hppa-dis.c (fput_const): Remove useless cast.
	22
2bddb71a AM	23	2020-01-20 Alan Modra <amodra@gmail.com>
	24
	25	* arm-dis.c (print_insn_arm): Wrap 'T' value.
	26
1b1bb2c6 NC	27	2020-01-18 Nick Clifton <nickc@redhat.com>
	28
	29	* configure: Regenerate.
	30	* po/opcodes.pot: Regenerate.
	31
ae774686 NC	32	2020-01-18 Nick Clifton <nickc@redhat.com>
	33
	34	Binutils 2.34 branch created.
	35
07f1f3aa CB	36	2020-01-17 Christian Biesinger <cbiesinger@google.com>
	37
	38	* opintl.h: Fix spelling error (seperate).
	39
42e04b36 L	40	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	41
	42	* i386-opc.tbl: Add {vex} pseudo prefix.
	43	* i386-tbl.h: Regenerated.
	44
2da2eaf4 AV	45	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	46
	47	PR 25376
	48	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	49	(neon_opcodes): Likewise.
	50	(select_arm_features): Make sure we enable MVE bits when selecting
	51	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	52	any architecture.
	53
d0849eed JB	54	2020-01-16 Jan Beulich <jbeulich@suse.com>
	55
	56	* i386-opc.tbl: Drop stale comment from XOP section.
	57
9cf70a44 JB	58	2020-01-16 Jan Beulich <jbeulich@suse.com>
	59
	60	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	61	(extractps): Add VexWIG to SSE2AVX forms.
	62	* i386-tbl.h: Re-generate.
	63
4814632e JB	64	2020-01-16 Jan Beulich <jbeulich@suse.com>
	65
	66	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	67	Size64 from and use VexW1 on SSE2AVX forms.
	68	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	69	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	70	* i386-tbl.h: Re-generate.
	71
aad09917 AM	72	2020-01-15 Alan Modra <amodra@gmail.com>
	73
	74	* tic4x-dis.c (tic4x_version): Make unsigned long.
	75	(optab, optab_special, registernames): New file scope vars.
	76	(tic4x_print_register): Set up registernames rather than
	77	malloc'd registertable.
	78	(tic4x_disassemble): Delete optable and optable_special. Use
	79	optab and optab_special instead. Throw away old optab,
	80	optab_special and registernames when info->mach changes.
	81
7a6bf3be SB	82	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	83
	84	PR 25377
	85	* z80-dis.c (suffix): Use .db instruction to generate double
	86	prefix.
	87
ca1eaac0 AM	88	2020-01-14 Alan Modra <amodra@gmail.com>
	89
	90	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	91	values to unsigned before shifting.
	92
1d67fe3b TT	93	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	94
	95	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	96	flow instructions.
	97	(print_insn_thumb16, print_insn_thumb32): Likewise.
	98	(print_insn): Initialize the insn info.
	99	* i386-dis.c (print_insn): Initialize the insn info fields, and
	100	detect jumps.
	101
5e4f7e05 CZ	102	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	103
	104	* arc-opc.c (C_NE): Make it required.
	105
b9fe6b8a CZ	106	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	107
	108	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	109	reserved register name.
	110
90dee485 AM	111	2020-01-13 Alan Modra <amodra@gmail.com>
	112
	113	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	114	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	115
febda64f AM	116	2020-01-13 Alan Modra <amodra@gmail.com>
	117
	118	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	119	result of wasm_read_leb128 in a uint64_t and check that bits
	120	are not lost when copying to other locals. Use uint32_t for
	121	most locals. Use PRId64 when printing int64_t.
	122
df08b588 AM	123	2020-01-13 Alan Modra <amodra@gmail.com>
	124
	125	* score-dis.c: Formatting.
	126	* score7-dis.c: Formatting.
	127
b2c759ce AM	128	2020-01-13 Alan Modra <amodra@gmail.com>
	129
	130	* score-dis.c (print_insn_score48): Use unsigned variables for
	131	unsigned values. Don't left shift negative values.
	132	(print_insn_score32): Likewise.
	133	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	134
5496abe1 AM	135	2020-01-13 Alan Modra <amodra@gmail.com>
	136
	137	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	138
202e762b AM	139	2020-01-13 Alan Modra <amodra@gmail.com>
	140
	141	* fr30-ibld.c: Regenerate.
	142
7ef412cf AM	143	2020-01-13 Alan Modra <amodra@gmail.com>
	144
	145	* xgate-dis.c (print_insn): Don't left shift signed value.
	146	(ripBits): Formatting, use 1u.
	147
7f578b95 AM	148	2020-01-10 Alan Modra <amodra@gmail.com>
	149
	150	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	151	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	152
441af85b AM	153	2020-01-10 Alan Modra <amodra@gmail.com>
	154
	155	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	156	and XRREG value earlier to avoid a shift with negative exponent.
	157	* m10200-dis.c (disassemble): Similarly.
	158
bce58db4 NC	159	2020-01-09 Nick Clifton <nickc@redhat.com>
	160
	161	PR 25224
	162	* z80-dis.c (ld_ii_ii): Use correct cast.
	163
40c75bc8 SB	164	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	165
	166	PR 25224
	167	* z80-dis.c (ld_ii_ii): Use character constant when checking
	168	opcode byte value.
	169
d835a58b JB	170	2020-01-09 Jan Beulich <jbeulich@suse.com>
	171
	172	* i386-dis.c (SEP_Fixup): New.
	173	(SEP): Define.
	174	(dis386_twobyte): Use it for sysenter/sysexit.
	175	(enum x86_64_isa): Change amd64 enumerator to value 1.
	176	(OP_J): Compare isa64 against intel64 instead of amd64.
	177	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	178	forms.
	179	* i386-tbl.h: Re-generate.
	180
030a2e78 AM	181	2020-01-08 Alan Modra <amodra@gmail.com>
	182
	183	* z8k-dis.c: Include libiberty.h
	184	(instr_data_s): Make max_fetched unsigned.
	185	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	186	Don't exceed byte_info bounds.
	187	(output_instr): Make num_bytes unsigned.
	188	(unpack_instr): Likewise for nibl_count and loop.
	189	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	190	idx unsigned.
	191	* z8k-opc.h: Regenerate.
	192
bb82aefe SV	193	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	194
	195	* arc-tbl.h (llock): Use 'LLOCK' as class.
	196	(llockd): Likewise.
	197	(scond): Use 'SCOND' as class.
	198	(scondd): Likewise.
	199	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	200	(scondd): Likewise.
	201
cc6aa1a6 AM	202	2020-01-06 Alan Modra <amodra@gmail.com>
	203
	204	* m32c-ibld.c: Regenerate.
	205
660e62b1 AM	206	2020-01-06 Alan Modra <amodra@gmail.com>
	207
	208	PR 25344
	209	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	210	Peek at next byte to prevent recursion on repeated prefix bytes.
	211	Ensure uninitialised "mybuf" is not accessed.
	212	(print_insn_z80): Don't zero n_fetch and n_used here,..
	213	(print_insn_z80_buf): ..do it here instead.
	214
c9ae58fe AM	215	2020-01-04 Alan Modra <amodra@gmail.com>
	216
	217	* m32r-ibld.c: Regenerate.
	218
5f57d4ec AM	219	2020-01-04 Alan Modra <amodra@gmail.com>
	220
	221	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	222
2c5c1196 AM	223	2020-01-04 Alan Modra <amodra@gmail.com>
	224
	225	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	226
2e98c6c5 AM	227	2020-01-04 Alan Modra <amodra@gmail.com>
	228
	229	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	230
567dfba2 JB	231	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	232
5437a02a JB	233	* aarch64-tbl.h (aarch64_opcode_table): Use
	234	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	235
	236	2020-01-03 Jan Beulich <jbeulich@suse.com>
	237
	238	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	239	forms of SUDOT and USDOT.
567dfba2 JB	240
8c45011a JB	241	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	242
5437a02a	243	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	244	uzip{1,2}.
	245	* opcodes/aarch64-dis-2.c: Re-generate.
	246
f4950f76 JB	247	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	248
5437a02a	249	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	250	FMMLA encoding.
	251	* opcodes/aarch64-dis-2.c: Re-generate.
	252
6655dba2 SB	253	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	254
	255	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	256
b14ce8bf AM	257	2020-01-01 Alan Modra <amodra@gmail.com>
	258
	259	Update year range in copyright notice of all files.
	260
0b114740	261	For older changes see ChangeLog-2019
3499769a	262	\f
0b114740	263	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	264
	265	Copying and distribution of this file, with or without modification,
	266	are permitted in any medium without royalty provided the copyright
	267	notice and this notice are preserved.
	268
	269	Local Variables:
	270	mode: change-log
	271	left-margin: 8
	272	fill-column: 74
	273	version-control: never
	274	End: