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1938f4a5 SG |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
3 | * (C) Copyright 2002-2006 | |
4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
5 | * | |
6 | * (C) Copyright 2002 | |
7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
8 | * Marius Groeger <mgroeger@sysgo.de> | |
9 | * | |
10 | * See file CREDITS for list of people who contributed to this | |
11 | * project. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License as | |
15 | * published by the Free Software Foundation; either version 2 of | |
16 | * the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
26 | * MA 02111-1307 USA | |
27 | */ | |
28 | ||
29 | #include <common.h> | |
30 | #include <linux/compiler.h> | |
31 | #include <version.h> | |
32 | #include <environment.h> | |
33 | #include <fdtdec.h> | |
f828bf25 | 34 | #include <fs.h> |
e4fef6cf SG |
35 | #if defined(CONFIG_CMD_IDE) |
36 | #include <ide.h> | |
37 | #endif | |
38 | #include <i2c.h> | |
1938f4a5 SG |
39 | #include <initcall.h> |
40 | #include <logbuff.h> | |
e4fef6cf SG |
41 | |
42 | /* TODO: Can we move these into arch/ headers? */ | |
43 | #ifdef CONFIG_8xx | |
44 | #include <mpc8xx.h> | |
45 | #endif | |
46 | #ifdef CONFIG_5xx | |
47 | #include <mpc5xx.h> | |
48 | #endif | |
49 | #ifdef CONFIG_MPC5xxx | |
50 | #include <mpc5xxx.h> | |
51 | #endif | |
52 | ||
a733b06b | 53 | #include <os.h> |
1938f4a5 | 54 | #include <post.h> |
e4fef6cf | 55 | #include <spi.h> |
71c52dba | 56 | #include <trace.h> |
e4fef6cf | 57 | #include <watchdog.h> |
a733b06b | 58 | #include <asm/errno.h> |
1938f4a5 | 59 | #include <asm/io.h> |
e4fef6cf SG |
60 | #ifdef CONFIG_MP |
61 | #include <asm/mp.h> | |
62 | #endif | |
1938f4a5 | 63 | #include <asm/sections.h> |
48a33806 SG |
64 | #ifdef CONFIG_X86 |
65 | #include <asm/init_helpers.h> | |
66 | #include <asm/relocate.h> | |
67 | #endif | |
a733b06b SG |
68 | #ifdef CONFIG_SANDBOX |
69 | #include <asm/state.h> | |
70 | #endif | |
1938f4a5 SG |
71 | #include <linux/compiler.h> |
72 | ||
73 | /* | |
74 | * Pointer to initial global data area | |
75 | * | |
76 | * Here we initialize it if needed. | |
77 | */ | |
78 | #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR | |
79 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
80 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
81 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); | |
82 | #else | |
83 | DECLARE_GLOBAL_DATA_PTR; | |
84 | #endif | |
85 | ||
86 | /* | |
87 | * sjg: IMO this code should be | |
88 | * refactored to a single function, something like: | |
89 | * | |
90 | * void led_set_state(enum led_colour_t colour, int on); | |
91 | */ | |
92 | /************************************************************************ | |
93 | * Coloured LED functionality | |
94 | ************************************************************************ | |
95 | * May be supplied by boards if desired | |
96 | */ | |
97 | inline void __coloured_LED_init(void) {} | |
98 | void coloured_LED_init(void) | |
99 | __attribute__((weak, alias("__coloured_LED_init"))); | |
100 | inline void __red_led_on(void) {} | |
101 | void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); | |
102 | inline void __red_led_off(void) {} | |
103 | void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); | |
104 | inline void __green_led_on(void) {} | |
105 | void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); | |
106 | inline void __green_led_off(void) {} | |
107 | void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); | |
108 | inline void __yellow_led_on(void) {} | |
109 | void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); | |
110 | inline void __yellow_led_off(void) {} | |
111 | void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); | |
112 | inline void __blue_led_on(void) {} | |
113 | void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); | |
114 | inline void __blue_led_off(void) {} | |
115 | void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); | |
116 | ||
117 | /* | |
118 | * Why is gd allocated a register? Prior to reloc it might be better to | |
119 | * just pass it around to each function in this file? | |
120 | * | |
121 | * After reloc one could argue that it is hardly used and doesn't need | |
122 | * to be in a register. Or if it is it should perhaps hold pointers to all | |
123 | * global data for all modules, so that post-reloc we can avoid the massive | |
124 | * literal pool we get on ARM. Or perhaps just encourage each module to use | |
125 | * a structure... | |
126 | */ | |
127 | ||
128 | /* | |
129 | * Could the CONFIG_SPL_BUILD infection become a flag in gd? | |
130 | */ | |
131 | ||
e4fef6cf SG |
132 | #if defined(CONFIG_WATCHDOG) |
133 | static int init_func_watchdog_init(void) | |
134 | { | |
135 | puts(" Watchdog enabled\n"); | |
136 | WATCHDOG_RESET(); | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
141 | int init_func_watchdog_reset(void) | |
142 | { | |
143 | WATCHDOG_RESET(); | |
144 | ||
145 | return 0; | |
146 | } | |
147 | #endif /* CONFIG_WATCHDOG */ | |
148 | ||
149 | void __board_add_ram_info(int use_default) | |
150 | { | |
151 | /* please define platform specific board_add_ram_info() */ | |
152 | } | |
153 | ||
154 | void board_add_ram_info(int) | |
155 | __attribute__ ((weak, alias("__board_add_ram_info"))); | |
156 | ||
1938f4a5 SG |
157 | static int init_baud_rate(void) |
158 | { | |
159 | gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); | |
160 | return 0; | |
161 | } | |
162 | ||
163 | static int display_text_info(void) | |
164 | { | |
a733b06b | 165 | #ifndef CONFIG_SANDBOX |
1938f4a5 SG |
166 | ulong bss_start, bss_end; |
167 | ||
632efa74 | 168 | #ifdef CONFIG_SYS_SYM_OFFSETS |
1938f4a5 SG |
169 | bss_start = _bss_start_ofs + _TEXT_BASE; |
170 | bss_end = _bss_end_ofs + _TEXT_BASE; | |
632efa74 SG |
171 | #else |
172 | bss_start = (ulong)&__bss_start; | |
173 | bss_end = (ulong)&__bss_end; | |
174 | #endif | |
1938f4a5 SG |
175 | debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", |
176 | CONFIG_SYS_TEXT_BASE, bss_start, bss_end); | |
a733b06b | 177 | #endif |
1938f4a5 SG |
178 | |
179 | #ifdef CONFIG_MODEM_SUPPORT | |
180 | debug("Modem Support enabled\n"); | |
181 | #endif | |
182 | #ifdef CONFIG_USE_IRQ | |
183 | debug("IRQ Stack: %08lx\n", IRQ_STACK_START); | |
184 | debug("FIQ Stack: %08lx\n", FIQ_STACK_START); | |
185 | #endif | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int announce_dram_init(void) | |
191 | { | |
192 | puts("DRAM: "); | |
193 | return 0; | |
194 | } | |
195 | ||
e4fef6cf SG |
196 | #ifdef CONFIG_PPC |
197 | static int init_func_ram(void) | |
198 | { | |
199 | #ifdef CONFIG_BOARD_TYPES | |
200 | int board_type = gd->board_type; | |
201 | #else | |
202 | int board_type = 0; /* use dummy arg */ | |
203 | #endif | |
204 | ||
205 | gd->ram_size = initdram(board_type); | |
206 | ||
207 | if (gd->ram_size > 0) | |
208 | return 0; | |
209 | ||
210 | puts("*** failed ***\n"); | |
211 | return 1; | |
212 | } | |
213 | #endif | |
214 | ||
1938f4a5 SG |
215 | static int show_dram_config(void) |
216 | { | |
217 | ulong size; | |
218 | ||
219 | #ifdef CONFIG_NR_DRAM_BANKS | |
220 | int i; | |
221 | ||
222 | debug("\nRAM Configuration:\n"); | |
223 | for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { | |
224 | size += gd->bd->bi_dram[i].size; | |
225 | debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); | |
226 | #ifdef DEBUG | |
227 | print_size(gd->bd->bi_dram[i].size, "\n"); | |
228 | #endif | |
229 | } | |
230 | debug("\nDRAM: "); | |
231 | #else | |
232 | size = gd->ram_size; | |
233 | #endif | |
234 | ||
e4fef6cf SG |
235 | print_size(size, ""); |
236 | board_add_ram_info(0); | |
237 | putc('\n'); | |
1938f4a5 SG |
238 | |
239 | return 0; | |
240 | } | |
241 | ||
e4fef6cf SG |
242 | ulong get_effective_memsize(void) |
243 | { | |
244 | #ifndef CONFIG_VERY_BIG_RAM | |
245 | return gd->ram_size; | |
246 | #else | |
247 | /* limit stack to what we can reasonable map */ | |
248 | return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? | |
249 | CONFIG_MAX_MEM_MAPPED : gd->ram_size); | |
250 | #endif | |
251 | } | |
252 | ||
1938f4a5 SG |
253 | void __dram_init_banksize(void) |
254 | { | |
255 | #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) | |
256 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; | |
257 | gd->bd->bi_dram[0].size = get_effective_memsize(); | |
258 | #endif | |
259 | } | |
260 | ||
261 | void dram_init_banksize(void) | |
262 | __attribute__((weak, alias("__dram_init_banksize"))); | |
263 | ||
e4fef6cf SG |
264 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) |
265 | static int init_func_i2c(void) | |
266 | { | |
267 | puts("I2C: "); | |
268 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
269 | puts("ready\n"); | |
270 | return 0; | |
271 | } | |
272 | #endif | |
273 | ||
274 | #if defined(CONFIG_HARD_SPI) | |
275 | static int init_func_spi(void) | |
276 | { | |
277 | puts("SPI: "); | |
278 | spi_init(); | |
279 | puts("ready\n"); | |
280 | return 0; | |
281 | } | |
282 | #endif | |
283 | ||
284 | __maybe_unused | |
1938f4a5 SG |
285 | static int zero_global_data(void) |
286 | { | |
287 | memset((void *)gd, '\0', sizeof(gd_t)); | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static int setup_mon_len(void) | |
293 | { | |
632efa74 | 294 | #ifdef CONFIG_SYS_SYM_OFFSETS |
1938f4a5 | 295 | gd->mon_len = _bss_end_ofs; |
a733b06b SG |
296 | #elif defined(CONFIG_SANDBOX) |
297 | gd->mon_len = (ulong)&_end - (ulong)_init; | |
632efa74 | 298 | #else |
e4fef6cf SG |
299 | /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ |
300 | gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; | |
632efa74 | 301 | #endif |
1938f4a5 SG |
302 | return 0; |
303 | } | |
304 | ||
305 | __weak int arch_cpu_init(void) | |
306 | { | |
307 | return 0; | |
308 | } | |
309 | ||
f828bf25 SG |
310 | #ifdef CONFIG_OF_HOSTFILE |
311 | ||
312 | #define CHECK(x) err = (x); if (err) goto failed; | |
313 | ||
314 | /* Create an empty device tree blob */ | |
315 | static int make_empty_fdt(void *fdt) | |
316 | { | |
317 | int err; | |
318 | ||
319 | CHECK(fdt_create(fdt, 256)); | |
320 | CHECK(fdt_finish_reservemap(fdt)); | |
321 | CHECK(fdt_begin_node(fdt, "")); | |
322 | CHECK(fdt_end_node(fdt)); | |
323 | CHECK(fdt_finish(fdt)); | |
324 | ||
325 | return 0; | |
326 | failed: | |
327 | printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); | |
328 | return -EACCES; | |
329 | } | |
330 | ||
331 | static int read_fdt_from_file(void) | |
332 | { | |
333 | struct sandbox_state *state = state_get_current(); | |
334 | void *blob; | |
335 | int size; | |
336 | int err; | |
337 | ||
338 | blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); | |
339 | if (!state->fdt_fname) { | |
340 | err = make_empty_fdt(blob); | |
341 | if (!err) | |
342 | goto done; | |
343 | return err; | |
344 | } | |
345 | err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX); | |
346 | if (err) | |
347 | return err; | |
348 | size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0); | |
349 | if (size < 0) | |
350 | return -EIO; | |
351 | ||
352 | done: | |
353 | gd->fdt_blob = blob; | |
354 | ||
355 | return 0; | |
356 | } | |
357 | #endif | |
358 | ||
a733b06b SG |
359 | #ifdef CONFIG_SANDBOX |
360 | static int setup_ram_buf(void) | |
361 | { | |
362 | gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE); | |
363 | assert(gd->arch.ram_buf); | |
364 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; | |
365 | ||
366 | return 0; | |
367 | } | |
368 | #endif | |
369 | ||
1938f4a5 SG |
370 | static int setup_fdt(void) |
371 | { | |
372 | #ifdef CONFIG_OF_EMBED | |
373 | /* Get a pointer to the FDT */ | |
374 | gd->fdt_blob = _binary_dt_dtb_start; | |
375 | #elif defined CONFIG_OF_SEPARATE | |
376 | /* FDT is at end of image */ | |
632efa74 | 377 | # ifdef CONFIG_SYS_SYM_OFFSETS |
1938f4a5 | 378 | gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE); |
632efa74 SG |
379 | # else |
380 | gd->fdt_blob = (ulong *)&_end; | |
381 | # endif | |
f828bf25 SG |
382 | #elif defined(CONFIG_OF_HOSTFILE) |
383 | if (read_fdt_from_file()) { | |
384 | puts("Failed to read control FDT\n"); | |
385 | return -1; | |
386 | } | |
1938f4a5 SG |
387 | #endif |
388 | /* Allow the early environment to override the fdt address */ | |
389 | gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, | |
390 | (uintptr_t)gd->fdt_blob); | |
391 | return 0; | |
392 | } | |
393 | ||
394 | /* Get the top of usable RAM */ | |
395 | __weak ulong board_get_usable_ram_top(ulong total_size) | |
396 | { | |
397 | return gd->ram_top; | |
398 | } | |
399 | ||
400 | static int setup_dest_addr(void) | |
401 | { | |
402 | debug("Monitor len: %08lX\n", gd->mon_len); | |
403 | /* | |
404 | * Ram is setup, size stored in gd !! | |
405 | */ | |
406 | debug("Ram size: %08lX\n", (ulong)gd->ram_size); | |
407 | #if defined(CONFIG_SYS_MEM_TOP_HIDE) | |
408 | /* | |
409 | * Subtract specified amount of memory to hide so that it won't | |
410 | * get "touched" at all by U-Boot. By fixing up gd->ram_size | |
411 | * the Linux kernel should now get passed the now "corrected" | |
412 | * memory size and won't touch it either. This should work | |
413 | * for arch/ppc and arch/powerpc. Only Linux board ports in | |
414 | * arch/powerpc with bootwrapper support, that recalculate the | |
415 | * memory size from the SDRAM controller setup will have to | |
416 | * get fixed. | |
417 | */ | |
418 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; | |
419 | #endif | |
420 | #ifdef CONFIG_SYS_SDRAM_BASE | |
421 | gd->ram_top = CONFIG_SYS_SDRAM_BASE; | |
422 | #endif | |
e4fef6cf | 423 | gd->ram_top += get_effective_memsize(); |
1938f4a5 | 424 | gd->ram_top = board_get_usable_ram_top(gd->mon_len); |
a0ba279a | 425 | gd->relocaddr = gd->ram_top; |
1938f4a5 | 426 | debug("Ram top: %08lX\n", (ulong)gd->ram_top); |
e4fef6cf SG |
427 | #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) |
428 | /* | |
429 | * We need to make sure the location we intend to put secondary core | |
430 | * boot code is reserved and not used by any part of u-boot | |
431 | */ | |
a0ba279a MY |
432 | if (gd->relocaddr > determine_mp_bootpg(NULL)) { |
433 | gd->relocaddr = determine_mp_bootpg(NULL); | |
434 | debug("Reserving MP boot page to %08lx\n", gd->relocaddr); | |
e4fef6cf SG |
435 | } |
436 | #endif | |
1938f4a5 SG |
437 | return 0; |
438 | } | |
439 | ||
440 | #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) | |
441 | static int reserve_logbuffer(void) | |
442 | { | |
443 | /* reserve kernel log buffer */ | |
a0ba279a | 444 | gd->relocaddr -= LOGBUFF_RESERVE; |
1938f4a5 | 445 | debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, |
a0ba279a | 446 | gd->relocaddr); |
1938f4a5 SG |
447 | return 0; |
448 | } | |
449 | #endif | |
450 | ||
451 | #ifdef CONFIG_PRAM | |
452 | /* reserve protected RAM */ | |
453 | static int reserve_pram(void) | |
454 | { | |
455 | ulong reg; | |
456 | ||
457 | reg = getenv_ulong("pram", 10, CONFIG_PRAM); | |
a0ba279a | 458 | gd->relocaddr -= (reg << 10); /* size is in kB */ |
1938f4a5 | 459 | debug("Reserving %ldk for protected RAM at %08lx\n", reg, |
a0ba279a | 460 | gd->relocaddr); |
1938f4a5 SG |
461 | return 0; |
462 | } | |
463 | #endif /* CONFIG_PRAM */ | |
464 | ||
465 | /* Round memory pointer down to next 4 kB limit */ | |
466 | static int reserve_round_4k(void) | |
467 | { | |
a0ba279a | 468 | gd->relocaddr &= ~(4096 - 1); |
1938f4a5 SG |
469 | return 0; |
470 | } | |
471 | ||
472 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ | |
473 | defined(CONFIG_ARM) | |
474 | static int reserve_mmu(void) | |
475 | { | |
476 | /* reserve TLB table */ | |
477 | gd->arch.tlb_size = 4096 * 4; | |
a0ba279a | 478 | gd->relocaddr -= gd->arch.tlb_size; |
1938f4a5 SG |
479 | |
480 | /* round down to next 64 kB limit */ | |
a0ba279a | 481 | gd->relocaddr &= ~(0x10000 - 1); |
1938f4a5 | 482 | |
a0ba279a | 483 | gd->arch.tlb_addr = gd->relocaddr; |
1938f4a5 SG |
484 | debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, |
485 | gd->arch.tlb_addr + gd->arch.tlb_size); | |
486 | return 0; | |
487 | } | |
488 | #endif | |
489 | ||
490 | #ifdef CONFIG_LCD | |
491 | static int reserve_lcd(void) | |
492 | { | |
493 | #ifdef CONFIG_FB_ADDR | |
494 | gd->fb_base = CONFIG_FB_ADDR; | |
495 | #else | |
496 | /* reserve memory for LCD display (always full pages) */ | |
a0ba279a MY |
497 | gd->relocaddr = lcd_setmem(gd->relocaddr); |
498 | gd->fb_base = gd->relocaddr; | |
1938f4a5 SG |
499 | #endif /* CONFIG_FB_ADDR */ |
500 | return 0; | |
501 | } | |
502 | #endif /* CONFIG_LCD */ | |
503 | ||
71c52dba SG |
504 | static int reserve_trace(void) |
505 | { | |
506 | #ifdef CONFIG_TRACE | |
507 | gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; | |
508 | gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); | |
509 | debug("Reserving %dk for trace data at: %08lx\n", | |
510 | CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); | |
511 | #endif | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
e4fef6cf | 516 | #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ |
48a33806 | 517 | && !defined(CONFIG_ARM) && !defined(CONFIG_X86) |
e4fef6cf SG |
518 | static int reserve_video(void) |
519 | { | |
520 | /* reserve memory for video display (always full pages) */ | |
a0ba279a MY |
521 | gd->relocaddr = video_setmem(gd->relocaddr); |
522 | gd->fb_base = gd->relocaddr; | |
e4fef6cf SG |
523 | |
524 | return 0; | |
525 | } | |
526 | #endif | |
527 | ||
1938f4a5 SG |
528 | static int reserve_uboot(void) |
529 | { | |
530 | /* | |
531 | * reserve memory for U-Boot code, data & bss | |
532 | * round down to next 4 kB limit | |
533 | */ | |
a0ba279a MY |
534 | gd->relocaddr -= gd->mon_len; |
535 | gd->relocaddr &= ~(4096 - 1); | |
e4fef6cf SG |
536 | #ifdef CONFIG_E500 |
537 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
a0ba279a | 538 | gd->relocaddr &= ~(65536 - 1); |
e4fef6cf | 539 | #endif |
1938f4a5 SG |
540 | |
541 | debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, | |
a0ba279a MY |
542 | gd->relocaddr); |
543 | ||
544 | gd->start_addr_sp = gd->relocaddr; | |
545 | ||
1938f4a5 SG |
546 | return 0; |
547 | } | |
548 | ||
8cae8a68 | 549 | #ifndef CONFIG_SPL_BUILD |
1938f4a5 SG |
550 | /* reserve memory for malloc() area */ |
551 | static int reserve_malloc(void) | |
552 | { | |
a0ba279a | 553 | gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; |
1938f4a5 | 554 | debug("Reserving %dk for malloc() at: %08lx\n", |
a0ba279a | 555 | TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); |
1938f4a5 SG |
556 | return 0; |
557 | } | |
558 | ||
559 | /* (permanently) allocate a Board Info struct */ | |
560 | static int reserve_board(void) | |
561 | { | |
a0ba279a MY |
562 | gd->start_addr_sp -= sizeof(bd_t); |
563 | gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); | |
1938f4a5 SG |
564 | memset(gd->bd, '\0', sizeof(bd_t)); |
565 | debug("Reserving %zu Bytes for Board Info at: %08lx\n", | |
a0ba279a | 566 | sizeof(bd_t), gd->start_addr_sp); |
1938f4a5 SG |
567 | return 0; |
568 | } | |
8cae8a68 | 569 | #endif |
1938f4a5 SG |
570 | |
571 | static int setup_machine(void) | |
572 | { | |
573 | #ifdef CONFIG_MACH_TYPE | |
574 | gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ | |
575 | #endif | |
576 | return 0; | |
577 | } | |
578 | ||
579 | static int reserve_global_data(void) | |
580 | { | |
a0ba279a MY |
581 | gd->start_addr_sp -= sizeof(gd_t); |
582 | gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); | |
1938f4a5 | 583 | debug("Reserving %zu Bytes for Global Data at: %08lx\n", |
a0ba279a | 584 | sizeof(gd_t), gd->start_addr_sp); |
1938f4a5 SG |
585 | return 0; |
586 | } | |
587 | ||
588 | static int reserve_fdt(void) | |
589 | { | |
590 | /* | |
591 | * If the device tree is sitting immediate above our image then we | |
592 | * must relocate it. If it is embedded in the data section, then it | |
593 | * will be relocated with other data. | |
594 | */ | |
595 | if (gd->fdt_blob) { | |
596 | gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); | |
597 | ||
a0ba279a MY |
598 | gd->start_addr_sp -= gd->fdt_size; |
599 | gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); | |
a733b06b | 600 | debug("Reserving %lu Bytes for FDT at: %08lx\n", |
a0ba279a | 601 | gd->fdt_size, gd->start_addr_sp); |
1938f4a5 SG |
602 | } |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
607 | static int reserve_stacks(void) | |
608 | { | |
8cae8a68 SG |
609 | #ifdef CONFIG_SPL_BUILD |
610 | # ifdef CONFIG_ARM | |
a0ba279a MY |
611 | gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ |
612 | gd->irq_sp = gd->start_addr_sp; | |
8cae8a68 SG |
613 | # endif |
614 | #else | |
e4fef6cf SG |
615 | # ifdef CONFIG_PPC |
616 | ulong *s; | |
617 | # endif | |
8cae8a68 | 618 | |
1938f4a5 | 619 | /* setup stack pointer for exceptions */ |
a0ba279a MY |
620 | gd->start_addr_sp -= 16; |
621 | gd->start_addr_sp &= ~0xf; | |
622 | gd->irq_sp = gd->start_addr_sp; | |
1938f4a5 SG |
623 | |
624 | /* | |
625 | * Handle architecture-specific things here | |
626 | * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() | |
627 | * to handle this and put in arch/xxx/lib/stack.c | |
628 | */ | |
629 | # ifdef CONFIG_ARM | |
630 | # ifdef CONFIG_USE_IRQ | |
a0ba279a | 631 | gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); |
1938f4a5 | 632 | debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", |
a0ba279a | 633 | CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); |
1938f4a5 SG |
634 | |
635 | /* 8-byte alignment for ARM ABI compliance */ | |
a0ba279a | 636 | gd->start_addr_sp &= ~0x07; |
1938f4a5 SG |
637 | # endif |
638 | /* leave 3 words for abort-stack, plus 1 for alignment */ | |
a0ba279a | 639 | gd->start_addr_sp -= 16; |
e4fef6cf SG |
640 | # elif defined(CONFIG_PPC) |
641 | /* Clear initial stack frame */ | |
a0ba279a | 642 | s = (ulong *) gd->start_addr_sp; |
e4fef6cf SG |
643 | *s = 0; /* Terminate back chain */ |
644 | *++s = 0; /* NULL return address */ | |
8cae8a68 | 645 | # endif /* Architecture specific code */ |
1938f4a5 SG |
646 | |
647 | return 0; | |
8cae8a68 | 648 | #endif |
1938f4a5 SG |
649 | } |
650 | ||
651 | static int display_new_sp(void) | |
652 | { | |
a0ba279a | 653 | debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); |
1938f4a5 SG |
654 | |
655 | return 0; | |
656 | } | |
657 | ||
e4fef6cf SG |
658 | #ifdef CONFIG_PPC |
659 | static int setup_board_part1(void) | |
660 | { | |
661 | bd_t *bd = gd->bd; | |
662 | ||
663 | /* | |
664 | * Save local variables to board info struct | |
665 | */ | |
666 | ||
667 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ | |
668 | bd->bi_memsize = gd->ram_size; /* size in bytes */ | |
669 | ||
670 | #ifdef CONFIG_SYS_SRAM_BASE | |
671 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ | |
672 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ | |
673 | #endif | |
674 | ||
675 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ | |
676 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) | |
677 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ | |
678 | #endif | |
679 | #if defined(CONFIG_MPC5xxx) | |
680 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ | |
681 | #endif | |
682 | #if defined(CONFIG_MPC83xx) | |
683 | bd->bi_immrbar = CONFIG_SYS_IMMR; | |
684 | #endif | |
e4fef6cf SG |
685 | |
686 | return 0; | |
687 | } | |
688 | ||
689 | static int setup_board_part2(void) | |
690 | { | |
691 | bd_t *bd = gd->bd; | |
692 | ||
693 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
694 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
695 | #if defined(CONFIG_CPM2) | |
696 | bd->bi_cpmfreq = gd->arch.cpm_clk; | |
697 | bd->bi_brgfreq = gd->arch.brg_clk; | |
698 | bd->bi_sccfreq = gd->arch.scc_clk; | |
699 | bd->bi_vco = gd->arch.vco_out; | |
700 | #endif /* CONFIG_CPM2 */ | |
701 | #if defined(CONFIG_MPC512X) | |
702 | bd->bi_ipsfreq = gd->arch.ips_clk; | |
703 | #endif /* CONFIG_MPC512X */ | |
704 | #if defined(CONFIG_MPC5xxx) | |
705 | bd->bi_ipbfreq = gd->arch.ipb_clk; | |
706 | bd->bi_pcifreq = gd->pci_clk; | |
707 | #endif /* CONFIG_MPC5xxx */ | |
708 | ||
709 | return 0; | |
710 | } | |
711 | #endif | |
712 | ||
713 | #ifdef CONFIG_SYS_EXTBDINFO | |
714 | static int setup_board_extra(void) | |
715 | { | |
716 | bd_t *bd = gd->bd; | |
717 | ||
718 | strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); | |
719 | strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, | |
720 | sizeof(bd->bi_r_version)); | |
721 | ||
722 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
723 | bd->bi_plb_busfreq = gd->bus_clk; | |
724 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ | |
725 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ | |
726 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) | |
727 | bd->bi_pci_busfreq = get_PCI_freq(); | |
728 | bd->bi_opbfreq = get_OPB_freq(); | |
729 | #elif defined(CONFIG_XILINX_405) | |
730 | bd->bi_pci_busfreq = get_PCI_freq(); | |
731 | #endif | |
732 | ||
733 | return 0; | |
734 | } | |
735 | #endif | |
736 | ||
1938f4a5 SG |
737 | #ifdef CONFIG_POST |
738 | static int init_post(void) | |
739 | { | |
740 | post_bootmode_init(); | |
741 | post_run(NULL, POST_ROM | post_bootmode_get(0)); | |
742 | ||
743 | return 0; | |
744 | } | |
745 | #endif | |
746 | ||
747 | static int setup_baud_rate(void) | |
748 | { | |
749 | /* Ick, can we get rid of this line? */ | |
750 | gd->bd->bi_baudrate = gd->baudrate; | |
751 | ||
752 | return 0; | |
753 | } | |
754 | ||
755 | static int setup_dram_config(void) | |
756 | { | |
757 | /* Ram is board specific, so move it to board code ... */ | |
758 | dram_init_banksize(); | |
759 | ||
760 | return 0; | |
761 | } | |
762 | ||
763 | static int reloc_fdt(void) | |
764 | { | |
765 | if (gd->new_fdt) { | |
766 | memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); | |
767 | gd->fdt_blob = gd->new_fdt; | |
768 | } | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
773 | static int setup_reloc(void) | |
774 | { | |
a0ba279a | 775 | gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; |
1938f4a5 SG |
776 | memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); |
777 | ||
778 | debug("Relocation Offset is: %08lx\n", gd->reloc_off); | |
a733b06b | 779 | debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", |
a0ba279a MY |
780 | gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), |
781 | gd->start_addr_sp); | |
1938f4a5 SG |
782 | |
783 | return 0; | |
784 | } | |
785 | ||
786 | /* ARM calls relocate_code from its crt0.S */ | |
787 | #if !defined(CONFIG_ARM) | |
788 | ||
789 | static int jump_to_copy(void) | |
790 | { | |
48a33806 SG |
791 | /* |
792 | * x86 is special, but in a nice way. It uses a trampoline which | |
793 | * enables the dcache if possible. | |
794 | * | |
795 | * For now, other archs use relocate_code(), which is implemented | |
796 | * similarly for all archs. When we do generic relocation, hopefully | |
797 | * we can make all archs enable the dcache prior to relocation. | |
798 | */ | |
799 | #ifdef CONFIG_X86 | |
800 | /* | |
801 | * SDRAM and console are now initialised. The final stack can now | |
802 | * be setup in SDRAM. Code execution will continue in Flash, but | |
803 | * with the stack in SDRAM and Global Data in temporary memory | |
804 | * (CPU cache) | |
805 | */ | |
806 | board_init_f_r_trampoline(gd->start_addr_sp); | |
a733b06b SG |
807 | #elif defined(CONFIG_SANDBOX) |
808 | board_init_r(gd->new_gd, 0); | |
48a33806 | 809 | #else |
a0ba279a | 810 | relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); |
48a33806 | 811 | #endif |
1938f4a5 SG |
812 | |
813 | return 0; | |
814 | } | |
815 | #endif | |
816 | ||
817 | /* Record the board_init_f() bootstage (after arch_cpu_init()) */ | |
818 | static int mark_bootstage(void) | |
819 | { | |
820 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); | |
821 | ||
822 | return 0; | |
823 | } | |
824 | ||
825 | static init_fnc_t init_sequence_f[] = { | |
e4fef6cf SG |
826 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ |
827 | !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ | |
7525c2da | 828 | !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) |
632efa74 | 829 | zero_global_data, |
a733b06b SG |
830 | #endif |
831 | #ifdef CONFIG_SANDBOX | |
832 | setup_ram_buf, | |
e4fef6cf | 833 | #endif |
1938f4a5 | 834 | setup_mon_len, |
71c52dba SG |
835 | setup_fdt, |
836 | trace_early_init, | |
e4fef6cf SG |
837 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
838 | /* TODO: can this go into arch_cpu_init()? */ | |
839 | probecpu, | |
840 | #endif | |
1938f4a5 | 841 | arch_cpu_init, /* basic arch cpu dependent setup */ |
48a33806 SG |
842 | #ifdef CONFIG_X86 |
843 | cpu_init_f, /* TODO(sjg@chromium.org): remove */ | |
844 | # ifdef CONFIG_OF_CONTROL | |
845 | find_fdt, /* TODO(sjg@chromium.org): remove */ | |
846 | # endif | |
847 | #endif | |
1938f4a5 SG |
848 | mark_bootstage, |
849 | #ifdef CONFIG_OF_CONTROL | |
850 | fdtdec_check_fdt, | |
851 | #endif | |
852 | #if defined(CONFIG_BOARD_EARLY_INIT_F) | |
853 | board_early_init_f, | |
854 | #endif | |
e4fef6cf SG |
855 | /* TODO: can any of this go into arch_cpu_init()? */ |
856 | #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) | |
857 | get_clocks, /* get CPU and bus clocks (etc.) */ | |
858 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ | |
859 | && !defined(CONFIG_TQM885D) | |
860 | adjust_sdram_tbs_8xx, | |
861 | #endif | |
862 | /* TODO: can we rename this to timer_init()? */ | |
863 | init_timebase, | |
864 | #endif | |
e4fef6cf | 865 | #ifdef CONFIG_ARM |
1938f4a5 | 866 | timer_init, /* initialize timer */ |
e4fef6cf | 867 | #endif |
e4fef6cf SG |
868 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
869 | #if !defined(CONFIG_CPM2) | |
870 | dpram_init, | |
871 | #endif | |
872 | #endif | |
873 | #if defined(CONFIG_BOARD_POSTCLK_INIT) | |
874 | board_postclk_init, | |
b8521b74 MY |
875 | #endif |
876 | #ifdef CONFIG_FSL_ESDHC | |
877 | get_clocks, | |
1938f4a5 SG |
878 | #endif |
879 | env_init, /* initialize environment */ | |
e4fef6cf SG |
880 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
881 | /* get CPU and bus clocks according to the environment variable */ | |
882 | get_clocks_866, | |
883 | /* adjust sdram refresh rate according to the new clock */ | |
884 | sdram_adjust_866, | |
885 | init_timebase, | |
886 | #endif | |
1938f4a5 SG |
887 | init_baud_rate, /* initialze baudrate settings */ |
888 | serial_init, /* serial communications setup */ | |
889 | console_init_f, /* stage 1 init of console */ | |
a733b06b SG |
890 | #ifdef CONFIG_SANDBOX |
891 | sandbox_early_getopt_check, | |
892 | #endif | |
893 | #ifdef CONFIG_OF_CONTROL | |
894 | fdtdec_prepare_fdt, | |
48a33806 | 895 | #endif |
1938f4a5 SG |
896 | display_options, /* say that we are here */ |
897 | display_text_info, /* show debugging info if required */ | |
e4fef6cf SG |
898 | #if defined(CONFIG_8260) |
899 | prt_8260_rsr, | |
900 | prt_8260_clks, | |
901 | #endif /* CONFIG_8260 */ | |
902 | #if defined(CONFIG_MPC83xx) | |
903 | prt_83xx_rsr, | |
904 | #endif | |
905 | #ifdef CONFIG_PPC | |
906 | checkcpu, | |
907 | #endif | |
1938f4a5 SG |
908 | #if defined(CONFIG_DISPLAY_CPUINFO) |
909 | print_cpuinfo, /* display cpu info (and speed) */ | |
910 | #endif | |
e4fef6cf SG |
911 | #if defined(CONFIG_MPC5xxx) |
912 | prt_mpc5xxx_clks, | |
913 | #endif /* CONFIG_MPC5xxx */ | |
1938f4a5 SG |
914 | #if defined(CONFIG_DISPLAY_BOARDINFO) |
915 | checkboard, /* display board info */ | |
e4fef6cf SG |
916 | #endif |
917 | INIT_FUNC_WATCHDOG_INIT | |
918 | #if defined(CONFIG_MISC_INIT_F) | |
919 | misc_init_f, | |
920 | #endif | |
921 | INIT_FUNC_WATCHDOG_RESET | |
922 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
923 | init_func_i2c, | |
924 | #endif | |
925 | #if defined(CONFIG_HARD_SPI) | |
926 | init_func_spi, | |
927 | #endif | |
928 | #ifdef CONFIG_X86 | |
929 | dram_init_f, /* configure available RAM banks */ | |
8b42dfc3 | 930 | calculate_relocation_address, |
1938f4a5 SG |
931 | #endif |
932 | announce_dram_init, | |
933 | /* TODO: unify all these dram functions? */ | |
934 | #ifdef CONFIG_ARM | |
935 | dram_init, /* configure available RAM banks */ | |
936 | #endif | |
e4fef6cf SG |
937 | #ifdef CONFIG_PPC |
938 | init_func_ram, | |
939 | #endif | |
940 | #ifdef CONFIG_POST | |
941 | post_init_f, | |
942 | #endif | |
943 | INIT_FUNC_WATCHDOG_RESET | |
944 | #if defined(CONFIG_SYS_DRAM_TEST) | |
945 | testdram, | |
946 | #endif /* CONFIG_SYS_DRAM_TEST */ | |
947 | INIT_FUNC_WATCHDOG_RESET | |
948 | ||
1938f4a5 SG |
949 | #ifdef CONFIG_POST |
950 | init_post, | |
951 | #endif | |
e4fef6cf | 952 | INIT_FUNC_WATCHDOG_RESET |
1938f4a5 SG |
953 | /* |
954 | * Now that we have DRAM mapped and working, we can | |
955 | * relocate the code and continue running from DRAM. | |
956 | * | |
957 | * Reserve memory at end of RAM for (top down in that order): | |
958 | * - area that won't get touched by U-Boot and Linux (optional) | |
959 | * - kernel log buffer | |
960 | * - protected RAM | |
961 | * - LCD framebuffer | |
962 | * - monitor code | |
963 | * - board info struct | |
964 | */ | |
965 | setup_dest_addr, | |
966 | #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) | |
967 | reserve_logbuffer, | |
968 | #endif | |
969 | #ifdef CONFIG_PRAM | |
970 | reserve_pram, | |
971 | #endif | |
972 | reserve_round_4k, | |
973 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ | |
974 | defined(CONFIG_ARM) | |
975 | reserve_mmu, | |
976 | #endif | |
977 | #ifdef CONFIG_LCD | |
978 | reserve_lcd, | |
e4fef6cf | 979 | #endif |
71c52dba | 980 | reserve_trace, |
e4fef6cf SG |
981 | /* TODO: Why the dependency on CONFIG_8xx? */ |
982 | #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ | |
48a33806 | 983 | && !defined(CONFIG_ARM) && !defined(CONFIG_X86) |
e4fef6cf | 984 | reserve_video, |
1938f4a5 SG |
985 | #endif |
986 | reserve_uboot, | |
8cae8a68 | 987 | #ifndef CONFIG_SPL_BUILD |
1938f4a5 SG |
988 | reserve_malloc, |
989 | reserve_board, | |
8cae8a68 | 990 | #endif |
1938f4a5 SG |
991 | setup_machine, |
992 | reserve_global_data, | |
993 | reserve_fdt, | |
994 | reserve_stacks, | |
995 | setup_dram_config, | |
996 | show_dram_config, | |
e4fef6cf SG |
997 | #ifdef CONFIG_PPC |
998 | setup_board_part1, | |
999 | INIT_FUNC_WATCHDOG_RESET | |
1000 | setup_board_part2, | |
1001 | #endif | |
1938f4a5 SG |
1002 | setup_baud_rate, |
1003 | display_new_sp, | |
e4fef6cf SG |
1004 | #ifdef CONFIG_SYS_EXTBDINFO |
1005 | setup_board_extra, | |
1006 | #endif | |
1007 | INIT_FUNC_WATCHDOG_RESET | |
1938f4a5 SG |
1008 | reloc_fdt, |
1009 | setup_reloc, | |
1010 | #ifndef CONFIG_ARM | |
1011 | jump_to_copy, | |
1012 | #endif | |
1013 | NULL, | |
1014 | }; | |
1015 | ||
1016 | void board_init_f(ulong boot_flags) | |
1017 | { | |
48a33806 | 1018 | #ifndef CONFIG_X86 |
1938f4a5 SG |
1019 | gd_t data; |
1020 | ||
1021 | gd = &data; | |
48a33806 | 1022 | #endif |
1938f4a5 SG |
1023 | |
1024 | gd->flags = boot_flags; | |
1025 | ||
1026 | if (initcall_run_list(init_sequence_f)) | |
1027 | hang(); | |
1028 | ||
1029 | #ifndef CONFIG_ARM | |
1030 | /* NOTREACHED - jump_to_copy() does not return */ | |
1031 | hang(); | |
1032 | #endif | |
1033 | } | |
1034 | ||
48a33806 SG |
1035 | #ifdef CONFIG_X86 |
1036 | /* | |
1037 | * For now this code is only used on x86. | |
1038 | * | |
1039 | * init_sequence_f_r is the list of init functions which are run when | |
1040 | * U-Boot is executing from Flash with a semi-limited 'C' environment. | |
1041 | * The following limitations must be considered when implementing an | |
1042 | * '_f_r' function: | |
1043 | * - 'static' variables are read-only | |
1044 | * - Global Data (gd->xxx) is read/write | |
1045 | * | |
1046 | * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if | |
1047 | * supported). It _should_, if possible, copy global data to RAM and | |
1048 | * initialise the CPU caches (to speed up the relocation process) | |
1049 | * | |
1050 | * NOTE: At present only x86 uses this route, but it is intended that | |
1051 | * all archs will move to this when generic relocation is implemented. | |
1052 | */ | |
1053 | static init_fnc_t init_sequence_f_r[] = { | |
1054 | init_cache_f_r, | |
1055 | copy_uboot_to_ram, | |
1056 | clear_bss, | |
1057 | do_elf_reloc_fixups, | |
1058 | ||
1059 | NULL, | |
1060 | }; | |
1061 | ||
1062 | void board_init_f_r(void) | |
1063 | { | |
1064 | if (initcall_run_list(init_sequence_f_r)) | |
1065 | hang(); | |
1066 | ||
1067 | /* | |
1068 | * U-Boot has been copied into SDRAM, the BSS has been cleared etc. | |
1069 | * Transfer execution from Flash to RAM by calculating the address | |
1070 | * of the in-RAM copy of board_init_r() and calling it | |
1071 | */ | |
1072 | (board_init_r + gd->reloc_off)(gd, gd->relocaddr); | |
1073 | ||
1074 | /* NOTREACHED - board_init_r() does not return */ | |
1075 | hang(); | |
1076 | } | |
1077 | #endif /* CONFIG_X86 */ |