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Commit | Line | Data |
---|---|---|
252b5132 | 1 | -*- text -*- |
6d96a594 | 2 | |
6c0ecdba SP |
3 | * Add support for AArch64 Check Feature Status Extension (CHK). |
4 | ||
8cee11ca | 5 | * Add support for 'armv8.9-a' and 'armv9.4-a' for -march in AArch64 GAS. |
6 | ||
8170af78 HL |
7 | * Add support for Intel USER_MSR instructions. |
8 | ||
4fc85f37 JB |
9 | * Add support for Intel AVX10.1. |
10 | ||
b5c37946 SJ |
11 | * Add support for Intel PBNDKB instructions. |
12 | ||
13 | * Add support for Intel SM4 instructions. | |
14 | ||
15 | * Add support for Intel SM3 instructions. | |
16 | ||
17 | * Add support for Intel SHA512 instructions. | |
18 | ||
19 | * Add support for Intel AVX-VNNI-INT16 instructions. | |
20 | ||
67bed49e RB |
21 | * Add support for Cortex-A520 for AArch64. |
22 | ||
7d6a2e34 RB |
23 | * Add support for Cortex-A720 for AArch64. |
24 | ||
0515a7b6 SJ |
25 | * Add support for Cortex-X4 for AArch64. |
26 | ||
d501d384 NC |
27 | Changes in 2.41: |
28 | ||
6e712424 PI |
29 | * Add support for the KVX instruction set. |
30 | ||
c88ed92f ZJ |
31 | * Add support for Intel FRED instructions. |
32 | ||
33 | * Add support for Intel LKGS instructions. | |
34 | ||
d100d8c1 HJ |
35 | * Add support for Intel AMX-COMPLEX instructions. |
36 | ||
60336e19 RS |
37 | * Add SME2 support to the AArch64 port. |
38 | ||
695a8c34 JB |
39 | * A new .insn directive is recognized by x86 gas. |
40 | ||
3863e5e4 WX |
41 | * Add support for LoongArch LSX instructions. |
42 | ||
43 | * Add support for LoongArch LASX instructions. | |
44 | ||
45 | * Add support for LoongArch LVZ instructions. | |
46 | ||
47 | * Add support for LoongArch LBT instructions. | |
48 | ||
49 | * Initial LoongArch support for linker relaxation has been added. | |
50 | ||
51 | * Deprecate the LoongArch register aliases $v0, $v1, $x, $fv0 and $fv1. | |
52 | ||
a72b0718 NC |
53 | Changes in 2.40: |
54 | ||
b06311ad KL |
55 | * Add support for Intel RAO-INT instructions. |
56 | ||
01d8ce74 | 57 | * Add support for Intel AVX-NE-CONVERT instructions. |
58 | ||
2188d6ea HL |
59 | * Add support for Intel MSRLIST instructions. |
60 | ||
941f0833 HL |
61 | * Add support for Intel WRMSRNS instructions. |
62 | ||
a93e3234 HJ |
63 | * Add support for Intel CMPccXADD instructions. |
64 | ||
23ae61ad CL |
65 | * Add support for Intel AVX-VNNI-INT8 instructions. |
66 | ||
4321af3e HW |
67 | * Add support for Intel AVX-IFMA instructions. |
68 | ||
ef07be45 CL |
69 | * Add support for Intel PREFETCHI instructions. |
70 | ||
68830fba CL |
71 | * Add support for Intel AMX-FP16 instructions. |
72 | ||
2cac01e3 FS |
73 | * gas now supports --compress-debug-sections=zstd to compress |
74 | debug sections with zstd. | |
d846c35e | 75 | |
b0c295e1 ML |
76 | * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd} |
77 | that selects the default compression algorithm | |
78 | for --enable-compressed-debug-sections. | |
2cac01e3 | 79 | |
27e60212 | 80 | * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs, |
01804a09 | 81 | XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx, |
4a3bc79b CM |
82 | XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head |
83 | ISA manual, which are implemented in the Allwinner D1. | |
27e60212 | 84 | |
f262d2df PD |
85 | * Add support for the RISC-V Zawrs extension, version 1.0-rc4. |
86 | ||
cafdb713 SP |
87 | * Add support for Cortex-X1C for Arm. |
88 | ||
b2cb03d5 IB |
89 | * New command line option --gsframe to generate SFrame unwind information |
90 | on x86_64 and aarch64 targets. | |
91 | ||
0bd09323 NC |
92 | Changes in 2.39: |
93 | ||
c085ab00 JB |
94 | * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and |
95 | Intel K1OM. | |
96 | ||
5a3ca6e3 PD |
97 | * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version |
98 | 1.0-fd39d01. | |
99 | ||
100 | * Add support for the RISC-V Zfh extension, version 1.0. | |
101 | ||
102 | * Add support for the Zhinx extension, version 1.0.0-rc. | |
103 | ||
104 | * Add support for the RISC-V H extension. | |
105 | ||
106 | * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin | |
107 | extension, version 1.0.0-rc. | |
108 | ||
a74e1cb3 NC |
109 | Changes in 2.38: |
110 | ||
36cb9e7e RS |
111 | * Add support for AArch64 system registers that were missing in previous |
112 | releases. | |
113 | ||
4462d7c4 | 114 | * Add support for the LoongArch instruction set. |
115 | ||
c8480b58 L |
116 | * Add a command-line option, -muse-unaligned-vector-move, for x86 target |
117 | to encode aligned vector move as unaligned vector move. | |
118 | ||
80cfde76 PW |
119 | * Add support for Cortex-R52+ for Arm. |
120 | ||
50aaf5e6 | 121 | * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64. |
98ab23ab | 122 | |
14f45859 PW |
123 | * Add support for Cortex-A710 for Arm. |
124 | ||
57f02370 PW |
125 | * Add support for Scalable Matrix Extension (SME) for AArch64. |
126 | ||
578c64a4 NC |
127 | * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the |
128 | assembler what to when it encoutners multibyte characters in the input. The | |
129 | default is to allow them. Setting the option to "warn" will generate a | |
130 | warning message whenever any multibyte character is encountered. Using the | |
131 | option to "warn-sym-only" will make the assembler generate a warning whenever a | |
132 | symbol is defined containing multibyte characters. (References to undefined | |
133 | symbols will not generate warnings). | |
134 | ||
ff01bb6c L |
135 | * Outputs of .ds.x directive and .tfloat directive with hex input from |
136 | x86 assembler have been reduced from 12 bytes to 10 bytes to match the | |
137 | output of .tfloat directive. | |
138 | ||
35180222 RS |
139 | * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and |
140 | 'armv9.3-a' for -march in AArch64 GAS. | |
d5007f02 | 141 | |
a2b1ea81 RS |
142 | * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a', |
143 | 'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS. | |
3197e593 | 144 | |
0cc78721 CL |
145 | * Add support for Intel AVX512_FP16 instructions. |
146 | ||
6b60a1ec PD |
147 | * Add support for the RISC-V scalar crypto extension, version 1.0.0. |
148 | ||
149 | * Add support for the RISC-V vector extension, version 1.0. | |
150 | ||
151 | * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc. | |
152 | ||
153 | * Add support for the RISC-V svinval extension, version 1.0. | |
154 | ||
155 | * Add support for the RISC-V hypervisor extension, as defined by Privileged | |
156 | Specification 1.12. | |
157 | ||
51419248 NC |
158 | Changes in 2.37: |
159 | ||
933feaf3 AM |
160 | * arm-symbianelf support removed. |
161 | ||
02202574 PW |
162 | * Add support for Realm Management Extension (RME) for AArch64. |
163 | ||
157a088c PD |
164 | * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V |
165 | bit manipulation extension, version 0.93. | |
166 | ||
055bc77a NC |
167 | Changes in 2.36: |
168 | ||
58bf9b6a L |
169 | * Add support for Intel AVX VNNI instructions. |
170 | ||
c1fa250a LC |
171 | * Add support for Intel HRESET instruction. |
172 | ||
f64c42a9 LC |
173 | * Add support for Intel UINTR instructions. |
174 | ||
6d96a594 C |
175 | * Support non-absolute segment values for i386 lcall and ljmp. |
176 | ||
b71702f1 NC |
177 | * When setting the link order attribute of ELF sections, it is now possible to |
178 | use a numeric section index instead of symbol name. | |
42c36b73 | 179 | |
a3a02fe8 PW |
180 | * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for |
181 | AArch64 and ARM. | |
b71702f1 | 182 | Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM. |
77718e5b | 183 | |
b71702f1 | 184 | * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace |
82c70b08 KT |
185 | Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer |
186 | Extension) system registers for AArch64. | |
c81946ef | 187 | |
8926e54e | 188 | * Add support for Armv8-R and Armv8.7-A AArch64. |
c81946ef | 189 | |
a984d94a | 190 | * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7 |
82503ca7 | 191 | AArch64. |
fd195909 | 192 | |
e64441b1 | 193 | * Add support for +flagm feature for -march in Armv8.4 AArch64. |
dd4a72c8 | 194 | |
fd65497d PW |
195 | * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic |
196 | 64-byte load/store instructions for this feature. | |
197 | ||
3f4ff088 PW |
198 | * Add support for +pauth (Pointer Authentication) feature for -march in |
199 | AArch64. | |
200 | ||
81d54bb7 | 201 | * Add support for Intel TDX instructions. |
96a84ea3 | 202 | |
c4694f17 TG |
203 | * Add support for Intel Key Locker instructions. |
204 | ||
b1766e7c NC |
205 | * Added a .nop directive to generate a single no-op instruction in a target |
206 | neutral manner. This instruction does have an effect on DWARF line number | |
207 | generation, if that is active. | |
208 | ||
a0522545 ML |
209 | * Removed --reduce-memory-overheads and --hash-size as gas now |
210 | uses hash tables that can be expand and shrink automatically. | |
211 | ||
789198ca L |
212 | * Add {disp16} pseudo prefix to x86 assembler. |
213 | ||
260cd341 LC |
214 | * Add support for Intel AMX instructions. |
215 | ||
939b95c7 L |
216 | * Configure with --enable-x86-used-note by default for Linux/x86. |
217 | ||
99fabbc9 JL |
218 | * Add support for the SHF_GNU_RETAIN flag, which can be applied to |
219 | sections using the 'R' flag in the .section directive. | |
220 | SHF_GNU_RETAIN specifies that the section should not be garbage | |
221 | collected by the linker. It requires the GNU or FreeBSD ELF OSABIs. | |
222 | ||
c17cf68c PD |
223 | * Add support for the RISC-V Zihintpause extension. |
224 | ||
b115b9fd NC |
225 | Changes in 2.35: |
226 | ||
bbd19b19 L |
227 | * X86 NaCl target support is removed. |
228 | ||
6914be53 L |
229 | * Extend .symver directive to update visibility of the original symbol |
230 | and assign one original symbol to different versioned symbols. | |
231 | ||
6e0e8b45 L |
232 | * Add support for Intel SERIALIZE and TSXLDTRK instructions. |
233 | ||
9e8f1c90 L |
234 | * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and |
235 | -mlfence-before-ret= options to x86 assembler to help mitigate | |
236 | CVE-2020-0551. | |
237 | ||
5496f3c6 NC |
238 | * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output |
239 | (if such output is being generated). Added the ability to generate | |
240 | version 5 .debug_line sections. | |
241 | ||
251dae91 TC |
242 | * Add -mbig-obj support to i386 MingW targets. |
243 | ||
4362996c PD |
244 | * Add support for the -mriscv-isa-version argument, to select the version of |
245 | the RISC-V ISA specification used when assembling. | |
246 | ||
247 | * Remove support for the RISC-V privileged specification, version 1.9. | |
248 | ||
ae774686 NC |
249 | Changes in 2.34: |
250 | ||
5eb617a7 L |
251 | * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...], |
252 | -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries | |
253 | options to x86 assembler to align branches within a fixed boundary | |
254 | with segment prefixes or NOPs. | |
255 | ||
6655dba2 SB |
256 | * Add support for Zilog eZ80 and Zilog Z180 CPUs. |
257 | ||
258 | * Add support for z80-elf target. | |
259 | ||
260 | * Add support for relocation of each byte or word of multibyte value to Z80 | |
261 | targets (just use right shift to 0, 8, 16, or 24 bits or AND operation | |
262 | with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff | |
263 | ||
264 | * Add SDCC support for Z80 targets. | |
265 | ||
60391a25 PB |
266 | Changes in 2.33: |
267 | ||
7738ddb4 MM |
268 | * Add support for the Arm Scalable Vector Extension version 2 (SVE2) |
269 | instructions. | |
270 | ||
271 | * Add support for the Arm Transactional Memory Extension (TME) | |
272 | instructions. | |
273 | ||
514bbb0f AV |
274 | * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE) |
275 | instructions. | |
276 | ||
b20d3859 BW |
277 | * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3 |
278 | LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure | |
279 | time option to set the default behavior. Set the default if the configure | |
280 | option is not used to "no". | |
6f2117ba | 281 | |
546053ac DZ |
282 | * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P |
283 | processors. | |
284 | ||
285 | * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE, | |
286 | Cortex-A76AE, and Cortex-A77 processors. | |
287 | ||
b20d3859 BW |
288 | * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit |
289 | floating point literals. Add .float16_format directive and | |
290 | -mfp16-format=[ieee|alternative] option for Arm to control the format of the | |
291 | encoding. | |
292 | ||
66f8b2cb AB |
293 | * Add --gdwarf-cie-version command line flag. This allows control over which |
294 | version of DWARF CIE the assembler creates. | |
295 | ||
f974f26c NC |
296 | Changes in 2.32: |
297 | ||
03751133 L |
298 | * Add -mvexwig=[0|1] option to x86 assembler to control encoding of |
299 | VEX.W-ignored (WIG) VEX instructions. | |
300 | ||
b4a3a7b4 L |
301 | * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property |
302 | notes. Add a --enable-x86-used-note configure time option to set the | |
303 | default behavior. Set the default if the configure option is not used | |
304 | to "no". | |
305 | ||
a693765e CX |
306 | * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions. |
307 | ||
bdc6c06e CX |
308 | * Add support for the MIPS Loongson EXTensions (EXT) instructions. |
309 | ||
716c08de CX |
310 | * Add support for the MIPS Loongson Content Address Memory (CAM) ASE. |
311 | ||
b8891f8d AJ |
312 | * Add support for the C-SKY processor series. |
313 | ||
8095d2f7 CX |
314 | * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI) |
315 | ASE. | |
316 | ||
719d8288 NC |
317 | Changes in 2.31: |
318 | ||
fc6141f0 NC |
319 | * The ADR and ADRL pseudo-instructions supported by the ARM assembler |
320 | now only set the bottom bit of the address of thumb function symbols | |
321 | if the -mthumb-interwork command line option is active. | |
322 | ||
6f20c942 FS |
323 | * Add support for the MIPS Global INValidate (GINV) ASE. |
324 | ||
730c3174 SE |
325 | * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE. |
326 | ||
7b4ae824 JD |
327 | * Add support for the Freescale S12Z architecture. |
328 | ||
0df8ad28 NC |
329 | * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU |
330 | Build Attribute notes if none are present in the input sources. Add a | |
331 | --enable-generate-build-notes=[yes|no] configure time option to set the | |
332 | default behaviour. Set the default if the configure option is not used | |
333 | to "no". | |
334 | ||
bd5dea88 L |
335 | * Remove -mold-gcc command-line option for x86 targets. |
336 | ||
b6f8c7c4 L |
337 | * Add -O[2|s] command-line options to x86 assembler to enable alternate |
338 | shorter instruction encoding. | |
339 | ||
8f065d3b | 340 | * Add support for .nops directive. It is currently supported only for |
62a02d25 L |
341 | x86 targets. |
342 | ||
64411043 PD |
343 | * Add support for the .insn directive on RISC-V targets. |
344 | ||
9176ac5b NC |
345 | Changes in 2.30: |
346 | ||
ba8826a8 AO |
347 | * Add support for loaction views in DWARF debug line information. |
348 | ||
55a09eb6 TG |
349 | Changes in 2.29: |
350 | ||
a91e1603 L |
351 | * Add support for ELF SHF_GNU_MBIND. |
352 | ||
f96bd6c2 PC |
353 | * Add support for the WebAssembly file format and wasm32 ELF conversion. |
354 | ||
7e0de605 | 355 | * PowerPC gas now checks that the correct register class is used in |
ece5dcc1 AM |
356 | instructions. For instance, "addi %f4,%cr3,%r31" warns three times |
357 | that the registers are invalid. | |
7e0de605 | 358 | |
93f11b16 DD |
359 | * Add support for the Texas Instruments PRU processor. |
360 | ||
0cda1e19 TP |
361 | * Support for the ARMv8-R architecture and Cortex-R52 processor has been |
362 | added to the ARM port. | |
ced40572 | 363 | |
9703a4ef TG |
364 | Changes in 2.28: |
365 | ||
e23eba97 NC |
366 | * Add support for the RISC-V architecture. |
367 | ||
b19ea8d2 | 368 | * Add support for the ARM Cortex-M23 and Cortex-M33 processors. |
ce1b0a45 | 369 | |
96a84ea3 TG |
370 | Changes in 2.27: |
371 | ||
4e3e1fdf L |
372 | * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. |
373 | ||
2edb36e7 NC |
374 | * Add --no-pad-sections to stop the assembler from padding the end of output |
375 | sections up to their alignment boundary. | |
376 | ||
15afaa63 TP |
377 | * Support for the ARMv8-M architecture has been added to the ARM port. Support |
378 | for the ARMv8-M Security and DSP Extensions has also been added to the ARM | |
379 | port. | |
380 | ||
f36e33da CZ |
381 | * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and |
382 | .extCoreRegister pseudo-ops that allow an user to define custom | |
383 | instructions, conditional codes, auxiliary and core registers. | |
384 | ||
b8871f35 L |
385 | * Add a configure option --enable-elf-stt-common to decide whether ELF |
386 | assembler should generate common symbols with the STT_COMMON type by | |
387 | default. Default to no. | |
388 | ||
a05a5b64 | 389 | * New command-line option --elf-stt-common= for ELF targets to control |
b8871f35 L |
390 | whether to generate common symbols with the STT_COMMON type. |
391 | ||
9fb71ee4 NC |
392 | * Add ability to set section flags and types via numeric values for ELF |
393 | based targets. | |
81c23f82 | 394 | |
0cb4071e L |
395 | * Add a configure option --enable-x86-relax-relocations to decide whether |
396 | x86 assembler should generate relax relocations by default. Default to | |
397 | yes, except for x86 Solaris targets older than Solaris 12. | |
398 | ||
a05a5b64 | 399 | * New command-line option -mrelax-relocations= for x86 target to control |
0cb4071e L |
400 | whether to generate relax relocations. |
401 | ||
a05a5b64 | 402 | * New command-line option -mfence-as-lock-add=yes for x86 target to encode |
9d3fc4e1 L |
403 | lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". |
404 | ||
4670103e CZ |
405 | * Add assembly-time relaxation option for ARC cpus. |
406 | ||
9004b6bd AB |
407 | * Add --with-cpu=TYPE configure option for ARC gas. This allows the default |
408 | cpu type to be adjusted at configure time. | |
409 | ||
7feec526 TG |
410 | Changes in 2.26: |
411 | ||
edeefb67 L |
412 | * Add a configure option --enable-compressed-debug-sections={all,gas} to |
413 | decide whether DWARF debug sections should be compressed by default. | |
e12fe555 | 414 | |
886a2506 NC |
415 | * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove |
416 | assembler support for Argonaut RISC architectures. | |
417 | ||
d02603dc NC |
418 | * Symbol and label names can now be enclosed in double quotes (") which allows |
419 | them to contain characters that are not part of valid symbol names in high | |
420 | level languages. | |
421 | ||
f33026a9 MW |
422 | * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The |
423 | previous spelling, -march=armv6zk, is still accepted. | |
424 | ||
88f0ea34 MW |
425 | * Support for the ARMv8.1 architecture has been added to the Aarch64 port. |
426 | Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture | |
427 | extensions has also been added to the Aarch64 port. | |
428 | ||
a5932920 MW |
429 | * Support for the ARMv8.1 architecture has been added to the ARM port. Support |
430 | for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also | |
431 | been added to the ARM port. | |
432 | ||
ea556d25 L |
433 | * Extend --compress-debug-sections option to support |
434 | --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF | |
435 | targets. | |
436 | ||
0d2b51ad L |
437 | * --compress-debug-sections is turned on for Linux/x86 by default. |
438 | ||
c50415e2 TG |
439 | Changes in 2.25: |
440 | ||
f36e8886 BS |
441 | * Add support for the AVR Tiny microcontrollers. |
442 | ||
73589c9d CS |
443 | * Replace support for openrisc and or32 with support for or1k. |
444 | ||
2e6976a8 | 445 | * Enhanced the ARM port to accept the assembler output from the CodeComposer |
a05a5b64 | 446 | Studio tool. Support is enabled via the new command-line option -mccs. |
2e6976a8 | 447 | |
35c08157 KLC |
448 | * Add support for the Andes NDS32. |
449 | ||
58ca03a2 TG |
450 | Changes in 2.24: |
451 | ||
13761a11 NC |
452 | * Add support for the Texas Instruments MSP430X processor. |
453 | ||
a05a5b64 | 454 | * Add -gdwarf-sections command-line option to enable per-code-section |
b40bf0a2 NC |
455 | generation of DWARF .debug_line sections. |
456 | ||
36591ba1 SL |
457 | * Add support for Altera Nios II. |
458 | ||
a3c62988 NC |
459 | * Add support for the Imagination Technologies Meta processor. |
460 | ||
5bf135a7 NC |
461 | * Add support for the v850e3v5. |
462 | ||
e8044f35 RS |
463 | * Remove assembler support for MIPS ECOFF targets. |
464 | ||
af18cb59 TG |
465 | Changes in 2.23: |
466 | ||
da2bb560 NC |
467 | * Add support for the 64-bit ARM architecture: AArch64. |
468 | ||
6927f982 NC |
469 | * Add support for S12X processor. |
470 | ||
b9c361e0 JL |
471 | * Add support for the VLE extension to the PowerPC architecture. |
472 | ||
f6c1a2d5 NC |
473 | * Add support for the Freescale XGATE architecture. |
474 | ||
fa94de6b RM |
475 | * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock |
476 | directives. These are currently available only for x86 and ARM targets. | |
477 | ||
99c513f6 DD |
478 | * Add support for the Renesas RL78 architecture. |
479 | ||
cfb8c092 NC |
480 | * Add support for the Adapteva EPIPHANY architecture. |
481 | ||
fe13e45b | 482 | * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax. |
29c048b6 | 483 | |
a7142d94 TG |
484 | Changes in 2.22: |
485 | ||
69f56ae1 | 486 | * Add support for the Tilera TILEPro and TILE-Gx architectures. |
44f45767 | 487 | |
90b3661c | 488 | Changes in 2.21: |
44f45767 | 489 | |
5fec8599 L |
490 | * Gas no longer requires doubling of ampersands in macros. |
491 | ||
40b36596 JM |
492 | * Add support for the TMS320C6000 (TI C6X) processor family. |
493 | ||
31907d5e DK |
494 | * GAS now understands an extended syntax in the .section directive flags |
495 | for COFF targets that allows the section's alignment to be specified. This | |
496 | feature has also been backported to the 2.20 release series, starting with | |
497 | 2.20.1. | |
498 | ||
c7927a3c NC |
499 | * Add support for the Renesas RX processor. |
500 | ||
a05a5b64 | 501 | * New command-line option, --compress-debug-sections, which requests |
700c4060 CC |
502 | compression of DWARF debug information sections in the relocatable output |
503 | file. Compressed debug sections are supported by readelf, objdump, and | |
504 | gold, but not currently by Gnu ld. | |
505 | ||
81c23f82 TG |
506 | Changes in 2.20: |
507 | ||
1cd986c5 NC |
508 | * Added support for v850e2 and v850e2v3. |
509 | ||
3e7a7d11 NC |
510 | * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type |
511 | pseudo op. It marks the symbol as being globally unique in the entire | |
512 | process. | |
513 | ||
c921be7d NC |
514 | * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified |
515 | in binary rather than text. | |
6e33da12 | 516 | |
c1711530 DK |
517 | * Add support for common symbol alignment to PE formats. |
518 | ||
92846e72 CC |
519 | * Add support for the new discriminator column in the DWARF line table, |
520 | with a discriminator operand for the .loc directive. | |
521 | ||
c3b7224a NC |
522 | * Add support for Sunplus score architecture. |
523 | ||
d8045f23 NC |
524 | * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to |
525 | indicate that if the symbol is the target of a relocation, its value should | |
526 | not be use. Instead the function should be invoked and its result used as | |
527 | the value. | |
fa94de6b | 528 | |
84e94c90 NC |
529 | * Add support for Lattice Mico32 (lm32) architecture. |
530 | ||
fa94de6b | 531 | * Add support for Xilinx MicroBlaze architecture. |
caa03924 | 532 | |
6e33da12 TG |
533 | Changes in 2.19: |
534 | ||
4f6d9c90 DJ |
535 | * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind |
536 | tables without runtime relocation. | |
537 | ||
a05a5b64 | 538 | * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which |
6fd4f6cc DD |
539 | adds compatibility with H'00 style hex constants. |
540 | ||
a05a5b64 | 541 | * New command-line option, -msse-check=[none|error|warning], for x86 |
daf50ae7 L |
542 | targets. |
543 | ||
a05a5b64 | 544 | * New sub-option added to the assembler's -a command-line switch to |
83f10cb2 NC |
545 | generate a listing output. The 'g' sub-option will insert into the listing |
546 | various information about the assembly, such as assembler version, the | |
a05a5b64 | 547 | command-line options used, and a time stamp. |
83f10cb2 | 548 | |
a05a5b64 | 549 | * New command-line option -msse2avx for x86 target to encode SSE |
c0f3af97 L |
550 | instructions with VEX prefix. |
551 | ||
f1f8f695 | 552 | * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target. |
c0f3af97 | 553 | |
a05a5b64 | 554 | * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU, |
ae40c993 L |
555 | -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg, |
556 | -mnaked-reg and -mold-gcc, for x86 targets. | |
557 | ||
38a57ae7 NC |
558 | * Support for generating wide character strings has been added via the new |
559 | pseudo ops: .string16, .string32 and .string64. | |
560 | ||
85f10a01 MM |
561 | * Support for SSE5 has been added to the i386 port. |
562 | ||
7c3d153f NC |
563 | Changes in 2.18: |
564 | ||
ec2655a6 NC |
565 | * The GAS sources are now released under the GPLv3. |
566 | ||
3d3d428f NC |
567 | * Support for the National Semiconductor CR16 target has been added. |
568 | ||
3f9ce309 AM |
569 | * Added gas .reloc pseudo. This is a low-level interface for creating |
570 | relocations. | |
571 | ||
99ad8390 NC |
572 | * Add support for x86_64 PE+ target. |
573 | ||
1c0d3aa6 | 574 | * Add support for Score target. |
83518699 | 575 | |
ec2655a6 NC |
576 | Changes in 2.17: |
577 | ||
d70c5fc7 NC |
578 | * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems. |
579 | ||
08333dc4 NS |
580 | * Support for ms2 architecture has been added. |
581 | ||
b7b8fb1d NC |
582 | * Support for the Z80 processor family has been added. |
583 | ||
3e8a519c MM |
584 | * Add support for the "@<file>" syntax to the command line, so that extra |
585 | switches can be read from <file>. | |
586 | ||
a05a5b64 | 587 | * The SH target supports a new command-line switch --enable-reg-prefix which, |
37dedf66 NC |
588 | if enabled, will allow register names to be optionally prefixed with a $ |
589 | character. This allows register names to be distinguished from label names. | |
fa94de6b | 590 | |
6eaeac8a JB |
591 | * Macros with a variable number of arguments are now supported. See the |
592 | documentation for how this works. | |
593 | ||
4bdd3565 NC |
594 | * Added --reduce-memory-overheads switch to reduce the size of the hash |
595 | tables used, at the expense of longer assembly times, and | |
596 | --hash-size=<NUMBER> to set the size of the hash tables used by gas. | |
597 | ||
5e75c3ab JB |
598 | * Macro names and macro parameter names can now be any identifier that would |
599 | also be legal as a symbol elsewhere. For macro parameter names, this is | |
600 | known to cause problems in certain sources when the respective target uses | |
601 | characters inconsistently, and thus macro parameter references may no longer | |
602 | be recognized as such (see the documentation for details). | |
fa94de6b | 603 | |
d2c5f73e NC |
604 | * Support the .f_floating, .d_floating, .g_floating and .h_floating directives |
605 | for the VAX target in order to be more compatible with the VAX MACRO | |
606 | assembler. | |
607 | ||
a05a5b64 | 608 | * New command-line option -mtune=[itanium1|itanium2] for IA64 targets. |
8c2fda1d | 609 | |
957d91c1 NC |
610 | Changes in 2.16: |
611 | ||
fffeaa5f JB |
612 | * Redefinition of macros now results in an error. |
613 | ||
a05a5b64 | 614 | * New command-line option -mhint.b=[ok|warning|error] for IA64 targets. |
91d777ee | 615 | |
a05a5b64 | 616 | * New command-line option -munwind-check=[warning|error] for IA64 |
970d6792 L |
617 | targets. |
618 | ||
f1dab70d JB |
619 | * The IA64 port now uses automatic dependency violation removal as its default |
620 | mode. | |
621 | ||
7499d566 NC |
622 | * Port to MAXQ processor contributed by HCL Tech. |
623 | ||
7ed4c4c5 NC |
624 | * Added support for generating unwind tables for ARM ELF targets. |
625 | ||
a05a5b64 | 626 | * Add a -g command-line option to generate debug information in the target's |
329e276d NC |
627 | preferred debug format. |
628 | ||
1fe1f39c NC |
629 | * Support for the crx-elf target added. |
630 | ||
1a320fbb | 631 | * Support for the sh-symbianelf target added. |
1fe1f39c | 632 | |
0503b355 BF |
633 | * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations |
634 | on pe[i]-i386; required for this target's DWARF 2 support. | |
635 | ||
6b6e92f4 NC |
636 | * Support for Motorola MCF521x/5249/547x/548x added. |
637 | ||
fd99574b NC |
638 | * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC |
639 | instrucitons. | |
640 | ||
a05a5b64 | 641 | * New command-line option -mno-shared for MIPS ELF targets. |
aa6975fb | 642 | |
a05a5b64 | 643 | * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro |
caa32fe5 NC |
644 | added to enter (and leave) alternate macro syntax mode. |
645 | ||
0477af35 NC |
646 | Changes in 2.15: |
647 | ||
7a7f4e42 CD |
648 | * The MIPS -membedded-pic option (Embedded-PIC code generation) is |
649 | deprecated and will be removed in a future release. | |
650 | ||
6edf0760 NC |
651 | * Added PIC m32r Linux (ELF) and support to M32R assembler. |
652 | ||
09d92015 MM |
653 | * Added support for ARM V6. |
654 | ||
88da98f3 MS |
655 | * Added support for sh4a and variants. |
656 | ||
eb764db8 NC |
657 | * Support for Renesas M32R2 added. |
658 | ||
88da98f3 MS |
659 | * Limited support for Mapping Symbols as specified in the ARM ELF |
660 | specification has been added to the arm assembler. | |
ed769ec1 | 661 | |
0bbf2aa4 NC |
662 | * On ARM architectures, added a new gas directive ".unreq" that undoes |
663 | definitions created by ".req". | |
664 | ||
3e602632 NC |
665 | * Support for Motorola ColdFire MCF528x added. |
666 | ||
05da4302 NC |
667 | * Added --gstabs+ switch to enable the generation of STABS debug format |
668 | information with GNU extensions. | |
fa94de6b | 669 | |
6a265366 CD |
670 | * Added support for MIPS64 Release 2. |
671 | ||
8ad30312 NC |
672 | * Added support for v850e1. |
673 | ||
12b55ccc L |
674 | * Added -n switch for x86 assembler. By default, x86 GAS replaces |
675 | multiple nop instructions used for alignment within code sections | |
676 | with multi-byte nop instructions such as leal 0(%esi,1),%esi. This | |
677 | switch disables the optimization. | |
678 | ||
78849248 ILT |
679 | * Removed -n option from MIPS assembler. It was not useful, and confused the |
680 | existing -non_shared option. | |
681 | ||
43c58ae6 CD |
682 | Changes in 2.14: |
683 | ||
69be0a2b CD |
684 | * Added support for MIPS32 Release 2. |
685 | ||
e8fd7476 NC |
686 | * Added support for Xtensa architecture. |
687 | ||
e16bb312 NC |
688 | * Support for Intel's iWMMXt processor (an ARM variant) added. |
689 | ||
cce4814f NC |
690 | * An assembler test generator has been contributed and an example file that |
691 | uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c). | |
fa94de6b | 692 | |
5177500f NC |
693 | * Support for SH2E added. |
694 | ||
fea17916 NC |
695 | * GASP has now been removed. |
696 | ||
004d9caf NC |
697 | * Support for Texas Instruments TMS320C4x and TMS320C3x series of |
698 | DSP's contributed by Michael Hayes and Svein E. Seldal. | |
fa94de6b | 699 | |
a40cbfa3 NC |
700 | * Support for the Ubicom IP2xxx microcontroller added. |
701 | ||
2cbb2eef NC |
702 | Changes in 2.13: |
703 | ||
a40cbfa3 NC |
704 | * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400 |
705 | and FR500 included. | |
0ebb9a87 | 706 | |
a40cbfa3 | 707 | * Support for DLX processor added. |
52216602 | 708 | |
a40cbfa3 NC |
709 | * GASP has now been deprecated and will be removed in a future release. Use |
710 | the macro facilities in GAS instead. | |
3f965e60 | 711 | |
a40cbfa3 NC |
712 | * GASP now correctly parses floating point numbers. Unless the base is |
713 | explicitly specified, they are interpreted as decimal numbers regardless of | |
714 | the currently specified base. | |
1ac57253 | 715 | |
9a66911f NC |
716 | Changes in 2.12: |
717 | ||
a40cbfa3 | 718 | * Support for Don Knuth's MMIX, by Hans-Peter Nilsson. |
49fda6c8 | 719 | |
a40cbfa3 | 720 | * Support for the OpenRISC 32-bit embedded processor by OpenCores. |
3b16e843 | 721 | |
fa94de6b RM |
722 | * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for |
723 | specifying the target instruction set. The old method of specifying the | |
a40cbfa3 NC |
724 | target processor has been deprecated, but is still accepted for |
725 | compatibility. | |
03b1477f | 726 | |
a40cbfa3 NC |
727 | * Support for the VFP floating-point instruction set has been added to |
728 | the ARM assembler. | |
252b5132 | 729 | |
a40cbfa3 NC |
730 | * New psuedo op: .incbin to include a set of binary data at a given point |
731 | in the assembly. Contributed by Anders Norlander. | |
7e005732 | 732 | |
a40cbfa3 NC |
733 | * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated |
734 | but still works for compatability. | |
ec68c924 | 735 | |
fa94de6b | 736 | * The MIPS assembler no longer issues a warning by default when it |
a05a5b64 | 737 | generates a nop instruction from a macro. The new command-line option |
a40cbfa3 | 738 | -n will turn on the warning. |
63486801 | 739 | |
2dac7317 JW |
740 | Changes in 2.11: |
741 | ||
500800ca NC |
742 | * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff. |
743 | ||
a40cbfa3 | 744 | * x86 gas now supports the full Pentium4 instruction set. |
a167610d | 745 | |
a40cbfa3 | 746 | * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs. |
c0d8940f | 747 | |
a40cbfa3 | 748 | * Support for Motorola 68HC11 and 68HC12. |
df86943d | 749 | |
a40cbfa3 | 750 | * Support for Texas Instruments TMS320C54x (tic54x). |
39bec121 | 751 | |
a40cbfa3 | 752 | * Support for IA-64. |
2dac7317 | 753 | |
a40cbfa3 | 754 | * Support for i860, by Jason Eckhardt. |
22b36938 | 755 | |
a40cbfa3 | 756 | * Support for CRIS (Axis Communications ETRAX series). |
5bcac8a4 | 757 | |
a40cbfa3 | 758 | * x86 gas has a new .arch pseudo op to specify the target CPU architecture. |
a38cf1db | 759 | |
a05a5b64 | 760 | * x86 gas -q command-line option quietens warnings about register size changes |
a40cbfa3 NC |
761 | due to suffix, indirect jmp/call without `*', stand-alone prefixes, and |
762 | translating various deprecated floating point instructions. | |
a38cf1db | 763 | |
252b5132 RH |
764 | Changes in 2.10: |
765 | ||
a40cbfa3 NC |
766 | * Support for the ARM msr instruction was changed to only allow an immediate |
767 | operand when altering the flags field. | |
d14442f4 | 768 | |
a40cbfa3 | 769 | * Support for ATMEL AVR. |
adde6300 | 770 | |
a40cbfa3 | 771 | * Support for IBM 370 ELF. Somewhat experimental. |
b5ebe70e | 772 | |
a40cbfa3 | 773 | * Support for numbers with suffixes. |
3fd9f047 | 774 | |
a40cbfa3 | 775 | * Added support for breaking to the end of repeat loops. |
6a6987a9 | 776 | |
a40cbfa3 | 777 | * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL). |
6a6987a9 | 778 | |
a40cbfa3 | 779 | * New .elseif pseudo-op added. |
3fd9f047 | 780 | |
a40cbfa3 | 781 | * New --fatal-warnings option. |
1f776aa5 | 782 | |
a40cbfa3 | 783 | * picoJava architecture support added. |
252b5132 | 784 | |
a40cbfa3 | 785 | * Motorola MCore 210 processor support added. |
041dd5a9 | 786 | |
fa94de6b | 787 | * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386 |
a40cbfa3 | 788 | assembly programs with intel syntax. |
252b5132 | 789 | |
a40cbfa3 | 790 | * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code. |
252b5132 | 791 | |
a40cbfa3 | 792 | * Added -gdwarf2 option to generate DWARF 2 debugging information. |
041dd5a9 | 793 | |
a40cbfa3 | 794 | * Full 16-bit mode support for i386. |
252b5132 | 795 | |
fa94de6b | 796 | * Greatly improved instruction operand checking for i386. This change will |
a40cbfa3 NC |
797 | produce errors or warnings on incorrect assembly code that previous versions |
798 | of gas accepted. If you get unexpected messages from code that worked with | |
799 | older versions of gas, please double check the code before reporting a bug. | |
252b5132 | 800 | |
a40cbfa3 | 801 | * Weak symbol support added for COFF targets. |
252b5132 | 802 | |
a40cbfa3 | 803 | * Mitsubishi D30V support added. |
252b5132 | 804 | |
a40cbfa3 | 805 | * Texas Instruments c80 (tms320c80) support added. |
252b5132 | 806 | |
a40cbfa3 | 807 | * i960 ELF support added. |
bedf545c | 808 | |
a40cbfa3 | 809 | * ARM ELF support added. |
a057431b | 810 | |
252b5132 RH |
811 | Changes in 2.9: |
812 | ||
a40cbfa3 | 813 | * Texas Instruments c30 (tms320c30) support added. |
252b5132 | 814 | |
fa94de6b | 815 | * The assembler now optimizes the exception frame information generated by egcs |
a40cbfa3 | 816 | and gcc 2.8. The new --traditional-format option disables this optimization. |
252b5132 | 817 | |
a40cbfa3 | 818 | * Added --gstabs option to generate stabs debugging information. |
252b5132 | 819 | |
fa94de6b | 820 | * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a |
a40cbfa3 | 821 | listing. |
252b5132 | 822 | |
a40cbfa3 | 823 | * Added -MD option to print dependencies. |
252b5132 RH |
824 | |
825 | Changes in 2.8: | |
826 | ||
a40cbfa3 | 827 | * BeOS support added. |
252b5132 | 828 | |
a40cbfa3 | 829 | * MIPS16 support added. |
252b5132 | 830 | |
a40cbfa3 | 831 | * Motorola ColdFire 5200 support added (configure for m68k and use -m5200). |
252b5132 | 832 | |
a40cbfa3 | 833 | * Alpha/VMS support added. |
252b5132 | 834 | |
a40cbfa3 NC |
835 | * m68k options --base-size-default-16, --base-size-default-32, |
836 | --disp-size-default-16, and --disp-size-default-32 added. | |
252b5132 | 837 | |
a40cbfa3 NC |
838 | * The alignment directives now take an optional third argument, which is the |
839 | maximum number of bytes to skip. If doing the alignment would require | |
840 | skipping more than the given number of bytes, the alignment is not done at | |
841 | all. | |
252b5132 | 842 | |
a40cbfa3 | 843 | * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning. |
252b5132 | 844 | |
a40cbfa3 NC |
845 | * The -a option takes a new suboption, c (e.g., -alc), to skip false |
846 | conditionals in listings. | |
252b5132 | 847 | |
a40cbfa3 NC |
848 | * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if |
849 | the symbol is already defined. | |
252b5132 RH |
850 | |
851 | Changes in 2.7: | |
852 | ||
a40cbfa3 NC |
853 | * The PowerPC assembler now allows the use of symbolic register names (r0, |
854 | etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.) | |
855 | can be used any time. PowerPC 860 move to/from SPR instructions have been | |
856 | added. | |
252b5132 | 857 | |
a40cbfa3 | 858 | * Alpha Linux (ELF) support added. |
252b5132 | 859 | |
a40cbfa3 | 860 | * PowerPC ELF support added. |
252b5132 | 861 | |
a40cbfa3 | 862 | * m68k Linux (ELF) support added. |
252b5132 | 863 | |
a40cbfa3 | 864 | * i960 Hx/Jx support added. |
252b5132 | 865 | |
a40cbfa3 | 866 | * i386/PowerPC gnu-win32 support added. |
252b5132 | 867 | |
a40cbfa3 NC |
868 | * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the |
869 | default is to build COFF-only support. To get a set of tools that generate | |
fa94de6b | 870 | ELF (they'll understand both COFF and ELF), you must configure with |
a40cbfa3 | 871 | target=i386-unknown-sco3.2v5elf. |
252b5132 | 872 | |
a40cbfa3 | 873 | * m88k-motorola-sysv3* support added. |
252b5132 RH |
874 | |
875 | Changes in 2.6: | |
876 | ||
a40cbfa3 | 877 | * Gas now directly supports macros, without requiring GASP. |
252b5132 | 878 | |
a40cbfa3 NC |
879 | * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select |
880 | MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the | |
881 | ``.mri 0'' is seen; this can be convenient for inline assembler code. | |
252b5132 | 882 | |
a40cbfa3 | 883 | * Added --defsym SYM=VALUE option. |
252b5132 | 884 | |
a40cbfa3 | 885 | * Added -mips4 support to MIPS assembler. |
252b5132 | 886 | |
a40cbfa3 | 887 | * Added PIC support to Solaris and SPARC SunOS 4 assembler. |
252b5132 RH |
888 | |
889 | Changes in 2.4: | |
890 | ||
a40cbfa3 | 891 | * Converted this directory to use an autoconf-generated configure script. |
252b5132 | 892 | |
a40cbfa3 | 893 | * ARM support, from Richard Earnshaw. |
252b5132 | 894 | |
a40cbfa3 NC |
895 | * Updated VMS support, from Pat Rankin, including considerably improved |
896 | debugging support. | |
252b5132 | 897 | |
a40cbfa3 | 898 | * Support for the control registers in the 68060. |
252b5132 | 899 | |
a40cbfa3 | 900 | * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to |
fa94de6b RM |
901 | provide for possible future gcc changes, for targets where gas provides some |
902 | features not available in the native assembler. If the native assembler is | |
a40cbfa3 | 903 | used, it should become obvious pretty quickly what the problem is. |
252b5132 | 904 | |
a40cbfa3 | 905 | * Usage message is available with "--help". |
252b5132 | 906 | |
fa94de6b | 907 | * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3 |
a40cbfa3 | 908 | also, but didn't get into the NEWS file.) |
252b5132 | 909 | |
a40cbfa3 | 910 | * Weak symbol support for a.out. |
252b5132 | 911 | |
fa94de6b | 912 | * A bug in the listing code which could cause an infinite loop has been fixed. |
a40cbfa3 | 913 | Bugs in listings when generating a COFF object file have also been fixed. |
252b5132 | 914 | |
a40cbfa3 NC |
915 | * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by |
916 | Paul Kranenburg. | |
252b5132 | 917 | |
a40cbfa3 NC |
918 | * Improved Alpha support. Immediate constants can have a much larger range |
919 | now. Support for the 21164 has been contributed by Digital. | |
252b5132 | 920 | |
a40cbfa3 | 921 | * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall. |
252b5132 RH |
922 | |
923 | Changes in 2.3: | |
924 | ||
a40cbfa3 | 925 | * Mach i386 support, by David Mackenzie and Ken Raeburn. |
252b5132 | 926 | |
a40cbfa3 | 927 | * RS/6000 and PowerPC support by Ian Taylor. |
252b5132 | 928 | |
a40cbfa3 NC |
929 | * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit, |
930 | based on mail received from various people. The `-h#' option should work | |
931 | again too. | |
252b5132 | 932 | |
a40cbfa3 | 933 | * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work |
fa94de6b | 934 | with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special |
a40cbfa3 NC |
935 | version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve |
936 | this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu | |
937 | in the "dist" directory. | |
252b5132 | 938 | |
a40cbfa3 NC |
939 | * Vax support in gas fixed for BSD, so it builds and seems to run a couple |
940 | simple tests okay. I haven't put it through extensive testing. (GNU make is | |
941 | currently required for BSD 4.3 builds.) | |
252b5132 | 942 | |
fa94de6b | 943 | * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is |
a40cbfa3 NC |
944 | based on code donated by CMU, which used an a.out-based format. I'm afraid |
945 | the alpha-a.out support is pretty badly mangled, and much of it removed; | |
946 | making it work will require rewriting it as BFD support for the format anyways. | |
252b5132 | 947 | |
a40cbfa3 | 948 | * Irix 5 support. |
252b5132 | 949 | |
fa94de6b | 950 | * The test suites have been fixed up a bit, so that they should work with a |
a40cbfa3 | 951 | couple different versions of expect and dejagnu. |
252b5132 | 952 | |
fa94de6b RM |
953 | * Symbols' values are now handled internally as expressions, permitting more |
954 | flexibility in evaluating them in some cases. Some details of relocation | |
a40cbfa3 NC |
955 | handling have also changed, and simple constant pool management has been |
956 | added, to make the Alpha port easier. | |
252b5132 | 957 | |
a40cbfa3 NC |
958 | * New option "--statistics" for printing out program run times. This is |
959 | intended to be used with the gcc "-Q" option, which prints out times spent in | |
960 | various phases of compilation. (You should be able to get all of them | |
961 | printed out with "gcc -Q -Wa,--statistics", I think.) | |
252b5132 RH |
962 | |
963 | Changes in 2.2: | |
964 | ||
a40cbfa3 | 965 | * RS/6000 AIX and MIPS SGI Irix 5 support has been added. |
252b5132 | 966 | |
fa94de6b RM |
967 | * Configurations that are still in development (and therefore are convenient to |
968 | have listed in configure.in) still get rejected without a minor change to | |
a40cbfa3 NC |
969 | gas/Makefile.in, so people not doing development work shouldn't get the |
970 | impression that support for such configurations is actually believed to be | |
971 | reliable. | |
252b5132 | 972 | |
fa94de6b | 973 | * The program name (usually "as") is printed when a fatal error message is |
a40cbfa3 NC |
974 | displayed. This should prevent some confusion about the source of occasional |
975 | messages about "internal errors". | |
252b5132 | 976 | |
fa94de6b | 977 | * ELF support is falling into place. Support for the 386 should be working. |
a40cbfa3 | 978 | Support for SPARC Solaris is in. HPPA support from Utah is being integrated. |
252b5132 | 979 | |
a40cbfa3 NC |
980 | * Symbol values are maintained as expressions instead of being immediately |
981 | boiled down to add-symbol, sub-symbol, and constant. This permits slightly | |
982 | more complex calculations involving symbols whose values are not alreadey | |
983 | known. | |
252b5132 | 984 | |
a40cbfa3 | 985 | * DBX-style debugging info ("stabs") is now supported for COFF formats. |
fa94de6b RM |
986 | If any stabs directives are seen in the source, GAS will create two new |
987 | sections: a ".stab" and a ".stabstr" section. The format of the .stab | |
a40cbfa3 NC |
988 | section is nearly identical to the a.out symbol format, and .stabstr is |
989 | its string table. For this to be useful, you must have configured GCC | |
990 | to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB | |
991 | that can use the stab sections (4.11 or later). | |
252b5132 | 992 | |
fa94de6b | 993 | * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS |
a40cbfa3 | 994 | support is in progress. |
252b5132 RH |
995 | |
996 | Changes in 2.1: | |
997 | ||
fa94de6b | 998 | * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been |
a40cbfa3 | 999 | incorporated, but not well tested yet. |
252b5132 | 1000 | |
fa94de6b | 1001 | * Altered the opcode table split for m68k; it should require less VM to compile |
a40cbfa3 | 1002 | with gcc now. |
252b5132 | 1003 | |
a40cbfa3 NC |
1004 | * Some minor adjustments to add (Convergent Technologies') Miniframe support, |
1005 | suggested by Ronald Cole. | |
252b5132 | 1006 | |
a40cbfa3 NC |
1007 | * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This |
1008 | includes improved ELF support, which I've started adapting for SPARC Solaris | |
1009 | 2.x. Integration isn't completely, so it probably won't work. | |
252b5132 | 1010 | |
a40cbfa3 | 1011 | * HP9000/300 support, donated by HP, has been merged in. |
252b5132 | 1012 | |
a40cbfa3 | 1013 | * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support. |
252b5132 | 1014 | |
a40cbfa3 | 1015 | * Better error messages for unsupported configurations (e.g., hppa-hpux). |
252b5132 | 1016 | |
a40cbfa3 | 1017 | * Test suite framework is starting to become reasonable. |
252b5132 RH |
1018 | |
1019 | Changes in 2.0: | |
1020 | ||
a40cbfa3 | 1021 | * Mostly bug fixes. |
252b5132 | 1022 | |
a40cbfa3 | 1023 | * Some more merging of BFD and ELF code, but ELF still doesn't work. |
252b5132 RH |
1024 | |
1025 | Changes in 1.94: | |
1026 | ||
a40cbfa3 NC |
1027 | * BFD merge is partly done. Adventurous souls may try giving configure the |
1028 | "--with-bfd-assembler" option. Currently, ELF format requires it, a.out | |
1029 | format accepts it; SPARC CPU accepts it. It's the default only for OS "elf" | |
1030 | or "solaris". (ELF isn't really supported yet. It needs work. I've got | |
1031 | some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not | |
1032 | fully merged yet.) | |
252b5132 | 1033 | |
a40cbfa3 NC |
1034 | * The 68K opcode table has been split in half. It should now compile under gcc |
1035 | without consuming ridiculous amounts of memory. | |
252b5132 | 1036 | |
a40cbfa3 NC |
1037 | * A couple data structures have been reduced in size. This should result in |
1038 | saving a little bit of space at runtime. | |
252b5132 | 1039 | |
a40cbfa3 NC |
1040 | * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF |
1041 | code provided ROSE format support, which I haven't merged in yet. (I can | |
1042 | make it available, if anyone wants to try it out.) Ralph's code, for BSD | |
1043 | 4.4, supports a.out format. We don't have ECOFF support in just yet; it's | |
1044 | coming. | |
252b5132 | 1045 | |
a40cbfa3 | 1046 | * Support for the Hitachi H8/500 has been added. |
252b5132 | 1047 | |
a40cbfa3 NC |
1048 | * VMS host and target support should be working now, thanks chiefly to Eric |
1049 | Youngdale. | |
252b5132 RH |
1050 | |
1051 | Changes in 1.93.01: | |
1052 | ||
a40cbfa3 | 1053 | * For m68k, support for more processors has been added: 68040, CPU32, 68851. |
252b5132 | 1054 | |
a40cbfa3 | 1055 | * For i386, .align is now power-of-two; was number-of-bytes. |
252b5132 | 1056 | |
a40cbfa3 NC |
1057 | * For m68k, "%" is now accepted before register names. For COFF format, which |
1058 | doesn't use underscore prefixes for C labels, it is required, so variable "a0" | |
1059 | can be distinguished from the register. | |
252b5132 | 1060 | |
a40cbfa3 NC |
1061 | * Last public release was 1.38. Lots of configuration changes since then, lots |
1062 | of new CPUs and formats, lots of bugs fixed. | |
252b5132 RH |
1063 | |
1064 | \f | |
d87bef3a | 1065 | Copyright (C) 2012-2023 Free Software Foundation, Inc. |
5bf135a7 NC |
1066 | |
1067 | Copying and distribution of this file, with or without modification, | |
1068 | are permitted in any medium without royalty provided the copyright | |
1069 | notice and this notice are preserved. | |
1070 | ||
252b5132 RH |
1071 | Local variables: |
1072 | fill-column: 79 | |
1073 | End: |