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c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
0fd88904 2
6aba47ca
DJ
3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
4 2003, 2005, 2006, 2007 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
197e01b6
EZ
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
c906108c
SS
22
23#include "defs.h"
615967cb 24#include "doublest.h"
c906108c 25#include "frame.h"
d2427a71
RH
26#include "frame-unwind.h"
27#include "frame-base.h"
baa490c4 28#include "dwarf2-frame.h"
c906108c
SS
29#include "inferior.h"
30#include "symtab.h"
31#include "value.h"
32#include "gdbcmd.h"
33#include "gdbcore.h"
34#include "dis-asm.h"
35#include "symfile.h"
36#include "objfiles.h"
37#include "gdb_string.h"
c5f0f3d0 38#include "linespec.h"
4e052eda 39#include "regcache.h"
615967cb 40#include "reggroups.h"
dc129d82 41#include "arch-utils.h"
4be87837 42#include "osabi.h"
fe898f56 43#include "block.h"
7d9b040b 44#include "infcall.h"
dc129d82
JT
45
46#include "elf-bfd.h"
47
48#include "alpha-tdep.h"
49
c906108c 50\f
515921d7
JB
51/* Return the name of the REGNO register.
52
53 An empty name corresponds to a register number that used to
54 be used for a virtual register. That virtual register has
55 been removed, but the index is still reserved to maintain
56 compatibility with existing remote alpha targets. */
57
fa88f677 58static const char *
636a6dfc
JT
59alpha_register_name (int regno)
60{
5ab84872 61 static const char * const register_names[] =
636a6dfc
JT
62 {
63 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
64 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
65 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
66 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
67 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
68 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
69 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
70 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 71 "pc", "", "unique"
636a6dfc
JT
72 };
73
74 if (regno < 0)
5ab84872 75 return NULL;
e8d2d628 76 if (regno >= ARRAY_SIZE(register_names))
5ab84872
RH
77 return NULL;
78 return register_names[regno];
636a6dfc 79}
d734c450 80
dc129d82 81static int
d734c450
JT
82alpha_cannot_fetch_register (int regno)
83{
515921d7
JB
84 return (regno == ALPHA_ZERO_REGNUM
85 || strlen (alpha_register_name (regno)) == 0);
d734c450
JT
86}
87
dc129d82 88static int
d734c450
JT
89alpha_cannot_store_register (int regno)
90{
515921d7
JB
91 return (regno == ALPHA_ZERO_REGNUM
92 || strlen (alpha_register_name (regno)) == 0);
d734c450
JT
93}
94
dc129d82 95static struct type *
c483c494 96alpha_register_type (struct gdbarch *gdbarch, int regno)
0d056799 97{
72667056
RH
98 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
99 return builtin_type_void_data_ptr;
100 if (regno == ALPHA_PC_REGNUM)
101 return builtin_type_void_func_ptr;
102
103 /* Don't need to worry about little vs big endian until
104 some jerk tries to port to alpha-unicosmk. */
b38b6be2 105 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
8da61cc4 106 return builtin_type_ieee_double;
72667056
RH
107
108 return builtin_type_int64;
0d056799 109}
f8453e34 110
615967cb
RH
111/* Is REGNUM a member of REGGROUP? */
112
113static int
114alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
115 struct reggroup *group)
116{
117 /* Filter out any registers eliminated, but whose regnum is
118 reserved for backward compatibility, e.g. the vfp. */
119 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
120 return 0;
121
df4a182b
RH
122 if (group == all_reggroup)
123 return 1;
124
125 /* Zero should not be saved or restored. Technically it is a general
126 register (just as $f31 would be a float if we represented it), but
127 there's no point displaying it during "info regs", so leave it out
128 of all groups except for "all". */
129 if (regnum == ALPHA_ZERO_REGNUM)
130 return 0;
131
132 /* All other registers are saved and restored. */
133 if (group == save_reggroup || group == restore_reggroup)
615967cb
RH
134 return 1;
135
136 /* All other groups are non-overlapping. */
137
138 /* Since this is really a PALcode memory slot... */
139 if (regnum == ALPHA_UNIQUE_REGNUM)
140 return group == system_reggroup;
141
142 /* Force the FPCR to be considered part of the floating point state. */
143 if (regnum == ALPHA_FPCR_REGNUM)
144 return group == float_reggroup;
145
146 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
147 return group == float_reggroup;
148 else
149 return group == general_reggroup;
150}
151
c483c494
RH
152/* The following represents exactly the conversion performed by
153 the LDS instruction. This applies to both single-precision
154 floating point and 32-bit integers. */
155
156static void
157alpha_lds (void *out, const void *in)
158{
159 ULONGEST mem = extract_unsigned_integer (in, 4);
160 ULONGEST frac = (mem >> 0) & 0x7fffff;
161 ULONGEST sign = (mem >> 31) & 1;
162 ULONGEST exp_msb = (mem >> 30) & 1;
163 ULONGEST exp_low = (mem >> 23) & 0x7f;
164 ULONGEST exp, reg;
165
166 exp = (exp_msb << 10) | exp_low;
167 if (exp_msb)
168 {
169 if (exp_low == 0x7f)
170 exp = 0x7ff;
171 }
172 else
173 {
174 if (exp_low != 0x00)
175 exp |= 0x380;
176 }
177
178 reg = (sign << 63) | (exp << 52) | (frac << 29);
179 store_unsigned_integer (out, 8, reg);
180}
181
182/* Similarly, this represents exactly the conversion performed by
183 the STS instruction. */
184
39efb398 185static void
c483c494
RH
186alpha_sts (void *out, const void *in)
187{
188 ULONGEST reg, mem;
189
190 reg = extract_unsigned_integer (in, 8);
191 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
192 store_unsigned_integer (out, 4, mem);
193}
194
d2427a71
RH
195/* The alpha needs a conversion between register and memory format if the
196 register is a floating point register and memory format is float, as the
197 register format must be double or memory format is an integer with 4
198 bytes or less, as the representation of integers in floating point
199 registers is different. */
200
c483c494 201static int
ff2e87ac 202alpha_convert_register_p (int regno, struct type *type)
14696584 203{
c483c494 204 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31);
14696584
RH
205}
206
d2427a71 207static void
ff2e87ac 208alpha_register_to_value (struct frame_info *frame, int regnum,
5b819568 209 struct type *valtype, gdb_byte *out)
5868c862 210{
2a1ce6ec
MK
211 gdb_byte in[MAX_REGISTER_SIZE];
212
ff2e87ac 213 frame_register_read (frame, regnum, in);
c483c494 214 switch (TYPE_LENGTH (valtype))
d2427a71 215 {
c483c494
RH
216 case 4:
217 alpha_sts (out, in);
218 break;
219 case 8:
220 memcpy (out, in, 8);
221 break;
222 default:
323e0a4a 223 error (_("Cannot retrieve value from floating point register"));
d2427a71 224 }
d2427a71 225}
5868c862 226
d2427a71 227static void
ff2e87ac 228alpha_value_to_register (struct frame_info *frame, int regnum,
5b819568 229 struct type *valtype, const gdb_byte *in)
d2427a71 230{
2a1ce6ec
MK
231 gdb_byte out[MAX_REGISTER_SIZE];
232
c483c494 233 switch (TYPE_LENGTH (valtype))
d2427a71 234 {
c483c494
RH
235 case 4:
236 alpha_lds (out, in);
237 break;
238 case 8:
239 memcpy (out, in, 8);
240 break;
241 default:
323e0a4a 242 error (_("Cannot store value in floating point register"));
d2427a71 243 }
ff2e87ac 244 put_frame_register (frame, regnum, out);
5868c862
JT
245}
246
d2427a71
RH
247\f
248/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
249 the stack. The register arguments are stored in ARG_REG_BUFFER, and
250 then moved into the register file; this simplifies the passing of a
251 large struct which extends from the registers to the stack, plus avoids
252 three ptrace invocations per word.
253
254 We don't bother tracking which register values should go in integer
255 regs or fp regs; we load the same values into both.
256
d2427a71
RH
257 If the called function is returning a structure, the address of the
258 structure to be returned is passed as a hidden first argument. */
c906108c 259
d2427a71 260static CORE_ADDR
7d9b040b 261alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
c88e30c0
RH
262 struct regcache *regcache, CORE_ADDR bp_addr,
263 int nargs, struct value **args, CORE_ADDR sp,
264 int struct_return, CORE_ADDR struct_addr)
c906108c 265{
d2427a71
RH
266 int i;
267 int accumulate_size = struct_return ? 8 : 0;
d2427a71 268 struct alpha_arg
c906108c 269 {
2a1ce6ec 270 gdb_byte *contents;
d2427a71
RH
271 int len;
272 int offset;
273 };
c88e30c0
RH
274 struct alpha_arg *alpha_args
275 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
52f0bd74 276 struct alpha_arg *m_arg;
2a1ce6ec 277 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 278 int required_arg_regs;
7d9b040b 279 CORE_ADDR func_addr = find_function_addr (function, NULL);
c906108c 280
c88e30c0
RH
281 /* The ABI places the address of the called function in T12. */
282 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
283
284 /* Set the return address register to point to the entry point
285 of the program, where a breakpoint lies in wait. */
286 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
287
288 /* Lay out the arguments in memory. */
d2427a71
RH
289 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
290 {
291 struct value *arg = args[i];
4991999e 292 struct type *arg_type = check_typedef (value_type (arg));
c88e30c0 293
d2427a71
RH
294 /* Cast argument to long if necessary as the compiler does it too. */
295 switch (TYPE_CODE (arg_type))
c906108c 296 {
d2427a71
RH
297 case TYPE_CODE_INT:
298 case TYPE_CODE_BOOL:
299 case TYPE_CODE_CHAR:
300 case TYPE_CODE_RANGE:
301 case TYPE_CODE_ENUM:
0ede8eca 302 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 303 {
0ede8eca
RH
304 /* 32-bit values must be sign-extended to 64 bits
305 even if the base data type is unsigned. */
306 arg_type = builtin_type_int32;
307 arg = value_cast (arg_type, arg);
308 }
309 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
310 {
311 arg_type = builtin_type_int64;
d2427a71
RH
312 arg = value_cast (arg_type, arg);
313 }
314 break;
7b5e1cb3 315
c88e30c0
RH
316 case TYPE_CODE_FLT:
317 /* "float" arguments loaded in registers must be passed in
318 register format, aka "double". */
319 if (accumulate_size < sizeof (arg_reg_buffer)
320 && TYPE_LENGTH (arg_type) == 4)
321 {
8da61cc4 322 arg_type = builtin_type_ieee_double;
c88e30c0
RH
323 arg = value_cast (arg_type, arg);
324 }
325 /* Tru64 5.1 has a 128-bit long double, and passes this by
326 invisible reference. No one else uses this data type. */
327 else if (TYPE_LENGTH (arg_type) == 16)
328 {
329 /* Allocate aligned storage. */
330 sp = (sp & -16) - 16;
331
332 /* Write the real data into the stack. */
0fd88904 333 write_memory (sp, value_contents (arg), 16);
c88e30c0
RH
334
335 /* Construct the indirection. */
336 arg_type = lookup_pointer_type (arg_type);
337 arg = value_from_pointer (arg_type, sp);
338 }
339 break;
7b5e1cb3
RH
340
341 case TYPE_CODE_COMPLEX:
342 /* ??? The ABI says that complex values are passed as two
343 separate scalar values. This distinction only matters
344 for complex float. However, GCC does not implement this. */
345
346 /* Tru64 5.1 has a 128-bit long double, and passes this by
347 invisible reference. */
348 if (TYPE_LENGTH (arg_type) == 32)
349 {
350 /* Allocate aligned storage. */
351 sp = (sp & -16) - 16;
352
353 /* Write the real data into the stack. */
0fd88904 354 write_memory (sp, value_contents (arg), 32);
7b5e1cb3
RH
355
356 /* Construct the indirection. */
357 arg_type = lookup_pointer_type (arg_type);
358 arg = value_from_pointer (arg_type, sp);
359 }
360 break;
361
d2427a71
RH
362 default:
363 break;
c906108c 364 }
d2427a71
RH
365 m_arg->len = TYPE_LENGTH (arg_type);
366 m_arg->offset = accumulate_size;
367 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
0fd88904 368 m_arg->contents = value_contents_writeable (arg);
c906108c
SS
369 }
370
d2427a71
RH
371 /* Determine required argument register loads, loading an argument register
372 is expensive as it uses three ptrace calls. */
373 required_arg_regs = accumulate_size / 8;
374 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
375 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 376
d2427a71 377 /* Make room for the arguments on the stack. */
c88e30c0
RH
378 if (accumulate_size < sizeof(arg_reg_buffer))
379 accumulate_size = 0;
380 else
381 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 382 sp -= accumulate_size;
c906108c 383
c88e30c0 384 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 385 sp &= ~15;
c906108c 386
d2427a71
RH
387 /* `Push' arguments on the stack. */
388 for (i = nargs; m_arg--, --i >= 0;)
c906108c 389 {
2a1ce6ec 390 gdb_byte *contents = m_arg->contents;
c88e30c0
RH
391 int offset = m_arg->offset;
392 int len = m_arg->len;
393
394 /* Copy the bytes destined for registers into arg_reg_buffer. */
395 if (offset < sizeof(arg_reg_buffer))
396 {
397 if (offset + len <= sizeof(arg_reg_buffer))
398 {
399 memcpy (arg_reg_buffer + offset, contents, len);
400 continue;
401 }
402 else
403 {
404 int tlen = sizeof(arg_reg_buffer) - offset;
405 memcpy (arg_reg_buffer + offset, contents, tlen);
406 offset += tlen;
407 contents += tlen;
408 len -= tlen;
409 }
410 }
411
412 /* Everything else goes to the stack. */
413 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 414 }
c88e30c0
RH
415 if (struct_return)
416 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 417
d2427a71
RH
418 /* Load the argument registers. */
419 for (i = 0; i < required_arg_regs; i++)
420 {
09cc52fd
RH
421 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
422 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
423 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
424 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 425 }
c906108c 426
09cc52fd
RH
427 /* Finally, update the stack pointer. */
428 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
429
c88e30c0 430 return sp;
c906108c
SS
431}
432
5ec2bb99
RH
433/* Extract from REGCACHE the value about to be returned from a function
434 and copy it into VALBUF. */
d2427a71 435
dc129d82 436static void
5ec2bb99 437alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
5b819568 438 gdb_byte *valbuf)
140f9984 439{
7b5e1cb3 440 int length = TYPE_LENGTH (valtype);
2a1ce6ec 441 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99
RH
442 ULONGEST l;
443
444 switch (TYPE_CODE (valtype))
445 {
446 case TYPE_CODE_FLT:
7b5e1cb3 447 switch (length)
5ec2bb99
RH
448 {
449 case 4:
450 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
c483c494 451 alpha_sts (valbuf, raw_buffer);
5ec2bb99
RH
452 break;
453
454 case 8:
455 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
456 break;
457
24064b5c
RH
458 case 16:
459 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
460 read_memory (l, valbuf, 16);
461 break;
462
5ec2bb99 463 default:
323e0a4a 464 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
465 }
466 break;
467
7b5e1cb3
RH
468 case TYPE_CODE_COMPLEX:
469 switch (length)
470 {
471 case 8:
472 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
473 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
474 break;
475
476 case 16:
477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 478 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
479 break;
480
481 case 32:
482 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
483 read_memory (l, valbuf, 32);
484 break;
485
486 default:
323e0a4a 487 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
488 }
489 break;
490
5ec2bb99
RH
491 default:
492 /* Assume everything else degenerates to an integer. */
493 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 494 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
495 break;
496 }
140f9984
JT
497}
498
5ec2bb99
RH
499/* Insert the given value into REGCACHE as if it was being
500 returned by a function. */
0d056799 501
d2427a71 502static void
5ec2bb99 503alpha_store_return_value (struct type *valtype, struct regcache *regcache,
5b819568 504 const gdb_byte *valbuf)
c906108c 505{
d2427a71 506 int length = TYPE_LENGTH (valtype);
2a1ce6ec 507 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99 508 ULONGEST l;
d2427a71 509
5ec2bb99 510 switch (TYPE_CODE (valtype))
c906108c 511 {
5ec2bb99
RH
512 case TYPE_CODE_FLT:
513 switch (length)
514 {
515 case 4:
c483c494 516 alpha_lds (raw_buffer, valbuf);
f75d70cc
RH
517 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
518 break;
5ec2bb99
RH
519
520 case 8:
521 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
522 break;
523
24064b5c
RH
524 case 16:
525 /* FIXME: 128-bit long doubles are returned like structures:
526 by writing into indirect storage provided by the caller
527 as the first argument. */
323e0a4a 528 error (_("Cannot set a 128-bit long double return value."));
24064b5c 529
5ec2bb99 530 default:
323e0a4a 531 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
532 }
533 break;
d2427a71 534
7b5e1cb3
RH
535 case TYPE_CODE_COMPLEX:
536 switch (length)
537 {
538 case 8:
539 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
540 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
541 break;
542
543 case 16:
544 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 545 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
546 break;
547
548 case 32:
549 /* FIXME: 128-bit long doubles are returned like structures:
550 by writing into indirect storage provided by the caller
551 as the first argument. */
323e0a4a 552 error (_("Cannot set a 128-bit long double return value."));
7b5e1cb3
RH
553
554 default:
323e0a4a 555 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
556 }
557 break;
558
5ec2bb99
RH
559 default:
560 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
561 /* 32-bit values must be sign-extended to 64 bits
562 even if the base data type is unsigned. */
563 if (length == 4)
564 valtype = builtin_type_int32;
5ec2bb99
RH
565 l = unpack_long (valtype, valbuf);
566 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
567 break;
568 }
c906108c
SS
569}
570
9823e921
RH
571static enum return_value_convention
572alpha_return_value (struct gdbarch *gdbarch, struct type *type,
573 struct regcache *regcache, gdb_byte *readbuf,
574 const gdb_byte *writebuf)
575{
576 enum type_code code = TYPE_CODE (type);
577
578 if ((code == TYPE_CODE_STRUCT
579 || code == TYPE_CODE_UNION
580 || code == TYPE_CODE_ARRAY)
581 && gdbarch_tdep (gdbarch)->return_in_memory (type))
582 {
583 if (readbuf)
584 {
585 ULONGEST addr;
586 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
587 read_memory (addr, readbuf, TYPE_LENGTH (type));
588 }
589
590 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
591 }
592
593 if (readbuf)
594 alpha_extract_return_value (type, regcache, readbuf);
595 if (writebuf)
596 alpha_store_return_value (type, regcache, writebuf);
597
598 return RETURN_VALUE_REGISTER_CONVENTION;
599}
600
601static int
602alpha_return_in_memory_always (struct type *type)
603{
604 return 1;
605}
d2427a71 606\f
2a1ce6ec
MK
607static const gdb_byte *
608alpha_breakpoint_from_pc (CORE_ADDR *pc, int *len)
c906108c 609{
2a1ce6ec 610 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 611
2a1ce6ec
MK
612 *len = sizeof(break_insn);
613 return break_insn;
d2427a71 614}
c906108c 615
d2427a71
RH
616\f
617/* This returns the PC of the first insn after the prologue.
618 If we can't find the prologue, then return 0. */
c906108c 619
d2427a71
RH
620CORE_ADDR
621alpha_after_prologue (CORE_ADDR pc)
c906108c 622{
d2427a71
RH
623 struct symtab_and_line sal;
624 CORE_ADDR func_addr, func_end;
c906108c 625
d2427a71 626 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 627 return 0;
c906108c 628
d2427a71
RH
629 sal = find_pc_line (func_addr, 0);
630 if (sal.end < func_end)
631 return sal.end;
c5aa993b 632
d2427a71
RH
633 /* The line after the prologue is after the end of the function. In this
634 case, tell the caller to find the prologue the hard way. */
635 return 0;
c906108c
SS
636}
637
d2427a71
RH
638/* Read an instruction from memory at PC, looking through breakpoints. */
639
640unsigned int
641alpha_read_insn (CORE_ADDR pc)
c906108c 642{
e8d2d628 643 gdb_byte buf[ALPHA_INSN_SIZE];
d2427a71 644 int status;
c5aa993b 645
e8d2d628 646 status = read_memory_nobpt (pc, buf, sizeof (buf));
d2427a71
RH
647 if (status)
648 memory_error (status, pc);
e8d2d628 649 return extract_unsigned_integer (buf, sizeof (buf));
d2427a71 650}
c5aa993b 651
d2427a71
RH
652/* To skip prologues, I use this predicate. Returns either PC itself
653 if the code at PC does not look like a function prologue; otherwise
654 returns an address that (if we're lucky) follows the prologue. If
655 LENIENT, then we must skip everything which is involved in setting
656 up the frame (it's OK to skip more, just so long as we don't skip
657 anything which might clobber the registers which are being saved. */
c906108c 658
d2427a71
RH
659static CORE_ADDR
660alpha_skip_prologue (CORE_ADDR pc)
661{
662 unsigned long inst;
663 int offset;
664 CORE_ADDR post_prologue_pc;
e8d2d628 665 gdb_byte buf[ALPHA_INSN_SIZE];
c906108c 666
d2427a71
RH
667 /* Silently return the unaltered pc upon memory errors.
668 This could happen on OSF/1 if decode_line_1 tries to skip the
669 prologue for quickstarted shared library functions when the
670 shared library is not yet mapped in.
671 Reading target memory is slow over serial lines, so we perform
672 this check only if the target has shared libraries (which all
673 Alpha targets do). */
e8d2d628 674 if (target_read_memory (pc, buf, sizeof (buf)))
d2427a71 675 return pc;
c906108c 676
d2427a71
RH
677 /* See if we can determine the end of the prologue via the symbol table.
678 If so, then return either PC, or the PC after the prologue, whichever
679 is greater. */
c906108c 680
d2427a71
RH
681 post_prologue_pc = alpha_after_prologue (pc);
682 if (post_prologue_pc != 0)
683 return max (pc, post_prologue_pc);
c906108c 684
d2427a71
RH
685 /* Can't determine prologue from the symbol table, need to examine
686 instructions. */
dc1b0db2 687
d2427a71
RH
688 /* Skip the typical prologue instructions. These are the stack adjustment
689 instruction and the instructions that save registers on the stack
690 or in the gcc frame. */
e8d2d628 691 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
d2427a71
RH
692 {
693 inst = alpha_read_insn (pc + offset);
c906108c 694
d2427a71
RH
695 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
696 continue;
697 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
698 continue;
699 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
700 continue;
701 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
702 continue;
c906108c 703
d2427a71
RH
704 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
705 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
706 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
707 continue;
c906108c 708
d2427a71
RH
709 if (inst == 0x47de040f) /* bis sp,sp,fp */
710 continue;
711 if (inst == 0x47fe040f) /* bis zero,sp,fp */
712 continue;
c906108c 713
d2427a71 714 break;
c906108c 715 }
d2427a71
RH
716 return pc + offset;
717}
c906108c 718
d2427a71
RH
719\f
720/* Figure out where the longjmp will land.
721 We expect the first arg to be a pointer to the jmp_buf structure from
722 which we extract the PC (JB_PC) that we will land at. The PC is copied
723 into the "pc". This routine returns true on success. */
c906108c
SS
724
725static int
d2427a71 726alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 727{
d2427a71
RH
728 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
729 CORE_ADDR jb_addr;
2a1ce6ec 730 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 731
d2427a71 732 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 733
d2427a71
RH
734 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
735 raw_buffer, tdep->jb_elt_size))
c906108c 736 return 0;
d2427a71 737
7c0b4a20 738 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 739 return 1;
c906108c
SS
740}
741
d2427a71
RH
742\f
743/* Frame unwinder for signal trampolines. We use alpha tdep bits that
744 describe the location and shape of the sigcontext structure. After
745 that, all registers are in memory, so it's easy. */
746/* ??? Shouldn't we be able to do this generically, rather than with
747 OSABI data specific to Alpha? */
748
749struct alpha_sigtramp_unwind_cache
c906108c 750{
d2427a71
RH
751 CORE_ADDR sigcontext_addr;
752};
c906108c 753
d2427a71
RH
754static struct alpha_sigtramp_unwind_cache *
755alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
756 void **this_prologue_cache)
757{
758 struct alpha_sigtramp_unwind_cache *info;
759 struct gdbarch_tdep *tdep;
c906108c 760
d2427a71
RH
761 if (*this_prologue_cache)
762 return *this_prologue_cache;
c906108c 763
d2427a71
RH
764 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
765 *this_prologue_cache = info;
c906108c 766
d2427a71
RH
767 tdep = gdbarch_tdep (current_gdbarch);
768 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 769
d2427a71 770 return info;
c906108c
SS
771}
772
138e7be5
MK
773/* Return the address of REGNUM in a sigtramp frame. Since this is
774 all arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 775
d2427a71 776static CORE_ADDR
138e7be5 777alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
d2427a71 778{
138e7be5
MK
779 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
780
781 if (regnum >= 0 && regnum < 32)
782 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
783 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
784 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
785 else if (regnum == ALPHA_PC_REGNUM)
786 return sigcontext_addr + tdep->sc_pc_offset;
c5aa993b 787
d2427a71 788 return 0;
c906108c
SS
789}
790
d2427a71
RH
791/* Given a GDB frame, determine the address of the calling function's
792 frame. This will be used to create a new GDB frame struct. */
140f9984 793
dc129d82 794static void
d2427a71
RH
795alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
796 void **this_prologue_cache,
797 struct frame_id *this_id)
c906108c 798{
d2427a71
RH
799 struct alpha_sigtramp_unwind_cache *info
800 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
801 struct gdbarch_tdep *tdep;
802 CORE_ADDR stack_addr, code_addr;
803
804 /* If the OSABI couldn't locate the sigcontext, give up. */
805 if (info->sigcontext_addr == 0)
806 return;
807
808 /* If we have dynamic signal trampolines, find their start.
809 If we do not, then we must assume there is a symbol record
810 that can provide the start address. */
811 tdep = gdbarch_tdep (current_gdbarch);
812 if (tdep->dynamic_sigtramp_offset)
c906108c 813 {
d2427a71
RH
814 int offset;
815 code_addr = frame_pc_unwind (next_frame);
816 offset = tdep->dynamic_sigtramp_offset (code_addr);
817 if (offset >= 0)
818 code_addr -= offset;
c906108c 819 else
d2427a71 820 code_addr = 0;
c906108c 821 }
d2427a71 822 else
93d42b30 823 code_addr = frame_func_unwind (next_frame, SIGTRAMP_FRAME);
c906108c 824
d2427a71
RH
825 /* The stack address is trivially read from the sigcontext. */
826 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
827 ALPHA_SP_REGNUM);
b21fd293
RH
828 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
829 ALPHA_REGISTER_SIZE);
c906108c 830
d2427a71 831 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
832}
833
d2427a71 834/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 835
d2427a71
RH
836static void
837alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
838 void **this_prologue_cache,
839 int regnum, int *optimizedp,
840 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 841 int *realnump, gdb_byte *bufferp)
c906108c 842{
d2427a71
RH
843 struct alpha_sigtramp_unwind_cache *info
844 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
845 CORE_ADDR addr;
c906108c 846
d2427a71 847 if (info->sigcontext_addr != 0)
c906108c 848 {
d2427a71
RH
849 /* All integer and fp registers are stored in memory. */
850 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
851 if (addr != 0)
c906108c 852 {
d2427a71
RH
853 *optimizedp = 0;
854 *lvalp = lval_memory;
855 *addrp = addr;
856 *realnump = -1;
857 if (bufferp != NULL)
b21fd293 858 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
d2427a71 859 return;
c906108c 860 }
c906108c
SS
861 }
862
d2427a71
RH
863 /* This extra register may actually be in the sigcontext, but our
864 current description of it in alpha_sigtramp_frame_unwind_cache
865 doesn't include it. Too bad. Fall back on whatever's in the
866 outer frame. */
5efde112
DJ
867 *optimizedp = 0;
868 *lvalp = lval_register;
869 *addrp = 0;
870 *realnump = regnum;
871 if (bufferp)
872 frame_unwind_register (next_frame, *realnump, bufferp);
d2427a71 873}
c906108c 874
d2427a71
RH
875static const struct frame_unwind alpha_sigtramp_frame_unwind = {
876 SIGTRAMP_FRAME,
877 alpha_sigtramp_frame_this_id,
878 alpha_sigtramp_frame_prev_register
879};
c906108c 880
d2427a71 881static const struct frame_unwind *
336d1bba 882alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
d2427a71 883{
336d1bba 884 CORE_ADDR pc = frame_pc_unwind (next_frame);
d2427a71 885 char *name;
c906108c 886
f2524b93
AC
887 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
888 look at tramp-frame.h and other simplier per-architecture
889 sigtramp unwinders. */
890
891 /* We shouldn't even bother to try if the OSABI didn't register a
892 sigcontext_addr handler or pc_in_sigtramp hander. */
893 if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL)
894 return NULL;
895 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL)
d2427a71 896 return NULL;
c906108c 897
d2427a71
RH
898 /* Otherwise we should be in a signal frame. */
899 find_pc_partial_function (pc, &name, NULL, NULL);
f2524b93 900 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name))
d2427a71 901 return &alpha_sigtramp_frame_unwind;
c906108c 902
d2427a71 903 return NULL;
c906108c 904}
d2427a71
RH
905\f
906/* Fallback alpha frame unwinder. Uses instruction scanning and knows
907 something about the traditional layout of alpha stack frames. */
c906108c 908
d2427a71 909struct alpha_heuristic_unwind_cache
c906108c 910{
d2427a71
RH
911 CORE_ADDR *saved_regs;
912 CORE_ADDR vfp;
913 CORE_ADDR start_pc;
914 int return_reg;
915};
c906108c 916
d2427a71
RH
917/* Heuristic_proc_start may hunt through the text section for a long
918 time across a 2400 baud serial line. Allows the user to limit this
919 search. */
920static unsigned int heuristic_fence_post = 0;
c906108c 921
d2427a71
RH
922/* Attempt to locate the start of the function containing PC. We assume that
923 the previous function ends with an about_to_return insn. Not foolproof by
924 any means, since gcc is happy to put the epilogue in the middle of a
925 function. But we're guessing anyway... */
c906108c 926
d2427a71
RH
927static CORE_ADDR
928alpha_heuristic_proc_start (CORE_ADDR pc)
929{
930 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
931 CORE_ADDR last_non_nop = pc;
932 CORE_ADDR fence = pc - heuristic_fence_post;
933 CORE_ADDR orig_pc = pc;
fbe586ae 934 CORE_ADDR func;
9e0b60a8 935
d2427a71
RH
936 if (pc == 0)
937 return 0;
9e0b60a8 938
fbe586ae
RH
939 /* First see if we can find the start of the function from minimal
940 symbol information. This can succeed with a binary that doesn't
941 have debug info, but hasn't been stripped. */
942 func = get_pc_function_start (pc);
943 if (func)
944 return func;
945
d2427a71
RH
946 if (heuristic_fence_post == UINT_MAX
947 || fence < tdep->vm_min_address)
948 fence = tdep->vm_min_address;
c906108c 949
d2427a71
RH
950 /* Search back for previous return; also stop at a 0, which might be
951 seen for instance before the start of a code section. Don't include
952 nops, since this usually indicates padding between functions. */
e8d2d628 953 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
c906108c 954 {
d2427a71
RH
955 unsigned int insn = alpha_read_insn (pc);
956 switch (insn)
c906108c 957 {
d2427a71
RH
958 case 0: /* invalid insn */
959 case 0x6bfa8001: /* ret $31,($26),1 */
960 return last_non_nop;
961
962 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
963 case 0x47ff041f: /* nop: bis $31,$31,$31 */
964 break;
965
966 default:
967 last_non_nop = pc;
968 break;
c906108c 969 }
d2427a71 970 }
c906108c 971
d2427a71
RH
972 /* It's not clear to me why we reach this point when stopping quietly,
973 but with this test, at least we don't print out warnings for every
974 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
975 if (stop_soon == NO_STOP_QUIETLY)
976 {
977 static int blurb_printed = 0;
c906108c 978
d2427a71 979 if (fence == tdep->vm_min_address)
323e0a4a
AC
980 warning (_("Hit beginning of text section without finding \
981enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 982 else
323e0a4a
AC
983 warning (_("Hit heuristic-fence-post without finding \
984enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 985
d2427a71
RH
986 if (!blurb_printed)
987 {
323e0a4a 988 printf_filtered (_("\
d2427a71
RH
989This warning occurs if you are debugging a function without any symbols\n\
990(for example, in a stripped executable). In that case, you may wish to\n\
991increase the size of the search with the `set heuristic-fence-post' command.\n\
992\n\
993Otherwise, you told GDB there was a function where there isn't one, or\n\
323e0a4a 994(more likely) you have encountered a bug in GDB.\n"));
d2427a71
RH
995 blurb_printed = 1;
996 }
997 }
c906108c 998
d2427a71
RH
999 return 0;
1000}
c906108c 1001
fbe586ae 1002static struct alpha_heuristic_unwind_cache *
d2427a71
RH
1003alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
1004 void **this_prologue_cache,
1005 CORE_ADDR start_pc)
1006{
1007 struct alpha_heuristic_unwind_cache *info;
1008 ULONGEST val;
1009 CORE_ADDR limit_pc, cur_pc;
1010 int frame_reg, frame_size, return_reg, reg;
c906108c 1011
d2427a71
RH
1012 if (*this_prologue_cache)
1013 return *this_prologue_cache;
c906108c 1014
d2427a71
RH
1015 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1016 *this_prologue_cache = info;
1017 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 1018
d2427a71
RH
1019 limit_pc = frame_pc_unwind (next_frame);
1020 if (start_pc == 0)
1021 start_pc = alpha_heuristic_proc_start (limit_pc);
1022 info->start_pc = start_pc;
c906108c 1023
d2427a71
RH
1024 frame_reg = ALPHA_SP_REGNUM;
1025 frame_size = 0;
1026 return_reg = -1;
c906108c 1027
d2427a71
RH
1028 /* If we've identified a likely place to start, do code scanning. */
1029 if (start_pc != 0)
c5aa993b 1030 {
d2427a71
RH
1031 /* Limit the forward search to 50 instructions. */
1032 if (start_pc + 200 < limit_pc)
1033 limit_pc = start_pc + 200;
c5aa993b 1034
e8d2d628 1035 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
d2427a71
RH
1036 {
1037 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1038
d2427a71
RH
1039 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1040 {
1041 if (word & 0x8000)
1042 {
1043 /* Consider only the first stack allocation instruction
1044 to contain the static size of the frame. */
1045 if (frame_size == 0)
1046 frame_size = (-word) & 0xffff;
1047 }
1048 else
1049 {
1050 /* Exit loop if a positive stack adjustment is found, which
1051 usually means that the stack cleanup code in the function
1052 epilogue is reached. */
1053 break;
1054 }
1055 }
1056 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1057 {
1058 reg = (word & 0x03e00000) >> 21;
1059
d15bfd3a
AC
1060 /* Ignore this instruction if we have already encountered
1061 an instruction saving the same register earlier in the
1062 function code. The current instruction does not tell
1063 us where the original value upon function entry is saved.
1064 All it says is that the function we are scanning reused
1065 that register for some computation of its own, and is now
1066 saving its result. */
1067 if (info->saved_regs[reg])
1068 continue;
1069
d2427a71
RH
1070 if (reg == 31)
1071 continue;
1072
1073 /* Do not compute the address where the register was saved yet,
1074 because we don't know yet if the offset will need to be
1075 relative to $sp or $fp (we can not compute the address
1076 relative to $sp if $sp is updated during the execution of
1077 the current subroutine, for instance when doing some alloca).
1078 So just store the offset for the moment, and compute the
1079 address later when we know whether this frame has a frame
1080 pointer or not. */
1081 /* Hack: temporarily add one, so that the offset is non-zero
1082 and we can tell which registers have save offsets below. */
1083 info->saved_regs[reg] = (word & 0xffff) + 1;
1084
1085 /* Starting with OSF/1-3.2C, the system libraries are shipped
1086 without local symbols, but they still contain procedure
1087 descriptors without a symbol reference. GDB is currently
1088 unable to find these procedure descriptors and uses
1089 heuristic_proc_desc instead.
1090 As some low level compiler support routines (__div*, __add*)
1091 use a non-standard return address register, we have to
1092 add some heuristics to determine the return address register,
1093 or stepping over these routines will fail.
1094 Usually the return address register is the first register
1095 saved on the stack, but assembler optimization might
1096 rearrange the register saves.
1097 So we recognize only a few registers (t7, t9, ra) within
1098 the procedure prologue as valid return address registers.
1099 If we encounter a return instruction, we extract the
1100 the return address register from it.
1101
1102 FIXME: Rewriting GDB to access the procedure descriptors,
1103 e.g. via the minimal symbol table, might obviate this hack. */
1104 if (return_reg == -1
1105 && cur_pc < (start_pc + 80)
1106 && (reg == ALPHA_T7_REGNUM
1107 || reg == ALPHA_T9_REGNUM
1108 || reg == ALPHA_RA_REGNUM))
1109 return_reg = reg;
1110 }
1111 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1112 return_reg = (word >> 16) & 0x1f;
1113 else if (word == 0x47de040f) /* bis sp,sp,fp */
1114 frame_reg = ALPHA_GCC_FP_REGNUM;
1115 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1116 frame_reg = ALPHA_GCC_FP_REGNUM;
1117 }
c5aa993b 1118
d2427a71
RH
1119 /* If we haven't found a valid return address register yet, keep
1120 searching in the procedure prologue. */
1121 if (return_reg == -1)
1122 {
1123 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1124 {
1125 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1126
d2427a71
RH
1127 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1128 {
1129 reg = (word & 0x03e00000) >> 21;
1130 if (reg == ALPHA_T7_REGNUM
1131 || reg == ALPHA_T9_REGNUM
1132 || reg == ALPHA_RA_REGNUM)
1133 {
1134 return_reg = reg;
1135 break;
1136 }
1137 }
1138 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1139 {
1140 return_reg = (word >> 16) & 0x1f;
1141 break;
1142 }
85b32d22 1143
e8d2d628 1144 cur_pc += ALPHA_INSN_SIZE;
d2427a71
RH
1145 }
1146 }
c906108c 1147 }
c906108c 1148
d2427a71
RH
1149 /* Failing that, do default to the customary RA. */
1150 if (return_reg == -1)
1151 return_reg = ALPHA_RA_REGNUM;
1152 info->return_reg = return_reg;
f8453e34 1153
d2427a71
RH
1154 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1155 info->vfp = val + frame_size;
c906108c 1156
d2427a71
RH
1157 /* Convert offsets to absolute addresses. See above about adding
1158 one to the offsets to make all detected offsets non-zero. */
1159 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1160 if (info->saved_regs[reg])
1161 info->saved_regs[reg] += val - 1;
1162
1163 return info;
c906108c 1164}
c906108c 1165
d2427a71
RH
1166/* Given a GDB frame, determine the address of the calling function's
1167 frame. This will be used to create a new GDB frame struct. */
1168
fbe586ae 1169static void
d2427a71
RH
1170alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1171 void **this_prologue_cache,
1172 struct frame_id *this_id)
c906108c 1173{
d2427a71
RH
1174 struct alpha_heuristic_unwind_cache *info
1175 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1176
d2427a71 1177 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1178}
1179
d2427a71
RH
1180/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1181
fbe586ae 1182static void
d2427a71
RH
1183alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1184 void **this_prologue_cache,
1185 int regnum, int *optimizedp,
1186 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 1187 int *realnump, gdb_byte *bufferp)
c906108c 1188{
d2427a71
RH
1189 struct alpha_heuristic_unwind_cache *info
1190 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1191
1192 /* The PC of the previous frame is stored in the link register of
1193 the current frame. Frob regnum so that we pull the value from
1194 the correct place. */
1195 if (regnum == ALPHA_PC_REGNUM)
1196 regnum = info->return_reg;
1197
1198 /* For all registers known to be saved in the current frame,
1199 do the obvious and pull the value out. */
1200 if (info->saved_regs[regnum])
c906108c 1201 {
d2427a71
RH
1202 *optimizedp = 0;
1203 *lvalp = lval_memory;
1204 *addrp = info->saved_regs[regnum];
1205 *realnump = -1;
1206 if (bufferp != NULL)
b21fd293 1207 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1208 return;
1209 }
1210
d2427a71
RH
1211 /* The stack pointer of the previous frame is computed by popping
1212 the current stack frame. */
1213 if (regnum == ALPHA_SP_REGNUM)
c906108c 1214 {
d2427a71
RH
1215 *optimizedp = 0;
1216 *lvalp = not_lval;
1217 *addrp = 0;
1218 *realnump = -1;
1219 if (bufferp != NULL)
1220 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1221 return;
c906108c 1222 }
95b80706 1223
d2427a71 1224 /* Otherwise assume the next frame has the same register value. */
5efde112
DJ
1225 *optimizedp = 0;
1226 *lvalp = lval_register;
1227 *addrp = 0;
1228 *realnump = regnum;
1229 if (bufferp)
1230 frame_unwind_register (next_frame, *realnump, bufferp);
95b80706
JT
1231}
1232
d2427a71
RH
1233static const struct frame_unwind alpha_heuristic_frame_unwind = {
1234 NORMAL_FRAME,
1235 alpha_heuristic_frame_this_id,
1236 alpha_heuristic_frame_prev_register
1237};
c906108c 1238
d2427a71 1239static const struct frame_unwind *
336d1bba 1240alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
c906108c 1241{
d2427a71 1242 return &alpha_heuristic_frame_unwind;
c906108c
SS
1243}
1244
fbe586ae 1245static CORE_ADDR
d2427a71
RH
1246alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1247 void **this_prologue_cache)
c906108c 1248{
d2427a71
RH
1249 struct alpha_heuristic_unwind_cache *info
1250 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1251
d2427a71 1252 return info->vfp;
c906108c
SS
1253}
1254
d2427a71
RH
1255static const struct frame_base alpha_heuristic_frame_base = {
1256 &alpha_heuristic_frame_unwind,
1257 alpha_heuristic_frame_base_address,
1258 alpha_heuristic_frame_base_address,
1259 alpha_heuristic_frame_base_address
1260};
1261
c906108c 1262/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1263 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1264
1265static void
fba45db2 1266reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1267{
1268 reinit_frame_cache ();
1269}
1270
d2427a71 1271\f
d2427a71
RH
1272/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1273 dummy frame. The frame ID's base needs to match the TOS value
1274 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1275 breakpoint. */
d734c450 1276
d2427a71
RH
1277static struct frame_id
1278alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1279{
d2427a71
RH
1280 ULONGEST base;
1281 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1282 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1283}
1284
dc129d82 1285static CORE_ADDR
d2427a71 1286alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1287{
d2427a71
RH
1288 ULONGEST pc;
1289 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1290 return pc;
accc6d1f
JT
1291}
1292
98a8e1e5
RH
1293\f
1294/* Helper routines for alpha*-nat.c files to move register sets to and
1295 from core files. The UNIQUE pointer is allowed to be NULL, as most
1296 targets don't supply this value in their core files. */
1297
1298void
1299alpha_supply_int_regs (int regno, const void *r0_r30,
1300 const void *pc, const void *unique)
1301{
2a1ce6ec 1302 const gdb_byte *regs = r0_r30;
98a8e1e5
RH
1303 int i;
1304
1305 for (i = 0; i < 31; ++i)
1306 if (regno == i || regno == -1)
2a1ce6ec 1307 regcache_raw_supply (current_regcache, i, regs + i * 8);
98a8e1e5
RH
1308
1309 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
23a6d369 1310 regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL);
98a8e1e5
RH
1311
1312 if (regno == ALPHA_PC_REGNUM || regno == -1)
23a6d369 1313 regcache_raw_supply (current_regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1314
1315 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
23a6d369 1316 regcache_raw_supply (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1317}
1318
1319void
1320alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique)
1321{
2a1ce6ec 1322 gdb_byte *regs = r0_r30;
98a8e1e5
RH
1323 int i;
1324
1325 for (i = 0; i < 31; ++i)
1326 if (regno == i || regno == -1)
2a1ce6ec 1327 regcache_raw_collect (current_regcache, i, regs + i * 8);
98a8e1e5
RH
1328
1329 if (regno == ALPHA_PC_REGNUM || regno == -1)
822c9732 1330 regcache_raw_collect (current_regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1331
1332 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
822c9732 1333 regcache_raw_collect (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1334}
1335
1336void
1337alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr)
1338{
2a1ce6ec 1339 const gdb_byte *regs = f0_f30;
98a8e1e5
RH
1340 int i;
1341
1342 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1343 if (regno == i || regno == -1)
23a6d369 1344 regcache_raw_supply (current_regcache, i,
2a1ce6ec 1345 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1346
1347 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
23a6d369 1348 regcache_raw_supply (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1349}
1350
1351void
1352alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr)
1353{
2a1ce6ec 1354 gdb_byte *regs = f0_f30;
98a8e1e5
RH
1355 int i;
1356
1357 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1358 if (regno == i || regno == -1)
822c9732 1359 regcache_raw_collect (current_regcache, i,
2a1ce6ec 1360 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1361
1362 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
822c9732 1363 regcache_raw_collect (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1364}
1365
d2427a71 1366\f
0de94d4b
JB
1367
1368/* Return nonzero if the G_floating register value in REG is equal to
1369 zero for FP control instructions. */
1370
1371static int
1372fp_register_zero_p (LONGEST reg)
1373{
1374 /* Check that all bits except the sign bit are zero. */
1375 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1376
1377 return ((reg & zero_mask) == 0);
1378}
1379
1380/* Return the value of the sign bit for the G_floating register
1381 value held in REG. */
1382
1383static int
1384fp_register_sign_bit (LONGEST reg)
1385{
1386 const LONGEST sign_mask = (LONGEST) 1 << 63;
1387
1388 return ((reg & sign_mask) != 0);
1389}
1390
ec32e4be
JT
1391/* alpha_software_single_step() is called just before we want to resume
1392 the inferior, if we want to single-step it but there is no hardware
1393 or kernel single-step support (NetBSD on Alpha, for example). We find
1394 the target of the coming instruction and breakpoint it.
1395
1396 single_step is also called just after the inferior stops. If we had
1397 set up a simulated single-step, we undo our damage. */
1398
1399static CORE_ADDR
1400alpha_next_pc (CORE_ADDR pc)
1401{
1402 unsigned int insn;
1403 unsigned int op;
551e4f2e 1404 int regno;
ec32e4be
JT
1405 int offset;
1406 LONGEST rav;
e8d2d628 1407 gdb_byte reg[ALPHA_REGISTER_SIZE];
ec32e4be 1408
b21fd293 1409 insn = alpha_read_insn (pc);
ec32e4be
JT
1410
1411 /* Opcode is top 6 bits. */
1412 op = (insn >> 26) & 0x3f;
1413
1414 if (op == 0x1a)
1415 {
1416 /* Jump format: target PC is:
1417 RB & ~3 */
1418 return (read_register ((insn >> 16) & 0x1f) & ~3);
1419 }
1420
1421 if ((op & 0x30) == 0x30)
1422 {
1423 /* Branch format: target PC is:
1424 (new PC) + (4 * sext(displacement)) */
1425 if (op == 0x30 || /* BR */
1426 op == 0x34) /* BSR */
1427 {
1428 branch_taken:
1429 offset = (insn & 0x001fffff);
1430 if (offset & 0x00100000)
1431 offset |= 0xffe00000;
e8d2d628
MK
1432 offset *= ALPHA_INSN_SIZE;
1433 return (pc + ALPHA_INSN_SIZE + offset);
ec32e4be
JT
1434 }
1435
1436 /* Need to determine if branch is taken; read RA. */
551e4f2e
JB
1437 regno = (insn >> 21) & 0x1f;
1438 switch (op)
1439 {
1440 case 0x31: /* FBEQ */
1441 case 0x36: /* FBGE */
1442 case 0x37: /* FBGT */
1443 case 0x33: /* FBLE */
1444 case 0x32: /* FBLT */
1445 case 0x35: /* FBNE */
1446 regno += FP0_REGNUM;
1447 }
1448
1449 regcache_cooked_read (current_regcache, regno, reg);
e8d2d628 1450 rav = extract_signed_integer (reg, ALPHA_REGISTER_SIZE);
0de94d4b 1451
ec32e4be
JT
1452 switch (op)
1453 {
1454 case 0x38: /* BLBC */
1455 if ((rav & 1) == 0)
1456 goto branch_taken;
1457 break;
1458 case 0x3c: /* BLBS */
1459 if (rav & 1)
1460 goto branch_taken;
1461 break;
1462 case 0x39: /* BEQ */
1463 if (rav == 0)
1464 goto branch_taken;
1465 break;
1466 case 0x3d: /* BNE */
1467 if (rav != 0)
1468 goto branch_taken;
1469 break;
1470 case 0x3a: /* BLT */
1471 if (rav < 0)
1472 goto branch_taken;
1473 break;
1474 case 0x3b: /* BLE */
1475 if (rav <= 0)
1476 goto branch_taken;
1477 break;
1478 case 0x3f: /* BGT */
1479 if (rav > 0)
1480 goto branch_taken;
1481 break;
1482 case 0x3e: /* BGE */
1483 if (rav >= 0)
1484 goto branch_taken;
1485 break;
d2427a71 1486
0de94d4b
JB
1487 /* Floating point branches. */
1488
1489 case 0x31: /* FBEQ */
1490 if (fp_register_zero_p (rav))
1491 goto branch_taken;
1492 break;
1493 case 0x36: /* FBGE */
1494 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1495 goto branch_taken;
1496 break;
1497 case 0x37: /* FBGT */
1498 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1499 goto branch_taken;
1500 break;
1501 case 0x33: /* FBLE */
1502 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1503 goto branch_taken;
1504 break;
1505 case 0x32: /* FBLT */
1506 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1507 goto branch_taken;
1508 break;
1509 case 0x35: /* FBNE */
1510 if (! fp_register_zero_p (rav))
1511 goto branch_taken;
1512 break;
ec32e4be
JT
1513 }
1514 }
1515
1516 /* Not a branch or branch not taken; target PC is:
1517 pc + 4 */
e8d2d628 1518 return (pc + ALPHA_INSN_SIZE);
ec32e4be
JT
1519}
1520
e6590a1b 1521int
ec32e4be
JT
1522alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1523{
06a86285 1524 CORE_ADDR next_pc;
ec32e4be
JT
1525 CORE_ADDR pc;
1526
1527 if (insert_breakpoints_p)
1528 {
1529 pc = read_pc ();
1530 next_pc = alpha_next_pc (pc);
1531
8181d85f 1532 insert_single_step_breakpoint (next_pc);
ec32e4be
JT
1533 }
1534 else
1535 {
8181d85f 1536 remove_single_step_breakpoints ();
ec32e4be 1537 }
e6590a1b 1538 return 1;
c906108c
SS
1539}
1540
dc129d82 1541\f
dc129d82
JT
1542/* Initialize the current architecture based on INFO. If possible, re-use an
1543 architecture from ARCHES, which is a list of architectures already created
1544 during this debugging session.
1545
1546 Called e.g. at program startup, when reading a core file, and when reading
1547 a binary file. */
1548
1549static struct gdbarch *
1550alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1551{
1552 struct gdbarch_tdep *tdep;
1553 struct gdbarch *gdbarch;
dc129d82
JT
1554
1555 /* Try to determine the ABI of the object we are loading. */
4be87837 1556 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1557 {
4be87837
DJ
1558 /* If it's an ECOFF file, assume it's OSF/1. */
1559 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1560 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1561 }
1562
1563 /* Find a candidate among extant architectures. */
4be87837
DJ
1564 arches = gdbarch_list_lookup_by_info (arches, &info);
1565 if (arches != NULL)
1566 return arches->gdbarch;
dc129d82
JT
1567
1568 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1569 gdbarch = gdbarch_alloc (&info, tdep);
1570
d2427a71
RH
1571 /* Lowest text address. This is used by heuristic_proc_start()
1572 to decide when to stop looking. */
594706e6 1573 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
d9b023cc 1574
36a6271d 1575 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1576 tdep->sigcontext_addr = NULL;
138e7be5
MK
1577 tdep->sc_pc_offset = 2 * 8;
1578 tdep->sc_regs_offset = 4 * 8;
1579 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
36a6271d 1580
accc6d1f
JT
1581 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1582
9823e921
RH
1583 tdep->return_in_memory = alpha_return_in_memory_always;
1584
dc129d82
JT
1585 /* Type sizes */
1586 set_gdbarch_short_bit (gdbarch, 16);
1587 set_gdbarch_int_bit (gdbarch, 32);
1588 set_gdbarch_long_bit (gdbarch, 64);
1589 set_gdbarch_long_long_bit (gdbarch, 64);
1590 set_gdbarch_float_bit (gdbarch, 32);
1591 set_gdbarch_double_bit (gdbarch, 64);
1592 set_gdbarch_long_double_bit (gdbarch, 64);
1593 set_gdbarch_ptr_bit (gdbarch, 64);
1594
1595 /* Register info */
1596 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1597 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1598 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1599 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1600
1601 set_gdbarch_register_name (gdbarch, alpha_register_name);
c483c494 1602 set_gdbarch_register_type (gdbarch, alpha_register_type);
dc129d82
JT
1603
1604 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1605 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1606
c483c494
RH
1607 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1608 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1609 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
dc129d82 1610
615967cb
RH
1611 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1612
d2427a71 1613 /* Prologue heuristics. */
dc129d82
JT
1614 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1615
5ef165c2
RH
1616 /* Disassembler. */
1617 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1618
d2427a71 1619 /* Call info. */
dc129d82 1620
9823e921 1621 set_gdbarch_return_value (gdbarch, alpha_return_value);
dc129d82
JT
1622
1623 /* Settings for calling functions in the inferior. */
c88e30c0 1624 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1625
1626 /* Methods for saving / extracting a dummy frame's ID. */
1627 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
d2427a71
RH
1628
1629 /* Return the unwound PC value. */
1630 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1631
1632 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1633 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1634
95b80706 1635 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
e8d2d628 1636 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
9d519230 1637 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
95b80706 1638
44dffaac 1639 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1640 gdbarch_init_osabi (info, gdbarch);
44dffaac 1641
accc6d1f
JT
1642 /* Now that we have tuned the configuration, set a few final things
1643 based on what the OS ABI has told us. */
1644
1645 if (tdep->jb_pc >= 0)
1646 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1647
336d1bba
AC
1648 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1649 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
dc129d82 1650
d2427a71 1651 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1652
d2427a71 1653 return gdbarch;
dc129d82
JT
1654}
1655
baa490c4
RH
1656void
1657alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1658{
336d1bba
AC
1659 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1660 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
baa490c4
RH
1661}
1662
a78f21af
AC
1663extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1664
c906108c 1665void
fba45db2 1666_initialize_alpha_tdep (void)
c906108c
SS
1667{
1668 struct cmd_list_element *c;
1669
d2427a71 1670 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1671
1672 /* Let the user set the fence post for heuristic_proc_start. */
1673
1674 /* We really would like to have both "0" and "unlimited" work, but
1675 command.c doesn't deal with that. So make it a var_zinteger
1676 because the user can always use "999999" or some such for unlimited. */
edefbb7c
AC
1677 /* We need to throw away the frame cache when we set this, since it
1678 might change our ability to get backtraces. */
1679 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
7915a72c
AC
1680 &heuristic_fence_post, _("\
1681Set the distance searched for the start of a function."), _("\
1682Show the distance searched for the start of a function."), _("\
c906108c
SS
1683If you are debugging a stripped executable, GDB needs to search through the\n\
1684program for the start of a function. This command sets the distance of the\n\
323e0a4a 1685search. The only need to set it is when debugging a stripped executable."),
2c5b56ce 1686 reinit_frame_cache_sfunc,
7915a72c 1687 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
edefbb7c 1688 &setlist, &showlist);
c906108c 1689}