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56523f12 1/*
69445d6c 2 * (C) Copyright 2003-2014
56523f12
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
45a212c4 5 * (C) Copyright 2004-2006
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6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
3765b3e7 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
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14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
b2a6dfe4 19#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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20#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
56523f12 22
2ae18241
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23/*
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
29 */
30#ifndef CONFIG_SYS_TEXT_BASE
31#define CONFIG_SYS_TEXT_BASE 0xFC000000
32#endif
33
5196a7a0 34/* On a Cameron or on a FO300 board or ... */
98e69567
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35#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
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37#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
38#endif
39
6d0f6bcf 40#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
56523f12 41
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42#define CONFIG_HIGH_BATS 1 /* High BATs supported */
43
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44/*
45 * Serial console configuration
46 */
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47#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 49#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
bef92e21 50#define CONFIG_BOOTCOUNT_LIMIT 1
56523f12 51
6d3bc9b8 52#ifdef CONFIG_FO300
6d0f6bcf 53#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
6d3bc9b8 54#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
ddde6b7c 55#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
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56#if 0
57#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
59#endif
60
61#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
62 /* switch is open */
5196a7a0 63#endif /* CONFIG_FO300 */
6d3bc9b8 64
98e69567 65#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
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66#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
6d0f6bcf 69#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
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70#define CONFIG_BOARD_EARLY_INIT_R
71#endif /* CONFIG_STK52XX */
56523f12 72
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73/*
74 * PCI Mapping:
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
77 */
98e69567 78#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
31a64923 79/* #define CONFIG_PCI_SCAN_SHOW 1 */
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80
81#define CONFIG_PCI_MEM_BUS 0x40000000
82#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
83#define CONFIG_PCI_MEM_SIZE 0x10000000
84
85#define CONFIG_PCI_IO_BUS 0x50000000
86#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
87#define CONFIG_PCI_IO_SIZE 0x01000000
88
cd65a3dc 89#define CONFIG_EEPRO100 1
6d0f6bcf 90#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
56523f12 91#define CONFIG_NS8382X 1
83e40ba7 92#endif /* CONFIG_STK52XX */
56523f12 93
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94/*
95 * Video console
96 */
5078cce8 97#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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98#define CONFIG_VIDEO_SM501
99#define CONFIG_VIDEO_SM501_32BPP
8f0b7cbe 100#define CONFIG_VIDEO_LOGO
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101
102#ifndef CONFIG_FO300
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103#else
104#define CONFIG_VIDEO_BMP_LOGO
105#endif
106
8f0b7cbe 107#define CONFIG_SPLASH_SCREEN
6d3bc9b8 108#endif /* #ifndef CONFIG_TQM5200S */
56523f12 109
56523f12 110/* Partitions */
89c02e2c 111#define CONFIG_MAC_PARTITION
56523f12 112#define CONFIG_DOS_PARTITION
8f0b7cbe 113#define CONFIG_ISO_PARTITION
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114
115/* USB */
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116#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
117 defined(CONFIG_STK52XX)
7b59b3c7 118#define CONFIG_USB_OHCI_NEW
6d0f6bcf 119#define CONFIG_SYS_OHCI_BE_CONTROLLER
53e336e9 120
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121#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
122#define CONFIG_SYS_USB_OHCI_CPU_INIT
123#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
124#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
125#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
53e336e9 126
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127#endif
128
135ae006 129#ifndef CONFIG_CAM5200
56523f12 130/* POST support */
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131#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
132 CONFIG_SYS_POST_CPU | \
133 CONFIG_SYS_POST_I2C)
5078cce8 134#endif
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135
136#ifdef CONFIG_POST
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137/* preserve space for the post_word at end of on-chip SRAM */
138#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
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139#endif
140
56523f12 141/*
a1aa0bb5 142 * BOOTP options
56523f12 143 */
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144#define CONFIG_BOOTP_BOOTFILESIZE
145#define CONFIG_BOOTP_BOOTPATH
146#define CONFIG_BOOTP_GATEWAY
147#define CONFIG_BOOTP_HOSTNAME
148
56523f12 149/*
2694690e 150 * Command line configuration.
56523f12 151 */
2694690e 152#define CONFIG_CMD_DATE
2694690e 153#define CONFIG_CMD_EEPROM
2694690e 154#define CONFIG_CMD_JFFS2
2694690e 155#define CONFIG_CMD_REGINFO
2694690e
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156#define CONFIG_CMD_BSP
157
158#ifdef CONFIG_VIDEO
159 #define CONFIG_CMD_BMP
160#endif
161
162#ifdef CONFIG_PCI
2b2a587d 163#define CONFIG_CMD_PCI
f33fca22 164#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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165#endif
166
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167#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
168 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
2694690e 169 #define CONFIG_CMD_IDE
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170#endif
171
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172#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
173 defined(CONFIG_STK52XX)
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174 #define CONFIG_CFG_USB
175 #define CONFIG_CFG_FAT
176#endif
177
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178#ifdef CONFIG_POST
179 #define CONFIG_CMD_DIAG
180#endif
181
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182#define CONFIG_TIMESTAMP /* display image timestamps */
183
14d0a02a 184#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
6d0f6bcf 185# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
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186#endif
187
188/*
189 * Autobooting
190 */
56523f12 191
81050926 192#define CONFIG_PREBOOT "echo;" \
4c4aca81 193 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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194 "echo"
195
196#undef CONFIG_BOOTARGS
197
6d0f6bcf 198#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
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199# define ENV_UPDT \
200 "update=protect off FFF00000 +${filesize};" \
201 "erase FFF00000 +${filesize};" \
5078cce8 202 "cp.b 200000 FFF00000 ${filesize};" \
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203 "protect on FFF00000 +${filesize}\0"
204#else /* default lowboot configuration */
6d3bc9b8 205# define ENV_UPDT \
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206 "update=protect off FC000000 +${filesize};" \
207 "erase FC000000 +${filesize};" \
6d3bc9b8 208 "cp.b 200000 FC000000 ${filesize};" \
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209 "protect on FC000000 +${filesize}\0"
210#endif
5078cce8 211
e1f601b5 212#if defined(CONFIG_TQM5200)
6abaee42 213#define CUSTOM_ENV_SETTINGS \
e1f601b5 214 "hostname=tqm5200\0" \
6abaee42 215 "bootfile=/tftpboot/tqm5200/uImage\0" \
8f8416fa 216 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
6abaee42 217 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
e1f601b5 218#elif defined(CONFIG_CAM5200)
1636d1c8 219#define CUSTOM_ENV_SETTINGS \
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220 "bootfile=cam5200/uImage\0" \
221 "u-boot=cam5200/u-boot.bin\0" \
74de7aef 222 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
6abaee42
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223#endif
224
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225#if defined(CONFIG_TQM5200_B)
226#define ENV_FLASH_LAYOUT \
227 "fdt_addr=FC100000\0" \
228 "kernel_addr=FC140000\0" \
229 "ramdisk_addr=FC600000\0"
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230#elif defined(CONFIG_CHARON)
231#define ENV_FLASH_LAYOUT \
232 "fdt_addr=FDFC0000\0" \
233 "kernel_addr=FC0A0000\0" \
234 "ramdisk_addr=FC200000\0"
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235#else /* !CONFIG_TQM5200_B */
236#define ENV_FLASH_LAYOUT \
237 "fdt_addr=FC0A0000\0" \
238 "kernel_addr=FC0C0000\0" \
239 "ramdisk_addr=FC300000\0"
240#endif
241
81050926 242#define CONFIG_EXTRA_ENV_SETTINGS \
56523f12 243 "netdev=eth0\0" \
e1f601b5 244 "console=ttyPSC0\0" \
a5cc5555 245 ENV_FLASH_LAYOUT \
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246 "kernel_addr_r=400000\0" \
247 "fdt_addr_r=600000\0" \
89c02e2c 248 "rootpath=/opt/eldk/ppc_6xx\0" \
56523f12 249 "ramargs=setenv bootargs root=/dev/ram rw\0" \
56523f12 250 "nfsargs=setenv bootargs root=/dev/nfs rw " \
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251 "nfsroot=${serverip}:${rootpath}\0" \
252 "addip=setenv bootargs ${bootargs} " \
253 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
254 ":${hostname}:${netdev}:off panic=1\0" \
5078cce8 255 "addcons=setenv bootargs ${bootargs} " \
8f8416fa 256 "console=${console},${baudrate}\0" \
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257 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
258 "flash_self_old=sete console ttyS0; " \
259 "run ramargs addip addcons addmtd; " \
fe126d8b 260 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
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261 "flash_self=run ramargs addip addcons;" \
262 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
263 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
fe126d8b 264 "bootm ${kernel_addr}\0" \
e1f601b5 265 "flash_nfs=run nfsargs addip addcons;" \
8f8416fa 266 "bootm ${kernel_addr} - ${fdt_addr}\0" \
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267 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
268 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
269 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
270 "tftp ${fdt_addr_r} ${fdt_file}; " \
98e69567 271 "run nfsargs addip addcons addmtd; " \
e1f601b5 272 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
6abaee42 273 CUSTOM_ENV_SETTINGS \
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274 "load=tftp 200000 ${u-boot}\0" \
275 ENV_UPDT \
7e6bf358 276 ""
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277
278#define CONFIG_BOOTCOMMAND "run net_nfs"
279
280/*
281 * IPB Bus clocking configuration.
282 */
6d0f6bcf 283#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
56523f12 284
6d0f6bcf 285#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
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286/*
287 * PCI Bus clocking configuration
288 *
289 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
6d0f6bcf 290 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
c99512d6 291 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
56523f12 292 */
6d0f6bcf 293#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
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294#endif
295
296/*
297 * I2C configuration
298 */
299#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
8f0b7cbe 300#ifdef CONFIG_TQM5200_REV100
6d0f6bcf 301#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
56523f12 302#else
6d0f6bcf 303#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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304#endif
305
306/*
307 * I2C clock frequency
308 *
309 * Please notice, that the resulting clock frequency could differ from the
310 * configured value. This is because the I2C clock is derived from system
a187559e 311 * clock over a frequency divider with only a few divider values. U-Boot
6d0f6bcf 312 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
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313 * approximation allways lies below the configured value, never above.
314 */
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JCPV
315#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
316#define CONFIG_SYS_I2C_SLAVE 0x7F
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317
318/*
319 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
320 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
321 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
322 * same configuration could be used.
323 */
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JCPV
324#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
325#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
326#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
327#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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328
329/*
330 * HW-Monitor configuration on Mini-FAP
331 */
332#if defined (CONFIG_MINIFAP)
6d0f6bcf 333#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
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334#endif
335
336/* List of I2C addresses to be verified by POST */
56523f12 337#if defined (CONFIG_MINIFAP)
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338#undef CONFIG_SYS_POST_I2C_ADDRS
339#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
340 CONFIG_SYS_I2C_HWMON_ADDR, \
341 CONFIG_SYS_I2C_SLAVE}
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342#endif
343
344/*
345 * Flash configuration
346 */
6d0f6bcf 347#define CONFIG_SYS_FLASH_BASE 0xFC000000
56523f12 348
d9384de2 349#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
6d0f6bcf 350#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
7299712c 351 (= chip selects) */
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JCPV
352#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
353#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
354#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
355
356#define CONFIG_SYS_FLASH_ADDR0 0x555
357#define CONFIG_SYS_FLASH_ADDR1 0x2AA
358#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
359#define CONFIG_SYS_MAX_FLASH_SECT 128
d9384de2
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360#else
361/* use CFI flash driver */
6d0f6bcf 362#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a 363#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
085ecde1 364#define CONFIG_FLASH_CFI_MTD /* with MTD support */
6d0f6bcf
JCPV
365#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
366#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
d9384de2 367 (= chip selects) */
6d0f6bcf 368#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
d9384de2 369#endif
7299712c 370
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371#define CONFIG_SYS_FLASH_EMPTY_INFO
372#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
373#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
56523f12 374
135ae006 375#if defined (CONFIG_CAM5200)
6d0f6bcf 376# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
5078cce8 377#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 378# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
45a212c4 379#else
6d0f6bcf 380# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
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381#endif
382
d534f5cc 383/* Dynamic MTD partition support */
68d7d651 384#define CONFIG_CMD_MTDPARTS
942556a9 385#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
259bff7c 386#define MTDIDS_DEFAULT "nor0=fc000000.flash"
5078cce8 387
5624d66a 388#if defined(CONFIG_STK52XX)
5078cce8 389# if defined(CONFIG_TQM5200_B)
6d0f6bcf 390# if defined(CONFIG_SYS_LOWBOOT)
259bff7c 391# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
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392 "256k(dtb)," \
393 "2304k(kernel)," \
394 "2560k(small-fs)," \
45a212c4 395 "2m(initrd)," \
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396 "8m(misc)," \
397 "16m(big-fs)"
398# else /* highboot */
259bff7c 399# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
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400 "3584k(small-fs)," \
401 "2m(initrd)," \
402 "8m(misc)," \
403 "15m(big-fs)," \
404 "1m(firmware)"
6d0f6bcf 405# endif /* CONFIG_SYS_LOWBOOT */
5078cce8 406# else /* !CONFIG_TQM5200_B */
259bff7c 407# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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408 "128k(dtb)," \
409 "2304k(kernel)," \
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410 "2m(initrd)," \
411 "4m(small-fs)," \
5078cce8 412 "8m(misc)," \
e1f601b5 413 "15m(big-fs)"
5078cce8 414# endif /* CONFIG_TQM5200_B */
135ae006 415#elif defined (CONFIG_CAM5200)
259bff7c 416# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
5078cce8 417 "1792k(kernel)," \
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418 "5632k(rootfs)," \
419 "24m(home)"
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420#elif defined (CONFIG_CHARON)
421# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
422 "1408k(kernel)," \
423 "2m(initrd)," \
424 "4m(small-fs)," \
425 "24320k(big-fs)," \
426 "256k(dts)"
6d3bc9b8 427#elif defined (CONFIG_FO300)
259bff7c 428# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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429 "1408k(kernel)," \
430 "2m(initrd)," \
431 "4m(small-fs)," \
432 "8m(misc)," \
433 "16m(big-fs)"
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434#else
435# error "Unknown Carrier Board"
436#endif /* CONFIG_STK52XX */
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437
438/*
439 * Environment settings
440 */
5a1aceb0 441#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 442#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
78d620eb 443#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
0e8d1586 444#define CONFIG_ENV_SECT_SIZE 0x40000
45a212c4 445#else
0e8d1586 446#define CONFIG_ENV_SECT_SIZE 0x20000
5078cce8 447#endif /* CONFIG_TQM5200_B */
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448#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
449#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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450
451/*
452 * Memory map
453 */
6d0f6bcf
JCPV
454#define CONFIG_SYS_MBAR 0xF0000000
455#define CONFIG_SYS_SDRAM_BASE 0x00000000
456#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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457
458/* Use ON-Chip SRAM until RAM will be available */
6d0f6bcf 459#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
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460#ifdef CONFIG_POST
461/* preserve space for the post_word at end of on-chip SRAM */
553f0982 462#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
56523f12 463#else
553f0982 464#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
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465#endif
466
25ddd1fb 467#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 468#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
56523f12 469
14d0a02a 470#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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471#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
472# define CONFIG_SYS_RAMBOOT 1
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473#endif
474
135ae006 475#if defined (CONFIG_CAM5200)
6d0f6bcf 476# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
5078cce8 477#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 478# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
45a212c4 479#else
6d0f6bcf 480# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
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481#endif
482
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483#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
484#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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485
486/*
487 * Ethernet configuration
488 */
489#define CONFIG_MPC5xxx_FEC 1
86321fc1 490#define CONFIG_MPC5xxx_FEC_MII100
56523f12 491/*
86321fc1 492 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
56523f12 493 */
86321fc1 494/* #define CONFIG_MPC5xxx_FEC_MII10 */
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495#define CONFIG_PHY_ADDR 0x00
496
497/*
498 * GPIO configuration
499 *
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500 * use CS1: Bit 0 (mask: 0x80000000):
501 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
56523f12 502 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
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503 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
504 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
505 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
506 * Use for REV200 STK52XX boards and FO300 boards. Do not use
507 * with REV100 modules (because, there I2C1 is used as I2C bus).
508 * use ATA: Bits 6-7 (mask 0x03000000):
509 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
510 * Use for CAM5200 board.
511 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
512 * use PSC6: Bits 9-11 (mask 0x00700000):
513 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
514 * UART, CODEC or IrDA.
515 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
516 * enable extended POST tests.
517 * Use for MINI-FAP and TQM5200_IB boards.
518 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
519 * Extended POST test is not available.
520 * Use for STK52xx, FO300 and CAM5200 boards.
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521 * WARNING: When the extended POST is enabled, these bits will
522 * be overridden by this code as GPIOs!
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523 * use PCI_DIS: Bit 16 (mask 0x00008000):
524 * 1 -> disable PCI controller (on CAM5200 board).
525 * use USB: Bits 18-19 (mask 0x00003000):
526 * 10 -> two UARTs (on FO300 and CAM5200).
527 * use PSC3: Bits 20-23 (mask: 0x00000f00):
528 * 0000 -> All PSC3 pins are GPIOs.
529 * 1100 -> UART/SPI (on FO300 board).
530 * 0100 -> UART (on CAM5200 board).
531 * use PSC2: Bits 25:27 (mask: 0x00000030):
532 * 000 -> All PSC2 pins are GPIOs.
533 * 100 -> UART (on CAM5200 board).
534 * 001 -> CAN1/2 on PSC2 pins.
95c44ec4 535 * Use for REV100 STK52xx boards
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536 * 01x -> Use AC97 (on FO300 board).
537 * use PSC1: Bits 29-31 (mask: 0x00000007):
538 * 100 -> UART (on all boards).
56523f12 539 */
98e69567 540#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
56523f12 541#if defined (CONFIG_MINIFAP)
6d0f6bcf 542# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
7e6bf358 543#elif defined (CONFIG_STK52XX)
83e40ba7 544# if defined (CONFIG_STK52XX_REV100)
6d0f6bcf 545# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
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546# else /* STK52xx REV200 and above */
547# if defined (CONFIG_TQM5200_REV100)
548# error TQM5200 REV100 not supported on STK52XX REV200 or above
549# else/* TQM5200 REV200 and above */
6d0f6bcf 550# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
83e40ba7 551# endif
8f0b7cbe 552# endif
6d3bc9b8 553#elif defined (CONFIG_FO300)
6d0f6bcf 554# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
7299712c 555#elif defined (CONFIG_CAM5200)
6d0f6bcf 556# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
83e40ba7 557#else /* TMQ5200 Inbetriebnahme-Board */
6d0f6bcf 558# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
56523f12 559#endif
98e69567 560#endif
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561
562/*
563 * RTC configuration
564 */
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565#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
566# define CONFIG_RTC_M41T11 1
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567# define CONFIG_SYS_I2C_RTC_ADDR 0x68
568# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
edd0b509 569 year */
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570#else
571# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
572#endif
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573
574/*
575 * Miscellaneous configurable options
576 */
6d0f6bcf 577#define CONFIG_SYS_LONGHELP /* undef to save memory */
5078cce8 578
2751a95a 579#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
5078cce8 580
6d0f6bcf 581#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
2694690e 582#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 583#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
2694690e
JL
584#endif
585
586#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 587#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
56523f12 588#else
6d0f6bcf 589#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
56523f12 590#endif
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591#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
592#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
593#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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594
595/* Enable an alternate, more extensive memory test */
6d0f6bcf 596#define CONFIG_SYS_ALT_MEMTEST
56523f12 597
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598#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
599#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
56523f12 600
6d0f6bcf 601#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
56523f12 602
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603/*
604 * Various low-level settings
605 */
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606#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
607#define CONFIG_SYS_HID0_FINAL HID0_ICE
56523f12 608
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609#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
610#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
611#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
612#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
56523f12 613#else
6d0f6bcf 614#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
56523f12 615#endif
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616#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
617#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
56523f12 618
7e6bf358 619#define CONFIG_LAST_STAGE_INIT
7e6bf358 620
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621/*
622 * SRAM - Do not map below 2 GB in address space, because this area is used
623 * for SDRAM autosizing.
624 */
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625#define CONFIG_SYS_CS2_START 0xE5000000
626#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
627#define CONFIG_SYS_CS2_CFG 0x0004D930
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628
629/*
630 * Grafic controller - Do not map below 2 GB in address space, because this
631 * area is used for SDRAM autosizing.
632 */
8f0b7cbe 633#define SM501_FB_BASE 0xE0000000
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634#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
635#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
636#define CONFIG_SYS_CS1_CFG 0x8F48FF70
637#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
56523f12 638
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639#define CONFIG_SYS_CS_BURST 0x00000000
640#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
56523f12 641
7299712c 642#if defined(CONFIG_CAM5200)
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643#define CONFIG_SYS_CS4_START 0xB0000000
644#define CONFIG_SYS_CS4_SIZE 0x00010000
645#define CONFIG_SYS_CS4_CFG 0x01019C10
7299712c 646
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647#define CONFIG_SYS_CS5_START 0xD0000000
648#define CONFIG_SYS_CS5_SIZE 0x01208000
649#define CONFIG_SYS_CS5_CFG 0x1414BF10
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650#endif
651
6d0f6bcf 652#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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653
654/*-----------------------------------------------------------------------
655 * USB stuff
656 *-----------------------------------------------------------------------
657 */
658#define CONFIG_USB_CLOCK 0x0001BBBB
659#define CONFIG_USB_CONFIG 0x00001000
660
661/*-----------------------------------------------------------------------
662 * IDE/ATA stuff Supports IDE harddisk
663 *-----------------------------------------------------------------------
664 */
665
81050926 666#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
56523f12 667
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668#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
669#undef CONFIG_IDE_LED /* LED for ide not supported */
56523f12 670
81050926 671#define CONFIG_IDE_RESET /* reset for ide supported */
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672#define CONFIG_IDE_PREINIT
673
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674#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
675#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
56523f12 676
6d0f6bcf 677#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
56523f12 678
6d0f6bcf 679#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
56523f12 680
95c44ec4 681/* Offset for data I/O */
6d0f6bcf 682#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
56523f12 683
95c44ec4 684/* Offset for normal register accesses */
6d0f6bcf 685#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
56523f12 686
95c44ec4 687/* Offset for alternate registers */
6d0f6bcf 688#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
56523f12 689
95c44ec4 690/* Interval between registers */
6d0f6bcf 691#define CONFIG_SYS_ATA_STRIDE 4
56523f12 692
33af3e66 693/* Support ATAPI devices */
95c44ec4 694#define CONFIG_ATAPI 1
33af3e66 695
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696/*-----------------------------------------------------------------------
697 * Open firmware flat tree support
698 *-----------------------------------------------------------------------
699 */
8f8416fa
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700#define OF_CPU "PowerPC,5200@0"
701#define OF_SOC "soc5200@f0000000"
702#define OF_TBCLK (bd->bi_busfreq / 4)
703#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
704
56523f12 705#endif /* __CONFIG_H */