]> git.ipfire.org Git - thirdparty/pciutils.git/blame - lspci.c
Added a test case for Virtual Channel and Root Complex Link caps
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
103f074c 4 * Copyright (c) 1997--2008 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13#include <unistd.h>
98e39e09 14
c7a34993 15#include "lspci.h"
98e39e09
MM
16
17/* Options */
18
c7a34993 19int verbose; /* Show detailed information */
a387042e 20static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 21struct pci_filter filter; /* Device filter */
a387042e
MM
22static int opt_tree; /* Show bus tree */
23static int opt_machine; /* Generate machine-readable output */
24static int opt_map_mode; /* Bus mapping mode enabled */
25static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 26static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
27static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
28static int opt_query_all; /* Query the DNS for all entries */
c7a34993 29char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 30
81afa98c
MM
31const char program_name[] = "lspci";
32
cca2f7c6
MM
33static char options[] = "nvbxs:d:ti:mgp:qkMDQ" GENERIC_OPTIONS ;
34
35static char help_msg[] =
36"Usage: lspci [<switches>]\n"
37"\n"
1b99a704
MM
38"Basic display modes:\n"
39"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
40"-t\t\tShow bus tree\n"
41"\n"
42"Display options:\n"
43"-v\t\tBe verbose (-vv for very verbose)\n"
44#ifdef PCI_OS_LINUX
45"-k\t\tShow kernel drivers handling each device\n"
46#endif
47"-x\t\tShow hex-dump of the standard part of the config space\n"
48"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
49"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
50"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
51"-D\t\tAlways show domain numbers\n"
52"\n"
53"Resolving of device ID's to names:\n"
cca2f7c6
MM
54"-n\t\tShow numeric ID's\n"
55"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
56#ifdef PCI_USE_DNS
57"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
58"-qq\t\tAs above, but re-query locally cached entries\n"
59"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
60#endif
1b99a704
MM
61"\n"
62"Selection of devices:\n"
cca2f7c6 63"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
1b99a704
MM
64"-d [<vendor>]:[<device>]\t\t\tShow only devices with specified ID's\n"
65"\n"
66"Other options:\n"
cca2f7c6 67"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 68#ifdef PCI_OS_LINUX
cca2f7c6 69"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 70#endif
cca2f7c6 71"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
72"\n"
73"PCI access options:\n"
727ce158
MM
74GENERIC_HELP
75;
98e39e09 76
a387042e 77/*** Our view of the PCI bus ***/
98e39e09 78
c7a34993
MM
79struct pci_access *pacc;
80struct device *first_dev;
934e7e36 81static int seen_errors;
98e39e09 82
c7a34993 83int
ec25b52d
MM
84config_fetch(struct device *d, unsigned int pos, unsigned int len)
85{
86 unsigned int end = pos+len;
87 int result;
84d437d6
MM
88
89 while (pos < d->config_bufsize && len && d->present[pos])
90 pos++, len--;
91 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
92 len--;
93 if (!len)
ec25b52d 94 return 1;
84d437d6 95
ec25b52d
MM
96 if (end > d->config_bufsize)
97 {
84d437d6 98 int orig_size = d->config_bufsize;
ec25b52d
MM
99 while (end > d->config_bufsize)
100 d->config_bufsize *= 2;
101 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 102 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 103 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
104 }
105 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
106 if (result)
107 memset(d->present + pos, 1, len);
ec25b52d
MM
108 return result;
109}
110
c7a34993 111struct device *
1812a795
MM
112scan_device(struct pci_dev *p)
113{
1812a795
MM
114 struct device *d;
115
a387042e
MM
116 if (p->domain && !opt_domains)
117 opt_domains = 1;
1812a795
MM
118 if (!pci_filter_match(&filter, p))
119 return NULL;
120 d = xmalloc(sizeof(struct device));
1ac3a99d 121 memset(d, 0, sizeof(*d));
1812a795 122 d->dev = p;
84d437d6 123 d->config_cached = d->config_bufsize = 64;
ec25b52d 124 d->config = xmalloc(64);
84d437d6
MM
125 d->present = xmalloc(64);
126 memset(d->present, 1, 64);
09817437 127 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
128 {
129 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
130 p->domain, p->bus, p->dev, p->func);
131 seen_errors++;
132 return NULL;
133 }
09817437 134 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 135 {
ec25b52d
MM
136 /* For cardbus bridges, we need to fetch 64 bytes more to get the
137 * full standard header... */
84d437d6
MM
138 if (config_fetch(d, 64, 64))
139 d->config_cached += 64;
1812a795 140 }
84d437d6 141 pci_setup_cache(p, d->config, d->config_cached);
2849a165 142 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_PHYS_SLOT);
1812a795
MM
143 return d;
144}
145
98e39e09 146static void
727ce158 147scan_devices(void)
98e39e09
MM
148{
149 struct device *d;
727ce158 150 struct pci_dev *p;
98e39e09 151
727ce158 152 pci_scan_bus(pacc);
de7ef8bc 153 for (p=pacc->devices; p; p=p->next)
1812a795
MM
154 if (d = scan_device(p))
155 {
156 d->next = first_dev;
157 first_dev = d;
158 }
98e39e09
MM
159}
160
a387042e 161/*** Config space accesses ***/
98e39e09 162
84d437d6
MM
163static void
164check_conf_range(struct device *d, unsigned int pos, unsigned int len)
165{
166 while (len)
167 if (!d->present[pos])
168 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
169 else
170 pos++, len--;
171}
172
c7a34993 173byte
98e39e09
MM
174get_conf_byte(struct device *d, unsigned int pos)
175{
84d437d6 176 check_conf_range(d, pos, 1);
98e39e09
MM
177 return d->config[pos];
178}
179
c7a34993 180word
98e39e09
MM
181get_conf_word(struct device *d, unsigned int pos)
182{
84d437d6 183 check_conf_range(d, pos, 2);
98e39e09
MM
184 return d->config[pos] | (d->config[pos+1] << 8);
185}
186
c7a34993 187u32
98e39e09
MM
188get_conf_long(struct device *d, unsigned int pos)
189{
84d437d6 190 check_conf_range(d, pos, 4);
98e39e09
MM
191 return d->config[pos] |
192 (d->config[pos+1] << 8) |
193 (d->config[pos+2] << 16) |
194 (d->config[pos+3] << 24);
195}
196
a387042e 197/*** Sorting ***/
98e39e09
MM
198
199static int
200compare_them(const void *A, const void *B)
201{
727ce158
MM
202 const struct pci_dev *a = (*(const struct device **)A)->dev;
203 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 204
84c8d1bb
MM
205 if (a->domain < b->domain)
206 return -1;
207 if (a->domain > b->domain)
208 return 1;
98e39e09
MM
209 if (a->bus < b->bus)
210 return -1;
211 if (a->bus > b->bus)
212 return 1;
727ce158
MM
213 if (a->dev < b->dev)
214 return -1;
215 if (a->dev > b->dev)
216 return 1;
217 if (a->func < b->func)
98e39e09 218 return -1;
727ce158 219 if (a->func > b->func)
98e39e09
MM
220 return 1;
221 return 0;
222}
223
224static void
225sort_them(void)
226{
727ce158 227 struct device **index, **h, **last_dev;
98e39e09
MM
228 int cnt;
229 struct device *d;
230
c7a34993
MM
231 cnt = 0;
232 for (d=first_dev; d; d=d->next)
233 cnt++;
234 h = index = alloca(sizeof(struct device *) * cnt);
235 for (d=first_dev; d; d=d->next)
236 *h++ = d;
237 qsort(index, cnt, sizeof(struct device *), compare_them);
238 last_dev = &first_dev;
239 h = index;
240 while (cnt--)
241 {
242 *last_dev = *h;
243 last_dev = &(*h)->next;
244 h++;
c1c952d2 245 }
c7a34993 246 *last_dev = NULL;
c1c952d2
MM
247}
248
c7a34993 249/*** Normal output ***/
11339c0d 250
c7a34993
MM
251static void
252show_slot_name(struct device *d)
c1c952d2 253{
c7a34993 254 struct pci_dev *p = d->dev;
c1c952d2 255
c7a34993
MM
256 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
257 printf("%04x:", p->domain);
258 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
c1c952d2
MM
259}
260
c7a34993
MM
261void
262get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 263{
c7a34993 264 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 265
c7a34993
MM
266 if (htype == PCI_HEADER_TYPE_NORMAL)
267 {
268 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
269 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
270 }
271 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
272 {
273 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
274 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
275 }
276 else
277 *subvp = *subdp = 0xffff;
c1c952d2
MM
278}
279
11339c0d 280static void
c7a34993 281show_terse(struct device *d)
11339c0d 282{
c7a34993
MM
283 int c;
284 struct pci_dev *p = d->dev;
285 char classbuf[128], devbuf[128];
11339c0d 286
c7a34993
MM
287 show_slot_name(d);
288 printf(" %s: %s",
289 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
290 PCI_LOOKUP_CLASS,
291 p->device_class),
292 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
293 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
294 p->vendor_id, p->device_id));
295 if (c = get_conf_byte(d, PCI_REVISION_ID))
296 printf(" (rev %02x)", c);
297 if (verbose)
298 {
299 char *x;
300 c = get_conf_byte(d, PCI_CLASS_PROG);
301 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
302 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
303 p->device_class, c);
304 if (c || x)
305 {
306 printf(" (prog-if %02x", c);
307 if (x)
308 printf(" [%s]", x);
309 putchar(')');
310 }
311 }
312 putchar('\n');
c1c952d2 313
c7a34993
MM
314 if (verbose || opt_kernel)
315 {
316 word subsys_v, subsys_d;
317 char ssnamebuf[256];
c1c952d2 318
c7a34993
MM
319 get_subid(d, &subsys_v, &subsys_d);
320 if (subsys_v && subsys_v != 0xffff)
321 printf("\tSubsystem: %s\n",
322 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
323 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
324 p->vendor_id, p->device_id, subsys_v, subsys_d));
325 }
c1c952d2
MM
326}
327
a387042e
MM
328/*** Verbose output ***/
329
330static void
331show_size(pciaddr_t x)
332{
0188807c 333 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 334 unsigned i;
a387042e
MM
335 if (!x)
336 return;
f2f8adaa
MW
337 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
338 if (x < 1024)
339 break;
340 x /= 1024;
341 }
342 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
343}
344
345static void
346show_bases(struct device *d, int cnt)
347{
348 struct pci_dev *p = d->dev;
349 word cmd = get_conf_word(d, PCI_COMMAND);
350 int i;
659d438b 351 int virtual = 0;
a387042e 352
de7ef8bc 353 for (i=0; i<cnt; i++)
a387042e
MM
354 {
355 pciaddr_t pos = p->base_addr[i];
356 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
357 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
358 if (flg == 0xffffffff)
359 flg = 0;
360 if (!pos && !flg && !len)
361 continue;
362 if (verbose > 1)
363 printf("\tRegion %d: ", i);
364 else
365 putchar('\t');
366 if (pos && !flg) /* Reported by the OS, but not by the device */
367 {
368 printf("[virtual] ");
369 flg = pos;
659d438b 370 virtual = 1;
a387042e
MM
371 }
372 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
373 {
374 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
375 printf("I/O ports at ");
376 if (a)
377 printf(PCIADDR_PORT_FMT, a);
378 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
379 printf("<ignored>");
380 else
381 printf("<unassigned>");
659d438b 382 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
383 printf(" [disabled]");
384 }
385 else
386 {
387 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
388 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
389 int done = 0;
390 u32 z = 0;
391
392 printf("Memory at ");
393 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
394 {
395 if (i >= cnt - 1)
396 {
397 printf("<invalid-64bit-slot>");
398 done = 1;
399 }
400 else
401 {
402 i++;
403 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
404 }
405 }
406 if (!done)
407 {
408 if (a)
409 printf(PCIADDR_T_FMT, a);
410 else
411 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
412 }
413 printf(" (%s, %sprefetchable)",
414 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
415 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
416 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
417 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 418 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
419 printf(" [disabled]");
420 }
421 show_size(len);
422 putchar('\n');
423 }
424}
425
426static void
427show_rom(struct device *d, int reg)
428{
429 struct pci_dev *p = d->dev;
430 pciaddr_t rom = p->rom_base_addr;
431 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
432 u32 flg = get_conf_long(d, reg);
433 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 434 int virtual = 0;
a387042e
MM
435
436 if (!rom && !flg && !len)
437 return;
438 putchar('\t');
439 if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
440 {
441 printf("[virtual] ");
442 flg = rom;
659d438b 443 virtual = 1;
a387042e
MM
444 }
445 printf("Expansion ROM at ");
446 if (rom & PCI_ROM_ADDRESS_MASK)
447 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
448 else if (flg & PCI_ROM_ADDRESS_MASK)
449 printf("<ignored>");
450 else
451 printf("<unassigned>");
452 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
453 printf(" [disabled]");
659d438b 454 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
455 printf(" [disabled by cmd]");
456 show_size(len);
457 putchar('\n');
458}
459
e95c8373
MM
460static void
461show_htype0(struct device *d)
462{
463 show_bases(d, 6);
6aa54f1b 464 show_rom(d, PCI_ROM_ADDRESS);
e95c8373
MM
465 show_caps(d);
466}
467
98e39e09
MM
468static void
469show_htype1(struct device *d)
470{
471 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
472 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
473 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
474 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
475 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
476 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
477 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
478 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
479 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 480 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09 481 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 482 int verb = verbose > 2;
98e39e09
MM
483
484 show_bases(d, 2);
485 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
486 get_conf_byte(d, PCI_PRIMARY_BUS),
487 get_conf_byte(d, PCI_SECONDARY_BUS),
488 get_conf_byte(d, PCI_SUBORDINATE_BUS),
489 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
490
491 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
492 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
493 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
494 else
495 {
496 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
497 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
498 if (io_type == PCI_IO_RANGE_TYPE_32)
499 {
500 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
501 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
502 }
e306e911 503 if (io_base <= io_limit || verb)
98e39e09
MM
504 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
505 }
506
507 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
508 mem_type)
509 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 510 else
98e39e09
MM
511 {
512 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
513 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM
514 if (mem_base <= mem_limit || verb)
515 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM
516 }
517
518 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
519 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
520 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 521 else
98e39e09
MM
522 {
523 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
524 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM
525 if (pref_base <= pref_limit || verb)
526 {
527 if (pref_type == PCI_PREF_RANGE_TYPE_32)
528 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
529 else
530 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
531 get_conf_long(d, PCI_PREF_BASE_UPPER32),
532 pref_base,
533 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
f29dcc87 534 pref_limit + 0xfffff);
e306e911 535 }
98e39e09
MM
536 }
537
138c0385 538 if (verbose > 1)
c1c2c30e 539 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
540 FLAG(sec_stat, PCI_STATUS_66MHZ),
541 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
542 FLAG(sec_stat, PCI_STATUS_PARITY),
543 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
544 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
545 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
546 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
547 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
548 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
549 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
550 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 551
6aa54f1b 552 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
553
554 if (verbose > 1)
da322bfb
MM
555 {
556 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
557 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
558 FLAG(brc, PCI_BRIDGE_CTL_SERR),
559 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
560 FLAG(brc, PCI_BRIDGE_CTL_VGA),
561 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
562 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
563 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
564 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
565 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
566 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
567 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
568 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
569 }
e95c8373
MM
570
571 show_caps(d);
98e39e09
MM
572}
573
2f48f637
MM
574static void
575show_htype2(struct device *d)
576{
96e4f295
MM
577 int i;
578 word cmd = get_conf_word(d, PCI_COMMAND);
579 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 580 word exca;
e306e911 581 int verb = verbose > 2;
96e4f295
MM
582
583 show_bases(d, 1);
584 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
585 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
586 get_conf_byte(d, PCI_CB_CARD_BUS),
587 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
588 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 589 for (i=0; i<2; i++)
96e4f295
MM
590 {
591 int p = 8*i;
592 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
593 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 594 if (limit > base || verb)
81077814 595 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
596 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
597 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
598 }
de7ef8bc 599 for (i=0; i<2; i++)
96e4f295
MM
600 {
601 int p = 8*i;
602 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
603 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
604 if (!(base & PCI_IO_RANGE_TYPE_32))
605 {
606 base &= 0xffff;
607 limit &= 0xffff;
608 }
609 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 610 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
611 if (base <= limit || verb)
612 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
613 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
614 }
615
616 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
617 printf("\tSecondary status: SERR\n");
618 if (verbose > 1)
619 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
620 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
621 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
622 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
623 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
624 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
625 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
626 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
627 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
628
629 if (d->config_cached < 128)
630 {
631 printf("\t<access denied to the rest>\n");
632 return;
633 }
634
635 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
636 if (exca)
637 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM
638}
639
98e39e09
MM
640static void
641show_verbose(struct device *d)
642{
727ce158 643 struct pci_dev *p = d->dev;
98e39e09
MM
644 word status = get_conf_word(d, PCI_STATUS);
645 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 646 word class = p->device_class;
98e39e09
MM
647 byte bist = get_conf_byte(d, PCI_BIST);
648 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
649 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
650 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
651 byte max_lat, min_gnt;
652 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 653 unsigned int irq = p->irq;
98e39e09
MM
654
655 show_terse(d);
656
98e39e09
MM
657 switch (htype)
658 {
2f48f637
MM
659 case PCI_HEADER_TYPE_NORMAL:
660 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 661 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
662 max_lat = get_conf_byte(d, PCI_MAX_LAT);
663 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 664 break;
2f48f637 665 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 666 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 667 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
727ce158 668 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM
669 break;
670 case PCI_HEADER_TYPE_CARDBUS:
671 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 672 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 673 min_gnt = max_lat = 0;
98e39e09
MM
674 break;
675 default:
676 printf("\t!!! Unknown header type %02x\n", htype);
677 return;
678 }
679
2849a165
AC
680 if (p->phy_slot)
681 printf("\tPhysical Slot: %s\n", p->phy_slot);
682
98e39e09
MM
683 if (verbose > 1)
684 {
da322bfb 685 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
686 FLAG(cmd, PCI_COMMAND_IO),
687 FLAG(cmd, PCI_COMMAND_MEMORY),
688 FLAG(cmd, PCI_COMMAND_MASTER),
689 FLAG(cmd, PCI_COMMAND_SPECIAL),
690 FLAG(cmd, PCI_COMMAND_INVALIDATE),
691 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
692 FLAG(cmd, PCI_COMMAND_PARITY),
693 FLAG(cmd, PCI_COMMAND_WAIT),
694 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
695 FLAG(cmd, PCI_COMMAND_FAST_BACK),
696 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
697 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
698 FLAG(status, PCI_STATUS_CAP_LIST),
699 FLAG(status, PCI_STATUS_66MHZ),
700 FLAG(status, PCI_STATUS_UDF),
701 FLAG(status, PCI_STATUS_FAST_BACK),
702 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
703 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
704 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
705 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
706 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
707 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
708 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
709 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
710 FLAG(status, PCI_STATUS_DETECTED_PARITY),
711 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
712 if (cmd & PCI_COMMAND_MASTER)
713 {
56164f4f
MM
714 printf("\tLatency: %d", latency);
715 if (min_gnt || max_lat)
716 {
717 printf(" (");
718 if (min_gnt)
719 printf("%dns min", min_gnt*250);
720 if (min_gnt && max_lat)
721 printf(", ");
722 if (max_lat)
723 printf("%dns max", max_lat*250);
724 putchar(')');
725 }
98e39e09 726 if (cache_line)
7a61b93c 727 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
728 putchar('\n');
729 }
727ce158 730 if (int_pin || irq)
9739916e 731 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 732 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM
733 }
734 else
735 {
736 printf("\tFlags: ");
737 if (cmd & PCI_COMMAND_MASTER)
738 printf("bus master, ");
739 if (cmd & PCI_COMMAND_VGA_PALETTE)
740 printf("VGA palette snoop, ");
741 if (cmd & PCI_COMMAND_WAIT)
742 printf("stepping, ");
743 if (cmd & PCI_COMMAND_FAST_BACK)
744 printf("fast Back2Back, ");
745 if (status & PCI_STATUS_66MHZ)
c1c2c30e 746 printf("66MHz, ");
98e39e09
MM
747 if (status & PCI_STATUS_UDF)
748 printf("user-definable features, ");
749 printf("%s devsel",
750 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
751 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
752 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
753 if (cmd & PCI_COMMAND_MASTER)
754 printf(", latency %d", latency);
727ce158 755 if (irq)
9739916e 756 printf(", IRQ " PCIIRQ_FMT, irq);
98e39e09
MM
757 putchar('\n');
758 }
759
760 if (bist & PCI_BIST_CAPABLE)
761 {
762 if (bist & PCI_BIST_START)
763 printf("\tBIST is running\n");
764 else
765 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
766 }
767
768 switch (htype)
769 {
2f48f637 770 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
771 show_htype0(d);
772 break;
2f48f637 773 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
774 show_htype1(d);
775 break;
2f48f637
MM
776 case PCI_HEADER_TYPE_CARDBUS:
777 show_htype2(d);
778 break;
98e39e09
MM
779 }
780}
781
a387042e
MM
782/*** Machine-readable dumps ***/
783
98e39e09
MM
784static void
785show_hex_dump(struct device *d)
786{
09817437 787 unsigned int i, cnt;
98e39e09 788
84d437d6 789 cnt = d->config_cached;
a387042e 790 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
791 {
792 cnt = 256;
a387042e 793 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
794 cnt = 4096;
795 }
796
de7ef8bc 797 for (i=0; i<cnt; i++)
98e39e09
MM
798 {
799 if (! (i & 15))
800 printf("%02x:", i);
801 printf(" %02x", get_conf_byte(d, i));
802 if ((i & 15) == 15)
803 putchar('\n');
804 }
805}
806
13081e57
MM
807static void
808print_shell_escaped(char *c)
809{
810 printf(" \"");
811 while (*c)
812 {
813 if (*c == '"' || *c == '\\')
814 putchar('\\');
815 putchar(*c++);
816 }
817 putchar('"');
818}
819
0a33d0ec
MM
820static void
821show_machine(struct device *d)
822{
727ce158 823 struct pci_dev *p = d->dev;
0a33d0ec 824 int c;
c1c952d2 825 word sv_id, sd_id;
727ce158 826 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f 827
c1c952d2 828 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
829
830 if (verbose)
831 {
a387042e 832 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
833 show_slot_name(d);
834 putchar('\n');
727ce158 835 printf("Class:\t%s\n",
c2b144ef 836 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 837 printf("Vendor:\t%s\n",
224707ba 838 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 839 printf("Device:\t%s\n",
224707ba 840 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
841 if (sv_id && sv_id != 0xffff)
842 {
727ce158 843 printf("SVendor:\t%s\n",
a99c0d69 844 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 845 printf("SDevice:\t%s\n",
d4798a32 846 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 847 }
2849a165
AC
848 if (p->phy_slot)
849 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
850 if (c = get_conf_byte(d, PCI_REVISION_ID))
851 printf("Rev:\t%02x\n", c);
852 if (c = get_conf_byte(d, PCI_CLASS_PROG))
853 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
854 if (opt_kernel)
855 show_kernel_machine(d);
0a33d0ec
MM
856 }
857 else
858 {
84c8d1bb 859 show_slot_name(d);
13081e57
MM
860 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
861 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
862 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
863 if (c = get_conf_byte(d, PCI_REVISION_ID))
864 printf(" -r%02x", c);
865 if (c = get_conf_byte(d, PCI_CLASS_PROG))
866 printf(" -p%02x", c);
ce503b7f 867 if (sv_id && sv_id != 0xffff)
13081e57
MM
868 {
869 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
870 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
871 }
ce503b7f
MM
872 else
873 printf(" \"\" \"\"");
0a33d0ec
MM
874 putchar('\n');
875 }
876}
877
a387042e
MM
878/*** Main show function ***/
879
c7a34993 880void
1812a795
MM
881show_device(struct device *d)
882{
a387042e 883 if (opt_machine)
1812a795 884 show_machine(d);
1812a795 885 else
11339c0d
MM
886 {
887 if (verbose)
888 show_verbose(d);
889 else
890 show_terse(d);
891 if (opt_kernel || verbose)
892 show_kernel(d);
893 }
a387042e 894 if (opt_hex)
1812a795 895 show_hex_dump(d);
a387042e 896 if (verbose || opt_hex)
1812a795
MM
897 putchar('\n');
898}
899
98e39e09
MM
900static void
901show(void)
902{
903 struct device *d;
904
de7ef8bc 905 for (d=first_dev; d; d=d->next)
1812a795 906 show_device(d);
98e39e09
MM
907}
908
909/* Main */
910
911int
912main(int argc, char **argv)
913{
914 int i;
e4842ff3 915 char *msg;
98e39e09 916
496d4021
MM
917 if (argc == 2 && !strcmp(argv[1], "--version"))
918 {
919 puts("lspci version " PCIUTILS_VERSION);
920 return 0;
921 }
727ce158
MM
922
923 pacc = pci_alloc();
924 pacc->error = die;
925 pci_filter_init(pacc, &filter);
926
98e39e09
MM
927 while ((i = getopt(argc, argv, options)) != -1)
928 switch (i)
929 {
930 case 'n':
bc2eed2d 931 pacc->numeric_ids++;
98e39e09
MM
932 break;
933 case 'v':
934 verbose++;
935 break;
936 case 'b':
727ce158 937 pacc->buscentric = 1;
98e39e09 938 break;
e4842ff3 939 case 's':
727ce158 940 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 941 die("-s: %s", msg);
98e39e09 942 break;
e4842ff3 943 case 'd':
727ce158
MM
944 if (msg = pci_filter_parse_id(&filter, optarg))
945 die("-d: %s", msg);
98e39e09
MM
946 break;
947 case 'x':
a387042e 948 opt_hex++;
98e39e09 949 break;
6d0dc0fd 950 case 't':
a387042e 951 opt_tree++;
6d0dc0fd 952 break;
18928b91 953 case 'i':
cc062b4a 954 pci_set_name_list_path(pacc, optarg, 0);
18928b91 955 break;
0a33d0ec 956 case 'm':
a387042e 957 opt_machine++;
0a33d0ec 958 break;
c1c952d2
MM
959 case 'p':
960 opt_pcimap = optarg;
961 break;
1b99a704 962#ifdef PCI_OS_LINUX
11339c0d
MM
963 case 'k':
964 opt_kernel++;
965 break;
1b99a704 966#endif
1812a795 967 case 'M':
a387042e 968 opt_map_mode++;
1812a795 969 break;
af61eb25 970 case 'D':
a387042e 971 opt_domains = 2;
af61eb25 972 break;
e022789d 973#ifdef PCI_USE_DNS
cca2f7c6
MM
974 case 'q':
975 opt_query_dns++;
976 break;
977 case 'Q':
978 opt_query_all = 1;
979 break;
e022789d
MM
980#else
981 case 'q':
982 case 'Q':
983 die("DNS queries are not available in this version");
984#endif
98e39e09 985 default:
727ce158
MM
986 if (parse_generic_option(i, pacc, optarg))
987 break;
98e39e09 988 bad:
727ce158 989 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
990 return 1;
991 }
992 if (optind < argc)
993 goto bad;
994
cca2f7c6
MM
995 if (opt_query_dns)
996 {
997 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
998 if (opt_query_dns > 1)
999 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1000 }
1001 if (opt_query_all)
1002 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1003
727ce158 1004 pci_init(pacc);
a387042e 1005 if (opt_map_mode)
1812a795 1006 map_the_bus();
6d0dc0fd 1007 else
1812a795
MM
1008 {
1009 scan_devices();
1010 sort_them();
a387042e 1011 if (opt_tree)
1812a795
MM
1012 show_forest();
1013 else
1014 show();
1015 }
727ce158 1016 pci_cleanup(pacc);
98e39e09 1017
934e7e36 1018 return (seen_errors ? 2 : 0);
98e39e09 1019}