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[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
14d6c0a3 2 * $Id: lspci.c,v 1.36 2000/04/21 11:58:00 mj Exp $
98e39e09
MM		 3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
6ece6bc6 6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
98e39e09
MM		 7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
727ce158 14#include <stdarg.h>
98e39e09 15#include <unistd.h>
98e39e09
MM		 16
17#include "pciutils.h"
18
19/* Options */
20
21static int verbose; /* Show detailed information */
22static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 24static struct pci_filter filter; /* Device filter */
6d0dc0fd 25static int show_tree; /* Show bus tree */
0a33d0ec 26static int machine_readable; /* Generate machine-readable output */
1812a795 27static int map_mode; /* Bus mapping mode enabled */
98e39e09 28
1812a795 29static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
98e39e09
MM		 30
31static char help_msg[] = "\
32Usage: lspci [<switches>]\n\
33\n\
e4842ff3
MM		 34-v\t\tBe verbose\n\
35-n\t\tShow numeric ID's\n\
36-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
3b89d8e4 37-x\t\tShow hex-dump of config space\n\
e4842ff3
MM		 38-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39-d [<vendor>]:[<device>]\tShow only selected devices\n\
40-t\t\tShow bus tree\n\
41-m\t\tProduce machine-readable output\n\
1812a795
MM		 42-i <file>\tUse specified ID database instead of %s\n\
43-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
727ce158
MM		 44GENERIC_HELP
45;
98e39e09 46
727ce158
MM		 47/* Communication with libpci */
48
49static struct pci_access *pacc;
50
51/* Format strings used for IRQ numbers and memory addresses */
f17b962b 52
2f48f637 53#ifdef ARCH_SPARC64
f17b962b
MM		 54#define IRQ_FORMAT "%08x"
55#else
56#define IRQ_FORMAT "%d"
57#endif
58
f3395cc5 59#ifdef HAVE_64BIT_ADDRESS
e95c8373 60#ifdef HAVE_LONG_ADDRESS
f3395cc5 61#define ADDR_FORMAT "%016Lx"
727ce158 62#else
e95c8373
MM		 63#define ADDR_FORMAT "%016lx"
64#endif
65#else
f3395cc5 66#define ADDR_FORMAT "%08lx"
727ce158
MM		 67#endif
68
dec16943
MM		 69#ifdef ARCH_SPARC64
70#define IO_FORMAT "%016Lx"
044ed538 71#elif defined(HAVE_LONG_ADDRESS)
dec16943
MM		 72#define IO_FORMAT "%04Lx"
73#else
74#define IO_FORMAT "%04lx"
75#endif
76
14d6c0a3
MM		 77/*
78 * If we aren't being compiled by GCC, use malloc() instead of alloca().
79 * This increases our memory footprint, but only slightly since we don't
80 * use alloca() much.
81 */
82
83#ifndef __GNUC__
84#define alloca malloc
85#endif
86
98e39e09
MM		 87/* Our view of the PCI bus */
88
89struct device {
90 struct device *next;
727ce158 91 struct pci_dev *dev;
b5137411 92 unsigned int config_cnt;
98e39e09
MM		 93 byte config[256];
94};
95
727ce158 96static struct device *first_dev;
98e39e09 97
1812a795
MM		 98static struct device *
99scan_device(struct pci_dev *p)
100{
101 int how_much = (show_hex > 2) ? 256 : 64;
102 struct device *d;
103
104 if (!pci_filter_match(&filter, p))
105 return NULL;
106 d = xmalloc(sizeof(struct device));
107 bzero(d, sizeof(*d));
108 d->dev = p;
109 if (!pci_read_block(p, 0, d->config, how_much))
110 die("Unable to read %d bytes of configuration space.", how_much);
111 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
112 {
113 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
2715403f 114 if (!pci_read_block(p, 64, d->config+64, 64))
1812a795
MM		 115 die("Unable to read cardbus bridge extension data.");
116 how_much = 128;
117 }
118 d->config_cnt = how_much;
119 pci_setup_cache(p, d->config, d->config_cnt);
e95c8373 120 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
1812a795
MM		 121 return d;
122}
123
98e39e09 124static void
727ce158 125scan_devices(void)
98e39e09
MM		 126{
127 struct device *d;
727ce158 128 struct pci_dev *p;
98e39e09 129
727ce158
MM		 130 pci_scan_bus(pacc);
131 for(p=pacc->devices; p; p=p->next)
1812a795
MM		 132 if (d = scan_device(p))
133 {
134 d->next = first_dev;
135 first_dev = d;
136 }
98e39e09
MM		 137}
138
b5137411
MM		 139static int
140check_root(void)
141{
142 static int is_root = -1;
143
144 if (is_root < 0)
145 is_root = !geteuid();
146 return is_root;
147}
148
149static int
150config_fetch(struct device *d, unsigned int pos, unsigned int len)
151{
152 if (pos + len < d->config_cnt)
153 return 1;
154 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
155 return 0;
156 return pci_read_block(d->dev, pos, d->config + pos, len);
157}
158
98e39e09
MM		 159/* Config space accesses */
160
161static inline byte
162get_conf_byte(struct device *d, unsigned int pos)
163{
164 return d->config[pos];
165}
166
167static word
168get_conf_word(struct device *d, unsigned int pos)
169{
170 return d->config[pos] | (d->config[pos+1] << 8);
171}
172
173static u32
174get_conf_long(struct device *d, unsigned int pos)
175{
176 return d->config[pos] |
177 (d->config[pos+1] << 8) |
178 (d->config[pos+2] << 16) |
179 (d->config[pos+3] << 24);
180}
181
182/* Sorting */
183
184static int
185compare_them(const void *A, const void *B)
186{
727ce158
MM		 187 const struct pci_dev *a = (*(const struct device **)A)->dev;
188 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09
MM		 189
190 if (a->bus < b->bus)
191 return -1;
192 if (a->bus > b->bus)
193 return 1;
727ce158
MM		 194 if (a->dev < b->dev)
195 return -1;
196 if (a->dev > b->dev)
197 return 1;
198 if (a->func < b->func)
98e39e09 199 return -1;
727ce158 200 if (a->func > b->func)
98e39e09
MM		 201 return 1;
202 return 0;
203}
204
205static void
206sort_them(void)
207{
727ce158 208 struct device **index, **h, **last_dev;
98e39e09
MM		 209 int cnt;
210 struct device *d;
211
212 cnt = 0;
213 for(d=first_dev; d; d=d->next)
214 cnt++;
215 h = index = alloca(sizeof(struct device *) * cnt);
216 for(d=first_dev; d; d=d->next)
217 *h++ = d;
218 qsort(index, cnt, sizeof(struct device *), compare_them);
219 last_dev = &first_dev;
220 h = index;
221 while (cnt--)
222 {
223 *last_dev = *h;
224 last_dev = &(*h)->next;
225 h++;
226 }
227 *last_dev = NULL;
228}
229
6d0dc0fd 230/* Normal output */
98e39e09 231
1c31d620
MM		 232#define FLAG(x,y) ((x & y) ? '+' : '-')
233
98e39e09
MM		 234static void
235show_terse(struct device *d)
236{
237 int c;
727ce158
MM		 238 struct pci_dev *p = d->dev;
239 byte classbuf[128], devbuf[128];
98e39e09
MM		 240
241 printf("%02x:%02x.%x %s: %s",
727ce158
MM		 242 p->bus,
243 p->dev,
244 p->func,
245 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
246 PCI_LOOKUP_CLASS,
d4798a32 247 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158
MM		 248 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
249 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 250 p->vendor_id, p->device_id, 0, 0));
98e39e09
MM		 251 if (c = get_conf_byte(d, PCI_REVISION_ID))
252 printf(" (rev %02x)", c);
8d047897 253 if (verbose)
d4798a32 254 {
8d047897
MM		 255 char *x;
256 c = get_conf_byte(d, PCI_CLASS_PROG);
257 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
258 PCI_LOOKUP_PROGIF,
259 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
260 if (c || x)
261 {
262 printf(" (prog-if %02x", c);
263 if (x)
264 printf(" [%s]", x);
265 putchar(')');
266 }
d4798a32 267 }
98e39e09
MM		 268 putchar('\n');
269}
270
e95c8373
MM		 271static void
272show_size(pciaddr_t x)
273{
c36c0862
MM		 274 if (!x)
275 return;
e95c8373
MM		 276 printf(" [size=");
277 if (x < 1024)
278 printf("%d", (int) x);
279 else if (x < 1048576)
280 printf("%dK", (int)(x / 1024));
281 else if (x < 0x80000000)
282 printf("%dM", (int)(x / 1048576));
283 else
284 printf(ADDR_FORMAT, x);
285 putchar(']');
286}
287
98e39e09
MM		 288static void
289show_bases(struct device *d, int cnt)
290{
727ce158 291 struct pci_dev *p = d->dev;
98e39e09
MM		 292 word cmd = get_conf_word(d, PCI_COMMAND);
293 int i;
294
96e4f295 295 for(i=0; i<cnt; i++)
98e39e09 296 {
f3395cc5 297 pciaddr_t pos = p->base_addr[i];
e95c8373 298 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
f3395cc5 299 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
727ce158
MM		 300 if (flg == 0xffffffff)
301 flg = 0;
e95c8373 302 if (!pos && !flg && !len)
98e39e09 303 continue;
072c77e5
MM		 304 if (verbose > 1)
305 printf("\tRegion %d: ", i);
306 else
307 putchar('\t');
727ce158
MM		 308 if (pos && !flg) /* Reported by the OS, but not by the device */
309 {
310 printf("[virtual] ");
311 flg = pos;
312 }
98e39e09 313 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b 314 {
dec16943 315 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
072c77e5
MM		 316 printf("I/O ports at ");
317 if (a)
dec16943 318 printf(IO_FORMAT, a);
727ce158
MM		 319 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
320 printf("<ignored>");
072c77e5
MM		 321 else
322 printf("<unassigned>");
323 if (!(cmd & PCI_COMMAND_IO))
324 printf(" [disabled]");
f17b962b 325 }
072c77e5 326 else
98e39e09
MM		 327 {
328 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
f3395cc5 329 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
727ce158
MM		 330 int done = 0;
331 u32 z = 0;
332
98e39e09
MM		 333 printf("Memory at ");
334 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
335 {
727ce158
MM		 336 if (i >= cnt - 1)
337 {
e95c8373 338 printf("<invalid-64bit-slot>");
727ce158
MM		 339 done = 1;
340 }
341 else
98e39e09
MM		 342 {
343 i++;
072c77e5
MM		 344 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
345 if (buscentric_view)
727ce158
MM		 346 {
347 if (a || z)
b801b390 348 printf("%08x" ADDR_FORMAT, z, a);
727ce158
MM		 349 else
350 printf("<unassigned>");
351 done = 1;
352 }
98e39e09 353 }
727ce158
MM		 354 }
355 if (!done)
356 {
357 if (a)
f3395cc5 358 printf(ADDR_FORMAT, a);
98e39e09 359 else
727ce158 360 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
98e39e09 361 }
072c77e5 362 printf(" (%s, %sprefetchable)",
98e39e09
MM		 363 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
072c77e5 365 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
f17b962b 366 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
072c77e5
MM		 367 if (!(cmd & PCI_COMMAND_MEMORY))
368 printf(" [disabled]");
98e39e09 369 }
c36c0862 370 show_size(len);
072c77e5 371 putchar('\n');
98e39e09
MM		 372 }
373}
374
1c31d620
MM		 375static void
376show_pm(struct device *d, int where, int cap)
377{
378 int t;
379
380 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
381 if (verbose < 2)
382 return;
383 printf("\t\tFlags: PMEClk%c AuxPwr%c DSI%c D1%c D2%c PME%c\n",
384 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
385 FLAG(cap, PCI_PM_CAP_AUX_POWER),
386 FLAG(cap, PCI_PM_CAP_DSI),
387 FLAG(cap, PCI_PM_CAP_D1),
388 FLAG(cap, PCI_PM_CAP_D2),
389 FLAG(cap, PCI_PM_CAP_PME));
390 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
391 t = get_conf_word(d, where + PCI_PM_CTRL);
392 printf("\t\tStatus: D%d PME-Enable%c DSel=%x DScale=%x PME%c\n",
393 t & PCI_PM_CTRL_STATE_MASK,
394 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
395 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
396 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
397 FLAG(t, PCI_PM_CTRL_PME_STATUS));
398}
399
81077814
MM		 400static void
401format_agp_rate(int rate, char *buf)
402{
403 char *c = buf;
404 int i;
405
406 for(i=0; i<2; i++)
407 if (rate & (1 << i))
408 {
409 if (c != buf)
410 *c++ = ',';
411 *c++ = 'x';
59e76e8b 412 *c++ = '0' + (1 << i);
81077814
MM		 413 }
414 if (c != buf)
415 *c = 0;
416 else
417 strcpy(buf, "<none>");
418}
419
1c31d620
MM		 420static void
421show_agp(struct device *d, int where, int cap)
422{
423 u32 t;
81077814 424 char rate[8];
1c31d620
MM		 425
426 t = cap & 0xff;
427 printf("AGP version %x.%x\n", cap/16, cap%16);
428 if (verbose < 2)
429 return;
430 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
431 t = get_conf_long(d, where + PCI_AGP_STATUS);
81077814
MM		 432 format_agp_rate(t & 7, rate);
433 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s\n",
1c31d620
MM		 434 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
435 FLAG(t, PCI_AGP_STATUS_SBA),
436 FLAG(t, PCI_AGP_STATUS_64BIT),
437 FLAG(t, PCI_AGP_STATUS_FW),
81077814 438 rate);
84b10481 439 t = get_conf_long(d, where + PCI_AGP_COMMAND);
81077814
MM		 440 format_agp_rate(t & 7, rate);
441 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s\n",
1c31d620
MM		 442 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
443 FLAG(t, PCI_AGP_COMMAND_SBA),
444 FLAG(t, PCI_AGP_COMMAND_AGP),
445 FLAG(t, PCI_AGP_COMMAND_64BIT),
446 FLAG(t, PCI_AGP_COMMAND_FW),
81077814 447 rate);
1c31d620
MM		 448}
449
98e39e09 450static void
e95c8373 451show_rom(struct device *d)
98e39e09 452{
e95c8373
MM		 453 struct pci_dev *p = d->dev;
454 pciaddr_t rom = p->rom_base_addr;
455 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
98e39e09 456
e95c8373
MM		 457 if (!rom && !len)
458 return;
459 printf("\tExpansion ROM at ");
460 if (rom & PCI_ROM_ADDRESS_MASK)
461 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
462 else
463 printf("<unassigned>");
464 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
465 printf(" [disabled]");
466 show_size(len);
467 putchar('\n');
468}
469
470static void
471show_msi(struct device *d, int where, int cap)
472{
473 int is64;
474 u32 t;
475 u16 w;
476
477 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
478 FLAG(cap, PCI_MSI_FLAGS_64BIT),
479 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
480 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
481 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
482 if (verbose < 2)
483 return;
484 is64 = cap & PCI_MSI_FLAGS_64BIT;
485 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
486 printf("\t\tAddress: ");
487 if (is64)
488 {
489 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
490 w = get_conf_word(d, where + PCI_MSI_DATA_64);
491 printf("%08x", t);
492 }
493 else
494 w = get_conf_word(d, where + PCI_MSI_DATA_32);
495 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
496 printf("%08x Data: %04x\n", t, w);
497}
498
499static void
500show_slotid(int cap)
501{
502 int esr = cap & 0xff;
503 int chs = cap >> 8;
504
505 printf("Slot ID: %d slots, First%c, chassis %02x\n",
506 esr & PCI_SID_ESR_NSLOTS,
507 FLAG(esr, PCI_SID_ESR_FIC),
508 chs);
509}
510
511static void
512show_caps(struct device *d)
513{
b5137411
MM		 514 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
515 {
e95c8373 516 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
b5137411
MM		 517 while (where)
518 {
1c31d620 519 int id, next, cap;
b5137411
MM		 520 printf("\tCapabilities: ");
521 if (!config_fetch(d, where, 4))
522 {
523 puts("<available only to root>");
524 break;
525 }
1c31d620 526 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
e95c8373 527 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
1c31d620
MM		 528 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
529 printf("[%02x] ", where);
b5137411
MM		 530 if (id == 0xff)
531 {
1c31d620 532 printf("<chain broken>\n");
b5137411
MM		 533 break;
534 }
535 switch (id)
536 {
1c31d620
MM		 537 case PCI_CAP_ID_PM:
538 show_pm(d, where, cap);
539 break;
540 case PCI_CAP_ID_AGP:
541 show_agp(d, where, cap);
b5137411 542 break;
e95c8373
MM		 543 case PCI_CAP_ID_VPD:
544 printf("Vital Product Data\n");
545 break;
546 case PCI_CAP_ID_SLOTID:
547 show_slotid(cap);
548 break;
549 case PCI_CAP_ID_MSI:
550 show_msi(d, where, cap);
551 break;
b5137411 552 default:
e95c8373 553 printf("#%02x [%04x]\n", id, cap);
b5137411 554 }
b5137411
MM		 555 where = next;
556 }
557 }
98e39e09
MM		 558}
559
e95c8373
MM		 560static void
561show_htype0(struct device *d)
562{
563 show_bases(d, 6);
564 show_rom(d);
565 show_caps(d);
566}
567
98e39e09
MM		 568static void
569show_htype1(struct device *d)
570{
571 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
572 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
573 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
574 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
575 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
576 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
577 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
578 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
579 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
98e39e09 580 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 581 int verb = verbose > 2;
98e39e09
MM		 582
583 show_bases(d, 2);
584 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
585 get_conf_byte(d, PCI_PRIMARY_BUS),
586 get_conf_byte(d, PCI_SECONDARY_BUS),
587 get_conf_byte(d, PCI_SUBORDINATE_BUS),
588 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
589
590 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
591 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
592 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
593 else
594 {
595 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
596 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
597 if (io_type == PCI_IO_RANGE_TYPE_32)
598 {
599 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
600 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
601 }
e306e911 602 if (io_base <= io_limit || verb)
98e39e09
MM		 603 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
604 }
605
606 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
607 mem_type)
608 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 609 else
98e39e09
MM		 610 {
611 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
612 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM		 613 if (mem_base <= mem_limit || verb)
614 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM		 615 }
616
617 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
618 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
619 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 620 else
98e39e09
MM		 621 {
622 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
623 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM		 624 if (pref_base <= pref_limit || verb)
625 {
626 if (pref_type == PCI_PREF_RANGE_TYPE_32)
627 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
628 else
629 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
630 get_conf_long(d, PCI_PREF_BASE_UPPER32),
631 pref_base,
632 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
633 pref_limit);
634 }
98e39e09
MM		 635 }
636
637 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
638 printf("\tSecondary status: SERR\n");
639
e95c8373 640 show_rom(d);
98e39e09
MM		 641
642 if (verbose > 1)
643 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
1c31d620
MM		 644 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
645 FLAG(brc, PCI_BRIDGE_CTL_SERR),
646 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
647 FLAG(brc, PCI_BRIDGE_CTL_VGA),
648 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
649 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
650 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
e95c8373
MM		 651
652 show_caps(d);
98e39e09
MM		 653}
654
2f48f637
MM		 655static void
656show_htype2(struct device *d)
657{
96e4f295
MM		 658 int i;
659 word cmd = get_conf_word(d, PCI_COMMAND);
660 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
661 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
e306e911 662 int verb = verbose > 2;
96e4f295
MM		 663
664 show_bases(d, 1);
665 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
666 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
667 get_conf_byte(d, PCI_CB_CARD_BUS),
668 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
669 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
670 for(i=0; i<2; i++)
671 {
672 int p = 8*i;
673 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
674 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 675 if (limit > base || verb)
81077814 676 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM		 677 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
678 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
679 }
680 for(i=0; i<2; i++)
681 {
682 int p = 8*i;
683 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
684 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
685 if (!(base & PCI_IO_RANGE_TYPE_32))
686 {
687 base &= 0xffff;
688 limit &= 0xffff;
689 }
690 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 691 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM		 692 if (base <= limit || verb)
693 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
694 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM		 695 }
696
697 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
698 printf("\tSecondary status: SERR\n");
699 if (verbose > 1)
700 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM		 701 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
702 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
703 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
704 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
705 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
706 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
707 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
708 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
96e4f295
MM		 709 if (exca)
710 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM		 711}
712
98e39e09
MM		 713static void
714show_verbose(struct device *d)
715{
727ce158 716 struct pci_dev *p = d->dev;
98e39e09
MM		 717 word status = get_conf_word(d, PCI_STATUS);
718 word cmd = get_conf_word(d, PCI_COMMAND);
719 word class = get_conf_word(d, PCI_CLASS_DEVICE);
720 byte bist = get_conf_byte(d, PCI_BIST);
721 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
722 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
723 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
724 byte max_lat, min_gnt;
725 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 726 unsigned int irq = p->irq;
98e39e09 727 word subsys_v, subsys_d;
727ce158 728 char ssnamebuf[256];
98e39e09
MM		 729
730 show_terse(d);
731
98e39e09
MM		 732 switch (htype)
733 {
2f48f637
MM		 734 case PCI_HEADER_TYPE_NORMAL:
735 if (class == PCI_CLASS_BRIDGE_PCI)
736 {
737 badhdr:
738 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
739 return;
740 }
98e39e09
MM		 741 max_lat = get_conf_byte(d, PCI_MAX_LAT);
742 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
743 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
744 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
745 break;
2f48f637
MM		 746 case PCI_HEADER_TYPE_BRIDGE:
747 if (class != PCI_CLASS_BRIDGE_PCI)
748 goto badhdr;
727ce158 749 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM		 750 subsys_v = subsys_d = 0;
751 break;
752 case PCI_HEADER_TYPE_CARDBUS:
753 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
754 goto badhdr;
96e4f295
MM		 755 min_gnt = max_lat = 0;
756 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
757 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM		 758 break;
759 default:
760 printf("\t!!! Unknown header type %02x\n", htype);
761 return;
762 }
763
e306e911 764 if (subsys_v && subsys_v != 0xffff)
727ce158
MM		 765 printf("\tSubsystem: %s\n",
766 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
767 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 768 p->vendor_id, p->device_id, subsys_v, subsys_d));
ce503b7f 769
98e39e09
MM		 770 if (verbose > 1)
771 {
98e39e09 772 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
1c31d620
MM		 773 FLAG(cmd, PCI_COMMAND_IO),
774 FLAG(cmd, PCI_COMMAND_MEMORY),
775 FLAG(cmd, PCI_COMMAND_MASTER),
776 FLAG(cmd, PCI_COMMAND_SPECIAL),
777 FLAG(cmd, PCI_COMMAND_INVALIDATE),
778 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
779 FLAG(cmd, PCI_COMMAND_PARITY),
780 FLAG(cmd, PCI_COMMAND_WAIT),
781 FLAG(cmd, PCI_COMMAND_SERR),
782 FLAG(cmd, PCI_COMMAND_FAST_BACK));
b5137411 783 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
1c31d620
MM		 784 FLAG(status, PCI_STATUS_CAP_LIST),
785 FLAG(status, PCI_STATUS_66MHZ),
786 FLAG(status, PCI_STATUS_UDF),
787 FLAG(status, PCI_STATUS_FAST_BACK),
788 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM		 789 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
790 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
791 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM		 792 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
793 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
794 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
795 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
796 FLAG(status, PCI_STATUS_DETECTED_PARITY));
98e39e09
MM		 797 if (cmd & PCI_COMMAND_MASTER)
798 {
799 printf("\tLatency: ");
800 if (min_gnt)
801 printf("%d min, ", min_gnt);
802 if (max_lat)
803 printf("%d max, ", max_lat);
804 printf("%d set", latency);
805 if (cache_line)
806 printf(", cache line size %02x", cache_line);
807 putchar('\n');
808 }
727ce158
MM		 809 if (int_pin || irq)
810 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
811 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM		 812 }
813 else
814 {
815 printf("\tFlags: ");
816 if (cmd & PCI_COMMAND_MASTER)
817 printf("bus master, ");
818 if (cmd & PCI_COMMAND_VGA_PALETTE)
819 printf("VGA palette snoop, ");
820 if (cmd & PCI_COMMAND_WAIT)
821 printf("stepping, ");
822 if (cmd & PCI_COMMAND_FAST_BACK)
823 printf("fast Back2Back, ");
824 if (status & PCI_STATUS_66MHZ)
825 printf("66Mhz, ");
826 if (status & PCI_STATUS_UDF)
827 printf("user-definable features, ");
828 printf("%s devsel",
829 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
830 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
831 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
832 if (cmd & PCI_COMMAND_MASTER)
833 printf(", latency %d", latency);
727ce158
MM		 834 if (irq)
835 printf(", IRQ " IRQ_FORMAT, irq);
98e39e09
MM		 836 putchar('\n');
837 }
838
839 if (bist & PCI_BIST_CAPABLE)
840 {
841 if (bist & PCI_BIST_START)
842 printf("\tBIST is running\n");
843 else
844 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
845 }
846
847 switch (htype)
848 {
2f48f637 849 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM		 850 show_htype0(d);
851 break;
2f48f637 852 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM		 853 show_htype1(d);
854 break;
2f48f637
MM		 855 case PCI_HEADER_TYPE_CARDBUS:
856 show_htype2(d);
857 break;
98e39e09
MM		 858 }
859}
860
861static void
862show_hex_dump(struct device *d)
863{
b5137411 864 unsigned int i;
98e39e09 865
727ce158 866 for(i=0; i<d->config_cnt; i++)
98e39e09
MM		 867 {
868 if (! (i & 15))
869 printf("%02x:", i);
870 printf(" %02x", get_conf_byte(d, i));
871 if ((i & 15) == 15)
872 putchar('\n');
873 }
874}
875
0a33d0ec
MM		 876static void
877show_machine(struct device *d)
878{
727ce158 879 struct pci_dev *p = d->dev;
0a33d0ec 880 int c;
ce503b7f 881 word sv_id=0, sd_id=0;
727ce158 882 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f
MM		 883
884 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
885 {
886 case PCI_HEADER_TYPE_NORMAL:
887 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
888 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
889 break;
890 case PCI_HEADER_TYPE_CARDBUS:
891 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
892 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
893 break;
894 }
0a33d0ec
MM		 895
896 if (verbose)
897 {
727ce158
MM		 898 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
899 printf("Class:\t%s\n",
d4798a32 900 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
727ce158 901 printf("Vendor:\t%s\n",
d4798a32 902 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
727ce158 903 printf("Device:\t%s\n",
d4798a32 904 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
ce503b7f
MM		 905 if (sv_id && sv_id != 0xffff)
906 {
727ce158 907 printf("SVendor:\t%s\n",
d4798a32 908 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
727ce158 909 printf("SDevice:\t%s\n",
d4798a32 910 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 911 }
0a33d0ec
MM		 912 if (c = get_conf_byte(d, PCI_REVISION_ID))
913 printf("Rev:\t%02x\n", c);
914 if (c = get_conf_byte(d, PCI_CLASS_PROG))
915 printf("ProgIf:\t%02x\n", c);
916 }
917 else
918 {
727ce158 919 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
0a33d0ec 920 printf("\"%s\" \"%s\" \"%s\"",
727ce158 921 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
d4798a32 922 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158 923 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
d4798a32 924 p->vendor_id, p->device_id, 0, 0),
727ce158 925 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
d4798a32 926 p->vendor_id, p->device_id, 0, 0));
0a33d0ec
MM		 927 if (c = get_conf_byte(d, PCI_REVISION_ID))
928 printf(" -r%02x", c);
929 if (c = get_conf_byte(d, PCI_CLASS_PROG))
930 printf(" -p%02x", c);
ce503b7f 931 if (sv_id && sv_id != 0xffff)
727ce158 932 printf(" \"%s\" \"%s\"",
d4798a32
MM		 933 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
934 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f
MM		 935 else
936 printf(" \"\" \"\"");
0a33d0ec
MM		 937 putchar('\n');
938 }
939}
940
1812a795
MM		 941static void
942show_device(struct device *d)
943{
944 if (machine_readable)
945 show_machine(d);
946 else if (verbose)
947 show_verbose(d);
948 else
949 show_terse(d);
950 if (show_hex)
951 show_hex_dump(d);
952 if (verbose || show_hex)
953 putchar('\n');
954}
955
98e39e09
MM		 956static void
957show(void)
958{
959 struct device *d;
960
961 for(d=first_dev; d; d=d->next)
1812a795 962 show_device(d);
98e39e09
MM		 963}
964
6d0dc0fd
MM		 965/* Tree output */
966
967struct bridge {
968 struct bridge *chain; /* Single-linked list of bridges */
969 struct bridge *next, *child; /* Tree of bridges */
970 struct bus *first_bus; /* List of busses connected to this bridge */
971 unsigned int primary, secondary, subordinate; /* Bus numbers */
972 struct device *br_dev;
973};
974
975struct bus {
976 unsigned int number;
977 struct bus *sibling;
978 struct device *first_dev, **last_dev;
979};
980
981static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
982
983static struct bus *
984find_bus(struct bridge *b, unsigned int n)
985{
986 struct bus *bus;
987
988 for(bus=b->first_bus; bus; bus=bus->sibling)
989 if (bus->number == n)
990 break;
991 return bus;
992}
993
994static struct bus *
995new_bus(struct bridge *b, unsigned int n)
996{
997 struct bus *bus = xmalloc(sizeof(struct bus));
998
999 bus = xmalloc(sizeof(struct bus));
1000 bus->number = n;
1001 bus->sibling = b->first_bus;
1002 bus->first_dev = NULL;
1003 bus->last_dev = &bus->first_dev;
1004 b->first_bus = bus;
1005 return bus;
1006}
1007
1008static void
1009insert_dev(struct device *d, struct bridge *b)
1010{
727ce158 1011 struct pci_dev *p = d->dev;
6d0dc0fd
MM		 1012 struct bus *bus;
1013
727ce158 1014 if (! (bus = find_bus(b, p->bus)))
6d0dc0fd
MM		 1015 {
1016 struct bridge *c;
1017 for(c=b->child; c; c=c->next)
727ce158 1018 if (c->secondary <= p->bus && p->bus <= c->subordinate)
14d6c0a3
MM		 1019 {
1020 insert_dev(d, c);
1021 return;
1022 }
727ce158 1023 bus = new_bus(b, p->bus);
6d0dc0fd
MM		 1024 }
1025 /* Simple insertion at the end _does_ guarantee the correct order as the
1026 * original device list was sorted by (bus, devfn) lexicographically
1027 * and all devices on the new list have the same bus number.
1028 */
1029 *bus->last_dev = d;
1030 bus->last_dev = &d->next;
1031 d->next = NULL;
1032}
1033
1034static void
1035grow_tree(void)
1036{
1037 struct device *d, *d2;
008407bd 1038 struct bridge **last_br, *b;
6d0dc0fd
MM		 1039
1040 /* Build list of bridges */
1041
008407bd 1042 last_br = &host_bridge.chain;
6d0dc0fd
MM		 1043 for(d=first_dev; d; d=d->next)
1044 {
1045 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM		 1046 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1047 if (class == PCI_CLASS_BRIDGE_PCI &&
1048 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM		 1049 {
1050 b = xmalloc(sizeof(struct bridge));
96e4f295
MM		 1051 if (ht == PCI_HEADER_TYPE_BRIDGE)
1052 {
1053 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1054 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1055 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1056 }
1057 else
1058 {
1059 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1060 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1061 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1062 }
008407bd
MM		 1063 *last_br = b;
1064 last_br = &b->chain;
6d0dc0fd
MM		 1065 b->next = b->child = NULL;
1066 b->first_bus = NULL;
1067 b->br_dev = d;
1068 }
1069 }
008407bd 1070 *last_br = NULL;
6d0dc0fd
MM		 1071
1072 /* Create a bridge tree */
1073
008407bd 1074 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1075 {
1076 struct bridge *c, *best;
1077 best = NULL;
008407bd 1078 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM		 1079 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1080 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1081 best = c;
1082 if (best)
1083 {
1084 b->next = best->child;
1085 best->child = b;
1086 }
1087 }
1088
1089 /* Insert secondary bus for each bridge */
1090
008407bd 1091 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1092 if (!find_bus(b, b->secondary))
1093 new_bus(b, b->secondary);
1094
1095 /* Create bus structs and link devices */
1096
1097 for(d=first_dev; d;)
1098 {
1099 d2 = d->next;
1100 insert_dev(d, &host_bridge);
1101 d = d2;
1102 }
1103}
1104
1105static void
1106print_it(byte *line, byte *p)
1107{
1108 *p++ = '\n';
1109 *p = 0;
1110 fputs(line, stdout);
1111 for(p=line; *p; p++)
008407bd 1112 if (*p == '+' || *p == '|')
6d0dc0fd
MM		 1113 *p = '|';
1114 else
1115 *p = ' ';
1116}
1117
1118static void show_tree_bridge(struct bridge *, byte *, byte *);
1119
1120static void
1121show_tree_dev(struct device *d, byte *line, byte *p)
1122{
727ce158 1123 struct pci_dev *q = d->dev;
6d0dc0fd 1124 struct bridge *b;
727ce158 1125 char namebuf[256];
6d0dc0fd 1126
727ce158 1127 p += sprintf(p, "%02x.%x", q->dev, q->func);
6d0dc0fd
MM		 1128 for(b=&host_bridge; b; b=b->chain)
1129 if (b->br_dev == d)
1130 {
008407bd
MM		 1131 if (b->secondary == b->subordinate)
1132 p += sprintf(p, "-[%02x]-", b->secondary);
1133 else
1134 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM		 1135 show_tree_bridge(b, line, p);
1136 return;
1137 }
18928b91 1138 if (verbose)
727ce158
MM		 1139 p += sprintf(p, " %s",
1140 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1141 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 1142 q->vendor_id, q->device_id, 0, 0));
6d0dc0fd
MM		 1143 print_it(line, p);
1144}
1145
1146static void
1147show_tree_bus(struct bus *b, byte *line, byte *p)
1148{
1149 if (!b->first_dev)
1150 print_it(line, p);
1151 else if (!b->first_dev->next)
1152 {
1153 *p++ = '-';
1154 *p++ = '-';
1155 show_tree_dev(b->first_dev, line, p);
1156 }
1157 else
1158 {
1159 struct device *d = b->first_dev;
1160 while (d->next)
1161 {
1162 p[0] = '+';
1163 p[1] = '-';
1164 show_tree_dev(d, line, p+2);
1165 d = d->next;
1166 }
1167 p[0] = '\\';
1168 p[1] = '-';
1169 show_tree_dev(d, line, p+2);
1170 }
1171}
1172
1173static void
1174show_tree_bridge(struct bridge *b, byte *line, byte *p)
1175{
1176 *p++ = '-';
1177 if (!b->first_bus->sibling)
1178 {
1179 if (b == &host_bridge)
1180 p += sprintf(p, "[%02x]-", b->first_bus->number);
1181 show_tree_bus(b->first_bus, line, p);
1182 }
1183 else
1184 {
1185 struct bus *u = b->first_bus;
1186 byte *k;
1187
1188 while (u->sibling)
1189 {
1190 k = p + sprintf(p, "+-[%02x]-", u->number);
1191 show_tree_bus(u, line, k);
1192 u = u->sibling;
1193 }
1194 k = p + sprintf(p, "\\-[%02x]-", u->number);
1195 show_tree_bus(u, line, k);
1196 }
1197}
1198
1199static void
1200show_forest(void)
1201{
1202 char line[256];
1203
1204 grow_tree();
1205 show_tree_bridge(&host_bridge, line, line);
1206}
1207
1812a795
MM		 1208/* Bus mapping mode */
1209
1210struct bus_bridge {
1211 struct bus_bridge *next;
1c31d620 1212 byte this, dev, func, first, last, bug;
1812a795
MM		 1213};
1214
1215struct bus_info {
1216 byte exists;
1c31d620
MM		 1217 byte guestbook;
1218 struct bus_bridge *bridges, *via;
1812a795
MM		 1219};
1220
1221static struct bus_info *bus_info;
1222
1223static void
1224map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1225{
1226 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1227 struct pci_dev *p = d->dev;
1812a795
MM		 1228
1229 b->next = bi->bridges;
1230 bi->bridges = b;
1c31d620
MM		 1231 b->this = get_conf_byte(d, np);
1232 b->dev = p->dev;
1233 b->func = p->func;
1812a795
MM		 1234 b->first = get_conf_byte(d, ns);
1235 b->last = get_conf_byte(d, nl);
1236 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1c31d620
MM		 1237 p->bus, p->dev, p->func, b->this, b->first, b->last);
1238 if (b->this != p->bus)
1812a795
MM		 1239 printf("!!! Bridge points to invalid primary bus.\n");
1240 if (b->first > b->last)
1241 {
1242 printf("!!! Bridge points to invalid bus range.\n");
1243 b->last = b->first;
1244 }
1245}
1246
1247static void
1248do_map_bus(int bus)
1249{
1250 int dev, func;
1251 int verbose = pacc->debugging;
1252 struct bus_info *bi = bus_info + bus;
1253 struct device *d;
1254
1255 if (verbose)
1256 printf("Mapping bus %02x\n", bus);
1257 for(dev = 0; dev < 32; dev++)
1258 if (filter.slot < 0 || filter.slot == dev)
1259 {
f3395cc5
MM		 1260 int func_limit = 1;
1261 for(func = 0; func < func_limit; func++)
1812a795
MM		 1262 if (filter.func < 0 || filter.func == func)
1263 {
1264 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1265 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1266 if (vendor && vendor != 0xffff)
1267 {
f3395cc5
MM		 1268 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1269 func_limit = 8;
1812a795
MM		 1270 if (verbose)
1271 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1272 bi->exists = 1;
1273 if (d = scan_device(p))
1274 {
1275 show_device(d);
1276 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1277 {
1278 case PCI_HEADER_TYPE_BRIDGE:
1279 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1280 break;
1281 case PCI_HEADER_TYPE_CARDBUS:
1282 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1283 break;
1284 }
1285 free(d);
1286 }
1287 else if (verbose)
1288 printf("But it was filtered out.\n");
1289 }
1290 pci_free_dev(p);
1291 }
1292 }
1293}
1294
1c31d620
MM		 1295static void
1296do_map_bridges(int bus, int min, int max)
1297{
1298 struct bus_info *bi = bus_info + bus;
1299 struct bus_bridge *b;
1300
1301 bi->guestbook = 1;
1302 for(b=bi->bridges; b; b=b->next)
1303 {
1304 if (bus_info[b->first].guestbook)
1305 b->bug = 1;
1306 else if (b->first < min || b->last > max)
1307 b->bug = 2;
1308 else
1309 {
1310 bus_info[b->first].via = b;
1311 do_map_bridges(b->first, b->first, b->last);
1312 }
1313 }
1314}
1315
1316static void
1317map_bridges(void)
1318{
1319 int i;
1320
1321 printf("\nSummary of buses:\n\n");
1322 for(i=0; i<256; i++)
1323 if (bus_info[i].exists && !bus_info[i].guestbook)
1324 do_map_bridges(i, 0, 255);
1325 for(i=0; i<256; i++)
1326 {
1327 struct bus_info *bi = bus_info + i;
1328 struct bus_bridge *b = bi->via;
1329
1330 if (bi->exists)
1331 {
1332 printf("%02x: ", i);
1333 if (b)
1334 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1335 else if (!i)
1336 printf("Primary host bus\n");
1337 else
1338 printf("Secondary host bus (?)\n");
1339 }
1340 for(b=bi->bridges; b; b=b->next)
1341 {
1342 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1343 switch (b->bug)
1344 {
1345 case 1:
1346 printf(" <overlap bug>");
1347 break;
1348 case 2:
1349 printf(" <crossing bug>");
1350 break;
1351 }
1352 putchar('\n');
1353 }
1354 }
1355}
1356
1812a795
MM		 1357static void
1358map_the_bus(void)
1359{
1360 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1361 pacc->method == PCI_ACCESS_DUMP)
1362 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1363 else if (!check_root())
1364 die("Only root can map the bus.");
1365 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1366 bzero(bus_info, sizeof(struct bus_info) * 256);
1367 if (filter.bus >= 0)
1368 do_map_bus(filter.bus);
1369 else
1370 {
1371 int bus;
1372 for(bus=0; bus<256; bus++)
1373 do_map_bus(bus);
1374 }
1c31d620 1375 map_bridges();
1812a795
MM		 1376}
1377
98e39e09
MM		 1378/* Main */
1379
1380int
1381main(int argc, char **argv)
1382{
1383 int i;
e4842ff3 1384 char *msg;
98e39e09 1385
496d4021
MM		 1386 if (argc == 2 && !strcmp(argv[1], "--version"))
1387 {
1388 puts("lspci version " PCIUTILS_VERSION);
1389 return 0;
1390 }
727ce158
MM		 1391
1392 pacc = pci_alloc();
1393 pacc->error = die;
1394 pci_filter_init(pacc, &filter);
1395
98e39e09
MM		 1396 while ((i = getopt(argc, argv, options)) != -1)
1397 switch (i)
1398 {
1399 case 'n':
727ce158 1400 pacc->numeric_ids = 1;
98e39e09
MM		 1401 break;
1402 case 'v':
1403 verbose++;
1404 break;
1405 case 'b':
727ce158 1406 pacc->buscentric = 1;
98e39e09
MM		 1407 buscentric_view = 1;
1408 break;
e4842ff3 1409 case 's':
727ce158
MM		 1410 if (msg = pci_filter_parse_slot(&filter, optarg))
1411 die("-f: %s", msg);
98e39e09 1412 break;
e4842ff3 1413 case 'd':
727ce158
MM		 1414 if (msg = pci_filter_parse_id(&filter, optarg))
1415 die("-d: %s", msg);
98e39e09
MM		 1416 break;
1417 case 'x':
1418 show_hex++;
1419 break;
6d0dc0fd
MM		 1420 case 't':
1421 show_tree++;
1422 break;
18928b91 1423 case 'i':
727ce158 1424 pacc->id_file_name = optarg;
18928b91 1425 break;
0a33d0ec
MM		 1426 case 'm':
1427 machine_readable++;
1428 break;
1812a795
MM		 1429 case 'M':
1430 map_mode++;
1431 break;
98e39e09 1432 default:
727ce158
MM		 1433 if (parse_generic_option(i, pacc, optarg))
1434 break;
98e39e09 1435 bad:
727ce158 1436 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM		 1437 return 1;
1438 }
1439 if (optind < argc)
1440 goto bad;
1441
727ce158 1442 pci_init(pacc);
1812a795
MM		 1443 if (map_mode)
1444 map_the_bus();
6d0dc0fd 1445 else
1812a795
MM		 1446 {
1447 scan_devices();
1448 sort_them();
1449 if (show_tree)
1450 show_forest();
1451 else
1452 show();
1453 }
727ce158 1454 pci_cleanup(pacc);
98e39e09
MM		 1455
1456 return 0;
1457}
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