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98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
7dacd9c8 4 * Copyright (c) 1997--2003 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13#include <unistd.h>
98e39e09
MM
14
15#include "pciutils.h"
16
17/* Options */
18
19static int verbose; /* Show detailed information */
20static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
21static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 22static struct pci_filter filter; /* Device filter */
6d0dc0fd 23static int show_tree; /* Show bus tree */
0a33d0ec 24static int machine_readable; /* Generate machine-readable output */
1812a795 25static int map_mode; /* Bus mapping mode enabled */
98e39e09 26
1812a795 27static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
98e39e09
MM
28
29static char help_msg[] = "\
30Usage: lspci [<switches>]\n\
31\n\
e4842ff3
MM
32-v\t\tBe verbose\n\
33-n\t\tShow numeric ID's\n\
34-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
f0952474
MM
35-x\t\tShow hex-dump of the standard portion of config space\n\
36-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n\
e4842ff3
MM
37-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
38-d [<vendor>]:[<device>]\tShow only selected devices\n\
39-t\t\tShow bus tree\n\
40-m\t\tProduce machine-readable output\n\
1812a795
MM
41-i <file>\tUse specified ID database instead of %s\n\
42-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
727ce158
MM
43GENERIC_HELP
44;
98e39e09 45
727ce158
MM
46/* Communication with libpci */
47
48static struct pci_access *pacc;
49
14d6c0a3
MM
50/*
51 * If we aren't being compiled by GCC, use malloc() instead of alloca().
52 * This increases our memory footprint, but only slightly since we don't
53 * use alloca() much.
54 */
55
56#ifndef __GNUC__
57#define alloca malloc
58#endif
59
98e39e09
MM
60/* Our view of the PCI bus */
61
62struct device {
63 struct device *next;
727ce158 64 struct pci_dev *dev;
b5137411 65 unsigned int config_cnt;
98e39e09
MM
66 byte config[256];
67};
68
727ce158 69static struct device *first_dev;
98e39e09 70
1812a795
MM
71static struct device *
72scan_device(struct pci_dev *p)
73{
74 int how_much = (show_hex > 2) ? 256 : 64;
75 struct device *d;
76
77 if (!pci_filter_match(&filter, p))
78 return NULL;
79 d = xmalloc(sizeof(struct device));
80 bzero(d, sizeof(*d));
81 d->dev = p;
82 if (!pci_read_block(p, 0, d->config, how_much))
83 die("Unable to read %d bytes of configuration space.", how_much);
84 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
85 {
86 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
2715403f 87 if (!pci_read_block(p, 64, d->config+64, 64))
1812a795
MM
88 die("Unable to read cardbus bridge extension data.");
89 how_much = 128;
90 }
91 d->config_cnt = how_much;
92 pci_setup_cache(p, d->config, d->config_cnt);
e95c8373 93 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
1812a795
MM
94 return d;
95}
96
98e39e09 97static void
727ce158 98scan_devices(void)
98e39e09
MM
99{
100 struct device *d;
727ce158 101 struct pci_dev *p;
98e39e09 102
727ce158
MM
103 pci_scan_bus(pacc);
104 for(p=pacc->devices; p; p=p->next)
1812a795
MM
105 if (d = scan_device(p))
106 {
107 d->next = first_dev;
108 first_dev = d;
109 }
98e39e09
MM
110}
111
b5137411
MM
112static int
113check_root(void)
114{
115 static int is_root = -1;
116
117 if (is_root < 0)
118 is_root = !geteuid();
119 return is_root;
120}
121
122static int
123config_fetch(struct device *d, unsigned int pos, unsigned int len)
124{
125 if (pos + len < d->config_cnt)
126 return 1;
127 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
128 return 0;
129 return pci_read_block(d->dev, pos, d->config + pos, len);
130}
131
98e39e09
MM
132/* Config space accesses */
133
134static inline byte
135get_conf_byte(struct device *d, unsigned int pos)
136{
137 return d->config[pos];
138}
139
140static word
141get_conf_word(struct device *d, unsigned int pos)
142{
143 return d->config[pos] | (d->config[pos+1] << 8);
144}
145
146static u32
147get_conf_long(struct device *d, unsigned int pos)
148{
149 return d->config[pos] |
150 (d->config[pos+1] << 8) |
151 (d->config[pos+2] << 16) |
152 (d->config[pos+3] << 24);
153}
154
155/* Sorting */
156
157static int
158compare_them(const void *A, const void *B)
159{
727ce158
MM
160 const struct pci_dev *a = (*(const struct device **)A)->dev;
161 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09
MM
162
163 if (a->bus < b->bus)
164 return -1;
165 if (a->bus > b->bus)
166 return 1;
727ce158
MM
167 if (a->dev < b->dev)
168 return -1;
169 if (a->dev > b->dev)
170 return 1;
171 if (a->func < b->func)
98e39e09 172 return -1;
727ce158 173 if (a->func > b->func)
98e39e09
MM
174 return 1;
175 return 0;
176}
177
178static void
179sort_them(void)
180{
727ce158 181 struct device **index, **h, **last_dev;
98e39e09
MM
182 int cnt;
183 struct device *d;
184
185 cnt = 0;
186 for(d=first_dev; d; d=d->next)
187 cnt++;
188 h = index = alloca(sizeof(struct device *) * cnt);
189 for(d=first_dev; d; d=d->next)
190 *h++ = d;
191 qsort(index, cnt, sizeof(struct device *), compare_them);
192 last_dev = &first_dev;
193 h = index;
194 while (cnt--)
195 {
196 *last_dev = *h;
197 last_dev = &(*h)->next;
198 h++;
199 }
200 *last_dev = NULL;
201}
202
6d0dc0fd 203/* Normal output */
98e39e09 204
1c31d620
MM
205#define FLAG(x,y) ((x & y) ? '+' : '-')
206
98e39e09
MM
207static void
208show_terse(struct device *d)
209{
210 int c;
727ce158
MM
211 struct pci_dev *p = d->dev;
212 byte classbuf[128], devbuf[128];
98e39e09
MM
213
214 printf("%02x:%02x.%x %s: %s",
727ce158
MM
215 p->bus,
216 p->dev,
217 p->func,
218 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
219 PCI_LOOKUP_CLASS,
d4798a32 220 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158
MM
221 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
222 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 223 p->vendor_id, p->device_id, 0, 0));
98e39e09
MM
224 if (c = get_conf_byte(d, PCI_REVISION_ID))
225 printf(" (rev %02x)", c);
8d047897 226 if (verbose)
d4798a32 227 {
8d047897
MM
228 char *x;
229 c = get_conf_byte(d, PCI_CLASS_PROG);
230 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
231 PCI_LOOKUP_PROGIF,
232 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
233 if (c || x)
234 {
235 printf(" (prog-if %02x", c);
236 if (x)
237 printf(" [%s]", x);
238 putchar(')');
239 }
d4798a32 240 }
98e39e09
MM
241 putchar('\n');
242}
243
e95c8373
MM
244static void
245show_size(pciaddr_t x)
246{
c36c0862
MM
247 if (!x)
248 return;
e95c8373
MM
249 printf(" [size=");
250 if (x < 1024)
251 printf("%d", (int) x);
252 else if (x < 1048576)
253 printf("%dK", (int)(x / 1024));
254 else if (x < 0x80000000)
255 printf("%dM", (int)(x / 1048576));
256 else
9739916e 257 printf(PCIADDR_T_FMT, x);
e95c8373
MM
258 putchar(']');
259}
260
98e39e09
MM
261static void
262show_bases(struct device *d, int cnt)
263{
727ce158 264 struct pci_dev *p = d->dev;
98e39e09
MM
265 word cmd = get_conf_word(d, PCI_COMMAND);
266 int i;
267
96e4f295 268 for(i=0; i<cnt; i++)
98e39e09 269 {
f3395cc5 270 pciaddr_t pos = p->base_addr[i];
e95c8373 271 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
f3395cc5 272 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
727ce158
MM
273 if (flg == 0xffffffff)
274 flg = 0;
e95c8373 275 if (!pos && !flg && !len)
98e39e09 276 continue;
072c77e5
MM
277 if (verbose > 1)
278 printf("\tRegion %d: ", i);
279 else
280 putchar('\t');
727ce158
MM
281 if (pos && !flg) /* Reported by the OS, but not by the device */
282 {
283 printf("[virtual] ");
284 flg = pos;
285 }
98e39e09 286 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b 287 {
dec16943 288 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
072c77e5
MM
289 printf("I/O ports at ");
290 if (a)
9739916e 291 printf(PCIADDR_PORT_FMT, a);
727ce158
MM
292 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
293 printf("<ignored>");
072c77e5
MM
294 else
295 printf("<unassigned>");
296 if (!(cmd & PCI_COMMAND_IO))
297 printf(" [disabled]");
f17b962b 298 }
072c77e5 299 else
98e39e09
MM
300 {
301 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
f3395cc5 302 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
727ce158
MM
303 int done = 0;
304 u32 z = 0;
305
98e39e09
MM
306 printf("Memory at ");
307 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
308 {
727ce158
MM
309 if (i >= cnt - 1)
310 {
e95c8373 311 printf("<invalid-64bit-slot>");
727ce158
MM
312 done = 1;
313 }
314 else
98e39e09
MM
315 {
316 i++;
072c77e5
MM
317 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
318 if (buscentric_view)
727ce158
MM
319 {
320 if (a || z)
9739916e 321 printf("%08x" PCIADDR_T_FMT, z, a);
727ce158
MM
322 else
323 printf("<unassigned>");
324 done = 1;
325 }
98e39e09 326 }
727ce158
MM
327 }
328 if (!done)
329 {
330 if (a)
9739916e 331 printf(PCIADDR_T_FMT, a);
98e39e09 332 else
727ce158 333 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
98e39e09 334 }
072c77e5 335 printf(" (%s, %sprefetchable)",
98e39e09
MM
336 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
337 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
072c77e5 338 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
f17b962b 339 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
072c77e5
MM
340 if (!(cmd & PCI_COMMAND_MEMORY))
341 printf(" [disabled]");
98e39e09 342 }
c36c0862 343 show_size(len);
072c77e5 344 putchar('\n');
98e39e09
MM
345 }
346}
347
1c31d620
MM
348static void
349show_pm(struct device *d, int where, int cap)
350{
72b9b690
MM
351 int t, b;
352 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
1c31d620
MM
353
354 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
355 if (verbose < 2)
356 return;
72b9b690 357 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
1c31d620 358 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
1c31d620
MM
359 FLAG(cap, PCI_PM_CAP_DSI),
360 FLAG(cap, PCI_PM_CAP_D1),
361 FLAG(cap, PCI_PM_CAP_D2),
72b9b690
MM
362 pm_aux_current[(cap >> 6) & 7],
363 FLAG(cap, PCI_PM_CAP_PME_D0),
364 FLAG(cap, PCI_PM_CAP_PME_D1),
365 FLAG(cap, PCI_PM_CAP_PME_D2),
366 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
367 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
7dacd9c8
MM
368 if (!config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL))
369 return;
1c31d620 370 t = get_conf_word(d, where + PCI_PM_CTRL);
72b9b690 371 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
1c31d620
MM
372 t & PCI_PM_CTRL_STATE_MASK,
373 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
374 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
375 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
376 FLAG(t, PCI_PM_CTRL_PME_STATUS));
72b9b690
MM
377 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
378 if (b)
379 printf("\t\tBridge: PM%c B3%c\n",
380 FLAG(t, PCI_PM_BPCC_ENABLE),
381 FLAG(~t, PCI_PM_PPB_B2_B3));
1c31d620
MM
382}
383
81077814 384static void
579b19ff 385format_agp_rate(int rate, char *buf, int agp3)
81077814
MM
386{
387 char *c = buf;
388 int i;
389
a1052f16 390 for(i=0; i<=2; i++)
81077814
MM
391 if (rate & (1 << i))
392 {
393 if (c != buf)
394 *c++ = ',';
395 *c++ = 'x';
579b19ff 396 *c++ = '0' + (1 << (i + 2*agp3));
81077814
MM
397 }
398 if (c != buf)
399 *c = 0;
400 else
401 strcpy(buf, "<none>");
402}
403
1c31d620
MM
404static void
405show_agp(struct device *d, int where, int cap)
406{
407 u32 t;
81077814 408 char rate[8];
579b19ff
MM
409 int ver, rev;
410 int agp3 = 0;
1c31d620 411
579b19ff
MM
412 ver = (cap >> 4) & 0x0f;
413 rev = cap & 0x0f;
414 printf("AGP version %x.%x\n", ver, rev);
1c31d620
MM
415 if (verbose < 2)
416 return;
7dacd9c8
MM
417 if (!config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS))
418 return;
1c31d620 419 t = get_conf_long(d, where + PCI_AGP_STATUS);
579b19ff
MM
420 if (ver >= 3 && (t & PCI_AGP_STATUS_AGP3))
421 agp3 = 1;
422 format_agp_rate(t & 7, rate, agp3);
423 printf("\t\tStatus: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s\n",
424 ((t & PCI_AGP_STATUS_RQ_MASK) >> 24U) + 1,
425 FLAG(t, PCI_AGP_STATUS_ISOCH),
426 ((t & PCI_AGP_STATUS_ARQSZ_MASK) >> 13),
427 ((t & PCI_AGP_STATUS_CAL_MASK) >> 10),
1c31d620 428 FLAG(t, PCI_AGP_STATUS_SBA),
579b19ff
MM
429 FLAG(t, PCI_AGP_STATUS_ITA_COH),
430 FLAG(t, PCI_AGP_STATUS_GART64),
431 FLAG(t, PCI_AGP_STATUS_HTRANS),
1c31d620
MM
432 FLAG(t, PCI_AGP_STATUS_64BIT),
433 FLAG(t, PCI_AGP_STATUS_FW),
579b19ff 434 FLAG(t, PCI_AGP_STATUS_AGP3),
81077814 435 rate);
84b10481 436 t = get_conf_long(d, where + PCI_AGP_COMMAND);
579b19ff
MM
437 format_agp_rate(t & 7, rate, agp3);
438 printf("\t\tCommand: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s\n",
439 ((t & PCI_AGP_COMMAND_RQ_MASK) >> 24U) + 1,
440 ((t & PCI_AGP_COMMAND_ARQSZ_MASK) >> 13),
441 ((t & PCI_AGP_COMMAND_CAL_MASK) >> 10),
1c31d620
MM
442 FLAG(t, PCI_AGP_COMMAND_SBA),
443 FLAG(t, PCI_AGP_COMMAND_AGP),
579b19ff 444 FLAG(t, PCI_AGP_COMMAND_GART64),
1c31d620
MM
445 FLAG(t, PCI_AGP_COMMAND_64BIT),
446 FLAG(t, PCI_AGP_COMMAND_FW),
81077814 447 rate);
1c31d620
MM
448}
449
5f5e6f64
MM
450static void
451show_pcix_nobridge(struct device *d, int where)
452{
7dacd9c8
MM
453 u16 command;
454 u32 status;
455
5f5e6f64 456 printf("PCI-X non-bridge device.\n");
7dacd9c8 457
5f5e6f64
MM
458 if (verbose < 2)
459 return;
7dacd9c8
MM
460
461 if (!config_fetch(d, where + PCI_PCIX_STATUS, 4))
462 return;
463
464 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
465 status = get_conf_long(d, where + PCI_PCIX_STATUS);
5f5e6f64
MM
466 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
467 FLAG(command, PCI_PCIX_COMMAND_DPERE),
468 FLAG(command, PCI_PCIX_COMMAND_ERO),
469 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
470 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
f701ff47 471 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c\n",
5f5e6f64
MM
472 ((status >> 8) & 0xffU), // bus
473 ((status >> 3) & 0x1fU), // dev
7dacd9c8 474 (status & PCI_PCIX_STATUS_FUNCTION), // function
5f5e6f64
MM
475 FLAG(status, PCI_PCIX_STATUS_64BIT),
476 FLAG(status, PCI_PCIX_STATUS_133MHZ),
477 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
478 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
479 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
480 ((status >> 21) & 3U),
481 ((status >> 23) & 7U),
482 ((status >> 26) & 7U),
483 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
484}
485
486static void
487show_pcix_bridge(struct device *d, int where)
488{
7dacd9c8 489
5f5e6f64
MM
490 u16 secstatus;
491 u32 status, upstcr, downstcr;
7dacd9c8 492
5f5e6f64 493 printf("PCI-X bridge device.\n");
7dacd9c8 494
5f5e6f64
MM
495 if (verbose < 2)
496 return;
7dacd9c8
MM
497
498 if (!config_fetch(d, where + PCI_PCIX_BRIDGE_STATUS, 12))
499 return;
500
5f5e6f64
MM
501 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
502 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
503 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
504 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
505 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
506 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
507 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
508 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
509 ((secstatus >> 6) & 7));
510 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
511 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
512 ((status >> 8) & 0xff), // bus
513 ((status >> 3) & 0x1f), // dev
514 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
515 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
516 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
517 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
518 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
519 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
520 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
521 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
522 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
523 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
524 (upstcr >> 16) & 0xffff);
525 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
526 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
527 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
528 (downstcr >> 16) & 0xffff);
529}
530
531static void
532show_pcix(struct device *d, int where)
533{
534 switch (d->dev->hdrtype)
535 {
536 case PCI_HEADER_TYPE_NORMAL:
537 show_pcix_nobridge(d, where);
538 break;
539 case PCI_HEADER_TYPE_BRIDGE:
540 show_pcix_bridge(d, where);
541 break;
542 }
543}
544
98e39e09 545static void
e95c8373 546show_rom(struct device *d)
98e39e09 547{
e95c8373
MM
548 struct pci_dev *p = d->dev;
549 pciaddr_t rom = p->rom_base_addr;
550 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
98e39e09 551
e95c8373
MM
552 if (!rom && !len)
553 return;
554 printf("\tExpansion ROM at ");
555 if (rom & PCI_ROM_ADDRESS_MASK)
9739916e 556 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
e95c8373
MM
557 else
558 printf("<unassigned>");
559 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
560 printf(" [disabled]");
561 show_size(len);
562 putchar('\n');
563}
564
565static void
566show_msi(struct device *d, int where, int cap)
567{
568 int is64;
569 u32 t;
570 u16 w;
571
572 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
573 FLAG(cap, PCI_MSI_FLAGS_64BIT),
574 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
575 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
576 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
577 if (verbose < 2)
578 return;
579 is64 = cap & PCI_MSI_FLAGS_64BIT;
7dacd9c8
MM
580 if (!config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO))
581 return;
e95c8373
MM
582 printf("\t\tAddress: ");
583 if (is64)
584 {
585 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
586 w = get_conf_word(d, where + PCI_MSI_DATA_64);
587 printf("%08x", t);
588 }
589 else
590 w = get_conf_word(d, where + PCI_MSI_DATA_32);
591 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
592 printf("%08x Data: %04x\n", t, w);
593}
594
595static void
596show_slotid(int cap)
597{
598 int esr = cap & 0xff;
599 int chs = cap >> 8;
600
601 printf("Slot ID: %d slots, First%c, chassis %02x\n",
602 esr & PCI_SID_ESR_NSLOTS,
603 FLAG(esr, PCI_SID_ESR_FIC),
604 chs);
605}
606
607static void
608show_caps(struct device *d)
609{
b5137411
MM
610 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
611 {
e95c8373 612 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
b5137411
MM
613 while (where)
614 {
1c31d620 615 int id, next, cap;
b5137411
MM
616 printf("\tCapabilities: ");
617 if (!config_fetch(d, where, 4))
618 {
619 puts("<available only to root>");
620 break;
621 }
1c31d620 622 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
e95c8373 623 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
1c31d620
MM
624 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
625 printf("[%02x] ", where);
b5137411
MM
626 if (id == 0xff)
627 {
1c31d620 628 printf("<chain broken>\n");
b5137411
MM
629 break;
630 }
631 switch (id)
632 {
1c31d620
MM
633 case PCI_CAP_ID_PM:
634 show_pm(d, where, cap);
635 break;
636 case PCI_CAP_ID_AGP:
637 show_agp(d, where, cap);
b5137411 638 break;
e95c8373
MM
639 case PCI_CAP_ID_VPD:
640 printf("Vital Product Data\n");
641 break;
642 case PCI_CAP_ID_SLOTID:
643 show_slotid(cap);
644 break;
645 case PCI_CAP_ID_MSI:
646 show_msi(d, where, cap);
647 break;
5f5e6f64
MM
648 case PCI_CAP_ID_PCIX:
649 show_pcix(d, where);
650 break;
b5137411 651 default:
e95c8373 652 printf("#%02x [%04x]\n", id, cap);
b5137411 653 }
b5137411
MM
654 where = next;
655 }
656 }
98e39e09
MM
657}
658
e95c8373
MM
659static void
660show_htype0(struct device *d)
661{
662 show_bases(d, 6);
663 show_rom(d);
664 show_caps(d);
665}
666
98e39e09
MM
667static void
668show_htype1(struct device *d)
669{
670 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
671 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
672 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
673 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
674 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
675 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
676 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
677 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
678 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
98e39e09 679 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 680 int verb = verbose > 2;
98e39e09
MM
681
682 show_bases(d, 2);
683 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
684 get_conf_byte(d, PCI_PRIMARY_BUS),
685 get_conf_byte(d, PCI_SECONDARY_BUS),
686 get_conf_byte(d, PCI_SUBORDINATE_BUS),
687 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
688
689 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
690 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
691 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
692 else
693 {
694 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
695 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
696 if (io_type == PCI_IO_RANGE_TYPE_32)
697 {
698 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
699 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
700 }
e306e911 701 if (io_base <= io_limit || verb)
98e39e09
MM
702 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
703 }
704
705 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
706 mem_type)
707 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 708 else
98e39e09
MM
709 {
710 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
711 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM
712 if (mem_base <= mem_limit || verb)
713 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM
714 }
715
716 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
717 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
718 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 719 else
98e39e09
MM
720 {
721 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
722 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM
723 if (pref_base <= pref_limit || verb)
724 {
725 if (pref_type == PCI_PREF_RANGE_TYPE_32)
726 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
727 else
728 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
729 get_conf_long(d, PCI_PREF_BASE_UPPER32),
730 pref_base,
731 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
732 pref_limit);
733 }
98e39e09
MM
734 }
735
736 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
737 printf("\tSecondary status: SERR\n");
738
e95c8373 739 show_rom(d);
98e39e09
MM
740
741 if (verbose > 1)
742 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
1c31d620
MM
743 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
744 FLAG(brc, PCI_BRIDGE_CTL_SERR),
745 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
746 FLAG(brc, PCI_BRIDGE_CTL_VGA),
747 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
748 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
749 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
e95c8373
MM
750
751 show_caps(d);
98e39e09
MM
752}
753
2f48f637
MM
754static void
755show_htype2(struct device *d)
756{
96e4f295
MM
757 int i;
758 word cmd = get_conf_word(d, PCI_COMMAND);
759 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
760 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
e306e911 761 int verb = verbose > 2;
96e4f295
MM
762
763 show_bases(d, 1);
764 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
765 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
766 get_conf_byte(d, PCI_CB_CARD_BUS),
767 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
768 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
769 for(i=0; i<2; i++)
770 {
771 int p = 8*i;
772 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
773 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 774 if (limit > base || verb)
81077814 775 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
776 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
777 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
778 }
779 for(i=0; i<2; i++)
780 {
781 int p = 8*i;
782 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
783 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
784 if (!(base & PCI_IO_RANGE_TYPE_32))
785 {
786 base &= 0xffff;
787 limit &= 0xffff;
788 }
789 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 790 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
791 if (base <= limit || verb)
792 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
793 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
794 }
795
796 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
797 printf("\tSecondary status: SERR\n");
798 if (verbose > 1)
799 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
800 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
801 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
802 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
803 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
804 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
805 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
806 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
807 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
96e4f295
MM
808 if (exca)
809 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM
810}
811
98e39e09
MM
812static void
813show_verbose(struct device *d)
814{
727ce158 815 struct pci_dev *p = d->dev;
98e39e09
MM
816 word status = get_conf_word(d, PCI_STATUS);
817 word cmd = get_conf_word(d, PCI_COMMAND);
818 word class = get_conf_word(d, PCI_CLASS_DEVICE);
819 byte bist = get_conf_byte(d, PCI_BIST);
820 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
821 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
822 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
823 byte max_lat, min_gnt;
824 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 825 unsigned int irq = p->irq;
98e39e09 826 word subsys_v, subsys_d;
727ce158 827 char ssnamebuf[256];
98e39e09
MM
828
829 show_terse(d);
830
98e39e09
MM
831 switch (htype)
832 {
2f48f637
MM
833 case PCI_HEADER_TYPE_NORMAL:
834 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 835 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
836 max_lat = get_conf_byte(d, PCI_MAX_LAT);
837 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
838 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
839 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
840 break;
2f48f637
MM
841 case PCI_HEADER_TYPE_BRIDGE:
842 if (class != PCI_CLASS_BRIDGE_PCI)
56164f4f 843 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
727ce158 844 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM
845 subsys_v = subsys_d = 0;
846 break;
847 case PCI_HEADER_TYPE_CARDBUS:
848 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 849 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295
MM
850 min_gnt = max_lat = 0;
851 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
852 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM
853 break;
854 default:
855 printf("\t!!! Unknown header type %02x\n", htype);
856 return;
857 }
858
e306e911 859 if (subsys_v && subsys_v != 0xffff)
727ce158
MM
860 printf("\tSubsystem: %s\n",
861 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
862 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 863 p->vendor_id, p->device_id, subsys_v, subsys_d));
ce503b7f 864
98e39e09
MM
865 if (verbose > 1)
866 {
98e39e09 867 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
1c31d620
MM
868 FLAG(cmd, PCI_COMMAND_IO),
869 FLAG(cmd, PCI_COMMAND_MEMORY),
870 FLAG(cmd, PCI_COMMAND_MASTER),
871 FLAG(cmd, PCI_COMMAND_SPECIAL),
872 FLAG(cmd, PCI_COMMAND_INVALIDATE),
873 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
874 FLAG(cmd, PCI_COMMAND_PARITY),
875 FLAG(cmd, PCI_COMMAND_WAIT),
876 FLAG(cmd, PCI_COMMAND_SERR),
877 FLAG(cmd, PCI_COMMAND_FAST_BACK));
b5137411 878 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
1c31d620
MM
879 FLAG(status, PCI_STATUS_CAP_LIST),
880 FLAG(status, PCI_STATUS_66MHZ),
881 FLAG(status, PCI_STATUS_UDF),
882 FLAG(status, PCI_STATUS_FAST_BACK),
883 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
884 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
885 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
886 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
887 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
888 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
889 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
890 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
891 FLAG(status, PCI_STATUS_DETECTED_PARITY));
98e39e09
MM
892 if (cmd & PCI_COMMAND_MASTER)
893 {
56164f4f
MM
894 printf("\tLatency: %d", latency);
895 if (min_gnt || max_lat)
896 {
897 printf(" (");
898 if (min_gnt)
899 printf("%dns min", min_gnt*250);
900 if (min_gnt && max_lat)
901 printf(", ");
902 if (max_lat)
903 printf("%dns max", max_lat*250);
904 putchar(')');
905 }
98e39e09 906 if (cache_line)
f701ff47 907 printf(", Cache Line Size %02x", cache_line);
98e39e09
MM
908 putchar('\n');
909 }
727ce158 910 if (int_pin || irq)
9739916e 911 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 912 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM
913 }
914 else
915 {
916 printf("\tFlags: ");
917 if (cmd & PCI_COMMAND_MASTER)
918 printf("bus master, ");
919 if (cmd & PCI_COMMAND_VGA_PALETTE)
920 printf("VGA palette snoop, ");
921 if (cmd & PCI_COMMAND_WAIT)
922 printf("stepping, ");
923 if (cmd & PCI_COMMAND_FAST_BACK)
924 printf("fast Back2Back, ");
925 if (status & PCI_STATUS_66MHZ)
926 printf("66Mhz, ");
927 if (status & PCI_STATUS_UDF)
928 printf("user-definable features, ");
929 printf("%s devsel",
930 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
931 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
932 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
933 if (cmd & PCI_COMMAND_MASTER)
934 printf(", latency %d", latency);
727ce158 935 if (irq)
9739916e 936 printf(", IRQ " PCIIRQ_FMT, irq);
98e39e09
MM
937 putchar('\n');
938 }
939
940 if (bist & PCI_BIST_CAPABLE)
941 {
942 if (bist & PCI_BIST_START)
943 printf("\tBIST is running\n");
944 else
945 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
946 }
947
948 switch (htype)
949 {
2f48f637 950 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
951 show_htype0(d);
952 break;
2f48f637 953 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
954 show_htype1(d);
955 break;
2f48f637
MM
956 case PCI_HEADER_TYPE_CARDBUS:
957 show_htype2(d);
958 break;
98e39e09
MM
959 }
960}
961
962static void
963show_hex_dump(struct device *d)
964{
b5137411 965 unsigned int i;
98e39e09 966
727ce158 967 for(i=0; i<d->config_cnt; i++)
98e39e09
MM
968 {
969 if (! (i & 15))
970 printf("%02x:", i);
971 printf(" %02x", get_conf_byte(d, i));
972 if ((i & 15) == 15)
973 putchar('\n');
974 }
975}
976
0a33d0ec
MM
977static void
978show_machine(struct device *d)
979{
727ce158 980 struct pci_dev *p = d->dev;
0a33d0ec 981 int c;
ce503b7f 982 word sv_id=0, sd_id=0;
727ce158 983 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f
MM
984
985 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
986 {
987 case PCI_HEADER_TYPE_NORMAL:
988 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
989 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
990 break;
991 case PCI_HEADER_TYPE_CARDBUS:
992 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
993 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
994 break;
995 }
0a33d0ec
MM
996
997 if (verbose)
998 {
727ce158
MM
999 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
1000 printf("Class:\t%s\n",
d4798a32 1001 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
727ce158 1002 printf("Vendor:\t%s\n",
d4798a32 1003 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
727ce158 1004 printf("Device:\t%s\n",
d4798a32 1005 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
ce503b7f
MM
1006 if (sv_id && sv_id != 0xffff)
1007 {
727ce158 1008 printf("SVendor:\t%s\n",
d4798a32 1009 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
727ce158 1010 printf("SDevice:\t%s\n",
d4798a32 1011 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 1012 }
0a33d0ec
MM
1013 if (c = get_conf_byte(d, PCI_REVISION_ID))
1014 printf("Rev:\t%02x\n", c);
1015 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1016 printf("ProgIf:\t%02x\n", c);
1017 }
1018 else
1019 {
727ce158 1020 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
0a33d0ec 1021 printf("\"%s\" \"%s\" \"%s\"",
727ce158 1022 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
d4798a32 1023 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158 1024 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
d4798a32 1025 p->vendor_id, p->device_id, 0, 0),
727ce158 1026 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
d4798a32 1027 p->vendor_id, p->device_id, 0, 0));
0a33d0ec
MM
1028 if (c = get_conf_byte(d, PCI_REVISION_ID))
1029 printf(" -r%02x", c);
1030 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1031 printf(" -p%02x", c);
ce503b7f 1032 if (sv_id && sv_id != 0xffff)
727ce158 1033 printf(" \"%s\" \"%s\"",
d4798a32
MM
1034 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1035 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f
MM
1036 else
1037 printf(" \"\" \"\"");
0a33d0ec
MM
1038 putchar('\n');
1039 }
1040}
1041
1812a795
MM
1042static void
1043show_device(struct device *d)
1044{
1045 if (machine_readable)
1046 show_machine(d);
1047 else if (verbose)
1048 show_verbose(d);
1049 else
1050 show_terse(d);
1051 if (show_hex)
1052 show_hex_dump(d);
1053 if (verbose || show_hex)
1054 putchar('\n');
1055}
1056
98e39e09
MM
1057static void
1058show(void)
1059{
1060 struct device *d;
1061
1062 for(d=first_dev; d; d=d->next)
1812a795 1063 show_device(d);
98e39e09
MM
1064}
1065
6d0dc0fd
MM
1066/* Tree output */
1067
1068struct bridge {
1069 struct bridge *chain; /* Single-linked list of bridges */
1070 struct bridge *next, *child; /* Tree of bridges */
1071 struct bus *first_bus; /* List of busses connected to this bridge */
1072 unsigned int primary, secondary, subordinate; /* Bus numbers */
1073 struct device *br_dev;
1074};
1075
1076struct bus {
1077 unsigned int number;
1078 struct bus *sibling;
1079 struct device *first_dev, **last_dev;
1080};
1081
1082static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1083
1084static struct bus *
1085find_bus(struct bridge *b, unsigned int n)
1086{
1087 struct bus *bus;
1088
1089 for(bus=b->first_bus; bus; bus=bus->sibling)
1090 if (bus->number == n)
1091 break;
1092 return bus;
1093}
1094
1095static struct bus *
1096new_bus(struct bridge *b, unsigned int n)
1097{
1098 struct bus *bus = xmalloc(sizeof(struct bus));
1099
1100 bus = xmalloc(sizeof(struct bus));
1101 bus->number = n;
1102 bus->sibling = b->first_bus;
1103 bus->first_dev = NULL;
1104 bus->last_dev = &bus->first_dev;
1105 b->first_bus = bus;
1106 return bus;
1107}
1108
1109static void
1110insert_dev(struct device *d, struct bridge *b)
1111{
727ce158 1112 struct pci_dev *p = d->dev;
6d0dc0fd
MM
1113 struct bus *bus;
1114
727ce158 1115 if (! (bus = find_bus(b, p->bus)))
6d0dc0fd
MM
1116 {
1117 struct bridge *c;
1118 for(c=b->child; c; c=c->next)
727ce158 1119 if (c->secondary <= p->bus && p->bus <= c->subordinate)
14d6c0a3
MM
1120 {
1121 insert_dev(d, c);
1122 return;
1123 }
727ce158 1124 bus = new_bus(b, p->bus);
6d0dc0fd
MM
1125 }
1126 /* Simple insertion at the end _does_ guarantee the correct order as the
1127 * original device list was sorted by (bus, devfn) lexicographically
1128 * and all devices on the new list have the same bus number.
1129 */
1130 *bus->last_dev = d;
1131 bus->last_dev = &d->next;
1132 d->next = NULL;
1133}
1134
1135static void
1136grow_tree(void)
1137{
1138 struct device *d, *d2;
008407bd 1139 struct bridge **last_br, *b;
6d0dc0fd
MM
1140
1141 /* Build list of bridges */
1142
008407bd 1143 last_br = &host_bridge.chain;
6d0dc0fd
MM
1144 for(d=first_dev; d; d=d->next)
1145 {
1146 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM
1147 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1148 if (class == PCI_CLASS_BRIDGE_PCI &&
1149 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM
1150 {
1151 b = xmalloc(sizeof(struct bridge));
96e4f295
MM
1152 if (ht == PCI_HEADER_TYPE_BRIDGE)
1153 {
1154 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1155 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1156 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1157 }
1158 else
1159 {
1160 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1161 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1162 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1163 }
008407bd
MM
1164 *last_br = b;
1165 last_br = &b->chain;
6d0dc0fd
MM
1166 b->next = b->child = NULL;
1167 b->first_bus = NULL;
1168 b->br_dev = d;
1169 }
1170 }
008407bd 1171 *last_br = NULL;
6d0dc0fd
MM
1172
1173 /* Create a bridge tree */
1174
008407bd 1175 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM
1176 {
1177 struct bridge *c, *best;
1178 best = NULL;
008407bd 1179 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM
1180 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1181 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1182 best = c;
1183 if (best)
1184 {
1185 b->next = best->child;
1186 best->child = b;
1187 }
1188 }
1189
1190 /* Insert secondary bus for each bridge */
1191
008407bd 1192 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM
1193 if (!find_bus(b, b->secondary))
1194 new_bus(b, b->secondary);
1195
1196 /* Create bus structs and link devices */
1197
1198 for(d=first_dev; d;)
1199 {
1200 d2 = d->next;
1201 insert_dev(d, &host_bridge);
1202 d = d2;
1203 }
1204}
1205
1206static void
1207print_it(byte *line, byte *p)
1208{
1209 *p++ = '\n';
1210 *p = 0;
1211 fputs(line, stdout);
1212 for(p=line; *p; p++)
008407bd 1213 if (*p == '+' || *p == '|')
6d0dc0fd
MM
1214 *p = '|';
1215 else
1216 *p = ' ';
1217}
1218
1219static void show_tree_bridge(struct bridge *, byte *, byte *);
1220
1221static void
1222show_tree_dev(struct device *d, byte *line, byte *p)
1223{
727ce158 1224 struct pci_dev *q = d->dev;
6d0dc0fd 1225 struct bridge *b;
727ce158 1226 char namebuf[256];
6d0dc0fd 1227
727ce158 1228 p += sprintf(p, "%02x.%x", q->dev, q->func);
6d0dc0fd
MM
1229 for(b=&host_bridge; b; b=b->chain)
1230 if (b->br_dev == d)
1231 {
008407bd
MM
1232 if (b->secondary == b->subordinate)
1233 p += sprintf(p, "-[%02x]-", b->secondary);
1234 else
1235 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM
1236 show_tree_bridge(b, line, p);
1237 return;
1238 }
18928b91 1239 if (verbose)
727ce158
MM
1240 p += sprintf(p, " %s",
1241 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1242 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 1243 q->vendor_id, q->device_id, 0, 0));
6d0dc0fd
MM
1244 print_it(line, p);
1245}
1246
1247static void
1248show_tree_bus(struct bus *b, byte *line, byte *p)
1249{
1250 if (!b->first_dev)
1251 print_it(line, p);
1252 else if (!b->first_dev->next)
1253 {
1254 *p++ = '-';
1255 *p++ = '-';
1256 show_tree_dev(b->first_dev, line, p);
1257 }
1258 else
1259 {
1260 struct device *d = b->first_dev;
1261 while (d->next)
1262 {
1263 p[0] = '+';
1264 p[1] = '-';
1265 show_tree_dev(d, line, p+2);
1266 d = d->next;
1267 }
1268 p[0] = '\\';
1269 p[1] = '-';
1270 show_tree_dev(d, line, p+2);
1271 }
1272}
1273
1274static void
1275show_tree_bridge(struct bridge *b, byte *line, byte *p)
1276{
1277 *p++ = '-';
1278 if (!b->first_bus->sibling)
1279 {
1280 if (b == &host_bridge)
1281 p += sprintf(p, "[%02x]-", b->first_bus->number);
1282 show_tree_bus(b->first_bus, line, p);
1283 }
1284 else
1285 {
1286 struct bus *u = b->first_bus;
1287 byte *k;
1288
1289 while (u->sibling)
1290 {
1291 k = p + sprintf(p, "+-[%02x]-", u->number);
1292 show_tree_bus(u, line, k);
1293 u = u->sibling;
1294 }
1295 k = p + sprintf(p, "\\-[%02x]-", u->number);
1296 show_tree_bus(u, line, k);
1297 }
1298}
1299
1300static void
1301show_forest(void)
1302{
1303 char line[256];
1304
1305 grow_tree();
1306 show_tree_bridge(&host_bridge, line, line);
1307}
1308
1812a795
MM
1309/* Bus mapping mode */
1310
1311struct bus_bridge {
1312 struct bus_bridge *next;
1c31d620 1313 byte this, dev, func, first, last, bug;
1812a795
MM
1314};
1315
1316struct bus_info {
1317 byte exists;
1c31d620
MM
1318 byte guestbook;
1319 struct bus_bridge *bridges, *via;
1812a795
MM
1320};
1321
1322static struct bus_info *bus_info;
1323
1324static void
1325map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1326{
1327 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1328 struct pci_dev *p = d->dev;
1812a795
MM
1329
1330 b->next = bi->bridges;
1331 bi->bridges = b;
1c31d620
MM
1332 b->this = get_conf_byte(d, np);
1333 b->dev = p->dev;
1334 b->func = p->func;
1812a795
MM
1335 b->first = get_conf_byte(d, ns);
1336 b->last = get_conf_byte(d, nl);
1337 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1c31d620
MM
1338 p->bus, p->dev, p->func, b->this, b->first, b->last);
1339 if (b->this != p->bus)
1812a795
MM
1340 printf("!!! Bridge points to invalid primary bus.\n");
1341 if (b->first > b->last)
1342 {
1343 printf("!!! Bridge points to invalid bus range.\n");
1344 b->last = b->first;
1345 }
1346}
1347
1348static void
1349do_map_bus(int bus)
1350{
1351 int dev, func;
1352 int verbose = pacc->debugging;
1353 struct bus_info *bi = bus_info + bus;
1354 struct device *d;
1355
1356 if (verbose)
1357 printf("Mapping bus %02x\n", bus);
1358 for(dev = 0; dev < 32; dev++)
1359 if (filter.slot < 0 || filter.slot == dev)
1360 {
f3395cc5
MM
1361 int func_limit = 1;
1362 for(func = 0; func < func_limit; func++)
1812a795
MM
1363 if (filter.func < 0 || filter.func == func)
1364 {
1365 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1366 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1367 if (vendor && vendor != 0xffff)
1368 {
f3395cc5
MM
1369 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1370 func_limit = 8;
1812a795
MM
1371 if (verbose)
1372 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1373 bi->exists = 1;
1374 if (d = scan_device(p))
1375 {
1376 show_device(d);
1377 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1378 {
1379 case PCI_HEADER_TYPE_BRIDGE:
1380 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1381 break;
1382 case PCI_HEADER_TYPE_CARDBUS:
1383 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1384 break;
1385 }
1386 free(d);
1387 }
1388 else if (verbose)
1389 printf("But it was filtered out.\n");
1390 }
1391 pci_free_dev(p);
1392 }
1393 }
1394}
1395
1c31d620
MM
1396static void
1397do_map_bridges(int bus, int min, int max)
1398{
1399 struct bus_info *bi = bus_info + bus;
1400 struct bus_bridge *b;
1401
1402 bi->guestbook = 1;
1403 for(b=bi->bridges; b; b=b->next)
1404 {
1405 if (bus_info[b->first].guestbook)
1406 b->bug = 1;
1407 else if (b->first < min || b->last > max)
1408 b->bug = 2;
1409 else
1410 {
1411 bus_info[b->first].via = b;
1412 do_map_bridges(b->first, b->first, b->last);
1413 }
1414 }
1415}
1416
1417static void
1418map_bridges(void)
1419{
1420 int i;
1421
1422 printf("\nSummary of buses:\n\n");
1423 for(i=0; i<256; i++)
1424 if (bus_info[i].exists && !bus_info[i].guestbook)
1425 do_map_bridges(i, 0, 255);
1426 for(i=0; i<256; i++)
1427 {
1428 struct bus_info *bi = bus_info + i;
1429 struct bus_bridge *b = bi->via;
1430
1431 if (bi->exists)
1432 {
1433 printf("%02x: ", i);
1434 if (b)
1435 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1436 else if (!i)
1437 printf("Primary host bus\n");
1438 else
1439 printf("Secondary host bus (?)\n");
1440 }
1441 for(b=bi->bridges; b; b=b->next)
1442 {
1443 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1444 switch (b->bug)
1445 {
1446 case 1:
1447 printf(" <overlap bug>");
1448 break;
1449 case 2:
1450 printf(" <crossing bug>");
1451 break;
1452 }
1453 putchar('\n');
1454 }
1455 }
1456}
1457
1812a795
MM
1458static void
1459map_the_bus(void)
1460{
1461 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1462 pacc->method == PCI_ACCESS_DUMP)
1463 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1464 else if (!check_root())
1465 die("Only root can map the bus.");
1466 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1467 bzero(bus_info, sizeof(struct bus_info) * 256);
1468 if (filter.bus >= 0)
1469 do_map_bus(filter.bus);
1470 else
1471 {
1472 int bus;
1473 for(bus=0; bus<256; bus++)
1474 do_map_bus(bus);
1475 }
1c31d620 1476 map_bridges();
1812a795
MM
1477}
1478
98e39e09
MM
1479/* Main */
1480
1481int
1482main(int argc, char **argv)
1483{
1484 int i;
e4842ff3 1485 char *msg;
98e39e09 1486
496d4021
MM
1487 if (argc == 2 && !strcmp(argv[1], "--version"))
1488 {
1489 puts("lspci version " PCIUTILS_VERSION);
1490 return 0;
1491 }
727ce158
MM
1492
1493 pacc = pci_alloc();
1494 pacc->error = die;
1495 pci_filter_init(pacc, &filter);
1496
98e39e09
MM
1497 while ((i = getopt(argc, argv, options)) != -1)
1498 switch (i)
1499 {
1500 case 'n':
727ce158 1501 pacc->numeric_ids = 1;
98e39e09
MM
1502 break;
1503 case 'v':
1504 verbose++;
1505 break;
1506 case 'b':
727ce158 1507 pacc->buscentric = 1;
98e39e09
MM
1508 buscentric_view = 1;
1509 break;
e4842ff3 1510 case 's':
727ce158 1511 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 1512 die("-s: %s", msg);
98e39e09 1513 break;
e4842ff3 1514 case 'd':
727ce158
MM
1515 if (msg = pci_filter_parse_id(&filter, optarg))
1516 die("-d: %s", msg);
98e39e09
MM
1517 break;
1518 case 'x':
1519 show_hex++;
1520 break;
6d0dc0fd
MM
1521 case 't':
1522 show_tree++;
1523 break;
18928b91 1524 case 'i':
727ce158 1525 pacc->id_file_name = optarg;
18928b91 1526 break;
0a33d0ec
MM
1527 case 'm':
1528 machine_readable++;
1529 break;
1812a795
MM
1530 case 'M':
1531 map_mode++;
1532 break;
98e39e09 1533 default:
727ce158
MM
1534 if (parse_generic_option(i, pacc, optarg))
1535 break;
98e39e09 1536 bad:
727ce158 1537 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1538 return 1;
1539 }
1540 if (optind < argc)
1541 goto bad;
1542
727ce158 1543 pci_init(pacc);
1812a795
MM
1544 if (map_mode)
1545 map_the_bus();
6d0dc0fd 1546 else
1812a795
MM
1547 {
1548 scan_devices();
1549 sort_them();
1550 if (show_tree)
1551 show_forest();
1552 else
1553 show();
1554 }
727ce158 1555 pci_cleanup(pacc);
98e39e09
MM
1556
1557 return 0;
1558}