]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - opcodes/rx-decode.opc
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
2012-04-26 Sterling Augustine <saugustine@google.com>
[thirdparty/binutils-gdb.git] / opcodes / rx-decode.opc
CommitLineData
c7927a3c
NC		 1/* -*- c -*- */
2#include <stdio.h>
3#include <stdlib.h>
4#include <string.h>
5
6#include "config.h"
7#include "ansidecl.h"
8#include "opcode/rx.h"
9
10#define RX_OPCODE_BIG_ENDIAN 0
11
12typedef struct
13{
14 RX_Opcode_Decoded * rx;
15 int (* getbyte)(void *);
16 void * ptr;
17 unsigned char * op;
18} LocalData;
19
20static int trace = 0;
21
22#define BSIZE 0
23#define WSIZE 1
24#define LSIZE 2
25
26/* These are for when the upper bits are "don't care" or "undefined". */
27static int bwl[] =
28{
29 RX_Byte,
30 RX_Word,
31 RX_Long
32};
33
34static int sbwl[] =
35{
36 RX_SByte,
37 RX_SWord,
38 RX_Long
39};
40
41static int ubwl[] =
42{
43 RX_UByte,
44 RX_UWord,
45 RX_Long
46};
47
48static int memex[] =
49{
50 RX_SByte,
51 RX_SWord,
52 RX_Long,
53 RX_UWord
54};
55
56#define ID(x) rx->id = RXO_##x
57#define OP(n,t,r,a) (rx->op[n].type = t, \
58 rx->op[n].reg = r, \
59 rx->op[n].addend = a )
60#define OPs(n,t,r,a,s) (OP (n,t,r,a), \
61 rx->op[n].size = s )
62
63/* This is for the BWL and BW bitfields. */
64static int SCALE[] = { 1, 2, 4 };
65/* This is for the prefix size enum. */
66static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4 };
67
68static int flagmap[] = {0, 1, 2, 3, 0, 0, 0, 0,
69 16, 17, 0, 0, 0, 0, 0, 0 };
70
71static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
72
73/*
74 *C a constant (immediate) c
75 *R A register
76 *I Register indirect, no offset
77 *Is Register indirect, with offset
78 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
79 *P standard displacement: type (r,[r]), reg, assumes UByte
80 *Pm memex displacement: type (r,[r]), reg, memex code
81 *cc condition code. */
82
83#define DC(c) OP (0, RX_Operand_Immediate, 0, c)
84#define DR(r) OP (0, RX_Operand_Register, r, 0)
85#define DI(r,a) OP (0, RX_Operand_Indirect, r, a)
86#define DIs(r,a,s) OP (0, RX_Operand_Indirect, r, (a) * SCALE[s])
87#define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
88#define DF(r) OP (0, RX_Operand_Flag, flagmap[r], 0)
89
90#define SC(i) OP (1, RX_Operand_Immediate, 0, i)
91#define SR(r) OP (1, RX_Operand_Register, r, 0)
f9c7014e 92#define SRR(r) OP (1, RX_Operand_TwoReg, r, 0)
c7927a3c
NC		 93#define SI(r,a) OP (1, RX_Operand_Indirect, r, a)
94#define SIs(r,a,s) OP (1, RX_Operand_Indirect, r, (a) * SCALE[s])
95#define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
96#define SP(t,r) rx_disp (1, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 1);
97#define SPm(t,r,m) rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
98#define Scc(cc) OP (1, RX_Operand_Condition, cc, 0)
99
100#define S2C(i) OP (2, RX_Operand_Immediate, 0, i)
101#define S2R(r) OP (2, RX_Operand_Register, r, 0)
102#define S2I(r,a) OP (2, RX_Operand_Indirect, r, a)
103#define S2Is(r,a,s) OP (2, RX_Operand_Indirect, r, (a) * SCALE[s])
104#define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
105#define S2P(t,r) rx_disp (2, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 2);
106#define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
107#define S2cc(cc) OP (2, RX_Operand_Condition, cc, 0)
108
109#define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
110#define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
111#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz]
112#define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long;
113
114#define F(f) store_flags(rx, f)
115
116#define AU ATTRIBUTE_UNUSED
117#define GETBYTE() (ld->op [ld->rx->n_bytes++] = ld->getbyte (ld->ptr))
118
119#define SYNTAX(x) rx->syntax = x
120
121#define UNSUPPORTED() \
122 rx->syntax = "*unknown*"
123
124#define IMM(sf) immediate (sf, 0, ld)
125#define IMMex(sf) immediate (sf, 1, ld)
126
127static int
128immediate (int sfield, int ex, LocalData * ld)
129{
130 unsigned long i = 0, j;
131
132 switch (sfield)
133 {
134#define B ((unsigned long) GETBYTE())
135 case 0:
136#if RX_OPCODE_BIG_ENDIAN
137 i = B;
138 if (ex && (i & 0x80))
139 i -= 0x100;
140 i <<= 24;
141 i |= B << 16;
142 i |= B << 8;
143 i |= B;
144#else
145 i = B;
146 i |= B << 8;
147 i |= B << 16;
148 j = B;
149 if (ex && (j & 0x80))
150 j -= 0x100;
151 i |= j << 24;
152#endif
153 break;
154 case 3:
155#if RX_OPCODE_BIG_ENDIAN
156 i = B << 16;
157 i |= B << 8;
158 i |= B;
159#else
160 i = B;
161 i |= B << 8;
162 i |= B << 16;
163#endif
164 if (ex && (i & 0x800000))
165 i -= 0x1000000;
166 break;
167 case 2:
168#if RX_OPCODE_BIG_ENDIAN
169 i |= B << 8;
170 i |= B;
171#else
172 i |= B;
173 i |= B << 8;
174#endif
175 if (ex && (i & 0x8000))
176 i -= 0x10000;
177 break;
178 case 1:
179 i |= B;
180 if (ex && (i & 0x80))
181 i -= 0x100;
182 break;
183 default:
184 abort();
185 }
186 return i;
187}
188
189static void
190rx_disp (int n, int type, int reg, int size, LocalData * ld)
191{
192 int disp;
193
194 ld->rx->op[n].reg = reg;
195 switch (type)
196 {
197 case 3:
198 ld->rx->op[n].type = RX_Operand_Register;
199 break;
200 case 0:
201 ld->rx->op[n].type = RX_Operand_Indirect;
202 ld->rx->op[n].addend = 0;
203 break;
204 case 1:
205 ld->rx->op[n].type = RX_Operand_Indirect;
206 disp = GETBYTE ();
207 ld->rx->op[n].addend = disp * PSCALE[size];
208 break;
209 case 2:
210 ld->rx->op[n].type = RX_Operand_Indirect;
211 disp = GETBYTE ();
212#if RX_OPCODE_BIG_ENDIAN
213 disp = disp * 256 + GETBYTE ();
214#else
215 disp = disp + GETBYTE () * 256;
216#endif
217 ld->rx->op[n].addend = disp * PSCALE[size];
218 break;
219 default:
220 abort ();
221 }
222}
223
3cf79a01
DD		 224#define xO 8
225#define xS 4
226#define xZ 2
227#define xC 1
228
229#define F_____
230#define F___ZC rx->flags_0 = rx->flags_s = xZ|xC;
231#define F__SZ_ rx->flags_0 = rx->flags_s = xS|xZ;
232#define F__SZC rx->flags_0 = rx->flags_s = xS|xZ|xC;
233#define F_0SZC rx->flags_0 = xO|xS|xZ|xC; rx->flags_s = xS|xZ|xC;
234#define F_O___ rx->flags_0 = rx->flags_s = xO;
235#define F_OS__ rx->flags_0 = rx->flags_s = xO|xS;
236#define F_OSZ_ rx->flags_0 = rx->flags_s = xO|xS|xZ;
237#define F_OSZC rx->flags_0 = rx->flags_s = xO|xS|xZ|xC;
c7927a3c
NC		 238
239int
240rx_decode_opcode (unsigned long pc AU,
241 RX_Opcode_Decoded * rx,
242 int (* getbyte)(void *),
243 void * ptr)
244{
245 LocalData lds, * ld = &lds;
246 unsigned char op[20] = {0};
247
248 lds.rx = rx;
249 lds.getbyte = getbyte;
250 lds.ptr = ptr;
251 lds.op = op;
252
253 memset (rx, 0, sizeof (*rx));
254 BWL(LSIZE);
255
256/** VARY sz 00 01 10 */
257
258/*----------------------------------------------------------------------*/
259/* MOV */
260
261/** 0111 0101 0100 rdst mov%s #%1, %0 */
3cf79a01 262 ID(mov); DR(rdst); SC(IMM (1)); F_____;
c7927a3c
NC		 263
264/** 1111 10sd rdst im sz mov%s #%1, %0 */
3cf79a01 265 ID(mov); sBWL (sz); DD(sd, rdst, sz); SC(IMMex(im)); F_____;
c7927a3c
NC		 266
267/** 0110 0110 immm rdst mov%s #%1, %0 */
3cf79a01 268 ID(mov); DR(rdst); SC(immm); F_____;
c7927a3c
NC		 269
270/** 0011 11sz d dst sppp mov%s #%1, %0 */
3cf79a01 271 ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
c7927a3c
NC		 272
273/** 11sz sd ss rsrc rdst mov%s %1, %0 */
f9c7014e 274 if (ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
c7927a3c 275 {
f9c7014e 276 ID(nop2);
9887672f 277 rx->syntax = "nop";
c7927a3c
NC		 278 }
279 else
280 {
f9c7014e
DD		 281 ID(mov); sBWL(sz); F_____;
282 if ((ss == 3) && (sd != 3))
283 {
284 SD(ss, rdst, sz); DD(sd, rsrc, sz);
285 }
286 else
287 {
288 SD(ss, rsrc, sz); DD(sd, rdst, sz);
289 }
c7927a3c
NC		 290 }
291
292/** 10sz 1dsp a src b dst mov%s %1, %0 */
3cf79a01 293 ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
c7927a3c
NC		 294
295/** 10sz 0dsp a dst b src mov%s %1, %0 */
3cf79a01 296 ID(mov); sBWL(sz); DIs(dst, dsp*4+a*2+b, sz); SR(src); F_____;
c7927a3c
NC		 297
298/** 1111 1110 01sz isrc bsrc rdst mov%s [%1, %2], %0 */
f9c7014e 299 ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 300
301/** 1111 1110 00sz isrc bsrc rdst mov%s %0, [%1, %2] */
f9c7014e 302 ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 303
304/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
f9c7014e 305 ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 306
307/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
3cf79a01 308 ID(mov); sBWL (sz); SR(rsrc); F_____;
c7927a3c
NC		 309 OP(0, p ? RX_Operand_Predec : RX_Operand_Postinc, rdst, 0);
310
311/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
3cf79a01 312 ID(mov); sBWL (sz); DR(rdst); F_____;
c7927a3c
NC		 313 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
314
315/** 1011 w dsp a src b dst movu%s %1, %0 */
3cf79a01 316 ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
c7927a3c
NC		 317
318/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
3cf79a01 319 ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____;
c7927a3c
NC		 320
321/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
3cf79a01 322 ID(mov); uBWL (sz); DR(rdst); F_____;
c7927a3c
NC		 323 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
324
325/*----------------------------------------------------------------------*/
326/* PUSH/POP */
327
328/** 0110 1111 dsta dstb popm %1-%2 */
3cf79a01 329 ID(popm); SR(dsta); S2R(dstb); F_____;
c7927a3c
NC		 330
331/** 0110 1110 dsta dstb pushm %1-%2 */
3cf79a01 332 ID(pushm); SR(dsta); S2R(dstb); F_____;
c7927a3c
NC		 333
334/** 0111 1110 1011 rdst pop %0 */
3cf79a01 335 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(rdst); F_____;
c7927a3c
NC		 336
337/** 0111 1110 10sz rsrc push%s %1 */
3cf79a01 338 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
c7927a3c
NC		 339
340/** 1111 01ss rsrc 10sz push%s %1 */
3cf79a01 341 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
c7927a3c
NC		 342
343/*----------------------------------------------------------------------*/
344/* XCHG */
345
346/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
347 ID(xchg); DR(rdst); SP(ss, rsrc);
348
349/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
350 ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
351
352/*----------------------------------------------------------------------*/
353/* STZ/STNZ */
354
355/** 1111 1101 0111 im00 1110rdst stz #%1, %0 */
356 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_z);
357
358/** 1111 1101 0111 im00 1111rdst stnz #%1, %0 */
359 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_nz);
360
361/*----------------------------------------------------------------------*/
362/* RTSD */
363
364/** 0110 0111 rtsd #%1 */
365 ID(rtsd); SC(IMM(1) * 4);
366
367/** 0011 1111 rega regb rtsd #%1, %2-%0 */
368 ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
369
370/*----------------------------------------------------------------------*/
371/* AND */
372
373/** 0110 0100 immm rdst and #%1, %0 */
3cf79a01 374 ID(and); SC(immm); DR(rdst); F__SZ_;
c7927a3c
NC		 375
376/** 0111 01im 0010 rdst and #%1, %0 */
3cf79a01 377 ID(and); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 378
379/** 0101 00ss rsrc rdst and %1%S1, %0 */
3cf79a01 380 ID(and); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 381
382/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
3cf79a01 383 ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 384
385/** 1111 1111 0100 rdst srca srcb and %2, %1, %0 */
3cf79a01 386 ID(and); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
c7927a3c
NC		 387
388/*----------------------------------------------------------------------*/
389/* OR */
390
391/** 0110 0101 immm rdst or #%1, %0 */
3cf79a01 392 ID(or); SC(immm); DR(rdst); F__SZ_;
c7927a3c
NC		 393
394/** 0111 01im 0011 rdst or #%1, %0 */
3cf79a01 395 ID(or); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 396
397/** 0101 01ss rsrc rdst or %1%S1, %0 */
3cf79a01 398 ID(or); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 399
400/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
3cf79a01 401 ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 402
403/** 1111 1111 0101 rdst srca srcb or %2, %1, %0 */
3cf79a01 404 ID(or); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
c7927a3c
NC		 405
406/*----------------------------------------------------------------------*/
407/* XOR */
408
409/** 1111 1101 0111 im00 1101rdst xor #%1, %0 */
3cf79a01 410 ID(xor); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 411
412/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
3cf79a01 413 ID(xor); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 414
415/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
3cf79a01 416 ID(xor); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 417
418/*----------------------------------------------------------------------*/
419/* NOT */
420
421/** 0111 1110 0000 rdst not %0 */
3cf79a01 422 ID(xor); DR(rdst); SR(rdst); S2C(~0); F__SZ_;
c7927a3c
NC		 423
424/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
3cf79a01 425 ID(xor); DR(rdst); SR(rsrc); S2C(~0); F__SZ_;
c7927a3c
NC		 426
427/*----------------------------------------------------------------------*/
428/* TST */
429
430/** 1111 1101 0111 im00 1100rdst tst #%1, %2 */
3cf79a01 431 ID(and); SC(IMMex(im)); S2R(rdst); F__SZ_;
c7927a3c
NC		 432
433/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
3cf79a01 434 ID(and); SP(ss, rsrc); S2R(rdst); F__SZ_;
c7927a3c
NC		 435
436/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
3cf79a01 437 ID(and); SPm(ss, rsrc, mx); S2R(rdst); F__SZ_;
c7927a3c
NC		 438
439/*----------------------------------------------------------------------*/
440/* NEG */
441
442/** 0111 1110 0001 rdst neg %0 */
3cf79a01 443 ID(sub); DR(rdst); SC(0); S2R(rdst); F_OSZC;
c7927a3c
NC		 444
445/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
3cf79a01 446 ID(sub); DR(rdst); SC(0); S2R(rsrc); F_OSZC;
c7927a3c
NC		 447
448/*----------------------------------------------------------------------*/
449/* ADC */
450
451/** 1111 1101 0111 im00 0010rdst adc #%1, %0 */
3cf79a01 452 ID(adc); SC(IMMex(im)); DR(rdst); F_OSZC;
c7927a3c
NC		 453
454/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
3cf79a01 455 ID(adc); SR(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 456
457/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
3cf79a01 458 ID(adc); SPm(ss, rsrc, 2); DR(rdst); F_OSZC;
c7927a3c
NC		 459
460/*----------------------------------------------------------------------*/
461/* ADD */
462
463/** 0110 0010 immm rdst add #%1, %0 */
3cf79a01 464 ID(add); SC(immm); DR(rdst); F_OSZC;
c7927a3c
NC		 465
466/** 0100 10ss rsrc rdst add %1%S1, %0 */
3cf79a01 467 ID(add); SP(ss, rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 468
469/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
3cf79a01 470 ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC;
c7927a3c
NC		 471
472/** 0111 00im rsrc rdst add #%1, %2, %0 */
3cf79a01 473 ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 474
475/** 1111 1111 0010 rdst srca srcb add %2, %1, %0 */
3cf79a01 476 ID(add); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
c7927a3c
NC		 477
478/*----------------------------------------------------------------------*/
479/* CMP */
480
481/** 0110 0001 immm rdst cmp #%2, %1 */
3cf79a01 482 ID(sub); S2C(immm); SR(rdst); F_OSZC;
c7927a3c
NC		 483
484/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
3cf79a01 485 ID(sub); SR(rsrc); S2C(IMMex(im)); F_OSZC;
c7927a3c
NC		 486
487/** 0111 0101 0101 rsrc cmp #%2, %1 */
3cf79a01 488 ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
c7927a3c
NC		 489
490/** 0100 01ss rsrc rdst cmp %2%S2, %1 */
3cf79a01 491 ID(sub); S2P(ss, rsrc); SR(rdst); F_OSZC;
c7927a3c
NC		 492
493/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
3cf79a01 494 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F_OSZC;
c7927a3c
NC		 495
496/*----------------------------------------------------------------------*/
497/* SUB */
498
499/** 0110 0000 immm rdst sub #%2, %0 */
3cf79a01 500 ID(sub); S2C(immm); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 501
502/** 0100 00ss rsrc rdst sub %2%S2, %1 */
3cf79a01 503 ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 504
505/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
3cf79a01 506 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 507
508/** 1111 1111 0000 rdst srca srcb sub %2, %1, %0 */
3cf79a01 509 ID(sub); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
c7927a3c
NC		 510
511/*----------------------------------------------------------------------*/
512/* SBB */
513
514/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
3cf79a01 515 ID(sbb); SR (rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 516
517 /* FIXME: only supports .L */
518/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
3cf79a01 519 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
c7927a3c
NC		 520
521/*----------------------------------------------------------------------*/
522/* ABS */
523
524/** 0111 1110 0010 rdst abs %0 */
3cf79a01 525 ID(abs); DR(rdst); SR(rdst); F_OSZ_;
c7927a3c
NC		 526
527/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
3cf79a01 528 ID(abs); DR(rdst); SR(rsrc); F_OSZ_;
c7927a3c
NC		 529
530/*----------------------------------------------------------------------*/
531/* MAX */
532
533/** 1111 1101 0111 im00 0100rdst max #%1, %0 */
534 ID(max); DR(rdst); SC(IMMex(im));
535
536/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
f9c7014e
DD		 537 if (ss == 3 && rsrc == 0 && rdst == 0)
538 {
539 ID(nop3);
9887672f 540 rx->syntax = "nop";
f9c7014e
DD		 541 }
542 else
543 {
544 ID(max); SP(ss, rsrc); DR(rdst);
545 }
c7927a3c
NC		 546
547/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
548 ID(max); SPm(ss, rsrc, mx); DR(rdst);
549
550/*----------------------------------------------------------------------*/
551/* MIN */
552
553/** 1111 1101 0111 im00 0101rdst min #%1, %0 */
554 ID(min); DR(rdst); SC(IMMex(im));
555
556/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
557 ID(min); SP(ss, rsrc); DR(rdst);
558
559/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
560 ID(min); SPm(ss, rsrc, mx); DR(rdst);
561
562/*----------------------------------------------------------------------*/
563/* MUL */
564
565/** 0110 0011 immm rdst mul #%1, %0 */
3cf79a01 566 ID(mul); DR(rdst); SC(immm); F_____;
c7927a3c
NC		 567
568/** 0111 01im 0001rdst mul #%1, %0 */
3cf79a01 569 ID(mul); DR(rdst); SC(IMMex(im)); F_____;
c7927a3c
NC		 570
571/** 0100 11ss rsrc rdst mul %1%S1, %0 */
3cf79a01 572 ID(mul); SP(ss, rsrc); DR(rdst); F_____;
c7927a3c
NC		 573
574/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
3cf79a01 575 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____;
c7927a3c
NC		 576
577/** 1111 1111 0011 rdst srca srcb mul %2, %1, %0 */
3cf79a01 578 ID(mul); DR(rdst); SR(srcb); S2R(srca); F_____;
c7927a3c
NC		 579
580/*----------------------------------------------------------------------*/
581/* EMUL */
582
583/** 1111 1101 0111 im00 0110rdst emul #%1, %0 */
584 ID(emul); DR(rdst); SC(IMMex(im));
585
586/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
587 ID(emul); SP(ss, rsrc); DR(rdst);
588
589/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
590 ID(emul); SPm(ss, rsrc, mx); DR(rdst);
591
592/*----------------------------------------------------------------------*/
593/* EMULU */
594
595/** 1111 1101 0111 im00 0111rdst emulu #%1, %0 */
596 ID(emulu); DR(rdst); SC(IMMex(im));
597
598/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
599 ID(emulu); SP(ss, rsrc); DR(rdst);
600
601/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
602 ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
603
604/*----------------------------------------------------------------------*/
605/* DIV */
606
607/** 1111 1101 0111 im00 1000rdst div #%1, %0 */
3cf79a01 608 ID(div); DR(rdst); SC(IMMex(im)); F_O___;
c7927a3c
NC		 609
610/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
3cf79a01 611 ID(div); SP(ss, rsrc); DR(rdst); F_O___;
c7927a3c
NC		 612
613/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
3cf79a01 614 ID(div); SPm(ss, rsrc, mx); DR(rdst); F_O___;
c7927a3c
NC		 615
616/*----------------------------------------------------------------------*/
617/* DIVU */
618
619/** 1111 1101 0111 im00 1001rdst divu #%1, %0 */
3cf79a01 620 ID(divu); DR(rdst); SC(IMMex(im)); F_O___;
c7927a3c
NC		 621
622/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
3cf79a01 623 ID(divu); SP(ss, rsrc); DR(rdst); F_O___;
c7927a3c
NC		 624
625/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
3cf79a01 626 ID(divu); SPm(ss, rsrc, mx); DR(rdst); F_O___;
c7927a3c
NC		 627
628/*----------------------------------------------------------------------*/
629/* SHIFT */
630
631/** 0110 110i mmmm rdst shll #%2, %0 */
3cf79a01 632 ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 633
634/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
3cf79a01 635 ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 636
637/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
3cf79a01 638 ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 639
640
641/** 0110 101i mmmm rdst shar #%2, %0 */
3cf79a01 642 ID(shar); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_0SZC;
c7927a3c
NC		 643
644/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
3cf79a01 645 ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F_0SZC;
c7927a3c
NC		 646
647/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
3cf79a01 648 ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F_0SZC;
c7927a3c
NC		 649
650
651/** 0110 100i mmmm rdst shlr #%2, %0 */
3cf79a01 652 ID(shlr); S2C(i*16+mmmm); SR(rdst); DR(rdst); F__SZC;
c7927a3c
NC		 653
654/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
3cf79a01 655 ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F__SZC;
c7927a3c
NC		 656
657/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
3cf79a01 658 ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 659
660/*----------------------------------------------------------------------*/
661/* ROTATE */
662
663/** 0111 1110 0101 rdst rolc %0 */
3cf79a01 664 ID(rolc); DR(rdst); F__SZC;
c7927a3c
NC		 665
666/** 0111 1110 0100 rdst rorc %0 */
3cf79a01 667 ID(rorc); DR(rdst); F__SZC;
c7927a3c
NC		 668
669/** 1111 1101 0110 111i mmmm rdst rotl #%1, %0 */
3cf79a01 670 ID(rotl); SC(i*16+mmmm); DR(rdst); F__SZC;
c7927a3c
NC		 671
672/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
3cf79a01 673 ID(rotl); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 674
675/** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
3cf79a01 676 ID(rotr); SC(i*16+mmmm); DR(rdst); F__SZC;
c7927a3c
NC		 677
678/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
3cf79a01 679 ID(rotr); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 680
681/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */
682 ID(revw); SR(rsrc); DR(rdst);
683
684/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
685 ID(revl); SR(rsrc); DR(rdst);
686
687/*----------------------------------------------------------------------*/
688/* BRANCH */
689
690/** 0001 n dsp b%1.s %a0 */
691 ID(branch); Scc(n); DC(pc + dsp3map[dsp]);
692
693/** 0010 cond b%1.b %a0 */
694 ID(branch); Scc(cond); DC(pc + IMMex (1));
695
696/** 0011 101c b%1.w %a0 */
697 ID(branch); Scc(c); DC(pc + IMMex (2));
698
699
700/** 0000 1dsp bra.s %a0 */
f9c7014e 701 ID(branch); DC(pc + dsp3map[dsp]);
c7927a3c
NC		 702
703/** 0010 1110 bra.b %a0 */
f9c7014e 704 ID(branch); DC(pc + IMMex(1));
c7927a3c
NC		 705
706/** 0011 1000 bra.w %a0 */
f9c7014e 707 ID(branch); DC(pc + IMMex(2));
c7927a3c
NC		 708
709/** 0000 0100 bra.a %a0 */
f9c7014e 710 ID(branch); DC(pc + IMMex(3));
c7927a3c
NC		 711
712/** 0111 1111 0100 rsrc bra.l %0 */
f9c7014e 713 ID(branchrel); DR(rsrc);
c7927a3c
NC		 714
715
716/** 0111 1111 0000 rsrc jmp %0 */
f9c7014e 717 ID(branch); DR(rsrc);
c7927a3c
NC		 718
719/** 0111 1111 0001 rsrc jsr %0 */
720 ID(jsr); DR(rsrc);
721
722/** 0011 1001 bsr.w %a0 */
723 ID(jsr); DC(pc + IMMex(2));
724
725/** 0000 0101 bsr.a %a0 */
726 ID(jsr); DC(pc + IMMex(3));
727
728/** 0111 1111 0101 rsrc bsr.l %0 */
729 ID(jsrrel); DR(rsrc);
730
731/** 0000 0010 rts */
732 ID(rts);
733
734/*----------------------------------------------------------------------*/
735/* NOP */
736
737/** 0000 0011 nop */
738 ID(nop);
739
740/*----------------------------------------------------------------------*/
741/* STRING FUNCTIONS */
742
743/** 0111 1111 1000 0011 scmpu */
3cf79a01 744 ID(scmpu); F___ZC;
c7927a3c
NC		 745
746/** 0111 1111 1000 0111 smovu */
747 ID(smovu);
748
749/** 0111 1111 1000 1011 smovb */
750 ID(smovb);
751
752/** 0111 1111 1000 00sz suntil%s */
3cf79a01 753 ID(suntil); BWL(sz); F___ZC;
c7927a3c
NC		 754
755/** 0111 1111 1000 01sz swhile%s */
3cf79a01 756 ID(swhile); BWL(sz); F___ZC;
c7927a3c
NC		 757
758/** 0111 1111 1000 1111 smovf */
759 ID(smovf);
760
761/** 0111 1111 1000 10sz sstr%s */
762 ID(sstr); BWL(sz);
763
764/*----------------------------------------------------------------------*/
765/* RMPA */
766
767/** 0111 1111 1000 11sz rmpa%s */
3cf79a01 768 ID(rmpa); BWL(sz); F_OS__;
c7927a3c
NC		 769
770/*----------------------------------------------------------------------*/
771/* HI/LO stuff */
772
773/** 1111 1101 0000 0000 srca srcb mulhi %1, %2 */
3cf79a01 774 ID(mulhi); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 775
776/** 1111 1101 0000 0001 srca srcb mullo %1, %2 */
3cf79a01 777 ID(mullo); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 778
779/** 1111 1101 0000 0100 srca srcb machi %1, %2 */
3cf79a01 780 ID(machi); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 781
782/** 1111 1101 0000 0101 srca srcb maclo %1, %2 */
3cf79a01 783 ID(maclo); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 784
785/** 1111 1101 0001 0111 0000 rsrc mvtachi %1 */
3cf79a01 786 ID(mvtachi); SR(rsrc); F_____;
c7927a3c
NC		 787
788/** 1111 1101 0001 0111 0001 rsrc mvtaclo %1 */
3cf79a01 789 ID(mvtaclo); SR(rsrc); F_____;
c7927a3c
NC		 790
791/** 1111 1101 0001 1111 0000 rdst mvfachi %0 */
3cf79a01 792 ID(mvfachi); DR(rdst); F_____;
c7927a3c
NC		 793
794/** 1111 1101 0001 1111 0010 rdst mvfacmi %0 */
3cf79a01 795 ID(mvfacmi); DR(rdst); F_____;
c7927a3c
NC		 796
797/** 1111 1101 0001 1111 0001 rdst mvfaclo %0 */
3cf79a01 798 ID(mvfaclo); DR(rdst); F_____;
c7927a3c
NC		 799
800/** 1111 1101 0001 1000 000i 0000 racw #%1 */
3cf79a01 801 ID(racw); SC(i+1); F_____;
c7927a3c
NC		 802
803/*----------------------------------------------------------------------*/
804/* SAT */
805
806/** 0111 1110 0011 rdst sat %0 */
807 ID(sat); DR (rdst);
808
809/** 0111 1111 1001 0011 satr */
810 ID(satr);
811
812/*----------------------------------------------------------------------*/
813/* FLOAT */
814
815/** 1111 1101 0111 0010 0010 rdst fadd #%1, %0 */
3cf79a01 816 ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 817
818/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
3cf79a01 819 ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 820
821/** 1111 1101 0111 0010 0001 rdst fcmp #%1, %0 */
3cf79a01 822 ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
c7927a3c
NC		 823
824/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
3cf79a01 825 ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F_OSZ_;
c7927a3c
NC		 826
827/** 1111 1101 0111 0010 0000 rdst fsub #%1, %0 */
3cf79a01 828 ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 829
830/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
3cf79a01 831 ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 832
833/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
3cf79a01 834 ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 835
836/** 1111 1101 0111 0010 0011 rdst fmul #%1, %0 */
3cf79a01 837 ID(fmul); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 838
839/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
3cf79a01 840 ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 841
842/** 1111 1101 0111 0010 0100 rdst fdiv #%1, %0 */
3cf79a01 843 ID(fdiv); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 844
845/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
3cf79a01 846 ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 847
848/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
3cf79a01 849 ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 850
851/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
3cf79a01 852 ID(itof); DR (rdst); SP(sd, rsrc); F__SZ_;
c7927a3c
NC		 853
854/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
3cf79a01 855 ID(itof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
c7927a3c
NC		 856
857/*----------------------------------------------------------------------*/
858/* BIT OPS */
859
860/** 1111 00sd rdst 0bit bset #%1, %0%S0 */
3cf79a01 861 ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 862
863/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
3cf79a01 864 ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 865
866/** 0111 100b ittt rdst bset #%1, %0 */
3cf79a01 867 ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
c7927a3c
NC		 868
869
870/** 1111 00sd rdst 1bit bclr #%1, %0%S0 */
3cf79a01 871 ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 872
873/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */
3cf79a01 874 ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 875
876/** 0111 101b ittt rdst bclr #%1, %0 */
3cf79a01 877 ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
c7927a3c
NC		 878
879
880/** 1111 01sd rdst 0bit btst #%2, %1%S1 */
3cf79a01 881 ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F___ZC;
c7927a3c
NC		 882
883/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
3cf79a01 884 ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
c7927a3c
NC		 885
886/** 0111 110b ittt rdst btst #%2, %1 */
3cf79a01 887 ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F___ZC;
c7927a3c
NC		 888
889
890/** 1111 1100 111bit sd rdst 1111 bnot #%1, %0%S0 */
891 ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
892
893/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
894 ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
895
896/** 1111 1101 111bittt 1111 rdst bnot #%1, %0 */
897 ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
898
899
900/** 1111 1100 111bit sd rdst cond bm%2 #%1, %0%S0 */
901 ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
902
903/** 1111 1101 111 bittt cond rdst bm%2 #%1, %0%S0 */
904 ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
905
906/*----------------------------------------------------------------------*/
907/* CONTROL REGISTERS */
908
909/** 0111 1111 1011 rdst clrpsw %0 */
910 ID(clrpsw); DF(rdst);
911
912/** 0111 1111 1010 rdst setpsw %0 */
913 ID(setpsw); DF(rdst);
914
0d734b5d
DD		 915/** 0111 0101 0111 0000 0000 immm mvtipl #%1 */
916 ID(mvtipl); SC(immm);
917
c7927a3c
NC		 918/** 0111 1110 111 crdst popc %0 */
919 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
920
921/** 0111 1110 110 crsrc pushc %1 */
922 ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
923
924/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
925 ID(mov); SC(IMMex(im)); DR(crdst + 16);
926
927/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
928 ID(mov); SR(rsrc); DR(c*16+rdst + 16);
929
930/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
931 ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
932
c7927a3c
NC		 933/*----------------------------------------------------------------------*/
934/* INTERRUPTS */
935
936/** 0111 1111 1001 0100 rtfi */
937 ID(rtfi);
938
939/** 0111 1111 1001 0101 rte */
940 ID(rte);
941
942/** 0000 0000 brk */
943 ID(brk);
944
945/** 0000 0001 dbt */
946 ID(dbt);
947
948/** 0111 0101 0110 0000 int #%1 */
949 ID(int); SC(IMM(1));
950
951/** 0111 1111 1001 0110 wait */
952 ID(wait);
953
954/*----------------------------------------------------------------------*/
955/* SCcnd */
956
957/** 1111 1100 1101 sz sd rdst cond sc%1%s %0 */
958 ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
959
960/** */
961
962 return rx->n_bytes;
963}
A mirror of the official binutils-gdb repository