]> git.ipfire.org Git - thirdparty/pciutils.git/blame - setpci.c
Merge remote-tracking branch 'pali/i386-ports'
[thirdparty/pciutils.git] / setpci.c
CommitLineData
e4842ff3 1/*
4284af58 2 * The PCI Utilities -- Manipulate PCI Configuration Registers
e4842ff3 3 *
203854cc 4 * Copyright (c) 1998--2020 Martin Mares <mj@ucw.cz>
e4842ff3
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
ace49a96 13#include <errno.h>
7aad822b 14
1b99a704 15#define PCIUTILS_SETPCI
e4842ff3
MM
16#include "pciutils.h"
17
18static int force; /* Don't complain if no devices match */
19static int verbose; /* Verbosity level */
b2c9b373 20static int demo_mode; /* Only show */
203854cc 21static int allow_raw_access;
e4842ff3 22
81afa98c
MM
23const char program_name[] = "setpci";
24
727ce158 25static struct pci_access *pacc;
e4842ff3 26
b7351143
MM
27struct value {
28 unsigned int value;
29 unsigned int mask;
30};
31
e4842ff3
MM
32struct op {
33 struct op *next;
27d4e0fb
MM
34 u16 cap_type; /* PCI_CAP_xxx or 0 */
35 u16 cap_id;
94a53fc6
PR
36 const char *name;
37 unsigned int hdr_type_mask;
e4842ff3
MM
38 unsigned int addr;
39 unsigned int width; /* Byte width of the access */
ace49a96 40 unsigned int num_values; /* Number of values to write; 0=read */
6639fd17 41 unsigned int number; /* The n-th capability of that id */
b7351143 42 struct value values[0];
e4842ff3
MM
43};
44
203854cc
MM
45struct group {
46 struct group *next;
47 struct pci_filter filter;
48 struct op *first_op;
49 struct op **last_op;
50};
51
52static struct group *first_group, **last_group = &first_group;
53static int need_bus_scan;
b7351143 54static unsigned int max_values[] = { 0, 0xff, 0xffff, 0, 0xffffffff };
e4842ff3 55
203854cc
MM
56static int
57matches_single_device(struct group *group)
58{
59 struct pci_filter *f = &group->filter;
60 return (f->domain >= 0 && f->bus >= 0 && f->slot >= 0 && f->func >= 0);
61}
62
727ce158 63static struct pci_dev **
203854cc 64select_devices(struct group *group)
e4842ff3 65{
203854cc
MM
66 struct pci_filter *f = &group->filter;
67
68 if (!need_bus_scan && matches_single_device(group))
69 {
70 struct pci_dev **devs = xmalloc(sizeof(struct device *) * 2);
71 struct pci_dev *dev = pci_get_dev(pacc, f->domain, f->bus, f->slot, f->func);
72 int i = 0;
73 if (pci_filter_match(f, dev))
74 devs[i++] = dev;
75 devs[i] = NULL;
76 return devs;
77 }
78 else
79 {
80 struct pci_dev **devs, *dev;
81 int i = 0;
82 int cnt = 1;
83
84 for (dev = pacc->devices; dev; dev = dev->next)
85 if (pci_filter_match(f, dev))
86 cnt++;
87
88 devs = xmalloc(sizeof(struct device *) * cnt);
89
90 for (dev = pacc->devices; dev; dev = dev->next)
91 if (pci_filter_match(f, dev))
92 devs[i++] = dev;
93
94 devs[i] = NULL;
95 return devs;
96 }
e4842ff3
MM
97}
98
256fabef 99static void PCI_PRINTF(1,2)
f34b0c7a
MM
100trace(const char *fmt, ...)
101{
102 va_list args;
103 va_start(args, fmt);
104 if (verbose)
105 vprintf(fmt, args);
106 va_end(args);
107}
108
e4842ff3 109static void
727ce158 110exec_op(struct op *op, struct pci_dev *dev)
e4842ff3 111{
f34b0c7a
MM
112 const char * const formats[] = { NULL, " %02x", " %04x", NULL, " %08x" };
113 const char * const mask_formats[] = { NULL, " %02x->(%02x:%02x)->%02x", " %04x->(%04x:%04x)->%04x", NULL, " %08x->(%08x:%08x)->%08x" };
ace49a96
MM
114 unsigned int i, x, y;
115 int addr = 0;
b7351143 116 int width = op->width;
f34b0c7a 117 char slot[16];
e4842ff3 118
f34b0c7a 119 sprintf(slot, "%04x:%02x:%02x.%x", dev->domain, dev->bus, dev->dev, dev->func);
df59fab4 120 trace("%s ", slot);
27d4e0fb 121 if (op->cap_type)
ace49a96
MM
122 {
123 struct pci_cap *cap;
6639fd17
DS
124 unsigned int cap_nr = op->number;
125 cap = pci_find_cap_nr(dev, op->cap_id, op->cap_type, &cap_nr);
ace49a96 126 if (cap)
6639fd17
DS
127 addr = cap->addr;
128 else if (cap_nr == 0)
129 die("%s: Instance #%d of %s %04x not found - there are no capabilities with that id.", slot,
130 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
131 op->cap_id);
ace49a96 132 else
785b2e0e 133 die("%s: Instance #%d of %s %04x not found - there %s only %d %s with that id.", slot,
6639fd17 134 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
785b2e0e
DS
135 op->cap_id, ((cap_nr == 1) ? "is" : "are"), cap_nr,
136 ((cap_nr == 1) ? "capability" : "capabilities"));
6639fd17 137
df59fab4 138 trace(((op->cap_type == PCI_CAP_NORMAL) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op->cap_id, addr);
ace49a96
MM
139 }
140 addr += op->addr;
df59fab4 141 trace("@%02x", addr);
f34b0c7a
MM
142
143 /* We have already checked it when parsing, but addressing relative to capabilities can change the address. */
144 if (addr & (width-1))
145 die("%s: Unaligned access of width %d to register %04x", slot, width, addr);
146 if (addr + width > 0x1000)
147 die("%s: Access of width %d to register %04x out of range", slot, width, addr);
148
94a53fc6
PR
149 if (op->hdr_type_mask)
150 {
151 unsigned int hdr_type = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
152 if (hdr_type > 2 || !((1 << hdr_type) & op->hdr_type_mask))
153 die("%s: Does not have register %s.", slot, op->name);
154 }
155
ace49a96 156 if (op->num_values)
b7351143 157 {
de7ef8bc 158 for (i=0; i<op->num_values; i++)
b7351143
MM
159 {
160 if ((op->values[i].mask & max_values[width]) == max_values[width])
161 {
162 x = op->values[i].value;
f34b0c7a 163 trace(formats[width], op->values[i].value);
b7351143
MM
164 }
165 else
166 {
167 switch (width)
168 {
169 case 1:
170 y = pci_read_byte(dev, addr);
171 break;
172 case 2:
173 y = pci_read_word(dev, addr);
174 break;
175 default:
176 y = pci_read_long(dev, addr);
177 break;
178 }
179 x = (y & ~op->values[i].mask) | op->values[i].value;
f34b0c7a 180 trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x);
b7351143
MM
181 }
182 if (!demo_mode)
183 {
184 switch (width)
185 {
186 case 1:
187 pci_write_byte(dev, addr, x);
188 break;
189 case 2:
190 pci_write_word(dev, addr, x);
191 break;
192 default:
193 pci_write_long(dev, addr, x);
194 break;
195 }
196 }
197 addr += width;
198 }
f34b0c7a 199 trace("\n");
b7351143 200 }
e4842ff3
MM
201 else
202 {
f34b0c7a 203 trace(" = ");
b251f40b 204 switch (width)
b2c9b373 205 {
b251f40b
MM
206 case 1:
207 x = pci_read_byte(dev, addr);
208 break;
209 case 2:
210 x = pci_read_word(dev, addr);
211 break;
212 default:
213 x = pci_read_long(dev, addr);
214 break;
b2c9b373 215 }
f34b0c7a 216 printf(formats[width]+1, x);
b7351143 217 putchar('\n');
e4842ff3
MM
218 }
219}
220
221static void
203854cc 222execute(void)
e4842ff3 223{
203854cc
MM
224 struct group *group;
225 int group_cnt = 0;
e4842ff3 226
203854cc 227 for (group = first_group; group; group = group->next)
e4842ff3 228 {
203854cc
MM
229 struct pci_dev **vec = select_devices(group);
230 struct pci_dev *dev;
231 unsigned int i;
232
233 group_cnt++;
234 if (!vec[0] && !force)
235 fprintf(stderr, "setpci: Warning: No devices selected for operation group %d.\n", group_cnt);
236
237 for (i = 0; dev = vec[i]; i++)
238 {
239 struct op *op;
240 for (op = group->first_op; op; op = op->next)
241 exec_op(op, dev);
242 }
243
244 free(vec);
e4842ff3
MM
245 }
246}
247
b2c9b373 248static void
203854cc 249scan_ops(void)
b2c9b373 250{
203854cc
MM
251 struct group *group;
252 struct op *op;
253
254 for (group = first_group; group; group = group->next)
255 for (op = group->first_op; op; op = op->next)
256 {
257 if (op->num_values && !demo_mode)
258 pacc->writeable = 1;
259 if (!matches_single_device(group) || !allow_raw_access)
260 need_bus_scan = 1;
261 }
b2c9b373
MM
262}
263
264struct reg_name {
ace49a96 265 unsigned int cap;
3fe8a38d
MM
266 unsigned int offset;
267 unsigned int width;
94a53fc6 268 unsigned int hdr_type_mask;
b7351143 269 const char *name;
b2c9b373
MM
270};
271
b7351143 272static const struct reg_name pci_reg_names[] = {
94a53fc6
PR
273 { 0, 0x00, 2, 0x0, "VENDOR_ID" },
274 { 0, 0x02, 2, 0x0, "DEVICE_ID" },
275 { 0, 0x04, 2, 0x0, "COMMAND" },
276 { 0, 0x06, 2, 0x0, "STATUS" },
277 { 0, 0x08, 1, 0x0, "REVISION" },
278 { 0, 0x09, 1, 0x0, "CLASS_PROG" },
279 { 0, 0x0a, 2, 0x0, "CLASS_DEVICE" },
280 { 0, 0x0c, 1, 0x0, "CACHE_LINE_SIZE" },
281 { 0, 0x0d, 1, 0x0, "LATENCY_TIMER" },
282 { 0, 0x0e, 1, 0x0, "HEADER_TYPE" },
283 { 0, 0x0f, 1, 0x0, "BIST" },
284 { 0, 0x10, 4, 0x3, "BASE_ADDRESS_0" },
285 { 0, 0x14, 4, 0x3, "BASE_ADDRESS_1" },
286 { 0, 0x18, 4, 0x1, "BASE_ADDRESS_2" },
287 { 0, 0x1c, 4, 0x1, "BASE_ADDRESS_3" },
288 { 0, 0x20, 4, 0x1, "BASE_ADDRESS_4" },
289 { 0, 0x24, 4, 0x1, "BASE_ADDRESS_5" },
290 { 0, 0x28, 4, 0x1, "CARDBUS_CIS" },
291 { 0, 0x2c, 2, 0x1, "SUBSYSTEM_VENDOR_ID" },
292 { 0, 0x2e, 2, 0x1, "SUBSYSTEM_ID" },
293 { 0, 0x30, 4, 0x1, "ROM_ADDRESS" },
294 { 0, 0x34, 1, 0x3, "CAPABILITIES" },
295 { 0, 0x3c, 1, 0x3, "INTERRUPT_LINE" },
296 { 0, 0x3d, 1, 0x3, "INTERRUPT_PIN" },
297 { 0, 0x3e, 1, 0x1, "MIN_GNT" },
298 { 0, 0x3f, 1, 0x1, "MAX_LAT" },
299 { 0, 0x18, 1, 0x2, "PRIMARY_BUS" },
300 { 0, 0x19, 1, 0x2, "SECONDARY_BUS" },
301 { 0, 0x1a, 1, 0x2, "SUBORDINATE_BUS" },
302 { 0, 0x1b, 1, 0x2, "SEC_LATENCY_TIMER" },
303 { 0, 0x1c, 1, 0x2, "IO_BASE" },
304 { 0, 0x1d, 1, 0x2, "IO_LIMIT" },
305 { 0, 0x1e, 2, 0x2, "SEC_STATUS" },
306 { 0, 0x20, 2, 0x2, "MEMORY_BASE" },
307 { 0, 0x22, 2, 0x2, "MEMORY_LIMIT" },
308 { 0, 0x24, 2, 0x2, "PREF_MEMORY_BASE" },
309 { 0, 0x26, 2, 0x2, "PREF_MEMORY_LIMIT" },
310 { 0, 0x28, 4, 0x2, "PREF_BASE_UPPER32" },
311 { 0, 0x2c, 4, 0x2, "PREF_LIMIT_UPPER32" },
312 { 0, 0x30, 2, 0x2, "IO_BASE_UPPER16" },
313 { 0, 0x32, 2, 0x2, "IO_LIMIT_UPPER16" },
314 { 0, 0x38, 4, 0x2, "BRIDGE_ROM_ADDRESS" },
315 { 0, 0x3e, 2, 0x2, "BRIDGE_CONTROL" },
316 { 0, 0x10, 4, 0x4, "CB_CARDBUS_BASE" },
317 { 0, 0x14, 2, 0x4, "CB_CAPABILITIES" },
318 { 0, 0x16, 2, 0x4, "CB_SEC_STATUS" },
319 { 0, 0x18, 1, 0x4, "CB_BUS_NUMBER" },
320 { 0, 0x19, 1, 0x4, "CB_CARDBUS_NUMBER" },
321 { 0, 0x1a, 1, 0x4, "CB_SUBORDINATE_BUS" },
322 { 0, 0x1b, 1, 0x4, "CB_CARDBUS_LATENCY" },
323 { 0, 0x1c, 4, 0x4, "CB_MEMORY_BASE_0" },
324 { 0, 0x20, 4, 0x4, "CB_MEMORY_LIMIT_0" },
325 { 0, 0x24, 4, 0x4, "CB_MEMORY_BASE_1" },
326 { 0, 0x28, 4, 0x4, "CB_MEMORY_LIMIT_1" },
327 { 0, 0x2c, 2, 0x4, "CB_IO_BASE_0" },
328 { 0, 0x2e, 2, 0x4, "CB_IO_BASE_0_HI" },
329 { 0, 0x30, 2, 0x4, "CB_IO_LIMIT_0" },
330 { 0, 0x32, 2, 0x4, "CB_IO_LIMIT_0_HI" },
331 { 0, 0x34, 2, 0x4, "CB_IO_BASE_1" },
332 { 0, 0x36, 2, 0x4, "CB_IO_BASE_1_HI" },
333 { 0, 0x38, 2, 0x4, "CB_IO_LIMIT_1" },
334 { 0, 0x3a, 2, 0x4, "CB_IO_LIMIT_1_HI" },
335 { 0, 0x40, 2, 0x4, "CB_SUBSYSTEM_VENDOR_ID" },
336 { 0, 0x42, 2, 0x4, "CB_SUBSYSTEM_ID" },
337 { 0, 0x44, 4, 0x4, "CB_LEGACY_MODE_BASE" },
338 { 0x10001, 0, 0, 0x0, "CAP_PM" },
339 { 0x10002, 0, 0, 0x0, "CAP_AGP" },
340 { 0x10003, 0, 0, 0x0, "CAP_VPD" },
341 { 0x10004, 0, 0, 0x0, "CAP_SLOTID" },
342 { 0x10005, 0, 0, 0x0, "CAP_MSI" },
343 { 0x10006, 0, 0, 0x0, "CAP_CHSWP" },
344 { 0x10007, 0, 0, 0x0, "CAP_PCIX" },
345 { 0x10008, 0, 0, 0x0, "CAP_HT" },
346 { 0x10009, 0, 0, 0x0, "CAP_VNDR" },
347 { 0x1000a, 0, 0, 0x0, "CAP_DBG" },
348 { 0x1000b, 0, 0, 0x0, "CAP_CCRC" },
349 { 0x1000c, 0, 0, 0x0, "CAP_HOTPLUG" },
350 { 0x1000d, 0, 0, 0x0, "CAP_SSVID" },
351 { 0x1000e, 0, 0, 0x0, "CAP_AGP3" },
352 { 0x1000f, 0, 0, 0x0, "CAP_SECURE" },
353 { 0x10010, 0, 0, 0x0, "CAP_EXP" },
354 { 0x10011, 0, 0, 0x0, "CAP_MSIX" },
355 { 0x10012, 0, 0, 0x0, "CAP_SATA" },
356 { 0x10013, 0, 0, 0x0, "CAP_AF" },
357 { 0x10014, 0, 0, 0x0, "CAP_EA" },
358 { 0x20001, 0, 0, 0x0, "ECAP_AER" },
359 { 0x20002, 0, 0, 0x0, "ECAP_VC" },
360 { 0x20003, 0, 0, 0x0, "ECAP_DSN" },
361 { 0x20004, 0, 0, 0x0, "ECAP_PB" },
362 { 0x20005, 0, 0, 0x0, "ECAP_RCLINK" },
363 { 0x20006, 0, 0, 0x0, "ECAP_RCILINK" },
364 { 0x20007, 0, 0, 0x0, "ECAP_RCEC" },
365 { 0x20008, 0, 0, 0x0, "ECAP_MFVC" },
366 { 0x20009, 0, 0, 0x0, "ECAP_VC2" },
367 { 0x2000a, 0, 0, 0x0, "ECAP_RBCB" },
368 { 0x2000b, 0, 0, 0x0, "ECAP_VNDR" },
369 { 0x2000d, 0, 0, 0x0, "ECAP_ACS" },
370 { 0x2000e, 0, 0, 0x0, "ECAP_ARI" },
371 { 0x2000f, 0, 0, 0x0, "ECAP_ATS" },
372 { 0x20010, 0, 0, 0x0, "ECAP_SRIOV" },
373 { 0x20011, 0, 0, 0x0, "ECAP_MRIOV" },
374 { 0x20012, 0, 0, 0x0, "ECAP_MCAST" },
375 { 0x20013, 0, 0, 0x0, "ECAP_PRI" },
376 { 0x20015, 0, 0, 0x0, "ECAP_REBAR" },
377 { 0x20016, 0, 0, 0x0, "ECAP_DPA" },
378 { 0x20017, 0, 0, 0x0, "ECAP_TPH" },
379 { 0x20018, 0, 0, 0x0, "ECAP_LTR" },
380 { 0x20019, 0, 0, 0x0, "ECAP_SECPCI" },
381 { 0x2001a, 0, 0, 0x0, "ECAP_PMUX" },
382 { 0x2001b, 0, 0, 0x0, "ECAP_PASID" },
383 { 0x2001c, 0, 0, 0x0, "ECAP_LNR" },
384 { 0x2001d, 0, 0, 0x0, "ECAP_DPC" },
385 { 0x2001e, 0, 0, 0x0, "ECAP_L1PM" },
386 { 0x2001f, 0, 0, 0x0, "ECAP_PTM" },
387 { 0x20020, 0, 0, 0x0, "ECAP_M_PCIE" },
388 { 0x20021, 0, 0, 0x0, "ECAP_FRS" },
389 { 0x20022, 0, 0, 0x0, "ECAP_RTR" },
390 { 0x20023, 0, 0, 0x0, "ECAP_DVSEC" },
391 { 0x20024, 0, 0, 0x0, "ECAP_VF_REBAR" },
392 { 0x20025, 0, 0, 0x0, "ECAP_DLNK" },
393 { 0x20026, 0, 0, 0x0, "ECAP_16GT" },
394 { 0x20027, 0, 0, 0x0, "ECAP_LMR" },
395 { 0x20028, 0, 0, 0x0, "ECAP_HIER_ID" },
396 { 0x20029, 0, 0, 0x0, "ECAP_NPEM" },
397 { 0, 0, 0, 0x0, NULL }
b2c9b373
MM
398};
399
a82ca638
MM
400static void
401dump_registers(void)
402{
403 const struct reg_name *r;
404
405 printf("cap pos w name\n");
406 for (r = pci_reg_names; r->name; r++)
407 {
408 if (r->cap >= 0x20000)
409 printf("%04x", r->cap - 0x20000);
410 else if (r->cap)
411 printf(" %02x", r->cap - 0x10000);
412 else
413 printf(" ");
414 printf(" %02x %c %s\n", r->offset, "-BW?L"[r->width], r->name);
415 }
416}
417
fa8deaa6
MM
418static void NONRET
419usage(void)
e4842ff3
MM
420{
421 fprintf(stderr,
6add52f5 422"Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*\n"
1b99a704
MM
423"\n"
424"General options:\n"
6add52f5
MM
425"-f\t\tDon't complain if there's nothing to do\n"
426"-v\t\tBe verbose\n"
427"-D\t\tList changes, don't commit them\n"
203854cc 428"-r\t\tUse raw access without bus scan if possible\n"
a82ca638 429"--dumpregs\tDump all known register names and exit\n"
1b99a704
MM
430"\n"
431"PCI access options:\n"
727ce158 432GENERIC_HELP
1b99a704
MM
433"\n"
434"Setting commands:\n"
84c8d1bb 435"<device>:\t-s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]\n"
ace49a96 436"\t\t-d [<vendor>]:[<device>]\n"
6639fd17 437"<reg>:\t\t<base>[+<offset>][.(B|W|L)][@<number>]\n"
ace49a96
MM
438"<base>:\t\t<address>\n"
439"\t\t<named-register>\n"
440"\t\t[E]CAP_<capability-name>\n"
441"\t\t[E]CAP<capability-number>\n"
b7351143
MM
442"<values>:\t<value>[,<value>...]\n"
443"<value>:\t<hex>\n"
ace49a96 444"\t\t<hex>:<mask>\n");
fa8deaa6
MM
445 exit(0);
446}
447
448static void NONRET PCI_PRINTF(1,2)
449parse_err(const char *msg, ...)
450{
451 va_list args;
452 va_start(args, msg);
453 fprintf(stderr, "setpci: ");
454 vfprintf(stderr, msg, args);
455 fprintf(stderr, ".\nTry `setpci --help' for more information.\n");
e4842ff3
MM
456 exit(1);
457}
458
7b08ebab
MM
459static int
460parse_options(int argc, char **argv)
e4842ff3 461{
fa8deaa6 462 const char opts[] = GENERIC_OPTIONS;
7b08ebab 463 int i=1;
e4842ff3 464
fa8deaa6 465 if (argc == 2)
a82ca638 466 {
fa8deaa6
MM
467 if (!strcmp(argv[1], "--help"))
468 usage();
469 if (!strcmp(argv[1], "--version"))
1c7f2b08
MM
470 {
471 puts("setpci version " PCIUTILS_VERSION);
472 exit(0);
473 }
fa8deaa6 474 if (!strcmp(argv[1], "--dumpregs"))
1c7f2b08
MM
475 {
476 dump_registers();
477 exit(0);
478 }
a82ca638 479 }
727ce158 480
7b08ebab 481 while (i < argc && argv[i][0] == '-')
e4842ff3 482 {
b69fad0d 483 char *c = argv[i++] + 1;
e4842ff3 484 char *d = c;
727ce158 485 char *e;
e4842ff3
MM
486 while (*c)
487 switch (*c)
488 {
7b08ebab
MM
489 case 0:
490 break;
e4842ff3
MM
491 case 'v':
492 verbose++;
493 c++;
494 break;
495 case 'f':
496 force++;
497 c++;
498 break;
b2c9b373
MM
499 case 'D':
500 demo_mode++;
501 c++;
502 break;
203854cc
MM
503 case 'r':
504 allow_raw_access++;
505 c++;
506 break;
e4842ff3 507 default:
727ce158
MM
508 if (e = strchr(opts, *c))
509 {
510 char *arg;
511 c++;
512 if (e[1] == ':')
513 {
514 if (*c)
515 arg = c;
b69fad0d
MM
516 else if (i < argc)
517 arg = argv[i++];
727ce158 518 else
fa8deaa6 519 parse_err("Option -%c requires an argument", *e);
727ce158
MM
520 c = "";
521 }
522 else
523 arg = NULL;
524 if (!parse_generic_option(*e, pacc, arg))
fa8deaa6 525 parse_err("Unable to parse option -%c", *e);
727ce158
MM
526 }
527 else
528 {
529 if (c != d)
fa8deaa6 530 parse_err("Invalid or misplaced option -%c", *c);
b69fad0d 531 return i-1;
727ce158 532 }
e4842ff3 533 }
e4842ff3 534 }
e4842ff3 535
7b08ebab
MM
536 return i;
537}
e4842ff3 538
203854cc 539static int parse_filter(int argc, char **argv, int i, struct group *group)
b69fad0d
MM
540{
541 char *c = argv[i++];
542 char *d;
543
544 if (!c[1] || !strchr("sd", c[1]))
fa8deaa6 545 parse_err("Invalid option -%c", c[1]);
b69fad0d
MM
546 if (c[2])
547 d = (c[2] == '=') ? c+3 : c+2;
548 else if (i < argc)
549 d = argv[i++];
550 else
fa8deaa6 551 parse_err("Option -%c requires an argument", c[1]);
b69fad0d
MM
552 switch (c[1])
553 {
554 case 's':
203854cc 555 if (d = pci_filter_parse_slot(&group->filter, d))
fa8deaa6 556 parse_err("Unable to parse filter -s %s", d);
b69fad0d
MM
557 break;
558 case 'd':
203854cc 559 if (d = pci_filter_parse_id(&group->filter, d))
fa8deaa6 560 parse_err("Unable to parse filter -d %s", d);
b69fad0d
MM
561 break;
562 default:
fa8deaa6 563 parse_err("Unknown filter option -%c", c[1]);
b69fad0d
MM
564 }
565
566 return i;
567}
568
ace49a96
MM
569static const struct reg_name *parse_reg_name(char *name)
570{
571 const struct reg_name *r;
572
573 for (r = pci_reg_names; r->name; r++)
574 if (!strcasecmp(r->name, name))
575 return r;
576 return NULL;
577}
578
579static int parse_x32(char *c, char **stopp, unsigned int *resp)
580{
581 char *stop;
e2864327 582 unsigned long int l;
ace49a96
MM
583
584 if (!*c)
585 return -1;
586 errno = 0;
e2864327 587 l = strtoul(c, &stop, 16);
ace49a96
MM
588 if (errno)
589 return -1;
590 if ((l & ~0U) != l)
591 return -1;
592 *resp = l;
593 if (*stop)
594 {
595 if (stopp)
596 *stopp = stop;
597 return 0;
598 }
599 else
607fd241
MM
600 {
601 if (stopp)
602 *stopp = NULL;
603 return 1;
604 }
ace49a96
MM
605}
606
607static void parse_register(struct op *op, char *base)
608{
609 const struct reg_name *r;
27d4e0fb 610 unsigned int cap;
ace49a96 611
27d4e0fb 612 op->cap_type = op->cap_id = 0;
ace49a96 613 if (parse_x32(base, NULL, &op->addr) > 0)
27d4e0fb 614 return;
ace49a96
MM
615 else if (r = parse_reg_name(base))
616 {
27d4e0fb
MM
617 switch (r->cap & 0xff0000)
618 {
619 case 0x10000:
620 op->cap_type = PCI_CAP_NORMAL;
621 break;
622 case 0x20000:
623 op->cap_type = PCI_CAP_EXTENDED;
624 break;
625 }
626 op->cap_id = r->cap & 0xffff;
ace49a96 627 op->addr = r->offset;
94a53fc6
PR
628 op->hdr_type_mask = r->hdr_type_mask;
629 op->name = r->name;
ace49a96
MM
630 if (r->width && !op->width)
631 op->width = r->width;
632 return;
633 }
634 else if (!strncasecmp(base, "CAP", 3))
635 {
27d4e0fb 636 if (parse_x32(base+3, NULL, &cap) > 0 && cap < 0x100)
ace49a96 637 {
27d4e0fb
MM
638 op->cap_type = PCI_CAP_NORMAL;
639 op->cap_id = cap;
ace49a96
MM
640 op->addr = 0;
641 return;
642 }
643 }
644 else if (!strncasecmp(base, "ECAP", 4))
645 {
27d4e0fb 646 if (parse_x32(base+4, NULL, &cap) > 0 && cap < 0x1000)
ace49a96 647 {
27d4e0fb
MM
648 op->cap_type = PCI_CAP_EXTENDED;
649 op->cap_id = cap;
ace49a96
MM
650 op->addr = 0;
651 return;
652 }
653 }
fa8deaa6 654 parse_err("Unknown register \"%s\"", base);
ace49a96
MM
655}
656
203854cc 657static void parse_op(char *c, struct group *group)
b69fad0d 658{
6639fd17 659 char *base, *offset, *width, *value, *number;
ace49a96 660 char *e, *f;
b69fad0d
MM
661 int n, j;
662 struct op *op;
ace49a96
MM
663
664 /* Split the argument */
665 base = xstrdup(c);
666 if (value = strchr(base, '='))
667 *value++ = 0;
6639fd17
DS
668 if (number = strchr(base, '@'))
669 *number++ = 0;
ace49a96
MM
670 if (width = strchr(base, '.'))
671 *width++ = 0;
672 if (offset = strchr(base, '+'))
673 *offset++ = 0;
b69fad0d
MM
674
675 /* Look for setting of values and count how many */
b69fad0d 676 n = 0;
ace49a96 677 if (value)
b69fad0d 678 {
ace49a96 679 if (!*value)
fa8deaa6 680 parse_err("Missing value");
b69fad0d 681 n++;
ace49a96 682 for (e=value; *e; e++)
b69fad0d
MM
683 if (*e == ',')
684 n++;
685 }
686
687 /* Allocate the operation */
688 op = xmalloc(sizeof(struct op) + n*sizeof(struct value));
203854cc
MM
689 memset(op, 0, sizeof(struct op));
690 *group->last_op = op;
691 group->last_op = &op->next;
b69fad0d
MM
692 op->num_values = n;
693
ace49a96
MM
694 /* What is the width suffix? */
695 if (width)
b69fad0d 696 {
ace49a96 697 if (width[1])
fa8deaa6 698 parse_err("Invalid width \"%s\"", width);
ace49a96 699 switch (*width & 0xdf)
b69fad0d
MM
700 {
701 case 'B':
702 op->width = 1; break;
703 case 'W':
704 op->width = 2; break;
705 case 'L':
706 op->width = 4; break;
707 default:
fa8deaa6 708 parse_err("Invalid width \"%c\"", *width);
b69fad0d
MM
709 }
710 }
711 else
ace49a96
MM
712 op->width = 0;
713
6639fd17
DS
714 /* Check which n-th capability of the same id we want */
715 if (number)
716 {
717 unsigned int num;
718 if (parse_x32(number, NULL, &num) <= 0 || (int) num < 0)
719 parse_err("Invalid number \"%s\"", number);
720 op->number = num;
721
722 }
723 else
724 op->number = 0;
725
ace49a96
MM
726 /* Find the register */
727 parse_register(op, base);
728 if (!op->width)
fa8deaa6 729 parse_err("Missing width");
ace49a96
MM
730
731 /* Add offset */
732 if (offset)
b69fad0d 733 {
ace49a96
MM
734 unsigned int off;
735 if (parse_x32(offset, NULL, &off) <= 0 || off >= 0x1000)
fa8deaa6 736 parse_err("Invalid offset \"%s\"", offset);
ace49a96 737 op->addr += off;
b69fad0d 738 }
ace49a96
MM
739
740 /* Check range */
741 if (op->addr >= 0x1000 || op->addr + op->width*(n ? n : 1) > 0x1000)
fa8deaa6 742 parse_err("Register number %02x out of range", op->addr);
ace49a96 743 if (op->addr & (op->width - 1))
fa8deaa6 744 parse_err("Unaligned register address %02x", op->addr);
ace49a96
MM
745
746 /* Parse the values */
b69fad0d
MM
747 for (j=0; j<n; j++)
748 {
ace49a96
MM
749 unsigned int ll, lim;
750 e = strchr(value, ',');
b69fad0d
MM
751 if (e)
752 *e++ = 0;
f6476d65 753 if (parse_x32(value, &f, &ll) < 0 || f && *f != ':')
fa8deaa6 754 parse_err("Invalid value \"%s\"", value);
b69fad0d 755 lim = max_values[op->width];
fcca0ba5 756 if (ll > lim && ll < ~0U - lim)
fa8deaa6 757 parse_err("Value \"%s\" is out of range", value);
b69fad0d 758 op->values[j].value = ll;
f6476d65 759 if (f && *f == ':')
b69fad0d 760 {
ace49a96 761 if (parse_x32(f+1, NULL, &ll) <= 0)
fa8deaa6 762 parse_err("Invalid mask \"%s\"", f+1);
fcca0ba5 763 if (ll > lim && ll < ~0U - lim)
fa8deaa6 764 parse_err("Mask \"%s\" is out of range", f+1);
b69fad0d
MM
765 op->values[j].mask = ll;
766 op->values[j].value &= ll;
767 }
768 else
769 op->values[j].mask = ~0U;
ace49a96 770 value = e;
b69fad0d 771 }
203854cc
MM
772}
773
774static struct group *new_group(void)
775{
776 struct group *g = xmalloc(sizeof(*g));
ace49a96 777
203854cc
MM
778 memset(g, 0, sizeof(*g));
779 pci_filter_init(pacc, &g->filter);
780 g->last_op = &g->first_op;
781
782 *last_group = g;
783 last_group = &g->next;
784 return g;
b69fad0d
MM
785}
786
7b08ebab
MM
787static void parse_ops(int argc, char **argv, int i)
788{
203854cc 789 struct group *group = NULL;
7b08ebab
MM
790
791 while (i < argc)
e4842ff3 792 {
b69fad0d 793 char *c = argv[i++];
e4842ff3
MM
794
795 if (*c == '-')
796 {
203854cc
MM
797 if (!group || group->first_op)
798 group = new_group();
799 i = parse_filter(argc, argv, i-1, group);
e4842ff3 800 }
e4842ff3
MM
801 else
802 {
203854cc 803 if (!group)
fa8deaa6 804 parse_err("Filter specification expected");
203854cc 805 parse_op(c, group);
e4842ff3 806 }
e4842ff3 807 }
203854cc 808 if (!group)
fa8deaa6 809 parse_err("No operation specified");
7b08ebab
MM
810}
811
812int
813main(int argc, char **argv)
814{
815 int i;
816
817 pacc = pci_alloc();
818 pacc->error = die;
819 i = parse_options(argc, argv);
820
821 pci_init(pacc);
e4842ff3 822
7b08ebab 823 parse_ops(argc, argv, i);
203854cc
MM
824 scan_ops();
825
826 if (need_bus_scan)
827 pci_scan_bus(pacc);
828
829 execute();
e4842ff3
MM
830
831 return 0;
832}