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1 | /* Target-dependent code for Renesas M32R, for GDB. | |
2 | ||
3 | Copyright (C) 1996-2018 Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "frame-unwind.h" | |
23 | #include "frame-base.h" | |
24 | #include "symtab.h" | |
25 | #include "gdbtypes.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "gdbcore.h" | |
28 | #include "value.h" | |
29 | #include "inferior.h" | |
30 | #include "symfile.h" | |
31 | #include "objfiles.h" | |
32 | #include "osabi.h" | |
33 | #include "language.h" | |
34 | #include "arch-utils.h" | |
35 | #include "regcache.h" | |
36 | #include "trad-frame.h" | |
37 | #include "dis-asm.h" | |
38 | #include "objfiles.h" | |
39 | #include "m32r-tdep.h" | |
40 | #include <algorithm> | |
41 | ||
42 | /* The size of the argument registers (r0 - r3) in bytes. */ | |
43 | #define M32R_ARG_REGISTER_SIZE 4 | |
44 | ||
45 | /* Local functions */ | |
46 | ||
47 | static CORE_ADDR | |
48 | m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) | |
49 | { | |
50 | /* Align to the size of an instruction (so that they can safely be | |
51 | pushed onto the stack. */ | |
52 | return sp & ~3; | |
53 | } | |
54 | ||
55 | ||
56 | /* Breakpoints | |
57 | ||
58 | The little endian mode of M32R is unique. In most of architectures, | |
59 | two 16-bit instructions, A and B, are placed as the following: | |
60 | ||
61 | Big endian: | |
62 | A0 A1 B0 B1 | |
63 | ||
64 | Little endian: | |
65 | A1 A0 B1 B0 | |
66 | ||
67 | In M32R, they are placed like this: | |
68 | ||
69 | Big endian: | |
70 | A0 A1 B0 B1 | |
71 | ||
72 | Little endian: | |
73 | B1 B0 A1 A0 | |
74 | ||
75 | This is because M32R always fetches instructions in 32-bit. | |
76 | ||
77 | The following functions take care of this behavior. */ | |
78 | ||
79 | static int | |
80 | m32r_memory_insert_breakpoint (struct gdbarch *gdbarch, | |
81 | struct bp_target_info *bp_tgt) | |
82 | { | |
83 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; | |
84 | int val; | |
85 | gdb_byte buf[4]; | |
86 | gdb_byte contents_cache[4]; | |
87 | gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */ | |
88 | ||
89 | /* Save the memory contents. */ | |
90 | val = target_read_memory (addr & 0xfffffffc, contents_cache, 4); | |
91 | if (val != 0) | |
92 | return val; /* return error */ | |
93 | ||
94 | memcpy (bp_tgt->shadow_contents, contents_cache, 4); | |
95 | bp_tgt->shadow_len = 4; | |
96 | ||
97 | /* Determine appropriate breakpoint contents and size for this address. */ | |
98 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
99 | { | |
100 | if ((addr & 3) == 0) | |
101 | { | |
102 | buf[0] = bp_entry[0]; | |
103 | buf[1] = bp_entry[1]; | |
104 | buf[2] = contents_cache[2] & 0x7f; | |
105 | buf[3] = contents_cache[3]; | |
106 | } | |
107 | else | |
108 | { | |
109 | buf[0] = contents_cache[0]; | |
110 | buf[1] = contents_cache[1]; | |
111 | buf[2] = bp_entry[0]; | |
112 | buf[3] = bp_entry[1]; | |
113 | } | |
114 | } | |
115 | else /* little-endian */ | |
116 | { | |
117 | if ((addr & 3) == 0) | |
118 | { | |
119 | buf[0] = contents_cache[0]; | |
120 | buf[1] = contents_cache[1] & 0x7f; | |
121 | buf[2] = bp_entry[1]; | |
122 | buf[3] = bp_entry[0]; | |
123 | } | |
124 | else | |
125 | { | |
126 | buf[0] = bp_entry[1]; | |
127 | buf[1] = bp_entry[0]; | |
128 | buf[2] = contents_cache[2]; | |
129 | buf[3] = contents_cache[3]; | |
130 | } | |
131 | } | |
132 | ||
133 | /* Write the breakpoint. */ | |
134 | val = target_write_memory (addr & 0xfffffffc, buf, 4); | |
135 | return val; | |
136 | } | |
137 | ||
138 | static int | |
139 | m32r_memory_remove_breakpoint (struct gdbarch *gdbarch, | |
140 | struct bp_target_info *bp_tgt) | |
141 | { | |
142 | CORE_ADDR addr = bp_tgt->placed_address; | |
143 | int val; | |
144 | gdb_byte buf[4]; | |
145 | gdb_byte *contents_cache = bp_tgt->shadow_contents; | |
146 | ||
147 | buf[0] = contents_cache[0]; | |
148 | buf[1] = contents_cache[1]; | |
149 | buf[2] = contents_cache[2]; | |
150 | buf[3] = contents_cache[3]; | |
151 | ||
152 | /* Remove parallel bit. */ | |
153 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
154 | { | |
155 | if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0) | |
156 | buf[2] &= 0x7f; | |
157 | } | |
158 | else /* little-endian */ | |
159 | { | |
160 | if ((buf[3] & 0x80) == 0 && (buf[1] & 0x80) != 0) | |
161 | buf[1] &= 0x7f; | |
162 | } | |
163 | ||
164 | /* Write contents. */ | |
165 | val = target_write_raw_memory (addr & 0xfffffffc, buf, 4); | |
166 | return val; | |
167 | } | |
168 | ||
169 | /* Implement the breakpoint_kind_from_pc gdbarch method. */ | |
170 | ||
171 | static int | |
172 | m32r_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) | |
173 | { | |
174 | if ((*pcptr & 3) == 0) | |
175 | return 4; | |
176 | else | |
177 | return 2; | |
178 | } | |
179 | ||
180 | /* Implement the sw_breakpoint_from_kind gdbarch method. */ | |
181 | ||
182 | static const gdb_byte * | |
183 | m32r_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size) | |
184 | { | |
185 | static gdb_byte be_bp_entry[] = { | |
186 | 0x10, 0xf1, 0x70, 0x00 | |
187 | }; /* dpt -> nop */ | |
188 | static gdb_byte le_bp_entry[] = { | |
189 | 0x00, 0x70, 0xf1, 0x10 | |
190 | }; /* dpt -> nop */ | |
191 | ||
192 | *size = kind; | |
193 | ||
194 | /* Determine appropriate breakpoint. */ | |
195 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
196 | return be_bp_entry; | |
197 | else | |
198 | { | |
199 | if (kind == 4) | |
200 | return le_bp_entry; | |
201 | else | |
202 | return le_bp_entry + 2; | |
203 | } | |
204 | } | |
205 | ||
206 | static const char *m32r_register_names[] = { | |
207 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
208 | "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", | |
209 | "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", | |
210 | "evb" | |
211 | }; | |
212 | ||
213 | static const char * | |
214 | m32r_register_name (struct gdbarch *gdbarch, int reg_nr) | |
215 | { | |
216 | if (reg_nr < 0) | |
217 | return NULL; | |
218 | if (reg_nr >= M32R_NUM_REGS) | |
219 | return NULL; | |
220 | return m32r_register_names[reg_nr]; | |
221 | } | |
222 | ||
223 | ||
224 | /* Return the GDB type object for the "standard" data type | |
225 | of data in register N. */ | |
226 | ||
227 | static struct type * | |
228 | m32r_register_type (struct gdbarch *gdbarch, int reg_nr) | |
229 | { | |
230 | if (reg_nr == M32R_PC_REGNUM) | |
231 | return builtin_type (gdbarch)->builtin_func_ptr; | |
232 | else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM) | |
233 | return builtin_type (gdbarch)->builtin_data_ptr; | |
234 | else | |
235 | return builtin_type (gdbarch)->builtin_int32; | |
236 | } | |
237 | ||
238 | ||
239 | /* Write into appropriate registers a function return value | |
240 | of type TYPE, given in virtual format. | |
241 | ||
242 | Things always get returned in RET1_REGNUM, RET2_REGNUM. */ | |
243 | ||
244 | static void | |
245 | m32r_store_return_value (struct type *type, struct regcache *regcache, | |
246 | const gdb_byte *valbuf) | |
247 | { | |
248 | struct gdbarch *gdbarch = regcache->arch (); | |
249 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
250 | CORE_ADDR regval; | |
251 | int len = TYPE_LENGTH (type); | |
252 | ||
253 | regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order); | |
254 | regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval); | |
255 | ||
256 | if (len > 4) | |
257 | { | |
258 | regval = extract_unsigned_integer (valbuf + 4, | |
259 | len - 4, byte_order); | |
260 | regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval); | |
261 | } | |
262 | } | |
263 | ||
264 | /* This is required by skip_prologue. The results of decoding a prologue | |
265 | should be cached because this thrashing is getting nuts. */ | |
266 | ||
267 | static int | |
268 | decode_prologue (struct gdbarch *gdbarch, | |
269 | CORE_ADDR start_pc, CORE_ADDR scan_limit, | |
270 | CORE_ADDR *pl_endptr, unsigned long *framelength) | |
271 | { | |
272 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
273 | unsigned long framesize; | |
274 | int insn; | |
275 | int op1; | |
276 | CORE_ADDR after_prologue = 0; | |
277 | CORE_ADDR after_push = 0; | |
278 | CORE_ADDR after_stack_adjust = 0; | |
279 | CORE_ADDR current_pc; | |
280 | LONGEST return_value; | |
281 | ||
282 | framesize = 0; | |
283 | after_prologue = 0; | |
284 | ||
285 | for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2) | |
286 | { | |
287 | /* Check if current pc's location is readable. */ | |
288 | if (!safe_read_memory_integer (current_pc, 2, byte_order, &return_value)) | |
289 | return -1; | |
290 | ||
291 | insn = read_memory_unsigned_integer (current_pc, 2, byte_order); | |
292 | ||
293 | if (insn == 0x0000) | |
294 | break; | |
295 | ||
296 | /* If this is a 32 bit instruction, we dont want to examine its | |
297 | immediate data as though it were an instruction. */ | |
298 | if (current_pc & 0x02) | |
299 | { | |
300 | /* Decode this instruction further. */ | |
301 | insn &= 0x7fff; | |
302 | } | |
303 | else | |
304 | { | |
305 | if (insn & 0x8000) | |
306 | { | |
307 | if (current_pc == scan_limit) | |
308 | scan_limit += 2; /* extend the search */ | |
309 | ||
310 | current_pc += 2; /* skip the immediate data */ | |
311 | ||
312 | /* Check if current pc's location is readable. */ | |
313 | if (!safe_read_memory_integer (current_pc, 2, byte_order, | |
314 | &return_value)) | |
315 | return -1; | |
316 | ||
317 | if (insn == 0x8faf) /* add3 sp, sp, xxxx */ | |
318 | /* add 16 bit sign-extended offset */ | |
319 | { | |
320 | framesize += | |
321 | -((short) read_memory_unsigned_integer (current_pc, | |
322 | 2, byte_order)); | |
323 | } | |
324 | else | |
325 | { | |
326 | if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */ | |
327 | && safe_read_memory_integer (current_pc + 2, | |
328 | 2, byte_order, | |
329 | &return_value) | |
330 | && read_memory_unsigned_integer (current_pc + 2, | |
331 | 2, byte_order) | |
332 | == 0x0f24) | |
333 | { | |
334 | /* Subtract 24 bit sign-extended negative-offset. */ | |
335 | insn = read_memory_unsigned_integer (current_pc - 2, | |
336 | 4, byte_order); | |
337 | if (insn & 0x00800000) /* sign extend */ | |
338 | insn |= 0xff000000; /* negative */ | |
339 | else | |
340 | insn &= 0x00ffffff; /* positive */ | |
341 | framesize += insn; | |
342 | } | |
343 | } | |
344 | after_push = current_pc + 2; | |
345 | continue; | |
346 | } | |
347 | } | |
348 | op1 = insn & 0xf000; /* Isolate just the first nibble. */ | |
349 | ||
350 | if ((insn & 0xf0ff) == 0x207f) | |
351 | { /* st reg, @-sp */ | |
352 | framesize += 4; | |
353 | after_prologue = 0; | |
354 | continue; | |
355 | } | |
356 | if ((insn >> 8) == 0x4f) /* addi sp, xx */ | |
357 | /* Add 8 bit sign-extended offset. */ | |
358 | { | |
359 | int stack_adjust = (signed char) (insn & 0xff); | |
360 | ||
361 | /* there are probably two of these stack adjustments: | |
362 | 1) A negative one in the prologue, and | |
363 | 2) A positive one in the epilogue. | |
364 | We are only interested in the first one. */ | |
365 | ||
366 | if (stack_adjust < 0) | |
367 | { | |
368 | framesize -= stack_adjust; | |
369 | after_prologue = 0; | |
370 | /* A frameless function may have no "mv fp, sp". | |
371 | In that case, this is the end of the prologue. */ | |
372 | after_stack_adjust = current_pc + 2; | |
373 | } | |
374 | continue; | |
375 | } | |
376 | if (insn == 0x1d8f) | |
377 | { /* mv fp, sp */ | |
378 | after_prologue = current_pc + 2; | |
379 | break; /* end of stack adjustments */ | |
380 | } | |
381 | ||
382 | /* Nop looks like a branch, continue explicitly. */ | |
383 | if (insn == 0x7000) | |
384 | { | |
385 | after_prologue = current_pc + 2; | |
386 | continue; /* nop occurs between pushes. */ | |
387 | } | |
388 | /* End of prolog if any of these are trap instructions. */ | |
389 | if ((insn & 0xfff0) == 0x10f0) | |
390 | { | |
391 | after_prologue = current_pc; | |
392 | break; | |
393 | } | |
394 | /* End of prolog if any of these are branch instructions. */ | |
395 | if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000)) | |
396 | { | |
397 | after_prologue = current_pc; | |
398 | continue; | |
399 | } | |
400 | /* Some of the branch instructions are mixed with other types. */ | |
401 | if (op1 == 0x1000) | |
402 | { | |
403 | int subop = insn & 0x0ff0; | |
404 | if ((subop == 0x0ec0) || (subop == 0x0fc0)) | |
405 | { | |
406 | after_prologue = current_pc; | |
407 | continue; /* jmp , jl */ | |
408 | } | |
409 | } | |
410 | } | |
411 | ||
412 | if (framelength) | |
413 | *framelength = framesize; | |
414 | ||
415 | if (current_pc >= scan_limit) | |
416 | { | |
417 | if (pl_endptr) | |
418 | { | |
419 | if (after_stack_adjust != 0) | |
420 | /* We did not find a "mv fp,sp", but we DID find | |
421 | a stack_adjust. Is it safe to use that as the | |
422 | end of the prologue? I just don't know. */ | |
423 | { | |
424 | *pl_endptr = after_stack_adjust; | |
425 | } | |
426 | else if (after_push != 0) | |
427 | /* We did not find a "mv fp,sp", but we DID find | |
428 | a push. Is it safe to use that as the | |
429 | end of the prologue? I just don't know. */ | |
430 | { | |
431 | *pl_endptr = after_push; | |
432 | } | |
433 | else | |
434 | /* We reached the end of the loop without finding the end | |
435 | of the prologue. No way to win -- we should report | |
436 | failure. The way we do that is to return the original | |
437 | start_pc. GDB will set a breakpoint at the start of | |
438 | the function (etc.) */ | |
439 | *pl_endptr = start_pc; | |
440 | } | |
441 | return 0; | |
442 | } | |
443 | ||
444 | if (after_prologue == 0) | |
445 | after_prologue = current_pc; | |
446 | ||
447 | if (pl_endptr) | |
448 | *pl_endptr = after_prologue; | |
449 | ||
450 | return 0; | |
451 | } /* decode_prologue */ | |
452 | ||
453 | /* Function: skip_prologue | |
454 | Find end of function prologue. */ | |
455 | ||
456 | #define DEFAULT_SEARCH_LIMIT 128 | |
457 | ||
458 | static CORE_ADDR | |
459 | m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
460 | { | |
461 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
462 | CORE_ADDR func_addr, func_end; | |
463 | struct symtab_and_line sal; | |
464 | LONGEST return_value; | |
465 | ||
466 | /* See what the symbol table says. */ | |
467 | ||
468 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
469 | { | |
470 | sal = find_pc_line (func_addr, 0); | |
471 | ||
472 | if (sal.line != 0 && sal.end <= func_end) | |
473 | { | |
474 | func_end = sal.end; | |
475 | } | |
476 | else | |
477 | /* Either there's no line info, or the line after the prologue is after | |
478 | the end of the function. In this case, there probably isn't a | |
479 | prologue. */ | |
480 | { | |
481 | func_end = std::min (func_end, func_addr + DEFAULT_SEARCH_LIMIT); | |
482 | } | |
483 | } | |
484 | else | |
485 | func_end = pc + DEFAULT_SEARCH_LIMIT; | |
486 | ||
487 | /* If pc's location is not readable, just quit. */ | |
488 | if (!safe_read_memory_integer (pc, 4, byte_order, &return_value)) | |
489 | return pc; | |
490 | ||
491 | /* Find the end of prologue. */ | |
492 | if (decode_prologue (gdbarch, pc, func_end, &sal.end, NULL) < 0) | |
493 | return pc; | |
494 | ||
495 | return sal.end; | |
496 | } | |
497 | ||
498 | struct m32r_unwind_cache | |
499 | { | |
500 | /* The previous frame's inner most stack address. Used as this | |
501 | frame ID's stack_addr. */ | |
502 | CORE_ADDR prev_sp; | |
503 | /* The frame's base, optionally used by the high-level debug info. */ | |
504 | CORE_ADDR base; | |
505 | int size; | |
506 | /* How far the SP and r13 (FP) have been offset from the start of | |
507 | the stack frame (as defined by the previous frame's stack | |
508 | pointer). */ | |
509 | LONGEST sp_offset; | |
510 | LONGEST r13_offset; | |
511 | int uses_frame; | |
512 | /* Table indicating the location of each and every register. */ | |
513 | struct trad_frame_saved_reg *saved_regs; | |
514 | }; | |
515 | ||
516 | /* Put here the code to store, into fi->saved_regs, the addresses of | |
517 | the saved registers of frame described by FRAME_INFO. This | |
518 | includes special registers such as pc and fp saved in special ways | |
519 | in the stack frame. sp is even more special: the address we return | |
520 | for it IS the sp for the next frame. */ | |
521 | ||
522 | static struct m32r_unwind_cache * | |
523 | m32r_frame_unwind_cache (struct frame_info *this_frame, | |
524 | void **this_prologue_cache) | |
525 | { | |
526 | CORE_ADDR pc, scan_limit; | |
527 | ULONGEST prev_sp; | |
528 | ULONGEST this_base; | |
529 | unsigned long op; | |
530 | int i; | |
531 | struct m32r_unwind_cache *info; | |
532 | ||
533 | ||
534 | if ((*this_prologue_cache)) | |
535 | return (struct m32r_unwind_cache *) (*this_prologue_cache); | |
536 | ||
537 | info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache); | |
538 | (*this_prologue_cache) = info; | |
539 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); | |
540 | ||
541 | info->size = 0; | |
542 | info->sp_offset = 0; | |
543 | info->uses_frame = 0; | |
544 | ||
545 | scan_limit = get_frame_pc (this_frame); | |
546 | for (pc = get_frame_func (this_frame); | |
547 | pc > 0 && pc < scan_limit; pc += 2) | |
548 | { | |
549 | if ((pc & 2) == 0) | |
550 | { | |
551 | op = get_frame_memory_unsigned (this_frame, pc, 4); | |
552 | if ((op & 0x80000000) == 0x80000000) | |
553 | { | |
554 | /* 32-bit instruction */ | |
555 | if ((op & 0xffff0000) == 0x8faf0000) | |
556 | { | |
557 | /* add3 sp,sp,xxxx */ | |
558 | short n = op & 0xffff; | |
559 | info->sp_offset += n; | |
560 | } | |
561 | else if (((op >> 8) == 0xe4) | |
562 | && get_frame_memory_unsigned (this_frame, pc + 2, | |
563 | 2) == 0x0f24) | |
564 | { | |
565 | /* ld24 r4, xxxxxx; sub sp, r4 */ | |
566 | unsigned long n = op & 0xffffff; | |
567 | info->sp_offset += n; | |
568 | pc += 2; /* skip sub instruction */ | |
569 | } | |
570 | ||
571 | if (pc == scan_limit) | |
572 | scan_limit += 2; /* extend the search */ | |
573 | pc += 2; /* skip the immediate data */ | |
574 | continue; | |
575 | } | |
576 | } | |
577 | ||
578 | /* 16-bit instructions */ | |
579 | op = get_frame_memory_unsigned (this_frame, pc, 2) & 0x7fff; | |
580 | if ((op & 0xf0ff) == 0x207f) | |
581 | { | |
582 | /* st rn, @-sp */ | |
583 | int regno = ((op >> 8) & 0xf); | |
584 | info->sp_offset -= 4; | |
585 | info->saved_regs[regno].addr = info->sp_offset; | |
586 | } | |
587 | else if ((op & 0xff00) == 0x4f00) | |
588 | { | |
589 | /* addi sp, xx */ | |
590 | int n = (signed char) (op & 0xff); | |
591 | info->sp_offset += n; | |
592 | } | |
593 | else if (op == 0x1d8f) | |
594 | { | |
595 | /* mv fp, sp */ | |
596 | info->uses_frame = 1; | |
597 | info->r13_offset = info->sp_offset; | |
598 | break; /* end of stack adjustments */ | |
599 | } | |
600 | else if ((op & 0xfff0) == 0x10f0) | |
601 | { | |
602 | /* End of prologue if this is a trap instruction. */ | |
603 | break; /* End of stack adjustments. */ | |
604 | } | |
605 | } | |
606 | ||
607 | info->size = -info->sp_offset; | |
608 | ||
609 | /* Compute the previous frame's stack pointer (which is also the | |
610 | frame's ID's stack address), and this frame's base pointer. */ | |
611 | if (info->uses_frame) | |
612 | { | |
613 | /* The SP was moved to the FP. This indicates that a new frame | |
614 | was created. Get THIS frame's FP value by unwinding it from | |
615 | the next frame. */ | |
616 | this_base = get_frame_register_unsigned (this_frame, M32R_FP_REGNUM); | |
617 | /* The FP points at the last saved register. Adjust the FP back | |
618 | to before the first saved register giving the SP. */ | |
619 | prev_sp = this_base + info->size; | |
620 | } | |
621 | else | |
622 | { | |
623 | /* Assume that the FP is this frame's SP but with that pushed | |
624 | stack space added back. */ | |
625 | this_base = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM); | |
626 | prev_sp = this_base + info->size; | |
627 | } | |
628 | ||
629 | /* Convert that SP/BASE into real addresses. */ | |
630 | info->prev_sp = prev_sp; | |
631 | info->base = this_base; | |
632 | ||
633 | /* Adjust all the saved registers so that they contain addresses and | |
634 | not offsets. */ | |
635 | for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++) | |
636 | if (trad_frame_addr_p (info->saved_regs, i)) | |
637 | info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr); | |
638 | ||
639 | /* The call instruction moves the caller's PC in the callee's LR. | |
640 | Since this is an unwind, do the reverse. Copy the location of LR | |
641 | into PC (the address / regnum) so that a request for PC will be | |
642 | converted into a request for the LR. */ | |
643 | info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM]; | |
644 | ||
645 | /* The previous frame's SP needed to be computed. Save the computed | |
646 | value. */ | |
647 | trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp); | |
648 | ||
649 | return info; | |
650 | } | |
651 | ||
652 | static CORE_ADDR | |
653 | m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
654 | { | |
655 | return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM); | |
656 | } | |
657 | ||
658 | ||
659 | static CORE_ADDR | |
660 | m32r_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
661 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
662 | struct value **args, CORE_ADDR sp, int struct_return, | |
663 | CORE_ADDR struct_addr) | |
664 | { | |
665 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
666 | int stack_offset, stack_alloc; | |
667 | int argreg = ARG1_REGNUM; | |
668 | int argnum; | |
669 | struct type *type; | |
670 | enum type_code typecode; | |
671 | CORE_ADDR regval; | |
672 | gdb_byte *val; | |
673 | gdb_byte valbuf[M32R_ARG_REGISTER_SIZE]; | |
674 | int len; | |
675 | ||
676 | /* First force sp to a 4-byte alignment. */ | |
677 | sp = sp & ~3; | |
678 | ||
679 | /* Set the return address. For the m32r, the return breakpoint is | |
680 | always at BP_ADDR. */ | |
681 | regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr); | |
682 | ||
683 | /* If STRUCT_RETURN is true, then the struct return address (in | |
684 | STRUCT_ADDR) will consume the first argument-passing register. | |
685 | Both adjust the register count and store that value. */ | |
686 | if (struct_return) | |
687 | { | |
688 | regcache_cooked_write_unsigned (regcache, argreg, struct_addr); | |
689 | argreg++; | |
690 | } | |
691 | ||
692 | /* Now make sure there's space on the stack. */ | |
693 | for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++) | |
694 | stack_alloc += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3); | |
695 | sp -= stack_alloc; /* Make room on stack for args. */ | |
696 | ||
697 | for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++) | |
698 | { | |
699 | type = value_type (args[argnum]); | |
700 | typecode = TYPE_CODE (type); | |
701 | len = TYPE_LENGTH (type); | |
702 | ||
703 | memset (valbuf, 0, sizeof (valbuf)); | |
704 | ||
705 | /* Passes structures that do not fit in 2 registers by reference. */ | |
706 | if (len > 8 | |
707 | && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) | |
708 | { | |
709 | store_unsigned_integer (valbuf, 4, byte_order, | |
710 | value_address (args[argnum])); | |
711 | typecode = TYPE_CODE_PTR; | |
712 | len = 4; | |
713 | val = valbuf; | |
714 | } | |
715 | else if (len < 4) | |
716 | { | |
717 | /* Value gets right-justified in the register or stack word. */ | |
718 | memcpy (valbuf + (register_size (gdbarch, argreg) - len), | |
719 | (gdb_byte *) value_contents (args[argnum]), len); | |
720 | val = valbuf; | |
721 | } | |
722 | else | |
723 | val = (gdb_byte *) value_contents (args[argnum]); | |
724 | ||
725 | while (len > 0) | |
726 | { | |
727 | if (argreg > ARGN_REGNUM) | |
728 | { | |
729 | /* Must go on the stack. */ | |
730 | write_memory (sp + stack_offset, val, 4); | |
731 | stack_offset += 4; | |
732 | } | |
733 | else if (argreg <= ARGN_REGNUM) | |
734 | { | |
735 | /* There's room in a register. */ | |
736 | regval = | |
737 | extract_unsigned_integer (val, | |
738 | register_size (gdbarch, argreg), | |
739 | byte_order); | |
740 | regcache_cooked_write_unsigned (regcache, argreg++, regval); | |
741 | } | |
742 | ||
743 | /* Store the value 4 bytes at a time. This means that things | |
744 | larger than 4 bytes may go partly in registers and partly | |
745 | on the stack. */ | |
746 | len -= register_size (gdbarch, argreg); | |
747 | val += register_size (gdbarch, argreg); | |
748 | } | |
749 | } | |
750 | ||
751 | /* Finally, update the SP register. */ | |
752 | regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp); | |
753 | ||
754 | return sp; | |
755 | } | |
756 | ||
757 | ||
758 | /* Given a return value in `regbuf' with a type `valtype', | |
759 | extract and copy its value into `valbuf'. */ | |
760 | ||
761 | static void | |
762 | m32r_extract_return_value (struct type *type, struct regcache *regcache, | |
763 | gdb_byte *dst) | |
764 | { | |
765 | struct gdbarch *gdbarch = regcache->arch (); | |
766 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
767 | int len = TYPE_LENGTH (type); | |
768 | ULONGEST tmp; | |
769 | ||
770 | /* By using store_unsigned_integer we avoid having to do | |
771 | anything special for small big-endian values. */ | |
772 | regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp); | |
773 | store_unsigned_integer (dst, (len > 4 ? len - 4 : len), byte_order, tmp); | |
774 | ||
775 | /* Ignore return values more than 8 bytes in size because the m32r | |
776 | returns anything more than 8 bytes in the stack. */ | |
777 | if (len > 4) | |
778 | { | |
779 | regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp); | |
780 | store_unsigned_integer (dst + len - 4, 4, byte_order, tmp); | |
781 | } | |
782 | } | |
783 | ||
784 | static enum return_value_convention | |
785 | m32r_return_value (struct gdbarch *gdbarch, struct value *function, | |
786 | struct type *valtype, struct regcache *regcache, | |
787 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
788 | { | |
789 | if (TYPE_LENGTH (valtype) > 8) | |
790 | return RETURN_VALUE_STRUCT_CONVENTION; | |
791 | else | |
792 | { | |
793 | if (readbuf != NULL) | |
794 | m32r_extract_return_value (valtype, regcache, readbuf); | |
795 | if (writebuf != NULL) | |
796 | m32r_store_return_value (valtype, regcache, writebuf); | |
797 | return RETURN_VALUE_REGISTER_CONVENTION; | |
798 | } | |
799 | } | |
800 | ||
801 | ||
802 | ||
803 | static CORE_ADDR | |
804 | m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
805 | { | |
806 | return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM); | |
807 | } | |
808 | ||
809 | /* Given a GDB frame, determine the address of the calling function's | |
810 | frame. This will be used to create a new GDB frame struct. */ | |
811 | ||
812 | static void | |
813 | m32r_frame_this_id (struct frame_info *this_frame, | |
814 | void **this_prologue_cache, struct frame_id *this_id) | |
815 | { | |
816 | struct m32r_unwind_cache *info | |
817 | = m32r_frame_unwind_cache (this_frame, this_prologue_cache); | |
818 | CORE_ADDR base; | |
819 | CORE_ADDR func; | |
820 | struct bound_minimal_symbol msym_stack; | |
821 | struct frame_id id; | |
822 | ||
823 | /* The FUNC is easy. */ | |
824 | func = get_frame_func (this_frame); | |
825 | ||
826 | /* Check if the stack is empty. */ | |
827 | msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL); | |
828 | if (msym_stack.minsym && info->base == BMSYMBOL_VALUE_ADDRESS (msym_stack)) | |
829 | return; | |
830 | ||
831 | /* Hopefully the prologue analysis either correctly determined the | |
832 | frame's base (which is the SP from the previous frame), or set | |
833 | that base to "NULL". */ | |
834 | base = info->prev_sp; | |
835 | if (base == 0) | |
836 | return; | |
837 | ||
838 | id = frame_id_build (base, func); | |
839 | (*this_id) = id; | |
840 | } | |
841 | ||
842 | static struct value * | |
843 | m32r_frame_prev_register (struct frame_info *this_frame, | |
844 | void **this_prologue_cache, int regnum) | |
845 | { | |
846 | struct m32r_unwind_cache *info | |
847 | = m32r_frame_unwind_cache (this_frame, this_prologue_cache); | |
848 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
849 | } | |
850 | ||
851 | static const struct frame_unwind m32r_frame_unwind = { | |
852 | NORMAL_FRAME, | |
853 | default_frame_unwind_stop_reason, | |
854 | m32r_frame_this_id, | |
855 | m32r_frame_prev_register, | |
856 | NULL, | |
857 | default_frame_sniffer | |
858 | }; | |
859 | ||
860 | static CORE_ADDR | |
861 | m32r_frame_base_address (struct frame_info *this_frame, void **this_cache) | |
862 | { | |
863 | struct m32r_unwind_cache *info | |
864 | = m32r_frame_unwind_cache (this_frame, this_cache); | |
865 | return info->base; | |
866 | } | |
867 | ||
868 | static const struct frame_base m32r_frame_base = { | |
869 | &m32r_frame_unwind, | |
870 | m32r_frame_base_address, | |
871 | m32r_frame_base_address, | |
872 | m32r_frame_base_address | |
873 | }; | |
874 | ||
875 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy | |
876 | frame. The frame ID's base needs to match the TOS value saved by | |
877 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ | |
878 | ||
879 | static struct frame_id | |
880 | m32r_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
881 | { | |
882 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM); | |
883 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
884 | } | |
885 | ||
886 | ||
887 | static gdbarch_init_ftype m32r_gdbarch_init; | |
888 | ||
889 | static struct gdbarch * | |
890 | m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
891 | { | |
892 | struct gdbarch *gdbarch; | |
893 | struct gdbarch_tdep *tdep; | |
894 | ||
895 | /* If there is already a candidate, use it. */ | |
896 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
897 | if (arches != NULL) | |
898 | return arches->gdbarch; | |
899 | ||
900 | /* Allocate space for the new architecture. */ | |
901 | tdep = XCNEW (struct gdbarch_tdep); | |
902 | gdbarch = gdbarch_alloc (&info, tdep); | |
903 | ||
904 | set_gdbarch_wchar_bit (gdbarch, 16); | |
905 | set_gdbarch_wchar_signed (gdbarch, 0); | |
906 | ||
907 | set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp); | |
908 | ||
909 | set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS); | |
910 | set_gdbarch_pc_regnum (gdbarch, M32R_PC_REGNUM); | |
911 | set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM); | |
912 | set_gdbarch_register_name (gdbarch, m32r_register_name); | |
913 | set_gdbarch_register_type (gdbarch, m32r_register_type); | |
914 | ||
915 | set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call); | |
916 | set_gdbarch_return_value (gdbarch, m32r_return_value); | |
917 | ||
918 | set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue); | |
919 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
920 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, m32r_breakpoint_kind_from_pc); | |
921 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, m32r_sw_breakpoint_from_kind); | |
922 | set_gdbarch_memory_insert_breakpoint (gdbarch, | |
923 | m32r_memory_insert_breakpoint); | |
924 | set_gdbarch_memory_remove_breakpoint (gdbarch, | |
925 | m32r_memory_remove_breakpoint); | |
926 | ||
927 | set_gdbarch_frame_align (gdbarch, m32r_frame_align); | |
928 | ||
929 | frame_base_set_default (gdbarch, &m32r_frame_base); | |
930 | ||
931 | /* Methods for saving / extracting a dummy frame's ID. The ID's | |
932 | stack address must match the SP value returned by | |
933 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ | |
934 | set_gdbarch_dummy_id (gdbarch, m32r_dummy_id); | |
935 | ||
936 | /* Return the unwound PC value. */ | |
937 | set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc); | |
938 | ||
939 | /* Hook in ABI-specific overrides, if they have been registered. */ | |
940 | gdbarch_init_osabi (info, gdbarch); | |
941 | ||
942 | /* Hook in the default unwinders. */ | |
943 | frame_unwind_append_unwinder (gdbarch, &m32r_frame_unwind); | |
944 | ||
945 | /* Support simple overlay manager. */ | |
946 | set_gdbarch_overlay_update (gdbarch, simple_overlay_update); | |
947 | ||
948 | return gdbarch; | |
949 | } | |
950 | ||
951 | void | |
952 | _initialize_m32r_tdep (void) | |
953 | { | |
954 | register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init); | |
955 | } |