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x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns
[thirdparty/binutils-gdb.git] / opcodes / i386-dis.c
2022-10-24  Jan Beulichx86: emit {evex} prefix when disassembling ambiguous...
2022-10-21  Cui,LiliSupport Intel AMX-FP16
2022-10-17  Jan Beulichx86: fold AVX512-VNNI disassembler entries with AVX...
2022-09-12  Jan Beulichx86: avoid i386_dis_printf()'s staging area for a fair...
2022-08-16  H.J. Lui386: Add MAX_OPERAND_BUFFER_SIZE
2022-08-01  Alan ModraGet rid of fprintf_vma and sprintf_vma
2022-06-15  Jan Beulichx86: drop print_operand_value()'s "hex" parameter
2022-06-13  Jan Beulichx86: fix incorrect indirection
2022-06-13  Jan Beulichx86: replace global scratch buffer
2022-06-13  Jan Beulichx86: avoid string copy when swapping Vex.W controlled...
2022-06-13  Jan Beulichx86: shrink prefix related disassembler state fields
2022-06-13  Jan Beulichx86: properly initialize struct instr_info instance(s)
2022-06-08  Andrew Burgesslibopcodes: extend the styling within the i386 disassembler
2022-05-27  Andrew Burgessopcodes/i386: remove trailing whitespace from insns...
2022-05-27  Jan Beulichx86/Intel: adjust representation of embedded rounding...
2022-05-27  Jan Beulichx86/Intel: adjust representation of embedded broadcast
2022-05-18  Jan Beulichx86: shrink op_riprel
2022-05-07  Alan ModraFix multiple ubsan warnings in i386-dis.c
2022-04-19  Jan Beulichx86: correct and simplify NOP disassembly
2022-04-04  Andrew Burgessopcodes/i386: partially implement disassembler style...
2022-03-24  Jan Beulichx86: drop L1OM special case from disassembler
2022-02-15  H.J. Lux86: Add has_sib to struct instr_info
2022-01-17  Jan Beulichx86: adjust struct instr_info field types
2022-01-17  Jan Beulichx86: drop index16 field
2022-01-17  Jan Beulichx86: drop most Intel syntax register name arrays
2022-01-17  Jan Beulichx86: fold variables in memory operand index handling
2022-01-17  Jan Beulichx86: constify disassembler static data
2022-01-14  Jan Beulichx86: drop ymmxmm_mode
2022-01-14  Jan Beulichx86: share yet more VEX table entries with EVEX decoding
2022-01-14  Jan Beulichx86: record further wrong uses of EVEX.b
2022-01-14  Jan Beulichx86: reduce AVX512 FP set of insns decoded through...
2022-01-14  Jan Beulichx86: reduce AVX512-FP16 set of insns decoded through...
2022-01-05  Vladimir Mezentsevopcodes: Make i386-dis.c thread-safe
2022-01-02  Alan ModraUpdate year range in copyright notice of binutils files
2021-12-18  Vladimir Mezentsevx86: Terminate mnemonicendp in swap_operand()
2021-09-28  Cui,Lilix86: Print {bad} on invalid broadcast in OP_E_memory
2021-08-19  H.J. Lux86: Put back 3 aborts in OP_E_memory
2021-08-19  H.J. Lux86: Avoid abort on invalid broadcast
2021-08-05  Cui,Lili[PATCH 1/2] Enable Intel AVX512_FP16 instructions
2021-07-23  Jan Beulichx86: express unduly set rounding control bits in disass...
2021-07-22  Jan Beulichx86: drop dq{b,d}_mode
2021-07-22  Jan Beulichx86: drop vex_scalar_w_dq_mode
2021-07-22  Jan Beulichx86: drop xmm_m{b,w,d,q}_mode
2021-07-22  Jan Beulichx86: fold duplicate vector register printing code
2021-07-22  Jan Beulichx86: drop vex_mode and vex_scalar_mode
2021-07-22  Jan Beulichx86: correct EVEX.V' handling outside of 64-bit mode
2021-07-22  Jan Beulichx86: fold duplicate code in MOVSXD_Fixup()
2021-07-22  Jan Beulichx86: fold duplicate register printing code
2021-07-22  Jan Beulichx86-64: properly bounds-check %bnd<N> in OP_G()
2021-07-22  Jan Beulichx86-64: generalize OP_G()'s EVEX.R' handling
2021-07-22  Jan Beulichx86: correct VCVT{,U}SI2SD rounding mode handling
2021-07-22  Jan Beulichx86: drop OP_Mask()
2021-07-14  H.J. Lux86: Add int1 as one byte opcode 0xf1
2021-03-31  Alan ModraUse bool in opcodes
2021-03-25  Jan Beulichx86: flag bad S/G insn operand combinations
2021-03-25  Jan Beulichx86: flag as bad AVX512 insns with EVEX.z set but EVEX...
2021-03-22  Martin LiskaAdd startswith function and use it instead of CONST_STRNEQ.
2021-03-12  Alan ModraRe: x86: correct decoding of nop/reserved space (0f18...
2021-03-11  Jan Beulichx86: re-order logic in OP_XMM()
2021-03-11  Jan Beulichx86: drop a few redundant EVEX-related checks
2021-03-11  Jan Beulichx86: remove stray uses of xmmq_mode
2021-03-10  Jan Beulichx86/Intel: correct AVX512 S/G disassembly
2021-03-10  Jan Beulichx86: re-arrange enumerator and table entry order
2021-03-10  Jan Beulichx86: reuse further VEX entries for EVEX
2021-03-10  Jan Beulichx86: reuse VEX entries for EVEX vperm{q,pd}
2021-03-10  Jan Beulichx86: re-arrange order of decode for various EVEX opcodes
2021-03-10  Jan Beulichx86: re-arrange order of decode for various mask reg...
2021-03-10  Jan Beulichx86: re-arrange order of decode for various VEX opcodes
2021-03-10  Jan Beulichx86: re-arrange order of decode for various legacy...
2021-03-10  Jan Beulichx86: correct decoding of nop/reserved space (0f18 ...
2021-03-09  Jan Beulichx86-64: make SYSEXIT handling similar to SYSRET's
2021-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2020-11-29  Borislav Petkovx86: Do not dump DS/CS segment overrides for branch...
2020-11-14  Borislav Petkovx86: Ignore CS/DS/ES/SS segment-override prefixes in...
2020-10-26  Cui,LiliChange avxvnni disassembler output from {vex3} to ...
2020-10-20  Ganesh Gopalasubra... Add AMD znver3 processor support
2020-10-14  H.J. Lux86: Support Intel AVX VNNI
2020-10-14  Lili Cuix86: Add support for Intel HRESET instruction
2020-10-14  Lili Cuix86: Support Intel UINTR
2020-10-05  H.J. Lux86-64: Always display suffix for %LQ in 64bit
2020-10-05  H.J. Lux86: Clear modrm if not needed
2020-09-25  Cui,LiliPut together MOD_VEX_0F38* in i386-dis.c,
2020-09-24  Cui,LiliAdd support for Intel TDX instructions.
2020-09-23  Terry GuoEnable support to Intel Keylocker instructions
2020-09-02  Alan Modraubsan: i386-dis.c
2020-07-21  Jan BeulichRevert "x86: Don't display eiz with no scale"
2020-07-15  H.J. Lux86: Don't display eiz with no scale
2020-07-15  Jan Beulichx86: move putop() case labels to restore alphabetic...
2020-07-15  Jan Beulichx86: make PUSH/POP disassembly uniform
2020-07-15  Jan Beulichx86: avoid attaching suffixes to unambiguous insns
2020-07-14  H.J. Lux86-64: Zero-extend lower 32 bits displacement to 64...
2020-07-14  Jan Beulichx86/Intel: debug registers are named DRn
2020-07-14  Jan Beulichx86: drop Rm and the 'L' macro
2020-07-14  Jan Beulichx86: drop Rdq, Rd, and MaskR
2020-07-14  Jan Beulichx86: simplify decode of opcodes valid only without...
2020-07-14  Jan Beulichx86: also use %BW / %DQ for kshift*
2020-07-14  Jan Beulichx86: simplify decode of opcodes valid with (embedded...
2020-07-14  Jan Beulichx86: drop further EVEX table entries that can be served...
2020-07-14  Jan Beulichx86: drop need_vex_reg
2020-07-14  Jan Beulichx86: drop Vex128 and Vex256
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