2022-10-24 |
Jan Beulich | x86: emit {evex} prefix when disassembling ambiguous... |
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2022-10-21 |
Cui,Lili | Support Intel AMX-FP16 |
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2022-10-17 |
Jan Beulich | x86: fold AVX512-VNNI disassembler entries with AVX... |
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2022-09-12 |
Jan Beulich | x86: avoid i386_dis_printf()'s staging area for a fair... |
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2022-08-16 |
H.J. Lu | i386: Add MAX_OPERAND_BUFFER_SIZE |
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2022-08-01 |
Alan Modra | Get rid of fprintf_vma and sprintf_vma |
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2022-06-15 |
Jan Beulich | x86: drop print_operand_value()'s "hex" parameter |
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2022-06-13 |
Jan Beulich | x86: fix incorrect indirection |
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2022-06-13 |
Jan Beulich | x86: replace global scratch buffer |
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2022-06-13 |
Jan Beulich | x86: avoid string copy when swapping Vex.W controlled... |
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2022-06-13 |
Jan Beulich | x86: shrink prefix related disassembler state fields |
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2022-06-13 |
Jan Beulich | x86: properly initialize struct instr_info instance(s) |
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2022-06-08 |
Andrew Burgess | libopcodes: extend the styling within the i386 disassembler |
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2022-05-27 |
Andrew Burgess | opcodes/i386: remove trailing whitespace from insns... |
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2022-05-27 |
Jan Beulich | x86/Intel: adjust representation of embedded rounding... |
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2022-05-27 |
Jan Beulich | x86/Intel: adjust representation of embedded broadcast |
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2022-05-18 |
Jan Beulich | x86: shrink op_riprel |
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2022-05-07 |
Alan Modra | Fix multiple ubsan warnings in i386-dis.c |
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2022-04-19 |
Jan Beulich | x86: correct and simplify NOP disassembly |
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2022-04-04 |
Andrew Burgess | opcodes/i386: partially implement disassembler style... |
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2022-03-24 |
Jan Beulich | x86: drop L1OM special case from disassembler |
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2022-02-15 |
H.J. Lu | x86: Add has_sib to struct instr_info |
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2022-01-17 |
Jan Beulich | x86: adjust struct instr_info field types |
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2022-01-17 |
Jan Beulich | x86: drop index16 field |
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2022-01-17 |
Jan Beulich | x86: drop most Intel syntax register name arrays |
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2022-01-17 |
Jan Beulich | x86: fold variables in memory operand index handling |
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2022-01-17 |
Jan Beulich | x86: constify disassembler static data |
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2022-01-14 |
Jan Beulich | x86: drop ymmxmm_mode |
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2022-01-14 |
Jan Beulich | x86: share yet more VEX table entries with EVEX decoding |
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2022-01-14 |
Jan Beulich | x86: record further wrong uses of EVEX.b |
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2022-01-14 |
Jan Beulich | x86: reduce AVX512 FP set of insns decoded through... |
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2022-01-14 |
Jan Beulich | x86: reduce AVX512-FP16 set of insns decoded through... |
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2022-01-05 |
Vladimir Mezentsev | opcodes: Make i386-dis.c thread-safe |
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2022-01-02 |
Alan Modra | Update year range in copyright notice of binutils files |
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2021-12-18 |
Vladimir Mezentsev | x86: Terminate mnemonicendp in swap_operand() |
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2021-09-28 |
Cui,Lili | x86: Print {bad} on invalid broadcast in OP_E_memory |
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2021-08-19 |
H.J. Lu | x86: Put back 3 aborts in OP_E_memory |
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2021-08-19 |
H.J. Lu | x86: Avoid abort on invalid broadcast |
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2021-08-05 |
Cui,Lili | [PATCH 1/2] Enable Intel AVX512_FP16 instructions |
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2021-07-23 |
Jan Beulich | x86: express unduly set rounding control bits in disass... |
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2021-07-22 |
Jan Beulich | x86: drop dq{b,d}_mode |
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2021-07-22 |
Jan Beulich | x86: drop vex_scalar_w_dq_mode |
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2021-07-22 |
Jan Beulich | x86: drop xmm_m{b,w,d,q}_mode |
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2021-07-22 |
Jan Beulich | x86: fold duplicate vector register printing code |
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2021-07-22 |
Jan Beulich | x86: drop vex_mode and vex_scalar_mode |
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2021-07-22 |
Jan Beulich | x86: correct EVEX.V' handling outside of 64-bit mode |
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2021-07-22 |
Jan Beulich | x86: fold duplicate code in MOVSXD_Fixup() |
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2021-07-22 |
Jan Beulich | x86: fold duplicate register printing code |
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2021-07-22 |
Jan Beulich | x86-64: properly bounds-check %bnd<N> in OP_G() |
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2021-07-22 |
Jan Beulich | x86-64: generalize OP_G()'s EVEX.R' handling |
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2021-07-22 |
Jan Beulich | x86: correct VCVT{,U}SI2SD rounding mode handling |
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2021-07-22 |
Jan Beulich | x86: drop OP_Mask() |
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2021-07-14 |
H.J. Lu | x86: Add int1 as one byte opcode 0xf1 |
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2021-03-31 |
Alan Modra | Use bool in opcodes |
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2021-03-25 |
Jan Beulich | x86: flag bad S/G insn operand combinations |
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2021-03-25 |
Jan Beulich | x86: flag as bad AVX512 insns with EVEX.z set but EVEX... |
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2021-03-22 |
Martin Liska | Add startswith function and use it instead of CONST_STRNEQ. |
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2021-03-12 |
Alan Modra | Re: x86: correct decoding of nop/reserved space (0f18... |
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2021-03-11 |
Jan Beulich | x86: re-order logic in OP_XMM() |
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2021-03-11 |
Jan Beulich | x86: drop a few redundant EVEX-related checks |
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2021-03-11 |
Jan Beulich | x86: remove stray uses of xmmq_mode |
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2021-03-10 |
Jan Beulich | x86/Intel: correct AVX512 S/G disassembly |
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2021-03-10 |
Jan Beulich | x86: re-arrange enumerator and table entry order |
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2021-03-10 |
Jan Beulich | x86: reuse further VEX entries for EVEX |
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2021-03-10 |
Jan Beulich | x86: reuse VEX entries for EVEX vperm{q,pd} |
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2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various EVEX opcodes |
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2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various mask reg... |
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2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various VEX opcodes |
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2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various legacy... |
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2021-03-10 |
Jan Beulich | x86: correct decoding of nop/reserved space (0f18 ... |
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2021-03-09 |
Jan Beulich | x86-64: make SYSEXIT handling similar to SYSRET's |
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2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2020-11-29 |
Borislav Petkov | x86: Do not dump DS/CS segment overrides for branch... |
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2020-11-14 |
Borislav Petkov | x86: Ignore CS/DS/ES/SS segment-override prefixes in... |
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2020-10-26 |
Cui,Lili | Change avxvnni disassembler output from {vex3} to ... |
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2020-10-20 |
Ganesh Gopalasubra... | Add AMD znver3 processor support |
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2020-10-14 |
H.J. Lu | x86: Support Intel AVX VNNI |
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2020-10-14 |
Lili Cui | x86: Add support for Intel HRESET instruction |
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2020-10-14 |
Lili Cui | x86: Support Intel UINTR |
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2020-10-05 |
H.J. Lu | x86-64: Always display suffix for %LQ in 64bit |
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2020-10-05 |
H.J. Lu | x86: Clear modrm if not needed |
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2020-09-25 |
Cui,Lili | Put together MOD_VEX_0F38* in i386-dis.c, |
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2020-09-24 |
Cui,Lili | Add support for Intel TDX instructions. |
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2020-09-23 |
Terry Guo | Enable support to Intel Keylocker instructions |
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2020-09-02 |
Alan Modra | ubsan: i386-dis.c |
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2020-07-21 |
Jan Beulich | Revert "x86: Don't display eiz with no scale" |
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2020-07-15 |
H.J. Lu | x86: Don't display eiz with no scale |
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2020-07-15 |
Jan Beulich | x86: move putop() case labels to restore alphabetic... |
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2020-07-15 |
Jan Beulich | x86: make PUSH/POP disassembly uniform |
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2020-07-15 |
Jan Beulich | x86: avoid attaching suffixes to unambiguous insns |
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2020-07-14 |
H.J. Lu | x86-64: Zero-extend lower 32 bits displacement to 64... |
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2020-07-14 |
Jan Beulich | x86/Intel: debug registers are named DRn |
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2020-07-14 |
Jan Beulich | x86: drop Rm and the 'L' macro |
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2020-07-14 |
Jan Beulich | x86: drop Rdq, Rd, and MaskR |
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2020-07-14 |
Jan Beulich | x86: simplify decode of opcodes valid only without... |
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2020-07-14 |
Jan Beulich | x86: also use %BW / %DQ for kshift* |
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2020-07-14 |
Jan Beulich | x86: simplify decode of opcodes valid with (embedded... |
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2020-07-14 |
Jan Beulich | x86: drop further EVEX table entries that can be served... |
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2020-07-14 |
Jan Beulich | x86: drop need_vex_reg |
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2020-07-14 |
Jan Beulich | x86: drop Vex128 and Vex256 |
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