2024-01-10 |
Saurabh Jha | gas: aarch64: Add system registers for Debug and PMU... |
tree | commitdiff |
2024-01-09 |
Jan Beulich | x86: add missing APX logic to cpu_flags_match() |
tree | commitdiff |
2024-01-09 |
Srinath Parvathaneni | aarch64: ADD FEAT_THE RCWCAS instructions. |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Regenerate aarch64-*-2.c files |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Add support for 128-bit system register mrrs... |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Add xs variants of tlbip operands |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Implement TLBIP 128-bit instruction |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Create QL_SRC_X2 and QL_DEST_X2 qualifier... |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Apply narrowing of allowed immediate values... |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Add support for the SYSP 128-bit system instru... |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Add support for xzr register in register pair... |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Expand maximum number of operands from 5 to 6 |
tree | commitdiff |
2024-01-09 |
Victor Do Nascimento | aarch64: Add +d128 architectural feature support |
tree | commitdiff |
2024-01-08 |
srinath | aarch64: Add ite feature system registers. |
tree | commitdiff |
2024-01-07 |
H.J. Lu | i386: Correct adcx suffix in disassembler |
tree | commitdiff |
2024-01-05 |
Tejas Joshi | Add AMD znver5 processor support |
tree | commitdiff |
2024-01-05 |
Jan Beulich | x86: corrections to CPU attribute/flags splitting |
tree | commitdiff |
2024-01-05 |
Jin Ma | RISC-V: T-HEAD: Fix wrong instruction encoding for... |
tree | commitdiff |
2024-01-04 |
Alan Modra | Update year range in copyright notice of binutils files |
tree | commitdiff |
2024-01-04 |
Lulu Cai | LoongArch: Fix some macro that cannot be expanded properly |
tree | commitdiff |
2023-12-30 |
Alan Modra | LoongArch: Commas inside double quotes |
tree | commitdiff |
2023-12-29 |
changjiachen | LoongArch: opcodes: Add support for tls le relax. |
tree | commitdiff |
2023-12-29 |
Jin Ma | RISC-V: THEAD: Add 5 assembly pseudoinstructions for... |
tree | commitdiff |
2023-12-28 |
Hu, Lin1 | Support APX JMPABS for disassembler |
tree | commitdiff |
2023-12-28 |
Cui, Lili | Support APX pushp/popp |
tree | commitdiff |
2023-12-28 |
Mo, Zewei | Support APX Push2/Pop2 |
tree | commitdiff |
2023-12-28 |
konglin1 | Support APX NDD |
tree | commitdiff |
2023-12-28 |
Cui, Lili | Support APX GPR32 with extend evex prefix |
tree | commitdiff |
2023-12-28 |
Cui, Lili | Created an empty EVEX_MAP4_ sub-table for EVEX instruct... |
tree | commitdiff |
2023-12-28 |
Cui, Lili | Support APX GPR32 with rex2 prefix |
tree | commitdiff |
2023-12-25 |
Lulu Cai | LoongArch: Add new relocs and macro for TLSDESC. |
tree | commitdiff |
2023-12-24 |
Alan Modra | Re: LoongArch: Add support for <b ".L1"> and <beq,... |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Add suffix to conditional branch instruction... |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Optionally print instruction description in disas... |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Use safe string functions and length macros in... |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Enhance error handling in s390-mkopc |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Provide IBM z16 (arch14) instruction descriptions |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Align letter case of instruction descriptions |
tree | commitdiff |
2023-12-20 |
Jens Remus | s390: Fix build when using EXEEXT_FOR_BUILD |
tree | commitdiff |
2023-12-19 |
Andrea Corallo | aarch64: Add FEAT_ITE support |
tree | commitdiff |
2023-12-19 |
Andrea Corallo | aarch64: Add FEAT_ECBHB support |
tree | commitdiff |
2023-12-19 |
Andrea Corallo | aarch64: Add FEAT_SPECRES2 support |
tree | commitdiff |
2023-12-19 |
Haochen Jiang | x86: Remove the restriction for size of the mask regist... |
tree | commitdiff |
2023-12-18 |
mengqinggang | LoongArch: Add call36 and tail36 pseudo instructions... |
tree | commitdiff |
2023-12-15 |
Jan Beulich | revert "x86: allow 32-bit reg to be used with U{RD... |
tree | commitdiff |
2023-12-15 |
Jan Beulich | x86: fold assembly dialect attributes |
tree | commitdiff |
2023-12-15 |
Jan Beulich | x86: Intel syntax implies Intel mnemonics |
tree | commitdiff |
2023-12-14 |
Jin Ma | RISC-V: Fix the wrong encoding and operand of the XThea... |
tree | commitdiff |
2023-12-14 |
Cui, Lili | Remove redundant Byte, Word, Dword and Qword from insn... |
tree | commitdiff |
2023-12-13 |
Cui, Lili | Make const_1_mode print $1 in AT&T syntax |
tree | commitdiff |
2023-12-11 |
mengqinggang | LoongArch: Add support for <b ".L1"> and <beq, $t0... |
tree | commitdiff |
2023-12-04 |
Jens Remus | s390: Support for jump visualization in disassembly |
tree | commitdiff |
2023-12-01 |
Jan Beulich | x86: allow 32-bit reg to be used with U{RD,WR}MSR |
tree | commitdiff |
2023-12-01 |
Patrick O'Neill | RISC-V: Make riscv_is_mapping_symbol stricter |
tree | commitdiff |
2023-12-01 |
Nelson Chu | RISC-V: Add SiFive custom vector coprocessor interface... |
tree | commitdiff |
2023-12-01 |
Christoph Müllner | RISC-V: Zv*: Add support for Zvkb ISA extension |
tree | commitdiff |
2023-11-30 |
Patrick O'Neill | RISC-V: Avoid updating state until symbol is found |
tree | commitdiff |
2023-11-27 |
Jiajie Chen | as: Add new estimated reciprocal instructions in LoongA... |
tree | commitdiff |
2023-11-27 |
Jiajie Chen | as: Add new atomic instructions in LoongArch v1.1 |
tree | commitdiff |
2023-11-24 |
Jan Beulich | RISC-V: drop leftover match_never() references |
tree | commitdiff |
2023-11-24 |
Jan Beulich | x86: shrink opcode sets table |
tree | commitdiff |
2023-11-24 |
Jan Beulich | x86: also prefer VEX encoding over EVEX one for VCVTNEP... |
tree | commitdiff |
2023-11-24 |
Jan Beulich | RISC-V: reduce redundancy in sign/zero extension macro... |
tree | commitdiff |
2023-11-24 |
Jan Beulich | RISC-V: disallow x0 with certain macro-insns |
tree | commitdiff |
2023-11-24 |
Nick Clifton | Fix building for the s390 target with clang |
tree | commitdiff |
2023-11-23 |
Jens Remus | s390: Correct prno instruction name |
tree | commitdiff |
2023-11-23 |
Jens Remus | s390: Add missing extended mnemonics |
tree | commitdiff |
2023-11-23 |
Jens Remus | s390: Align optional operand definition to specs |
tree | commitdiff |
2023-11-23 |
Jens Remus | s390: Make operand table indices relative to each other |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add vector permutation instructions for T-Head... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add vector mask instructions for T-Head VECTOR... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add reductions instructions for T-Head VECTOR... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add floating-point arithmetic instructions... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add fixed-point arithmetic instructions for... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add integer arithmetic instructions for T-Head... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add load/store segment instructions for T-Head... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add load/store instructions for T-Head VECTOR... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add configuration-setting instructions for... |
tree | commitdiff |
2023-11-23 |
Jin Ma | RISC-V: Add CSRs for T-Head VECTOR vendor extension |
tree | commitdiff |
2023-11-21 |
Jan-Benedict Glaw | [opcodes] ARC + PPC: Fix -Walloc-size warnings |
tree | commitdiff |
2023-11-17 |
Jan Beulich | x86: CPU-qualify {disp16} / {disp32} |
tree | commitdiff |
2023-11-16 |
Srinath Parvathaneni | aarch64: Add support for VMSA feature enhancements. |
tree | commitdiff |
2023-11-16 |
Srinath Parvathaneni | aarch64: Add new AT system instructions. |
tree | commitdiff |
2023-11-16 |
Srinath Parvathaneni | aarch64: Add support to new features in RAS extension. |
tree | commitdiff |
2023-11-16 |
Srinath Parvathaneni | aarch64: Add features to the Statistical Profiling... |
tree | commitdiff |
2023-11-16 |
Srinath Parvathaneni | aarch64: Add SLC target for PRFM instruction. |
tree | commitdiff |
2023-11-15 |
Arsen Arsenovi? | Finalized intl-update patches |
tree | commitdiff |
2023-11-10 |
Lulu Cai | Add support for ilp32 register alias. |
tree | commitdiff |
2023-11-09 |
Victor Do Nascimento | aarch64: Fix error in THE system register checking |
tree | commitdiff |
2023-11-09 |
Jan Beulich | x86: rework UWRMSR operand swapping |
tree | commitdiff |
2023-11-09 |
Jan Beulich | x86: do away with is_evex_encoding() |
tree | commitdiff |
2023-11-09 |
Jan Beulich | x86: split insn templates' CPU field |
tree | commitdiff |
2023-11-09 |
Jan Beulich | x86: Cpu64 handling improvements |
tree | commitdiff |
2023-11-09 |
Jan Beulich | x86: Intel Core processors do not support CMPXCHG16B |
tree | commitdiff |
2023-11-07 |
Victor Do Nascimento | aarch64: Add LSE128 instructions |
tree | commitdiff |
2023-11-07 |
Victor Do Nascimento | aarch64: Add arch support for LSE128 extension |
tree | commitdiff |
2023-11-07 |
Victor Do Nascimento | aarch64: Add LSE128 instruction operand support |
tree | commitdiff |
2023-11-07 |
Victor Do Nascimento | aarch64: Add 128-bit system register flags |
tree | commitdiff |
2023-11-07 |
Victor Do Nascimento | aarch64: Add THE system register support |
tree | commitdiff |
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