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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
7 | choice | |
8 | prompt "Target select" | |
a26cd049 | 9 | optional |
dd84058d MY |
10 | |
11 | config TARGET_SBC8548 | |
12 | bool "Support sbc8548" | |
281ed4c7 | 13 | select ARCH_MPC8548 |
dd84058d MY |
14 | |
15 | config TARGET_SOCRATES | |
16 | bool "Support socrates" | |
25cb74b3 | 17 | select ARCH_MPC8544 |
dd84058d | 18 | |
45a8d117 YS |
19 | config TARGET_B4420QDS |
20 | bool "Support B4420QDS" | |
b41f192b | 21 | select ARCH_B4420 |
45a8d117 YS |
22 | select SUPPORT_SPL |
23 | select PHYS_64BIT | |
24 | ||
dd84058d MY |
25 | config TARGET_B4860QDS |
26 | bool "Support B4860QDS" | |
3006ebc3 | 27 | select ARCH_B4860 |
e5ec4815 | 28 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 29 | select SUPPORT_SPL |
bb6b142f | 30 | select PHYS_64BIT |
dd84058d MY |
31 | |
32 | config TARGET_BSC9131RDB | |
33 | bool "Support BSC9131RDB" | |
115d60c0 | 34 | select ARCH_BSC9131 |
02627356 | 35 | select SUPPORT_SPL |
a5d67547 | 36 | select BOARD_EARLY_INIT_F |
dd84058d MY |
37 | |
38 | config TARGET_BSC9132QDS | |
39 | bool "Support BSC9132QDS" | |
115d60c0 | 40 | select ARCH_BSC9132 |
e5ec4815 | 41 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 42 | select SUPPORT_SPL |
a5d67547 | 43 | select BOARD_EARLY_INIT_F |
dd84058d MY |
44 | |
45 | config TARGET_C29XPCIE | |
46 | bool "Support C29XPCIE" | |
4fd64746 | 47 | select ARCH_C29X |
e5ec4815 | 48 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 49 | select SUPPORT_SPL |
cf6bbe4c | 50 | select SUPPORT_TPL |
bb6b142f | 51 | select PHYS_64BIT |
dd84058d MY |
52 | |
53 | config TARGET_P3041DS | |
54 | bool "Support P3041DS" | |
bb6b142f | 55 | select PHYS_64BIT |
5e5fdd2d | 56 | select ARCH_P3041 |
e5ec4815 | 57 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
58 | |
59 | config TARGET_P4080DS | |
60 | bool "Support P4080DS" | |
bb6b142f | 61 | select PHYS_64BIT |
e71372cb | 62 | select ARCH_P4080 |
e5ec4815 | 63 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
64 | |
65 | config TARGET_P5020DS | |
66 | bool "Support P5020DS" | |
bb6b142f | 67 | select PHYS_64BIT |
cefe11cd | 68 | select ARCH_P5020 |
e5ec4815 | 69 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
70 | |
71 | config TARGET_P5040DS | |
72 | bool "Support P5040DS" | |
bb6b142f | 73 | select PHYS_64BIT |
95390360 | 74 | select ARCH_P5040 |
e5ec4815 | 75 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
76 | |
77 | config TARGET_MPC8536DS | |
78 | bool "Support MPC8536DS" | |
24ad75ae | 79 | select ARCH_MPC8536 |
d26e34c4 YS |
80 | # Use DDR3 controller with DDR2 DIMMs on this board |
81 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
82 | |
83 | config TARGET_MPC8540ADS | |
84 | bool "Support MPC8540ADS" | |
7f825218 | 85 | select ARCH_MPC8540 |
dd84058d MY |
86 | |
87 | config TARGET_MPC8541CDS | |
88 | bool "Support MPC8541CDS" | |
3aff3082 | 89 | select ARCH_MPC8541 |
dd84058d MY |
90 | |
91 | config TARGET_MPC8544DS | |
92 | bool "Support MPC8544DS" | |
25cb74b3 | 93 | select ARCH_MPC8544 |
dd84058d MY |
94 | |
95 | config TARGET_MPC8548CDS | |
96 | bool "Support MPC8548CDS" | |
281ed4c7 | 97 | select ARCH_MPC8548 |
dd84058d MY |
98 | |
99 | config TARGET_MPC8555CDS | |
100 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 101 | select ARCH_MPC8555 |
dd84058d MY |
102 | |
103 | config TARGET_MPC8560ADS | |
104 | bool "Support MPC8560ADS" | |
99d0a312 | 105 | select ARCH_MPC8560 |
dd84058d MY |
106 | |
107 | config TARGET_MPC8568MDS | |
108 | bool "Support MPC8568MDS" | |
d07c3843 | 109 | select ARCH_MPC8568 |
dd84058d MY |
110 | |
111 | config TARGET_MPC8569MDS | |
112 | bool "Support MPC8569MDS" | |
23b36a7d | 113 | select ARCH_MPC8569 |
dd84058d MY |
114 | |
115 | config TARGET_MPC8572DS | |
116 | bool "Support MPC8572DS" | |
c8f48474 | 117 | select ARCH_MPC8572 |
d26e34c4 YS |
118 | # Use DDR3 controller with DDR2 DIMMs on this board |
119 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 120 | |
7601686c YS |
121 | config TARGET_P1010RDB_PA |
122 | bool "Support P1010RDB_PA" | |
123 | select ARCH_P1010 | |
e5ec4815 | 124 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
7601686c YS |
125 | select SUPPORT_SPL |
126 | select SUPPORT_TPL | |
127 | ||
128 | config TARGET_P1010RDB_PB | |
129 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 130 | select ARCH_P1010 |
e5ec4815 | 131 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 132 | select SUPPORT_SPL |
cf6bbe4c | 133 | select SUPPORT_TPL |
dd84058d MY |
134 | |
135 | config TARGET_P1022DS | |
136 | bool "Support P1022DS" | |
feb9e25b | 137 | select ARCH_P1022 |
02627356 | 138 | select SUPPORT_SPL |
cf6bbe4c | 139 | select SUPPORT_TPL |
dd84058d MY |
140 | |
141 | config TARGET_P1023RDB | |
142 | bool "Support P1023RDB" | |
9bb1d6bc | 143 | select ARCH_P1023 |
dd84058d | 144 | |
fedae6eb YS |
145 | config TARGET_P1020MBG |
146 | bool "Support P1020MBG-PC" | |
147 | select SUPPORT_SPL | |
148 | select SUPPORT_TPL | |
484fff64 YS |
149 | select ARCH_P1020 |
150 | ||
aa14620c YS |
151 | config TARGET_P1020RDB_PC |
152 | bool "Support P1020RDB-PC" | |
153 | select SUPPORT_SPL | |
154 | select SUPPORT_TPL | |
484fff64 | 155 | select ARCH_P1020 |
aa14620c | 156 | |
f404b66c YS |
157 | config TARGET_P1020RDB_PD |
158 | bool "Support P1020RDB-PD" | |
159 | select SUPPORT_SPL | |
160 | select SUPPORT_TPL | |
484fff64 | 161 | select ARCH_P1020 |
f404b66c | 162 | |
e9bc8a8f YS |
163 | config TARGET_P1020UTM |
164 | bool "Support P1020UTM" | |
165 | select SUPPORT_SPL | |
166 | select SUPPORT_TPL | |
484fff64 | 167 | select ARCH_P1020 |
fedae6eb | 168 | |
da439db3 YS |
169 | config TARGET_P1021RDB |
170 | bool "Support P1021RDB" | |
171 | select SUPPORT_SPL | |
172 | select SUPPORT_TPL | |
a990799d | 173 | select ARCH_P1021 |
da439db3 | 174 | |
4eedabfe YS |
175 | config TARGET_P1024RDB |
176 | bool "Support P1024RDB" | |
177 | select SUPPORT_SPL | |
178 | select SUPPORT_TPL | |
52b6f13d | 179 | select ARCH_P1024 |
4eedabfe | 180 | |
b0c98b4b YS |
181 | config TARGET_P1025RDB |
182 | bool "Support P1025RDB" | |
183 | select SUPPORT_SPL | |
184 | select SUPPORT_TPL | |
4167a67d | 185 | select ARCH_P1025 |
b0c98b4b | 186 | |
8435aa77 YS |
187 | config TARGET_P2020RDB |
188 | bool "Support P2020RDB-PC" | |
189 | select SUPPORT_SPL | |
190 | select SUPPORT_TPL | |
4593637b | 191 | select ARCH_P2020 |
8435aa77 | 192 | |
dd84058d MY |
193 | config TARGET_P1_TWR |
194 | bool "Support p1_twr" | |
4167a67d | 195 | select ARCH_P1025 |
dd84058d | 196 | |
dd84058d MY |
197 | config TARGET_P2041RDB |
198 | bool "Support P2041RDB" | |
ce040c83 | 199 | select ARCH_P2041 |
e5ec4815 | 200 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 201 | select PHYS_64BIT |
dd84058d MY |
202 | |
203 | config TARGET_QEMU_PPCE500 | |
204 | bool "Support qemu-ppce500" | |
10343403 | 205 | select ARCH_QEMU_E500 |
bb6b142f | 206 | select PHYS_64BIT |
dd84058d | 207 | |
6f53bd47 YS |
208 | config TARGET_T1024QDS |
209 | bool "Support T1024QDS" | |
e5d5f5a8 | 210 | select ARCH_T1024 |
e5ec4815 | 211 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
aba80048 | 212 | select SUPPORT_SPL |
bb6b142f | 213 | select PHYS_64BIT |
aba80048 | 214 | |
08c75292 YS |
215 | config TARGET_T1023RDB |
216 | bool "Support T1023RDB" | |
5ff3f41d | 217 | select ARCH_T1023 |
e5ec4815 | 218 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
08c75292 YS |
219 | select SUPPORT_SPL |
220 | select PHYS_64BIT | |
221 | ||
222 | config TARGET_T1024RDB | |
223 | bool "Support T1024RDB" | |
e5d5f5a8 | 224 | select ARCH_T1024 |
e5ec4815 | 225 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
48c6f328 | 226 | select SUPPORT_SPL |
bb6b142f | 227 | select PHYS_64BIT |
48c6f328 | 228 | |
dd84058d MY |
229 | config TARGET_T1040QDS |
230 | bool "Support T1040QDS" | |
5d737010 | 231 | select ARCH_T1040 |
e5ec4815 | 232 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 233 | select PHYS_64BIT |
dd84058d | 234 | |
95a809b9 YS |
235 | config TARGET_T1040RDB |
236 | bool "Support T1040RDB" | |
5d737010 | 237 | select ARCH_T1040 |
e5ec4815 | 238 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
95a809b9 YS |
239 | select SUPPORT_SPL |
240 | select PHYS_64BIT | |
241 | ||
a016735c YS |
242 | config TARGET_T1040D4RDB |
243 | bool "Support T1040D4RDB" | |
244 | select ARCH_T1040 | |
e5ec4815 | 245 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
a016735c YS |
246 | select SUPPORT_SPL |
247 | select PHYS_64BIT | |
248 | ||
95a809b9 YS |
249 | config TARGET_T1042RDB |
250 | bool "Support T1042RDB" | |
5449c98a | 251 | select ARCH_T1042 |
e5ec4815 | 252 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 253 | select SUPPORT_SPL |
bb6b142f | 254 | select PHYS_64BIT |
dd84058d | 255 | |
319ed24a YS |
256 | config TARGET_T1042D4RDB |
257 | bool "Support T1042D4RDB" | |
258 | select ARCH_T1042 | |
e5ec4815 | 259 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
319ed24a YS |
260 | select SUPPORT_SPL |
261 | select PHYS_64BIT | |
262 | ||
55ed8ae3 YS |
263 | config TARGET_T1042RDB_PI |
264 | bool "Support T1042RDB_PI" | |
265 | select ARCH_T1042 | |
e5ec4815 | 266 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
55ed8ae3 YS |
267 | select SUPPORT_SPL |
268 | select PHYS_64BIT | |
269 | ||
638d5be0 YS |
270 | config TARGET_T2080QDS |
271 | bool "Support T2080QDS" | |
0f3d80e9 | 272 | select ARCH_T2080 |
e5ec4815 | 273 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 274 | select SUPPORT_SPL |
bb6b142f | 275 | select PHYS_64BIT |
dd84058d | 276 | |
01671e66 YS |
277 | config TARGET_T2080RDB |
278 | bool "Support T2080RDB" | |
0f3d80e9 | 279 | select ARCH_T2080 |
e5ec4815 | 280 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 281 | select SUPPORT_SPL |
bb6b142f | 282 | select PHYS_64BIT |
dd84058d | 283 | |
638d5be0 YS |
284 | config TARGET_T2081QDS |
285 | bool "Support T2081QDS" | |
0f3d80e9 | 286 | select ARCH_T2081 |
638d5be0 YS |
287 | select SUPPORT_SPL |
288 | select PHYS_64BIT | |
289 | ||
9c21d06c YS |
290 | config TARGET_T4160QDS |
291 | bool "Support T4160QDS" | |
652a7bbd | 292 | select ARCH_T4160 |
e5ec4815 | 293 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
9c21d06c YS |
294 | select SUPPORT_SPL |
295 | select PHYS_64BIT | |
296 | ||
12ffdb3b YS |
297 | config TARGET_T4160RDB |
298 | bool "Support T4160RDB" | |
652a7bbd | 299 | select ARCH_T4160 |
12ffdb3b YS |
300 | select SUPPORT_SPL |
301 | select PHYS_64BIT | |
302 | ||
dd84058d MY |
303 | config TARGET_T4240QDS |
304 | bool "Support T4240QDS" | |
26bc57da | 305 | select ARCH_T4240 |
e5ec4815 | 306 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 307 | select SUPPORT_SPL |
bb6b142f | 308 | select PHYS_64BIT |
dd84058d MY |
309 | |
310 | config TARGET_T4240RDB | |
311 | bool "Support T4240RDB" | |
26bc57da | 312 | select ARCH_T4240 |
373762c3 | 313 | select SUPPORT_SPL |
bb6b142f | 314 | select PHYS_64BIT |
dd84058d MY |
315 | |
316 | config TARGET_CONTROLCENTERD | |
317 | bool "Support controlcenterd" | |
feb9e25b | 318 | select ARCH_P1022 |
dd84058d MY |
319 | |
320 | config TARGET_KMP204X | |
321 | bool "Support kmp204x" | |
ce040c83 | 322 | select ARCH_P2041 |
bb6b142f | 323 | select PHYS_64BIT |
dd84058d | 324 | |
dd84058d MY |
325 | config TARGET_XPEDITE520X |
326 | bool "Support xpedite520x" | |
281ed4c7 | 327 | select ARCH_MPC8548 |
dd84058d MY |
328 | |
329 | config TARGET_XPEDITE537X | |
330 | bool "Support xpedite537x" | |
c8f48474 | 331 | select ARCH_MPC8572 |
d26e34c4 YS |
332 | # Use DDR3 controller with DDR2 DIMMs on this board |
333 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
334 | |
335 | config TARGET_XPEDITE550X | |
336 | bool "Support xpedite550x" | |
4593637b | 337 | select ARCH_P2020 |
dd84058d | 338 | |
8b0044ff OZ |
339 | config TARGET_UCP1020 |
340 | bool "Support uCP1020" | |
484fff64 | 341 | select ARCH_P1020 |
8b0044ff | 342 | |
22a1b99a YS |
343 | config TARGET_CYRUS_P5020 |
344 | bool "Support Varisys Cyrus P5020" | |
345 | select ARCH_P5020 | |
346 | select PHYS_64BIT | |
347 | ||
348 | config TARGET_CYRUS_P5040 | |
349 | bool "Support Varisys Cyrus P5040" | |
350 | select ARCH_P5040 | |
bb6b142f | 351 | select PHYS_64BIT |
87e29878 | 352 | |
dd84058d MY |
353 | endchoice |
354 | ||
b41f192b YS |
355 | config ARCH_B4420 |
356 | bool | |
f8dee360 | 357 | select E500MC |
9ec10107 | 358 | select E6500 |
05cb79a7 | 359 | select FSL_LAW |
22120f11 | 360 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
361 | select SYS_FSL_ERRATUM_A004477 |
362 | select SYS_FSL_ERRATUM_A005871 | |
363 | select SYS_FSL_ERRATUM_A006379 | |
364 | select SYS_FSL_ERRATUM_A006384 | |
365 | select SYS_FSL_ERRATUM_A006475 | |
366 | select SYS_FSL_ERRATUM_A006593 | |
367 | select SYS_FSL_ERRATUM_A007075 | |
368 | select SYS_FSL_ERRATUM_A007186 | |
369 | select SYS_FSL_ERRATUM_A007212 | |
370 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 371 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 372 | select SYS_FSL_HAS_SEC |
7371774a | 373 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 374 | select SYS_FSL_SEC_BE |
2c2e2c9e | 375 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 376 | select SYS_PPC64 |
d98b98d6 | 377 | select FSL_IFC |
b41f192b | 378 | |
3006ebc3 YS |
379 | config ARCH_B4860 |
380 | bool | |
f8dee360 | 381 | select E500MC |
9ec10107 | 382 | select E6500 |
05cb79a7 | 383 | select FSL_LAW |
22120f11 | 384 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
385 | select SYS_FSL_ERRATUM_A004477 |
386 | select SYS_FSL_ERRATUM_A005871 | |
387 | select SYS_FSL_ERRATUM_A006379 | |
388 | select SYS_FSL_ERRATUM_A006384 | |
389 | select SYS_FSL_ERRATUM_A006475 | |
390 | select SYS_FSL_ERRATUM_A006593 | |
391 | select SYS_FSL_ERRATUM_A007075 | |
392 | select SYS_FSL_ERRATUM_A007186 | |
393 | select SYS_FSL_ERRATUM_A007212 | |
06ad970b | 394 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 395 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 396 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 397 | select SYS_FSL_HAS_SEC |
7371774a | 398 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 399 | select SYS_FSL_SEC_BE |
2c2e2c9e | 400 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 401 | select SYS_PPC64 |
d98b98d6 | 402 | select FSL_IFC |
3006ebc3 | 403 | |
115d60c0 YS |
404 | config ARCH_BSC9131 |
405 | bool | |
05cb79a7 | 406 | select FSL_LAW |
22120f11 | 407 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
408 | select SYS_FSL_ERRATUM_A004477 |
409 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 410 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 411 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 412 | select SYS_FSL_HAS_SEC |
90b80386 | 413 | select SYS_FSL_SEC_BE |
2c2e2c9e | 414 | select SYS_FSL_SEC_COMPAT_4 |
d98b98d6 | 415 | select FSL_IFC |
115d60c0 YS |
416 | |
417 | config ARCH_BSC9132 | |
418 | bool | |
05cb79a7 | 419 | select FSL_LAW |
22120f11 | 420 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
421 | select SYS_FSL_ERRATUM_A004477 |
422 | select SYS_FSL_ERRATUM_A005125 | |
423 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 424 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
425 | select SYS_FSL_ERRATUM_I2C_A004447 |
426 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 427 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 428 | select SYS_FSL_HAS_SEC |
90b80386 | 429 | select SYS_FSL_SEC_BE |
2c2e2c9e | 430 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 431 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 432 | select FSL_IFC |
115d60c0 | 433 | |
4fd64746 YS |
434 | config ARCH_C29X |
435 | bool | |
05cb79a7 | 436 | select FSL_LAW |
22120f11 | 437 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 438 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 439 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 440 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 441 | select SYS_FSL_HAS_SEC |
90b80386 | 442 | select SYS_FSL_SEC_BE |
2c2e2c9e | 443 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 444 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 445 | select FSL_IFC |
4fd64746 | 446 | |
24ad75ae YS |
447 | config ARCH_MPC8536 |
448 | bool | |
05cb79a7 | 449 | select FSL_LAW |
63659ff3 YS |
450 | select SYS_FSL_ERRATUM_A004508 |
451 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
452 | select SYS_FSL_HAS_DDR2 |
453 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 454 | select SYS_FSL_HAS_SEC |
90b80386 | 455 | select SYS_FSL_SEC_BE |
2c2e2c9e | 456 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 457 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 458 | select FSL_ELBC |
24ad75ae | 459 | |
7f825218 YS |
460 | config ARCH_MPC8540 |
461 | bool | |
05cb79a7 | 462 | select FSL_LAW |
d26e34c4 | 463 | select SYS_FSL_HAS_DDR1 |
7f825218 | 464 | |
3aff3082 YS |
465 | config ARCH_MPC8541 |
466 | bool | |
05cb79a7 | 467 | select FSL_LAW |
d26e34c4 | 468 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 469 | select SYS_FSL_HAS_SEC |
90b80386 | 470 | select SYS_FSL_SEC_BE |
2c2e2c9e | 471 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 472 | |
25cb74b3 YS |
473 | config ARCH_MPC8544 |
474 | bool | |
05cb79a7 | 475 | select FSL_LAW |
63659ff3 | 476 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 477 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 478 | select SYS_FSL_HAS_SEC |
90b80386 | 479 | select SYS_FSL_SEC_BE |
2c2e2c9e | 480 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 481 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 482 | select FSL_ELBC |
25cb74b3 | 483 | |
281ed4c7 YS |
484 | config ARCH_MPC8548 |
485 | bool | |
05cb79a7 | 486 | select FSL_LAW |
63659ff3 YS |
487 | select SYS_FSL_ERRATUM_A005125 |
488 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
489 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
490 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
491 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
492 | select SYS_FSL_HAS_DDR2 |
493 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 494 | select SYS_FSL_HAS_SEC |
90b80386 | 495 | select SYS_FSL_SEC_BE |
2c2e2c9e | 496 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 497 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 498 | |
3c3d8ab5 YS |
499 | config ARCH_MPC8555 |
500 | bool | |
05cb79a7 | 501 | select FSL_LAW |
d26e34c4 | 502 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 503 | select SYS_FSL_HAS_SEC |
90b80386 | 504 | select SYS_FSL_SEC_BE |
2c2e2c9e | 505 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 506 | |
99d0a312 YS |
507 | config ARCH_MPC8560 |
508 | bool | |
05cb79a7 | 509 | select FSL_LAW |
d26e34c4 | 510 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 511 | |
d07c3843 YS |
512 | config ARCH_MPC8568 |
513 | bool | |
05cb79a7 | 514 | select FSL_LAW |
d26e34c4 | 515 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 516 | select SYS_FSL_HAS_SEC |
90b80386 | 517 | select SYS_FSL_SEC_BE |
2c2e2c9e | 518 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 519 | |
23b36a7d YS |
520 | config ARCH_MPC8569 |
521 | bool | |
05cb79a7 | 522 | select FSL_LAW |
63659ff3 YS |
523 | select SYS_FSL_ERRATUM_A004508 |
524 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 525 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 526 | select SYS_FSL_HAS_SEC |
90b80386 | 527 | select SYS_FSL_SEC_BE |
2c2e2c9e | 528 | select SYS_FSL_SEC_COMPAT_2 |
06878977 | 529 | select FSL_ELBC |
23b36a7d | 530 | |
c8f48474 YS |
531 | config ARCH_MPC8572 |
532 | bool | |
05cb79a7 | 533 | select FSL_LAW |
63659ff3 YS |
534 | select SYS_FSL_ERRATUM_A004508 |
535 | select SYS_FSL_ERRATUM_A005125 | |
536 | select SYS_FSL_ERRATUM_DDR_115 | |
537 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
538 | select SYS_FSL_HAS_DDR2 |
539 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 540 | select SYS_FSL_HAS_SEC |
90b80386 | 541 | select SYS_FSL_SEC_BE |
2c2e2c9e | 542 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 543 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 544 | select FSL_ELBC |
c8f48474 | 545 | |
7d5f9f84 YS |
546 | config ARCH_P1010 |
547 | bool | |
05cb79a7 | 548 | select FSL_LAW |
63659ff3 YS |
549 | select SYS_FSL_ERRATUM_A004477 |
550 | select SYS_FSL_ERRATUM_A004508 | |
551 | select SYS_FSL_ERRATUM_A005125 | |
552 | select SYS_FSL_ERRATUM_A006261 | |
553 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 554 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
555 | select SYS_FSL_ERRATUM_I2C_A004447 |
556 | select SYS_FSL_ERRATUM_IFC_A002769 | |
557 | select SYS_FSL_ERRATUM_P1010_A003549 | |
558 | select SYS_FSL_ERRATUM_SEC_A003571 | |
559 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 560 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 561 | select SYS_FSL_HAS_SEC |
90b80386 | 562 | select SYS_FSL_SEC_BE |
2c2e2c9e | 563 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 564 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 565 | select FSL_IFC |
7d5f9f84 | 566 | |
1cdd96f3 YS |
567 | config ARCH_P1011 |
568 | bool | |
05cb79a7 | 569 | select FSL_LAW |
63659ff3 YS |
570 | select SYS_FSL_ERRATUM_A004508 |
571 | select SYS_FSL_ERRATUM_A005125 | |
572 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 573 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 574 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 575 | select SYS_FSL_HAS_SEC |
90b80386 | 576 | select SYS_FSL_SEC_BE |
2c2e2c9e | 577 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 578 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 579 | select FSL_ELBC |
1cdd96f3 | 580 | |
484fff64 YS |
581 | config ARCH_P1020 |
582 | bool | |
05cb79a7 | 583 | select FSL_LAW |
63659ff3 YS |
584 | select SYS_FSL_ERRATUM_A004508 |
585 | select SYS_FSL_ERRATUM_A005125 | |
586 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 587 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 588 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 589 | select SYS_FSL_HAS_SEC |
90b80386 | 590 | select SYS_FSL_SEC_BE |
2c2e2c9e | 591 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 592 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 593 | select FSL_ELBC |
484fff64 | 594 | |
a990799d YS |
595 | config ARCH_P1021 |
596 | bool | |
05cb79a7 | 597 | select FSL_LAW |
63659ff3 YS |
598 | select SYS_FSL_ERRATUM_A004508 |
599 | select SYS_FSL_ERRATUM_A005125 | |
600 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 601 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 602 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 603 | select SYS_FSL_HAS_SEC |
90b80386 | 604 | select SYS_FSL_SEC_BE |
2c2e2c9e | 605 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 606 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 607 | select FSL_ELBC |
a990799d | 608 | |
feb9e25b YS |
609 | config ARCH_P1022 |
610 | bool | |
05cb79a7 | 611 | select FSL_LAW |
63659ff3 YS |
612 | select SYS_FSL_ERRATUM_A004477 |
613 | select SYS_FSL_ERRATUM_A004508 | |
614 | select SYS_FSL_ERRATUM_A005125 | |
615 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 616 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 617 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 618 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 619 | select SYS_FSL_HAS_SEC |
90b80386 | 620 | select SYS_FSL_SEC_BE |
2c2e2c9e | 621 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 622 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 623 | select FSL_ELBC |
feb9e25b | 624 | |
9bb1d6bc YS |
625 | config ARCH_P1023 |
626 | bool | |
05cb79a7 | 627 | select FSL_LAW |
63659ff3 YS |
628 | select SYS_FSL_ERRATUM_A004508 |
629 | select SYS_FSL_ERRATUM_A005125 | |
630 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 631 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 632 | select SYS_FSL_HAS_SEC |
90b80386 | 633 | select SYS_FSL_SEC_BE |
2c2e2c9e | 634 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 635 | select FSL_ELBC |
9bb1d6bc | 636 | |
52b6f13d YS |
637 | config ARCH_P1024 |
638 | bool | |
05cb79a7 | 639 | select FSL_LAW |
63659ff3 YS |
640 | select SYS_FSL_ERRATUM_A004508 |
641 | select SYS_FSL_ERRATUM_A005125 | |
642 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 643 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 644 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 645 | select SYS_FSL_HAS_SEC |
90b80386 | 646 | select SYS_FSL_SEC_BE |
2c2e2c9e | 647 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 648 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 649 | select FSL_ELBC |
52b6f13d | 650 | |
4167a67d YS |
651 | config ARCH_P1025 |
652 | bool | |
05cb79a7 | 653 | select FSL_LAW |
63659ff3 YS |
654 | select SYS_FSL_ERRATUM_A004508 |
655 | select SYS_FSL_ERRATUM_A005125 | |
656 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 657 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 658 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 659 | select SYS_FSL_HAS_SEC |
90b80386 | 660 | select SYS_FSL_SEC_BE |
2c2e2c9e | 661 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 662 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 663 | select FSL_ELBC |
4167a67d | 664 | |
4593637b YS |
665 | config ARCH_P2020 |
666 | bool | |
05cb79a7 | 667 | select FSL_LAW |
63659ff3 YS |
668 | select SYS_FSL_ERRATUM_A004477 |
669 | select SYS_FSL_ERRATUM_A004508 | |
670 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
671 | select SYS_FSL_ERRATUM_ESDHC111 |
672 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 673 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 674 | select SYS_FSL_HAS_SEC |
90b80386 | 675 | select SYS_FSL_SEC_BE |
2c2e2c9e | 676 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 677 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 678 | select FSL_ELBC |
4593637b | 679 | |
ce040c83 YS |
680 | config ARCH_P2041 |
681 | bool | |
f8dee360 | 682 | select E500MC |
05cb79a7 | 683 | select FSL_LAW |
63659ff3 YS |
684 | select SYS_FSL_ERRATUM_A004510 |
685 | select SYS_FSL_ERRATUM_A004849 | |
686 | select SYS_FSL_ERRATUM_A006261 | |
687 | select SYS_FSL_ERRATUM_CPU_A003999 | |
688 | select SYS_FSL_ERRATUM_DDR_A003 | |
689 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 690 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
691 | select SYS_FSL_ERRATUM_I2C_A004447 |
692 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
693 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
694 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 695 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 696 | select SYS_FSL_HAS_SEC |
7371774a | 697 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 698 | select SYS_FSL_SEC_BE |
2c2e2c9e | 699 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 700 | select FSL_ELBC |
ce040c83 | 701 | |
5e5fdd2d YS |
702 | config ARCH_P3041 |
703 | bool | |
f8dee360 | 704 | select E500MC |
05cb79a7 | 705 | select FSL_LAW |
22120f11 | 706 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
707 | select SYS_FSL_ERRATUM_A004510 |
708 | select SYS_FSL_ERRATUM_A004849 | |
709 | select SYS_FSL_ERRATUM_A005812 | |
710 | select SYS_FSL_ERRATUM_A006261 | |
711 | select SYS_FSL_ERRATUM_CPU_A003999 | |
712 | select SYS_FSL_ERRATUM_DDR_A003 | |
713 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 714 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
715 | select SYS_FSL_ERRATUM_I2C_A004447 |
716 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
717 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
718 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 719 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 720 | select SYS_FSL_HAS_SEC |
7371774a | 721 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 722 | select SYS_FSL_SEC_BE |
2c2e2c9e | 723 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 724 | select FSL_ELBC |
5e5fdd2d | 725 | |
e71372cb YS |
726 | config ARCH_P4080 |
727 | bool | |
f8dee360 | 728 | select E500MC |
05cb79a7 | 729 | select FSL_LAW |
22120f11 | 730 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
731 | select SYS_FSL_ERRATUM_A004510 |
732 | select SYS_FSL_ERRATUM_A004580 | |
733 | select SYS_FSL_ERRATUM_A004849 | |
734 | select SYS_FSL_ERRATUM_A005812 | |
735 | select SYS_FSL_ERRATUM_A007075 | |
736 | select SYS_FSL_ERRATUM_CPC_A002 | |
737 | select SYS_FSL_ERRATUM_CPC_A003 | |
738 | select SYS_FSL_ERRATUM_CPU_A003999 | |
739 | select SYS_FSL_ERRATUM_DDR_A003 | |
740 | select SYS_FSL_ERRATUM_DDR_A003474 | |
741 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
742 | select SYS_FSL_ERRATUM_ESDHC111 |
743 | select SYS_FSL_ERRATUM_ESDHC13 | |
744 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
745 | select SYS_FSL_ERRATUM_I2C_A004447 |
746 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
747 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
748 | select SYS_P4080_ERRATUM_CPU22 | |
749 | select SYS_P4080_ERRATUM_PCIE_A003 | |
750 | select SYS_P4080_ERRATUM_SERDES8 | |
751 | select SYS_P4080_ERRATUM_SERDES9 | |
752 | select SYS_P4080_ERRATUM_SERDES_A001 | |
753 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 754 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 755 | select SYS_FSL_HAS_SEC |
7371774a | 756 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 757 | select SYS_FSL_SEC_BE |
2c2e2c9e | 758 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 759 | select FSL_ELBC |
e71372cb | 760 | |
cefe11cd YS |
761 | config ARCH_P5020 |
762 | bool | |
f8dee360 | 763 | select E500MC |
05cb79a7 | 764 | select FSL_LAW |
22120f11 | 765 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
766 | select SYS_FSL_ERRATUM_A004510 |
767 | select SYS_FSL_ERRATUM_A006261 | |
768 | select SYS_FSL_ERRATUM_DDR_A003 | |
769 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 770 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
771 | select SYS_FSL_ERRATUM_I2C_A004447 |
772 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
773 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 774 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 775 | select SYS_FSL_HAS_SEC |
7371774a | 776 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 777 | select SYS_FSL_SEC_BE |
2c2e2c9e | 778 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 779 | select SYS_PPC64 |
06878977 | 780 | select FSL_ELBC |
cefe11cd | 781 | |
95390360 YS |
782 | config ARCH_P5040 |
783 | bool | |
f8dee360 | 784 | select E500MC |
05cb79a7 | 785 | select FSL_LAW |
22120f11 | 786 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
787 | select SYS_FSL_ERRATUM_A004510 |
788 | select SYS_FSL_ERRATUM_A004699 | |
789 | select SYS_FSL_ERRATUM_A005812 | |
790 | select SYS_FSL_ERRATUM_A006261 | |
791 | select SYS_FSL_ERRATUM_DDR_A003 | |
792 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 793 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 794 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 795 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 796 | select SYS_FSL_HAS_SEC |
7371774a | 797 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 798 | select SYS_FSL_SEC_BE |
2c2e2c9e | 799 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 800 | select SYS_PPC64 |
06878977 | 801 | select FSL_ELBC |
95390360 | 802 | |
10343403 YS |
803 | config ARCH_QEMU_E500 |
804 | bool | |
805 | ||
5ff3f41d YS |
806 | config ARCH_T1023 |
807 | bool | |
f8dee360 | 808 | select E500MC |
05cb79a7 | 809 | select FSL_LAW |
22120f11 | 810 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
811 | select SYS_FSL_ERRATUM_A008378 |
812 | select SYS_FSL_ERRATUM_A009663 | |
813 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 814 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
815 | select SYS_FSL_HAS_DDR3 |
816 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 817 | select SYS_FSL_HAS_SEC |
7371774a | 818 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 819 | select SYS_FSL_SEC_BE |
2c2e2c9e | 820 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 821 | select FSL_IFC |
5ff3f41d | 822 | |
e5d5f5a8 YS |
823 | config ARCH_T1024 |
824 | bool | |
f8dee360 | 825 | select E500MC |
05cb79a7 | 826 | select FSL_LAW |
22120f11 | 827 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
828 | select SYS_FSL_ERRATUM_A008378 |
829 | select SYS_FSL_ERRATUM_A009663 | |
830 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 831 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
832 | select SYS_FSL_HAS_DDR3 |
833 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 834 | select SYS_FSL_HAS_SEC |
7371774a | 835 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 836 | select SYS_FSL_SEC_BE |
2c2e2c9e | 837 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 838 | select FSL_IFC |
e5d5f5a8 | 839 | |
5d737010 YS |
840 | config ARCH_T1040 |
841 | bool | |
f8dee360 | 842 | select E500MC |
05cb79a7 | 843 | select FSL_LAW |
22120f11 | 844 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
845 | select SYS_FSL_ERRATUM_A008044 |
846 | select SYS_FSL_ERRATUM_A008378 | |
847 | select SYS_FSL_ERRATUM_A009663 | |
848 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 849 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
850 | select SYS_FSL_HAS_DDR3 |
851 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 852 | select SYS_FSL_HAS_SEC |
7371774a | 853 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 854 | select SYS_FSL_SEC_BE |
2c2e2c9e | 855 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 856 | select FSL_IFC |
5d737010 | 857 | |
5449c98a YS |
858 | config ARCH_T1042 |
859 | bool | |
f8dee360 | 860 | select E500MC |
05cb79a7 | 861 | select FSL_LAW |
22120f11 | 862 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
863 | select SYS_FSL_ERRATUM_A008044 |
864 | select SYS_FSL_ERRATUM_A008378 | |
865 | select SYS_FSL_ERRATUM_A009663 | |
866 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 867 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
868 | select SYS_FSL_HAS_DDR3 |
869 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 870 | select SYS_FSL_HAS_SEC |
7371774a | 871 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 872 | select SYS_FSL_SEC_BE |
2c2e2c9e | 873 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 874 | select FSL_IFC |
5449c98a | 875 | |
0f3d80e9 YS |
876 | config ARCH_T2080 |
877 | bool | |
f8dee360 | 878 | select E500MC |
9ec10107 | 879 | select E6500 |
05cb79a7 | 880 | select FSL_LAW |
22120f11 | 881 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
882 | select SYS_FSL_ERRATUM_A006379 |
883 | select SYS_FSL_ERRATUM_A006593 | |
884 | select SYS_FSL_ERRATUM_A007186 | |
885 | select SYS_FSL_ERRATUM_A007212 | |
09bfd962 | 886 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 887 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 888 | select SYS_FSL_ERRATUM_A009942 |
c01e4a1a | 889 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 890 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 891 | select SYS_FSL_HAS_SEC |
7371774a | 892 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 893 | select SYS_FSL_SEC_BE |
2c2e2c9e | 894 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 895 | select SYS_PPC64 |
d98b98d6 | 896 | select FSL_IFC |
0f3d80e9 YS |
897 | |
898 | config ARCH_T2081 | |
899 | bool | |
f8dee360 | 900 | select E500MC |
9ec10107 | 901 | select E6500 |
05cb79a7 | 902 | select FSL_LAW |
22120f11 | 903 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
904 | select SYS_FSL_ERRATUM_A006379 |
905 | select SYS_FSL_ERRATUM_A006593 | |
906 | select SYS_FSL_ERRATUM_A007186 | |
907 | select SYS_FSL_ERRATUM_A007212 | |
908 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 909 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 910 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 911 | select SYS_FSL_HAS_SEC |
7371774a | 912 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 913 | select SYS_FSL_SEC_BE |
2c2e2c9e | 914 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 915 | select SYS_PPC64 |
d98b98d6 | 916 | select FSL_IFC |
0f3d80e9 | 917 | |
652a7bbd YS |
918 | config ARCH_T4160 |
919 | bool | |
f8dee360 | 920 | select E500MC |
9ec10107 | 921 | select E6500 |
05cb79a7 | 922 | select FSL_LAW |
22120f11 | 923 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
924 | select SYS_FSL_ERRATUM_A004468 |
925 | select SYS_FSL_ERRATUM_A005871 | |
926 | select SYS_FSL_ERRATUM_A006379 | |
927 | select SYS_FSL_ERRATUM_A006593 | |
928 | select SYS_FSL_ERRATUM_A007186 | |
929 | select SYS_FSL_ERRATUM_A007798 | |
930 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 931 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 932 | select SYS_FSL_HAS_SEC |
7371774a | 933 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 934 | select SYS_FSL_SEC_BE |
2c2e2c9e | 935 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 936 | select SYS_PPC64 |
d98b98d6 | 937 | select FSL_IFC |
652a7bbd | 938 | |
26bc57da YS |
939 | config ARCH_T4240 |
940 | bool | |
f8dee360 | 941 | select E500MC |
9ec10107 | 942 | select E6500 |
05cb79a7 | 943 | select FSL_LAW |
22120f11 | 944 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
945 | select SYS_FSL_ERRATUM_A004468 |
946 | select SYS_FSL_ERRATUM_A005871 | |
947 | select SYS_FSL_ERRATUM_A006261 | |
948 | select SYS_FSL_ERRATUM_A006379 | |
949 | select SYS_FSL_ERRATUM_A006593 | |
950 | select SYS_FSL_ERRATUM_A007186 | |
951 | select SYS_FSL_ERRATUM_A007798 | |
09bfd962 | 952 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 953 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 954 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 955 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 956 | select SYS_FSL_HAS_SEC |
7371774a | 957 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 958 | select SYS_FSL_SEC_BE |
2c2e2c9e | 959 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 960 | select SYS_PPC64 |
d98b98d6 | 961 | select FSL_IFC |
05cb79a7 | 962 | |
f8dee360 YS |
963 | config BOOKE |
964 | bool | |
965 | default y | |
966 | ||
967 | config E500 | |
968 | bool | |
969 | default y | |
970 | help | |
971 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
972 | ||
973 | config E500MC | |
974 | bool | |
975 | help | |
976 | Enble PowerPC E500MC core | |
977 | ||
9ec10107 YS |
978 | config E6500 |
979 | bool | |
980 | help | |
981 | Enable PowerPC E6500 core | |
982 | ||
05cb79a7 YS |
983 | config FSL_LAW |
984 | bool | |
985 | help | |
986 | Use Freescale common code for Local Access Window | |
26bc57da | 987 | |
c6e6bda3 YS |
988 | config SECURE_BOOT |
989 | bool "Secure Boot" | |
990 | help | |
991 | Enable Freescale Secure Boot feature. Normally selected | |
992 | by defconfig. If unsure, do not change. | |
993 | ||
3f82b56d YS |
994 | config MAX_CPUS |
995 | int "Maximum number of CPUs permitted for MPC85xx" | |
996 | default 12 if ARCH_T4240 | |
997 | default 8 if ARCH_P4080 || \ | |
998 | ARCH_T4160 | |
999 | default 4 if ARCH_B4860 || \ | |
1000 | ARCH_P2041 || \ | |
1001 | ARCH_P3041 || \ | |
1002 | ARCH_P5040 || \ | |
1003 | ARCH_T1040 || \ | |
1004 | ARCH_T1042 || \ | |
1005 | ARCH_T2080 || \ | |
1006 | ARCH_T2081 | |
1007 | default 2 if ARCH_B4420 || \ | |
1008 | ARCH_BSC9132 || \ | |
1009 | ARCH_MPC8572 || \ | |
1010 | ARCH_P1020 || \ | |
1011 | ARCH_P1021 || \ | |
1012 | ARCH_P1022 || \ | |
1013 | ARCH_P1023 || \ | |
1014 | ARCH_P1024 || \ | |
1015 | ARCH_P1025 || \ | |
1016 | ARCH_P2020 || \ | |
1017 | ARCH_P5020 || \ | |
3f82b56d YS |
1018 | ARCH_T1023 || \ |
1019 | ARCH_T1024 | |
1020 | default 1 | |
1021 | help | |
1022 | Set this number to the maximum number of possible CPUs in the SoC. | |
1023 | SoCs may have multiple clusters with each cluster may have multiple | |
1024 | ports. If some ports are reserved but higher ports are used for | |
1025 | cores, count the reserved ports. This will allocate enough memory | |
1026 | in spin table to properly handle all cores. | |
1027 | ||
830fc1bf YS |
1028 | config SYS_CCSRBAR_DEFAULT |
1029 | hex "Default CCSRBAR address" | |
1030 | default 0xff700000 if ARCH_BSC9131 || \ | |
1031 | ARCH_BSC9132 || \ | |
1032 | ARCH_C29X || \ | |
1033 | ARCH_MPC8536 || \ | |
1034 | ARCH_MPC8540 || \ | |
1035 | ARCH_MPC8541 || \ | |
1036 | ARCH_MPC8544 || \ | |
1037 | ARCH_MPC8548 || \ | |
1038 | ARCH_MPC8555 || \ | |
1039 | ARCH_MPC8560 || \ | |
1040 | ARCH_MPC8568 || \ | |
1041 | ARCH_MPC8569 || \ | |
1042 | ARCH_MPC8572 || \ | |
1043 | ARCH_P1010 || \ | |
1044 | ARCH_P1011 || \ | |
1045 | ARCH_P1020 || \ | |
1046 | ARCH_P1021 || \ | |
1047 | ARCH_P1022 || \ | |
1048 | ARCH_P1024 || \ | |
1049 | ARCH_P1025 || \ | |
1050 | ARCH_P2020 | |
1051 | default 0xff600000 if ARCH_P1023 | |
1052 | default 0xfe000000 if ARCH_B4420 || \ | |
1053 | ARCH_B4860 || \ | |
1054 | ARCH_P2041 || \ | |
1055 | ARCH_P3041 || \ | |
1056 | ARCH_P4080 || \ | |
1057 | ARCH_P5020 || \ | |
1058 | ARCH_P5040 || \ | |
830fc1bf YS |
1059 | ARCH_T1023 || \ |
1060 | ARCH_T1024 || \ | |
1061 | ARCH_T1040 || \ | |
1062 | ARCH_T1042 || \ | |
1063 | ARCH_T2080 || \ | |
1064 | ARCH_T2081 || \ | |
1065 | ARCH_T4160 || \ | |
1066 | ARCH_T4240 | |
1067 | default 0xe0000000 if ARCH_QEMU_E500 | |
1068 | help | |
1069 | Default value of CCSRBAR comes from power-on-reset. It | |
1070 | is fixed on each SoC. Some SoCs can have different value | |
1071 | if changed by pre-boot regime. The value here must match | |
1072 | the current value in SoC. If not sure, do not change. | |
1073 | ||
63659ff3 YS |
1074 | config SYS_FSL_ERRATUM_A004468 |
1075 | bool | |
1076 | ||
1077 | config SYS_FSL_ERRATUM_A004477 | |
1078 | bool | |
1079 | ||
1080 | config SYS_FSL_ERRATUM_A004508 | |
1081 | bool | |
1082 | ||
1083 | config SYS_FSL_ERRATUM_A004580 | |
1084 | bool | |
1085 | ||
1086 | config SYS_FSL_ERRATUM_A004699 | |
1087 | bool | |
1088 | ||
1089 | config SYS_FSL_ERRATUM_A004849 | |
1090 | bool | |
1091 | ||
1092 | config SYS_FSL_ERRATUM_A004510 | |
1093 | bool | |
1094 | ||
1095 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1096 | hex | |
1097 | depends on SYS_FSL_ERRATUM_A004510 | |
1098 | default 0x20 if ARCH_P4080 | |
1099 | default 0x10 | |
1100 | ||
1101 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1102 | hex | |
1103 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1104 | default 0x11 | |
1105 | ||
1106 | config SYS_FSL_ERRATUM_A005125 | |
1107 | bool | |
1108 | ||
1109 | config SYS_FSL_ERRATUM_A005434 | |
1110 | bool | |
1111 | ||
1112 | config SYS_FSL_ERRATUM_A005812 | |
1113 | bool | |
1114 | ||
1115 | config SYS_FSL_ERRATUM_A005871 | |
1116 | bool | |
1117 | ||
1118 | config SYS_FSL_ERRATUM_A006261 | |
1119 | bool | |
1120 | ||
1121 | config SYS_FSL_ERRATUM_A006379 | |
1122 | bool | |
1123 | ||
1124 | config SYS_FSL_ERRATUM_A006384 | |
1125 | bool | |
1126 | ||
1127 | config SYS_FSL_ERRATUM_A006475 | |
1128 | bool | |
1129 | ||
1130 | config SYS_FSL_ERRATUM_A006593 | |
1131 | bool | |
1132 | ||
1133 | config SYS_FSL_ERRATUM_A007075 | |
1134 | bool | |
1135 | ||
1136 | config SYS_FSL_ERRATUM_A007186 | |
1137 | bool | |
1138 | ||
1139 | config SYS_FSL_ERRATUM_A007212 | |
1140 | bool | |
1141 | ||
09bfd962 TB |
1142 | config SYS_FSL_ERRATUM_A007815 |
1143 | bool | |
1144 | ||
63659ff3 YS |
1145 | config SYS_FSL_ERRATUM_A007798 |
1146 | bool | |
1147 | ||
06ad970b DD |
1148 | config SYS_FSL_ERRATUM_A007907 |
1149 | bool | |
1150 | ||
63659ff3 YS |
1151 | config SYS_FSL_ERRATUM_A008044 |
1152 | bool | |
1153 | ||
1154 | config SYS_FSL_ERRATUM_CPC_A002 | |
1155 | bool | |
1156 | ||
1157 | config SYS_FSL_ERRATUM_CPC_A003 | |
1158 | bool | |
1159 | ||
1160 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1161 | bool | |
1162 | ||
1163 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1164 | bool | |
1165 | ||
1166 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1167 | bool | |
1168 | ||
1169 | config SYS_FSL_A004447_SVR_REV | |
1170 | hex | |
1171 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1172 | default 0x00 if ARCH_MPC8548 | |
1173 | default 0x10 if ARCH_P1010 | |
1174 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1175 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1176 | ||
1177 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1178 | bool | |
1179 | ||
1180 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1181 | bool | |
1182 | ||
1183 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1184 | bool | |
1185 | ||
1186 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1187 | bool | |
1188 | ||
1189 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1190 | bool | |
1191 | ||
1192 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1193 | bool | |
1194 | ||
1195 | config SYS_FSL_ERRATUM_SATA_A001 | |
1196 | bool | |
1197 | ||
1198 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1199 | bool | |
1200 | ||
1201 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1202 | bool | |
1203 | ||
1204 | config SYS_FSL_ERRATUM_USB14 | |
1205 | bool | |
1206 | ||
1207 | config SYS_P4080_ERRATUM_CPU22 | |
1208 | bool | |
1209 | ||
1210 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1211 | bool | |
1212 | ||
1213 | config SYS_P4080_ERRATUM_SERDES8 | |
1214 | bool | |
1215 | ||
1216 | config SYS_P4080_ERRATUM_SERDES9 | |
1217 | bool | |
1218 | ||
1219 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1220 | bool | |
1221 | ||
1222 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1223 | bool | |
1224 | ||
7371774a YS |
1225 | config SYS_FSL_QORIQ_CHASSIS1 |
1226 | bool | |
1227 | ||
1228 | config SYS_FSL_QORIQ_CHASSIS2 | |
1229 | bool | |
1230 | ||
8303acbc YS |
1231 | config SYS_FSL_NUM_LAWS |
1232 | int "Number of local access windows" | |
1233 | depends on FSL_LAW | |
1234 | default 32 if ARCH_B4420 || \ | |
1235 | ARCH_B4860 || \ | |
1236 | ARCH_P2041 || \ | |
1237 | ARCH_P3041 || \ | |
1238 | ARCH_P4080 || \ | |
1239 | ARCH_P5020 || \ | |
1240 | ARCH_P5040 || \ | |
1241 | ARCH_T2080 || \ | |
1242 | ARCH_T2081 || \ | |
1243 | ARCH_T4160 || \ | |
1244 | ARCH_T4240 | |
08a37fd1 | 1245 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1246 | ARCH_T1024 || \ |
1247 | ARCH_T1040 || \ | |
1248 | ARCH_T1042 | |
1249 | default 12 if ARCH_BSC9131 || \ | |
1250 | ARCH_BSC9132 || \ | |
1251 | ARCH_C29X || \ | |
1252 | ARCH_MPC8536 || \ | |
1253 | ARCH_MPC8572 || \ | |
1254 | ARCH_P1010 || \ | |
1255 | ARCH_P1011 || \ | |
1256 | ARCH_P1020 || \ | |
1257 | ARCH_P1021 || \ | |
1258 | ARCH_P1022 || \ | |
1259 | ARCH_P1023 || \ | |
1260 | ARCH_P1024 || \ | |
1261 | ARCH_P1025 || \ | |
1262 | ARCH_P2020 | |
1263 | default 10 if ARCH_MPC8544 || \ | |
1264 | ARCH_MPC8548 || \ | |
1265 | ARCH_MPC8568 || \ | |
1266 | ARCH_MPC8569 | |
1267 | default 8 if ARCH_MPC8540 || \ | |
1268 | ARCH_MPC8541 || \ | |
1269 | ARCH_MPC8555 || \ | |
1270 | ARCH_MPC8560 | |
1271 | help | |
1272 | Number of local access windows. This is fixed per SoC. | |
1273 | If not sure, do not change. | |
1274 | ||
9ec10107 YS |
1275 | config SYS_FSL_THREADS_PER_CORE |
1276 | int | |
1277 | default 2 if E6500 | |
1278 | default 1 | |
1279 | ||
26e79b65 YS |
1280 | config SYS_NUM_TLBCAMS |
1281 | int "Number of TLB CAM entries" | |
1282 | default 64 if E500MC | |
1283 | default 16 | |
1284 | help | |
1285 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1286 | 16 for other E500 SoCs. | |
1287 | ||
4851278e YS |
1288 | config SYS_PPC64 |
1289 | bool | |
1290 | ||
53c95384 YS |
1291 | config SYS_PPC_E500_USE_DEBUG_TLB |
1292 | bool | |
1293 | ||
d98b98d6 PK |
1294 | config FSL_IFC |
1295 | bool | |
1296 | ||
06878977 PK |
1297 | config FSL_ELBC |
1298 | bool | |
1299 | ||
53c95384 YS |
1300 | config SYS_PPC_E500_DEBUG_TLB |
1301 | int "Temporary TLB entry for external debugger" | |
1302 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1303 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1304 | default 1 if ARCH_MPC8536 | |
1305 | default 2 if ARCH_MPC8572 || \ | |
1306 | ARCH_P1011 || \ | |
1307 | ARCH_P1020 || \ | |
1308 | ARCH_P1021 || \ | |
1309 | ARCH_P1022 || \ | |
1310 | ARCH_P1024 || \ | |
1311 | ARCH_P1025 || \ | |
1312 | ARCH_P2020 | |
1313 | default 3 if ARCH_P1010 || \ | |
1314 | ARCH_BSC9132 || \ | |
1315 | ARCH_C29X | |
1316 | help | |
1317 | Select a temporary TLB entry to be used during boot to work | |
1318 | around limitations in e500v1 and e500v2 external debugger | |
1319 | support. This reduces the portions of the boot code where | |
1320 | breakpoints and single stepping do not work. The value of this | |
1321 | symbol should be set to the TLB1 entry to be used for this | |
1322 | purpose. If unsure, do not change. | |
1323 | ||
1c40707e PK |
1324 | config SYS_FSL_IFC_CLK_DIV |
1325 | int "Divider of platform clock" | |
1326 | depends on FSL_IFC | |
1327 | default 2 if ARCH_B4420 || \ | |
1328 | ARCH_B4860 || \ | |
1329 | ARCH_T1024 || \ | |
1330 | ARCH_T1023 || \ | |
1331 | ARCH_T1040 || \ | |
1332 | ARCH_T1042 || \ | |
1333 | ARCH_T4160 || \ | |
1334 | ARCH_T4240 | |
1335 | default 1 | |
1336 | help | |
1337 | Defines divider of platform clock(clock input to | |
1338 | IFC controller). | |
1339 | ||
add63f94 PK |
1340 | config SYS_FSL_LBC_CLK_DIV |
1341 | int "Divider of platform clock" | |
1342 | depends on FSL_ELBC || ARCH_MPC8540 || \ | |
1343 | ARCH_MPC8548 || ARCH_MPC8541 || \ | |
1344 | ARCH_MPC8555 || ARCH_MPC8560 || \ | |
1345 | ARCH_MPC8568 | |
1346 | ||
1347 | default 2 if ARCH_P2041 || \ | |
1348 | ARCH_P3041 || \ | |
1349 | ARCH_P4080 || \ | |
1350 | ARCH_P5020 || \ | |
1351 | ARCH_P5040 | |
1352 | default 1 | |
1353 | ||
1354 | help | |
1355 | Defines divider of platform clock(clock input to | |
1356 | eLBC controller). | |
1357 | ||
dd84058d MY |
1358 | source "board/freescale/b4860qds/Kconfig" |
1359 | source "board/freescale/bsc9131rdb/Kconfig" | |
1360 | source "board/freescale/bsc9132qds/Kconfig" | |
1361 | source "board/freescale/c29xpcie/Kconfig" | |
1362 | source "board/freescale/corenet_ds/Kconfig" | |
1363 | source "board/freescale/mpc8536ds/Kconfig" | |
1364 | source "board/freescale/mpc8540ads/Kconfig" | |
1365 | source "board/freescale/mpc8541cds/Kconfig" | |
1366 | source "board/freescale/mpc8544ds/Kconfig" | |
1367 | source "board/freescale/mpc8548cds/Kconfig" | |
1368 | source "board/freescale/mpc8555cds/Kconfig" | |
1369 | source "board/freescale/mpc8560ads/Kconfig" | |
1370 | source "board/freescale/mpc8568mds/Kconfig" | |
1371 | source "board/freescale/mpc8569mds/Kconfig" | |
1372 | source "board/freescale/mpc8572ds/Kconfig" | |
1373 | source "board/freescale/p1010rdb/Kconfig" | |
1374 | source "board/freescale/p1022ds/Kconfig" | |
1375 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1376 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1377 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1378 | source "board/freescale/p2041rdb/Kconfig" |
1379 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1380 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1381 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1382 | source "board/freescale/t1040qds/Kconfig" |
1383 | source "board/freescale/t104xrdb/Kconfig" | |
1384 | source "board/freescale/t208xqds/Kconfig" | |
1385 | source "board/freescale/t208xrdb/Kconfig" | |
1386 | source "board/freescale/t4qds/Kconfig" | |
1387 | source "board/freescale/t4rdb/Kconfig" | |
1388 | source "board/gdsys/p1022/Kconfig" | |
1389 | source "board/keymile/kmp204x/Kconfig" | |
1390 | source "board/sbc8548/Kconfig" | |
1391 | source "board/socrates/Kconfig" | |
87e29878 | 1392 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1393 | source "board/xes/xpedite520x/Kconfig" |
1394 | source "board/xes/xpedite537x/Kconfig" | |
1395 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1396 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1397 | |
1398 | endmenu |