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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include <common.h> | |
28 | #include <command.h> | |
29 | #include <mmc.h> | |
30 | #include <part.h> | |
31 | #include <malloc.h> | |
32 | #include <linux/list.h> | |
9b1f942c | 33 | #include <div64.h> |
272cc70b | 34 | |
ce0fbcd2 MW |
35 | /* Set block count limit because of 16 bit register limit on some hardware*/ |
36 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
37 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
38 | #endif | |
39 | ||
272cc70b AF |
40 | static struct list_head mmc_devices; |
41 | static int cur_dev_num = -1; | |
42 | ||
11fdade2 SB |
43 | int __board_mmc_getcd(u8 *cd, struct mmc *mmc) { |
44 | return -1; | |
45 | } | |
46 | ||
47 | int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak, | |
48 | alias("__board_mmc_getcd"))); | |
49 | ||
272cc70b AF |
50 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
51 | { | |
5db2fe3a RR |
52 | #ifdef CONFIG_MMC_TRACE |
53 | int ret; | |
54 | int i; | |
55 | u8 *ptr; | |
56 | ||
57 | printf("CMD_SEND:%d\n", cmd->cmdidx); | |
58 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); | |
59 | printf("\t\tFLAG\t\t\t %d\n", cmd->flags); | |
60 | ret = mmc->send_cmd(mmc, cmd, data); | |
61 | switch (cmd->resp_type) { | |
62 | case MMC_RSP_NONE: | |
63 | printf("\t\tMMC_RSP_NONE\n"); | |
64 | break; | |
65 | case MMC_RSP_R1: | |
66 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", | |
67 | cmd->response[0]); | |
68 | break; | |
69 | case MMC_RSP_R1b: | |
70 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", | |
71 | cmd->response[0]); | |
72 | break; | |
73 | case MMC_RSP_R2: | |
74 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", | |
75 | cmd->response[0]); | |
76 | printf("\t\t \t\t 0x%08X \n", | |
77 | cmd->response[1]); | |
78 | printf("\t\t \t\t 0x%08X \n", | |
79 | cmd->response[2]); | |
80 | printf("\t\t \t\t 0x%08X \n", | |
81 | cmd->response[3]); | |
82 | printf("\n"); | |
83 | printf("\t\t\t\t\tDUMPING DATA\n"); | |
84 | for (i = 0; i < 4; i++) { | |
85 | int j; | |
86 | printf("\t\t\t\t\t%03d - ", i*4); | |
87 | ptr = &cmd->response[i]; | |
88 | ptr += 3; | |
89 | for (j = 0; j < 4; j++) | |
90 | printf("%02X ", *ptr--); | |
91 | printf("\n"); | |
92 | } | |
93 | break; | |
94 | case MMC_RSP_R3: | |
95 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", | |
96 | cmd->response[0]); | |
97 | break; | |
98 | default: | |
99 | printf("\t\tERROR MMC rsp not supported\n"); | |
100 | break; | |
101 | } | |
102 | return ret; | |
103 | #else | |
272cc70b | 104 | return mmc->send_cmd(mmc, cmd, data); |
5db2fe3a | 105 | #endif |
272cc70b AF |
106 | } |
107 | ||
5d4fc8d9 RR |
108 | int mmc_send_status(struct mmc *mmc, int timeout) |
109 | { | |
110 | struct mmc_cmd cmd; | |
111 | int err; | |
112 | #ifdef CONFIG_MMC_TRACE | |
113 | int status; | |
114 | #endif | |
115 | ||
116 | cmd.cmdidx = MMC_CMD_SEND_STATUS; | |
117 | cmd.resp_type = MMC_RSP_R1; | |
aaf3d41a MV |
118 | if (!mmc_host_is_spi(mmc)) |
119 | cmd.cmdarg = mmc->rca << 16; | |
5d4fc8d9 RR |
120 | cmd.flags = 0; |
121 | ||
122 | do { | |
123 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
124 | if (err) | |
125 | return err; | |
126 | else if (cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) | |
127 | break; | |
128 | ||
129 | udelay(1000); | |
130 | ||
131 | if (cmd.response[0] & MMC_STATUS_MASK) { | |
132 | printf("Status Error: 0x%08X\n", cmd.response[0]); | |
133 | return COMM_ERR; | |
134 | } | |
135 | } while (timeout--); | |
136 | ||
5db2fe3a RR |
137 | #ifdef CONFIG_MMC_TRACE |
138 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; | |
139 | printf("CURR STATE:%d\n", status); | |
140 | #endif | |
5d4fc8d9 RR |
141 | if (!timeout) { |
142 | printf("Timeout waiting card ready\n"); | |
143 | return TIMEOUT; | |
144 | } | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
272cc70b AF |
149 | int mmc_set_blocklen(struct mmc *mmc, int len) |
150 | { | |
151 | struct mmc_cmd cmd; | |
152 | ||
153 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; | |
154 | cmd.resp_type = MMC_RSP_R1; | |
155 | cmd.cmdarg = len; | |
156 | cmd.flags = 0; | |
157 | ||
158 | return mmc_send_cmd(mmc, &cmd, NULL); | |
159 | } | |
160 | ||
161 | struct mmc *find_mmc_device(int dev_num) | |
162 | { | |
163 | struct mmc *m; | |
164 | struct list_head *entry; | |
165 | ||
166 | list_for_each(entry, &mmc_devices) { | |
167 | m = list_entry(entry, struct mmc, link); | |
168 | ||
169 | if (m->block_dev.dev == dev_num) | |
170 | return m; | |
171 | } | |
172 | ||
173 | printf("MMC Device %d not found\n", dev_num); | |
174 | ||
175 | return NULL; | |
176 | } | |
177 | ||
e6f99a56 LW |
178 | static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) |
179 | { | |
180 | struct mmc_cmd cmd; | |
181 | ulong end; | |
182 | int err, start_cmd, end_cmd; | |
183 | ||
184 | if (mmc->high_capacity) | |
185 | end = start + blkcnt - 1; | |
186 | else { | |
187 | end = (start + blkcnt - 1) * mmc->write_bl_len; | |
188 | start *= mmc->write_bl_len; | |
189 | } | |
190 | ||
191 | if (IS_SD(mmc)) { | |
192 | start_cmd = SD_CMD_ERASE_WR_BLK_START; | |
193 | end_cmd = SD_CMD_ERASE_WR_BLK_END; | |
194 | } else { | |
195 | start_cmd = MMC_CMD_ERASE_GROUP_START; | |
196 | end_cmd = MMC_CMD_ERASE_GROUP_END; | |
197 | } | |
198 | ||
199 | cmd.cmdidx = start_cmd; | |
200 | cmd.cmdarg = start; | |
201 | cmd.resp_type = MMC_RSP_R1; | |
202 | cmd.flags = 0; | |
203 | ||
204 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
205 | if (err) | |
206 | goto err_out; | |
207 | ||
208 | cmd.cmdidx = end_cmd; | |
209 | cmd.cmdarg = end; | |
210 | ||
211 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
212 | if (err) | |
213 | goto err_out; | |
214 | ||
215 | cmd.cmdidx = MMC_CMD_ERASE; | |
216 | cmd.cmdarg = SECURE_ERASE; | |
217 | cmd.resp_type = MMC_RSP_R1b; | |
218 | ||
219 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
220 | if (err) | |
221 | goto err_out; | |
222 | ||
223 | return 0; | |
224 | ||
225 | err_out: | |
226 | puts("mmc erase failed\n"); | |
227 | return err; | |
228 | } | |
229 | ||
230 | static unsigned long | |
231 | mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt) | |
232 | { | |
233 | int err = 0; | |
234 | struct mmc *mmc = find_mmc_device(dev_num); | |
235 | lbaint_t blk = 0, blk_r = 0; | |
236 | ||
237 | if (!mmc) | |
238 | return -1; | |
239 | ||
240 | if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size)) | |
241 | printf("\n\nCaution! Your devices Erase group is 0x%x\n" | |
242 | "The erase range would be change to 0x%lx~0x%lx\n\n", | |
243 | mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), | |
244 | ((start + blkcnt + mmc->erase_grp_size) | |
245 | & ~(mmc->erase_grp_size - 1)) - 1); | |
246 | ||
247 | while (blk < blkcnt) { | |
248 | blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? | |
249 | mmc->erase_grp_size : (blkcnt - blk); | |
250 | err = mmc_erase_t(mmc, start + blk, blk_r); | |
251 | if (err) | |
252 | break; | |
253 | ||
254 | blk += blk_r; | |
255 | } | |
256 | ||
257 | return blk; | |
258 | } | |
259 | ||
272cc70b | 260 | static ulong |
0158126e | 261 | mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src) |
272cc70b AF |
262 | { |
263 | struct mmc_cmd cmd; | |
264 | struct mmc_data data; | |
5d4fc8d9 | 265 | int timeout = 1000; |
272cc70b | 266 | |
d2bf29e3 | 267 | if ((start + blkcnt) > mmc->block_dev.lba) { |
def412b6 | 268 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
269 | start + blkcnt, mmc->block_dev.lba); |
270 | return 0; | |
271 | } | |
272cc70b AF |
272 | |
273 | if (blkcnt > 1) | |
274 | cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; | |
275 | else | |
276 | cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; | |
277 | ||
278 | if (mmc->high_capacity) | |
279 | cmd.cmdarg = start; | |
280 | else | |
def412b6 | 281 | cmd.cmdarg = start * mmc->write_bl_len; |
272cc70b AF |
282 | |
283 | cmd.resp_type = MMC_RSP_R1; | |
284 | cmd.flags = 0; | |
285 | ||
286 | data.src = src; | |
287 | data.blocks = blkcnt; | |
def412b6 | 288 | data.blocksize = mmc->write_bl_len; |
272cc70b AF |
289 | data.flags = MMC_DATA_WRITE; |
290 | ||
def412b6 SS |
291 | if (mmc_send_cmd(mmc, &cmd, &data)) { |
292 | printf("mmc write failed\n"); | |
293 | return 0; | |
272cc70b AF |
294 | } |
295 | ||
d52ebf10 TC |
296 | /* SPI multiblock writes terminate using a special |
297 | * token, not a STOP_TRANSMISSION request. | |
298 | */ | |
299 | if (!mmc_host_is_spi(mmc) && blkcnt > 1) { | |
272cc70b AF |
300 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
301 | cmd.cmdarg = 0; | |
302 | cmd.resp_type = MMC_RSP_R1b; | |
303 | cmd.flags = 0; | |
def412b6 SS |
304 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
305 | printf("mmc fail to send stop cmd\n"); | |
306 | return 0; | |
0158126e | 307 | } |
5d4fc8d9 RR |
308 | |
309 | /* Waiting for the ready status */ | |
310 | mmc_send_status(mmc, timeout); | |
272cc70b AF |
311 | } |
312 | ||
313 | return blkcnt; | |
314 | } | |
315 | ||
0158126e LW |
316 | static ulong |
317 | mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) | |
318 | { | |
0158126e LW |
319 | lbaint_t cur, blocks_todo = blkcnt; |
320 | ||
def412b6 | 321 | struct mmc *mmc = find_mmc_device(dev_num); |
0158126e | 322 | if (!mmc) |
def412b6 | 323 | return 0; |
0158126e | 324 | |
def412b6 SS |
325 | if (mmc_set_blocklen(mmc, mmc->write_bl_len)) |
326 | return 0; | |
0158126e LW |
327 | |
328 | do { | |
8feafcc4 | 329 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
0158126e | 330 | if(mmc_write_blocks(mmc, start, cur, src) != cur) |
def412b6 | 331 | return 0; |
0158126e LW |
332 | blocks_todo -= cur; |
333 | start += cur; | |
334 | src += cur * mmc->write_bl_len; | |
335 | } while (blocks_todo > 0); | |
336 | ||
337 | return blkcnt; | |
338 | } | |
339 | ||
4a1a06bc | 340 | int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt) |
272cc70b AF |
341 | { |
342 | struct mmc_cmd cmd; | |
343 | struct mmc_data data; | |
5d4fc8d9 | 344 | int timeout = 1000; |
272cc70b | 345 | |
4a1a06bc AS |
346 | if (blkcnt > 1) |
347 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
348 | else | |
349 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
350 | |
351 | if (mmc->high_capacity) | |
4a1a06bc | 352 | cmd.cmdarg = start; |
272cc70b | 353 | else |
4a1a06bc | 354 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
355 | |
356 | cmd.resp_type = MMC_RSP_R1; | |
357 | cmd.flags = 0; | |
358 | ||
359 | data.dest = dst; | |
4a1a06bc | 360 | data.blocks = blkcnt; |
272cc70b AF |
361 | data.blocksize = mmc->read_bl_len; |
362 | data.flags = MMC_DATA_READ; | |
363 | ||
4a1a06bc AS |
364 | if (mmc_send_cmd(mmc, &cmd, &data)) |
365 | return 0; | |
272cc70b | 366 | |
4a1a06bc AS |
367 | if (blkcnt > 1) { |
368 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
369 | cmd.cmdarg = 0; | |
370 | cmd.resp_type = MMC_RSP_R1b; | |
371 | cmd.flags = 0; | |
372 | if (mmc_send_cmd(mmc, &cmd, NULL)) { | |
373 | printf("mmc fail to send stop cmd\n"); | |
374 | return 0; | |
375 | } | |
5d4fc8d9 RR |
376 | |
377 | /* Waiting for the ready status */ | |
378 | mmc_send_status(mmc, timeout); | |
272cc70b AF |
379 | } |
380 | ||
4a1a06bc | 381 | return blkcnt; |
272cc70b AF |
382 | } |
383 | ||
384 | static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) | |
385 | { | |
4a1a06bc AS |
386 | lbaint_t cur, blocks_todo = blkcnt; |
387 | ||
388 | if (blkcnt == 0) | |
389 | return 0; | |
272cc70b | 390 | |
4a1a06bc | 391 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
392 | if (!mmc) |
393 | return 0; | |
394 | ||
d2bf29e3 | 395 | if ((start + blkcnt) > mmc->block_dev.lba) { |
4a1a06bc | 396 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
397 | start + blkcnt, mmc->block_dev.lba); |
398 | return 0; | |
399 | } | |
272cc70b | 400 | |
4a1a06bc | 401 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 402 | return 0; |
272cc70b | 403 | |
4a1a06bc | 404 | do { |
8feafcc4 | 405 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
4a1a06bc AS |
406 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
407 | return 0; | |
408 | blocks_todo -= cur; | |
409 | start += cur; | |
410 | dst += cur * mmc->read_bl_len; | |
411 | } while (blocks_todo > 0); | |
272cc70b AF |
412 | |
413 | return blkcnt; | |
414 | } | |
415 | ||
416 | int mmc_go_idle(struct mmc* mmc) | |
417 | { | |
418 | struct mmc_cmd cmd; | |
419 | int err; | |
420 | ||
421 | udelay(1000); | |
422 | ||
423 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
424 | cmd.cmdarg = 0; | |
425 | cmd.resp_type = MMC_RSP_NONE; | |
426 | cmd.flags = 0; | |
427 | ||
428 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
429 | ||
430 | if (err) | |
431 | return err; | |
432 | ||
433 | udelay(2000); | |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
438 | int | |
439 | sd_send_op_cond(struct mmc *mmc) | |
440 | { | |
441 | int timeout = 1000; | |
442 | int err; | |
443 | struct mmc_cmd cmd; | |
444 | ||
445 | do { | |
446 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
447 | cmd.resp_type = MMC_RSP_R1; | |
448 | cmd.cmdarg = 0; | |
449 | cmd.flags = 0; | |
450 | ||
451 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
452 | ||
453 | if (err) | |
454 | return err; | |
455 | ||
456 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
457 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
458 | |
459 | /* | |
460 | * Most cards do not answer if some reserved bits | |
461 | * in the ocr are set. However, Some controller | |
462 | * can set bit 7 (reserved for low voltages), but | |
463 | * how to manage low voltages SD card is not yet | |
464 | * specified. | |
465 | */ | |
d52ebf10 TC |
466 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
467 | (mmc->voltages & 0xff8000); | |
272cc70b AF |
468 | |
469 | if (mmc->version == SD_VERSION_2) | |
470 | cmd.cmdarg |= OCR_HCS; | |
471 | ||
472 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
473 | ||
474 | if (err) | |
475 | return err; | |
476 | ||
477 | udelay(1000); | |
478 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
479 | ||
480 | if (timeout <= 0) | |
481 | return UNUSABLE_ERR; | |
482 | ||
483 | if (mmc->version != SD_VERSION_2) | |
484 | mmc->version = SD_VERSION_1_0; | |
485 | ||
d52ebf10 TC |
486 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
487 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
488 | cmd.resp_type = MMC_RSP_R3; | |
489 | cmd.cmdarg = 0; | |
490 | cmd.flags = 0; | |
491 | ||
492 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
493 | ||
494 | if (err) | |
495 | return err; | |
496 | } | |
497 | ||
998be3dd | 498 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
499 | |
500 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
501 | mmc->rca = 0; | |
502 | ||
503 | return 0; | |
504 | } | |
505 | ||
506 | int mmc_send_op_cond(struct mmc *mmc) | |
507 | { | |
31cacbab | 508 | int timeout = 10000; |
272cc70b AF |
509 | struct mmc_cmd cmd; |
510 | int err; | |
511 | ||
512 | /* Some cards seem to need this */ | |
513 | mmc_go_idle(mmc); | |
514 | ||
31cacbab RR |
515 | /* Asking to the card its capabilities */ |
516 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
517 | cmd.resp_type = MMC_RSP_R3; | |
518 | cmd.cmdarg = 0; | |
519 | cmd.flags = 0; | |
cd6881b5 | 520 | |
31cacbab | 521 | err = mmc_send_cmd(mmc, &cmd, NULL); |
cd6881b5 | 522 | |
31cacbab RR |
523 | if (err) |
524 | return err; | |
cd6881b5 | 525 | |
31cacbab | 526 | udelay(1000); |
cd6881b5 | 527 | |
272cc70b AF |
528 | do { |
529 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
530 | cmd.resp_type = MMC_RSP_R3; | |
31cacbab RR |
531 | cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : |
532 | (mmc->voltages & | |
533 | (cmd.response[0] & OCR_VOLTAGE_MASK)) | | |
534 | (cmd.response[0] & OCR_ACCESS_MODE)); | |
b1f1e821 ŁM |
535 | |
536 | if (mmc->host_caps & MMC_MODE_HC) | |
537 | cmd.cmdarg |= OCR_HCS; | |
538 | ||
272cc70b AF |
539 | cmd.flags = 0; |
540 | ||
541 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
542 | ||
543 | if (err) | |
544 | return err; | |
545 | ||
546 | udelay(1000); | |
547 | } while (!(cmd.response[0] & OCR_BUSY) && timeout--); | |
548 | ||
549 | if (timeout <= 0) | |
550 | return UNUSABLE_ERR; | |
551 | ||
d52ebf10 TC |
552 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
553 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
554 | cmd.resp_type = MMC_RSP_R3; | |
555 | cmd.cmdarg = 0; | |
556 | cmd.flags = 0; | |
557 | ||
558 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
559 | ||
560 | if (err) | |
561 | return err; | |
562 | } | |
563 | ||
272cc70b | 564 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 565 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
566 | |
567 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
568 | mmc->rca = 0; | |
569 | ||
570 | return 0; | |
571 | } | |
572 | ||
573 | ||
574 | int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) | |
575 | { | |
576 | struct mmc_cmd cmd; | |
577 | struct mmc_data data; | |
578 | int err; | |
579 | ||
580 | /* Get the Card Status Register */ | |
581 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
582 | cmd.resp_type = MMC_RSP_R1; | |
583 | cmd.cmdarg = 0; | |
584 | cmd.flags = 0; | |
585 | ||
586 | data.dest = ext_csd; | |
587 | data.blocks = 1; | |
588 | data.blocksize = 512; | |
589 | data.flags = MMC_DATA_READ; | |
590 | ||
591 | err = mmc_send_cmd(mmc, &cmd, &data); | |
592 | ||
593 | return err; | |
594 | } | |
595 | ||
596 | ||
597 | int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) | |
598 | { | |
599 | struct mmc_cmd cmd; | |
5d4fc8d9 RR |
600 | int timeout = 1000; |
601 | int ret; | |
272cc70b AF |
602 | |
603 | cmd.cmdidx = MMC_CMD_SWITCH; | |
604 | cmd.resp_type = MMC_RSP_R1b; | |
605 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
5d4fc8d9 RR |
606 | (index << 16) | |
607 | (value << 8); | |
272cc70b AF |
608 | cmd.flags = 0; |
609 | ||
5d4fc8d9 RR |
610 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
611 | ||
612 | /* Waiting for the ready status */ | |
613 | mmc_send_status(mmc, timeout); | |
614 | ||
615 | return ret; | |
616 | ||
272cc70b AF |
617 | } |
618 | ||
619 | int mmc_change_freq(struct mmc *mmc) | |
620 | { | |
a1969923 | 621 | ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); |
272cc70b AF |
622 | char cardtype; |
623 | int err; | |
624 | ||
625 | mmc->card_caps = 0; | |
626 | ||
d52ebf10 TC |
627 | if (mmc_host_is_spi(mmc)) |
628 | return 0; | |
629 | ||
272cc70b AF |
630 | /* Only version 4 supports high-speed */ |
631 | if (mmc->version < MMC_VERSION_4) | |
632 | return 0; | |
633 | ||
272cc70b AF |
634 | err = mmc_send_ext_csd(mmc, ext_csd); |
635 | ||
636 | if (err) | |
637 | return err; | |
638 | ||
0560db18 | 639 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
272cc70b AF |
640 | |
641 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
642 | ||
643 | if (err) | |
644 | return err; | |
645 | ||
646 | /* Now check to see that it worked */ | |
647 | err = mmc_send_ext_csd(mmc, ext_csd); | |
648 | ||
649 | if (err) | |
650 | return err; | |
651 | ||
652 | /* No high-speed support */ | |
0560db18 | 653 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
272cc70b AF |
654 | return 0; |
655 | ||
656 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
657 | if (cardtype & MMC_HS_52MHZ) | |
658 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; | |
659 | else | |
660 | mmc->card_caps |= MMC_MODE_HS; | |
661 | ||
662 | return 0; | |
663 | } | |
664 | ||
bc897b1d LW |
665 | int mmc_switch_part(int dev_num, unsigned int part_num) |
666 | { | |
667 | struct mmc *mmc = find_mmc_device(dev_num); | |
668 | ||
669 | if (!mmc) | |
670 | return -1; | |
671 | ||
672 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, | |
673 | (mmc->part_config & ~PART_ACCESS_MASK) | |
674 | | (part_num & PART_ACCESS_MASK)); | |
675 | } | |
676 | ||
272cc70b AF |
677 | int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
678 | { | |
679 | struct mmc_cmd cmd; | |
680 | struct mmc_data data; | |
681 | ||
682 | /* Switch the frequency */ | |
683 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
684 | cmd.resp_type = MMC_RSP_R1; | |
685 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
686 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
687 | cmd.cmdarg |= value << (group * 4); | |
688 | cmd.flags = 0; | |
689 | ||
690 | data.dest = (char *)resp; | |
691 | data.blocksize = 64; | |
692 | data.blocks = 1; | |
693 | data.flags = MMC_DATA_READ; | |
694 | ||
695 | return mmc_send_cmd(mmc, &cmd, &data); | |
696 | } | |
697 | ||
698 | ||
699 | int sd_change_freq(struct mmc *mmc) | |
700 | { | |
701 | int err; | |
702 | struct mmc_cmd cmd; | |
f781dd38 A |
703 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
704 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); | |
272cc70b AF |
705 | struct mmc_data data; |
706 | int timeout; | |
707 | ||
708 | mmc->card_caps = 0; | |
709 | ||
d52ebf10 TC |
710 | if (mmc_host_is_spi(mmc)) |
711 | return 0; | |
712 | ||
272cc70b AF |
713 | /* Read the SCR to find out if this card supports higher speeds */ |
714 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
715 | cmd.resp_type = MMC_RSP_R1; | |
716 | cmd.cmdarg = mmc->rca << 16; | |
717 | cmd.flags = 0; | |
718 | ||
719 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
720 | ||
721 | if (err) | |
722 | return err; | |
723 | ||
724 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
725 | cmd.resp_type = MMC_RSP_R1; | |
726 | cmd.cmdarg = 0; | |
727 | cmd.flags = 0; | |
728 | ||
729 | timeout = 3; | |
730 | ||
731 | retry_scr: | |
f781dd38 | 732 | data.dest = (char *)scr; |
272cc70b AF |
733 | data.blocksize = 8; |
734 | data.blocks = 1; | |
735 | data.flags = MMC_DATA_READ; | |
736 | ||
737 | err = mmc_send_cmd(mmc, &cmd, &data); | |
738 | ||
739 | if (err) { | |
740 | if (timeout--) | |
741 | goto retry_scr; | |
742 | ||
743 | return err; | |
744 | } | |
745 | ||
4e3d89ba YK |
746 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
747 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
748 | |
749 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
750 | case 0: | |
751 | mmc->version = SD_VERSION_1_0; | |
752 | break; | |
753 | case 1: | |
754 | mmc->version = SD_VERSION_1_10; | |
755 | break; | |
756 | case 2: | |
757 | mmc->version = SD_VERSION_2; | |
758 | break; | |
759 | default: | |
760 | mmc->version = SD_VERSION_1_0; | |
761 | break; | |
762 | } | |
763 | ||
b44c7083 AS |
764 | if (mmc->scr[0] & SD_DATA_4BIT) |
765 | mmc->card_caps |= MMC_MODE_4BIT; | |
766 | ||
272cc70b AF |
767 | /* Version 1.0 doesn't support switching */ |
768 | if (mmc->version == SD_VERSION_1_0) | |
769 | return 0; | |
770 | ||
771 | timeout = 4; | |
772 | while (timeout--) { | |
773 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
f781dd38 | 774 | (u8 *)switch_status); |
272cc70b AF |
775 | |
776 | if (err) | |
777 | return err; | |
778 | ||
779 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 780 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
781 | break; |
782 | } | |
783 | ||
272cc70b | 784 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 785 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
786 | return 0; |
787 | ||
f781dd38 | 788 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
272cc70b AF |
789 | |
790 | if (err) | |
791 | return err; | |
792 | ||
4e3d89ba | 793 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
794 | mmc->card_caps |= MMC_MODE_HS; |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
799 | /* frequency bases */ | |
800 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 801 | static const int fbase[] = { |
272cc70b AF |
802 | 10000, |
803 | 100000, | |
804 | 1000000, | |
805 | 10000000, | |
806 | }; | |
807 | ||
808 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
809 | * to platforms without floating point. | |
810 | */ | |
5f837c2c | 811 | static const int multipliers[] = { |
272cc70b AF |
812 | 0, /* reserved */ |
813 | 10, | |
814 | 12, | |
815 | 13, | |
816 | 15, | |
817 | 20, | |
818 | 25, | |
819 | 30, | |
820 | 35, | |
821 | 40, | |
822 | 45, | |
823 | 50, | |
824 | 55, | |
825 | 60, | |
826 | 70, | |
827 | 80, | |
828 | }; | |
829 | ||
830 | void mmc_set_ios(struct mmc *mmc) | |
831 | { | |
832 | mmc->set_ios(mmc); | |
833 | } | |
834 | ||
835 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
836 | { | |
837 | if (clock > mmc->f_max) | |
838 | clock = mmc->f_max; | |
839 | ||
840 | if (clock < mmc->f_min) | |
841 | clock = mmc->f_min; | |
842 | ||
843 | mmc->clock = clock; | |
844 | ||
845 | mmc_set_ios(mmc); | |
846 | } | |
847 | ||
848 | void mmc_set_bus_width(struct mmc *mmc, uint width) | |
849 | { | |
850 | mmc->bus_width = width; | |
851 | ||
852 | mmc_set_ios(mmc); | |
853 | } | |
854 | ||
855 | int mmc_startup(struct mmc *mmc) | |
856 | { | |
4137894e | 857 | int err, width; |
272cc70b | 858 | uint mult, freq; |
639b7827 | 859 | u64 cmult, csize, capacity; |
272cc70b | 860 | struct mmc_cmd cmd; |
a1969923 | 861 | ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); |
4137894e | 862 | ALLOC_CACHE_ALIGN_BUFFER(char, test_csd, 512); |
5d4fc8d9 | 863 | int timeout = 1000; |
272cc70b | 864 | |
d52ebf10 TC |
865 | #ifdef CONFIG_MMC_SPI_CRC_ON |
866 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
867 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
868 | cmd.resp_type = MMC_RSP_R1; | |
869 | cmd.cmdarg = 1; | |
870 | cmd.flags = 0; | |
871 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
872 | ||
873 | if (err) | |
874 | return err; | |
875 | } | |
876 | #endif | |
877 | ||
272cc70b | 878 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
879 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
880 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
881 | cmd.resp_type = MMC_RSP_R2; |
882 | cmd.cmdarg = 0; | |
883 | cmd.flags = 0; | |
884 | ||
885 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
886 | ||
887 | if (err) | |
888 | return err; | |
889 | ||
890 | memcpy(mmc->cid, cmd.response, 16); | |
891 | ||
892 | /* | |
893 | * For MMC cards, set the Relative Address. | |
894 | * For SD cards, get the Relatvie Address. | |
895 | * This also puts the cards into Standby State | |
896 | */ | |
d52ebf10 TC |
897 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
898 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
899 | cmd.cmdarg = mmc->rca << 16; | |
900 | cmd.resp_type = MMC_RSP_R6; | |
901 | cmd.flags = 0; | |
272cc70b | 902 | |
d52ebf10 | 903 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 904 | |
d52ebf10 TC |
905 | if (err) |
906 | return err; | |
272cc70b | 907 | |
d52ebf10 TC |
908 | if (IS_SD(mmc)) |
909 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
910 | } | |
272cc70b AF |
911 | |
912 | /* Get the Card-Specific Data */ | |
913 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
914 | cmd.resp_type = MMC_RSP_R2; | |
915 | cmd.cmdarg = mmc->rca << 16; | |
916 | cmd.flags = 0; | |
917 | ||
918 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
919 | ||
5d4fc8d9 RR |
920 | /* Waiting for the ready status */ |
921 | mmc_send_status(mmc, timeout); | |
922 | ||
272cc70b AF |
923 | if (err) |
924 | return err; | |
925 | ||
998be3dd RV |
926 | mmc->csd[0] = cmd.response[0]; |
927 | mmc->csd[1] = cmd.response[1]; | |
928 | mmc->csd[2] = cmd.response[2]; | |
929 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
930 | |
931 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 932 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
933 | |
934 | switch (version) { | |
935 | case 0: | |
936 | mmc->version = MMC_VERSION_1_2; | |
937 | break; | |
938 | case 1: | |
939 | mmc->version = MMC_VERSION_1_4; | |
940 | break; | |
941 | case 2: | |
942 | mmc->version = MMC_VERSION_2_2; | |
943 | break; | |
944 | case 3: | |
945 | mmc->version = MMC_VERSION_3; | |
946 | break; | |
947 | case 4: | |
948 | mmc->version = MMC_VERSION_4; | |
949 | break; | |
950 | default: | |
951 | mmc->version = MMC_VERSION_1_2; | |
952 | break; | |
953 | } | |
954 | } | |
955 | ||
956 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
957 | freq = fbase[(cmd.response[0] & 0x7)]; |
958 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
959 | |
960 | mmc->tran_speed = freq * mult; | |
961 | ||
998be3dd | 962 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
963 | |
964 | if (IS_SD(mmc)) | |
965 | mmc->write_bl_len = mmc->read_bl_len; | |
966 | else | |
998be3dd | 967 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
968 | |
969 | if (mmc->high_capacity) { | |
970 | csize = (mmc->csd[1] & 0x3f) << 16 | |
971 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
972 | cmult = 8; | |
973 | } else { | |
974 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
975 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
976 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
977 | } | |
978 | ||
979 | mmc->capacity = (csize + 1) << (cmult + 2); | |
980 | mmc->capacity *= mmc->read_bl_len; | |
981 | ||
982 | if (mmc->read_bl_len > 512) | |
983 | mmc->read_bl_len = 512; | |
984 | ||
985 | if (mmc->write_bl_len > 512) | |
986 | mmc->write_bl_len = 512; | |
987 | ||
988 | /* Select the card, and put it into Transfer Mode */ | |
d52ebf10 TC |
989 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
990 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
fe8f7066 | 991 | cmd.resp_type = MMC_RSP_R1; |
d52ebf10 TC |
992 | cmd.cmdarg = mmc->rca << 16; |
993 | cmd.flags = 0; | |
994 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
272cc70b | 995 | |
d52ebf10 TC |
996 | if (err) |
997 | return err; | |
998 | } | |
272cc70b | 999 | |
e6f99a56 LW |
1000 | /* |
1001 | * For SD, its erase group is always one sector | |
1002 | */ | |
1003 | mmc->erase_grp_size = 1; | |
bc897b1d | 1004 | mmc->part_config = MMCPART_NOAVAILABLE; |
d23e2c09 SG |
1005 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
1006 | /* check ext_csd version and capacity */ | |
1007 | err = mmc_send_ext_csd(mmc, ext_csd); | |
0560db18 | 1008 | if (!err & (ext_csd[EXT_CSD_REV] >= 2)) { |
639b7827 YS |
1009 | /* |
1010 | * According to the JEDEC Standard, the value of | |
1011 | * ext_csd's capacity is valid if the value is more | |
1012 | * than 2GB | |
1013 | */ | |
0560db18 LW |
1014 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
1015 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | |
1016 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | |
1017 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; | |
639b7827 | 1018 | capacity *= 512; |
b1f1e821 | 1019 | if ((capacity >> 20) > 2 * 1024) |
639b7827 | 1020 | mmc->capacity = capacity; |
d23e2c09 | 1021 | } |
bc897b1d | 1022 | |
e6f99a56 LW |
1023 | /* |
1024 | * Check whether GROUP_DEF is set, if yes, read out | |
1025 | * group size from ext_csd directly, or calculate | |
1026 | * the group size from the csd value. | |
1027 | */ | |
0560db18 LW |
1028 | if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) |
1029 | mmc->erase_grp_size = | |
1030 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024; | |
e6f99a56 LW |
1031 | else { |
1032 | int erase_gsz, erase_gmul; | |
1033 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; | |
1034 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; | |
1035 | mmc->erase_grp_size = (erase_gsz + 1) | |
1036 | * (erase_gmul + 1); | |
1037 | } | |
1038 | ||
bc897b1d | 1039 | /* store the partition info of emmc */ |
0560db18 LW |
1040 | if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) |
1041 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; | |
d23e2c09 SG |
1042 | } |
1043 | ||
272cc70b AF |
1044 | if (IS_SD(mmc)) |
1045 | err = sd_change_freq(mmc); | |
1046 | else | |
1047 | err = mmc_change_freq(mmc); | |
1048 | ||
1049 | if (err) | |
1050 | return err; | |
1051 | ||
1052 | /* Restrict card's capabilities by what the host can do */ | |
1053 | mmc->card_caps &= mmc->host_caps; | |
1054 | ||
1055 | if (IS_SD(mmc)) { | |
1056 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1057 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
1058 | cmd.resp_type = MMC_RSP_R1; | |
1059 | cmd.cmdarg = mmc->rca << 16; | |
1060 | cmd.flags = 0; | |
1061 | ||
1062 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1063 | if (err) | |
1064 | return err; | |
1065 | ||
1066 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
1067 | cmd.resp_type = MMC_RSP_R1; | |
1068 | cmd.cmdarg = 2; | |
1069 | cmd.flags = 0; | |
1070 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1071 | if (err) | |
1072 | return err; | |
1073 | ||
1074 | mmc_set_bus_width(mmc, 4); | |
1075 | } | |
1076 | ||
1077 | if (mmc->card_caps & MMC_MODE_HS) | |
1078 | mmc_set_clock(mmc, 50000000); | |
1079 | else | |
1080 | mmc_set_clock(mmc, 25000000); | |
1081 | } else { | |
4137894e | 1082 | for (width = EXT_CSD_BUS_WIDTH_8; width >= 0; width--) { |
272cc70b AF |
1083 | /* Set the card to use 4 bit*/ |
1084 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
4137894e | 1085 | EXT_CSD_BUS_WIDTH, width); |
272cc70b AF |
1086 | |
1087 | if (err) | |
4137894e | 1088 | continue; |
272cc70b | 1089 | |
4137894e LW |
1090 | if (!width) { |
1091 | mmc_set_bus_width(mmc, 1); | |
1092 | break; | |
1093 | } else | |
1094 | mmc_set_bus_width(mmc, 4 * width); | |
1095 | ||
1096 | err = mmc_send_ext_csd(mmc, test_csd); | |
1097 | if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \ | |
1098 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] | |
1099 | && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1100 | == test_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1101 | && ext_csd[EXT_CSD_REV] \ | |
1102 | == test_csd[EXT_CSD_REV] | |
1103 | && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \ | |
1104 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] | |
1105 | && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \ | |
1106 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { | |
1107 | ||
1108 | mmc->card_caps |= width; | |
1109 | break; | |
1110 | } | |
272cc70b AF |
1111 | } |
1112 | ||
1113 | if (mmc->card_caps & MMC_MODE_HS) { | |
1114 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
1115 | mmc_set_clock(mmc, 52000000); | |
1116 | else | |
1117 | mmc_set_clock(mmc, 26000000); | |
1118 | } else | |
1119 | mmc_set_clock(mmc, 20000000); | |
1120 | } | |
1121 | ||
1122 | /* fill in device description */ | |
1123 | mmc->block_dev.lun = 0; | |
1124 | mmc->block_dev.type = 0; | |
1125 | mmc->block_dev.blksz = mmc->read_bl_len; | |
9b1f942c | 1126 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
0b453ffe RV |
1127 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8, |
1128 | (mmc->cid[2] << 8) | (mmc->cid[3] >> 24)); | |
1129 | sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff, | |
1130 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
1131 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
1132 | sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, | |
1133 | (mmc->cid[2] >> 24) & 0xf); | |
272cc70b AF |
1134 | init_part(&mmc->block_dev); |
1135 | ||
1136 | return 0; | |
1137 | } | |
1138 | ||
1139 | int mmc_send_if_cond(struct mmc *mmc) | |
1140 | { | |
1141 | struct mmc_cmd cmd; | |
1142 | int err; | |
1143 | ||
1144 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
1145 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
1146 | cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; | |
1147 | cmd.resp_type = MMC_RSP_R7; | |
1148 | cmd.flags = 0; | |
1149 | ||
1150 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1151 | ||
1152 | if (err) | |
1153 | return err; | |
1154 | ||
998be3dd | 1155 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
1156 | return UNUSABLE_ERR; |
1157 | else | |
1158 | mmc->version = SD_VERSION_2; | |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
1163 | int mmc_register(struct mmc *mmc) | |
1164 | { | |
1165 | /* Setup the universal parts of the block interface just once */ | |
1166 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
1167 | mmc->block_dev.dev = cur_dev_num++; | |
1168 | mmc->block_dev.removable = 1; | |
1169 | mmc->block_dev.block_read = mmc_bread; | |
1170 | mmc->block_dev.block_write = mmc_bwrite; | |
e6f99a56 | 1171 | mmc->block_dev.block_erase = mmc_berase; |
8feafcc4 JR |
1172 | if (!mmc->b_max) |
1173 | mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; | |
272cc70b AF |
1174 | |
1175 | INIT_LIST_HEAD (&mmc->link); | |
1176 | ||
1177 | list_add_tail (&mmc->link, &mmc_devices); | |
1178 | ||
1179 | return 0; | |
1180 | } | |
1181 | ||
df3fc526 | 1182 | #ifdef CONFIG_PARTITIONS |
272cc70b AF |
1183 | block_dev_desc_t *mmc_get_dev(int dev) |
1184 | { | |
1185 | struct mmc *mmc = find_mmc_device(dev); | |
1186 | ||
e85649c7 | 1187 | return mmc ? &mmc->block_dev : NULL; |
272cc70b | 1188 | } |
df3fc526 | 1189 | #endif |
272cc70b AF |
1190 | |
1191 | int mmc_init(struct mmc *mmc) | |
1192 | { | |
afd5932b | 1193 | int err; |
272cc70b | 1194 | |
bc897b1d LW |
1195 | if (mmc->has_init) |
1196 | return 0; | |
1197 | ||
272cc70b AF |
1198 | err = mmc->init(mmc); |
1199 | ||
1200 | if (err) | |
1201 | return err; | |
1202 | ||
b86b85e2 IY |
1203 | mmc_set_bus_width(mmc, 1); |
1204 | mmc_set_clock(mmc, 1); | |
1205 | ||
272cc70b AF |
1206 | /* Reset the Card */ |
1207 | err = mmc_go_idle(mmc); | |
1208 | ||
1209 | if (err) | |
1210 | return err; | |
1211 | ||
bc897b1d LW |
1212 | /* The internal partition reset to user partition(0) at every CMD0*/ |
1213 | mmc->part_num = 0; | |
1214 | ||
272cc70b | 1215 | /* Test for SD version 2 */ |
afd5932b | 1216 | err = mmc_send_if_cond(mmc); |
272cc70b | 1217 | |
272cc70b AF |
1218 | /* Now try to get the SD card's operating condition */ |
1219 | err = sd_send_op_cond(mmc); | |
1220 | ||
1221 | /* If the command timed out, we check for an MMC card */ | |
1222 | if (err == TIMEOUT) { | |
1223 | err = mmc_send_op_cond(mmc); | |
1224 | ||
1225 | if (err) { | |
1226 | printf("Card did not respond to voltage select!\n"); | |
1227 | return UNUSABLE_ERR; | |
1228 | } | |
1229 | } | |
1230 | ||
bc897b1d LW |
1231 | err = mmc_startup(mmc); |
1232 | if (err) | |
1233 | mmc->has_init = 0; | |
1234 | else | |
1235 | mmc->has_init = 1; | |
1236 | return err; | |
272cc70b AF |
1237 | } |
1238 | ||
1239 | /* | |
1240 | * CPU and board-specific MMC initializations. Aliased function | |
1241 | * signals caller to move on | |
1242 | */ | |
1243 | static int __def_mmc_init(bd_t *bis) | |
1244 | { | |
1245 | return -1; | |
1246 | } | |
1247 | ||
f9a109b3 PT |
1248 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
1249 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b AF |
1250 | |
1251 | void print_mmc_devices(char separator) | |
1252 | { | |
1253 | struct mmc *m; | |
1254 | struct list_head *entry; | |
1255 | ||
1256 | list_for_each(entry, &mmc_devices) { | |
1257 | m = list_entry(entry, struct mmc, link); | |
1258 | ||
1259 | printf("%s: %d", m->name, m->block_dev.dev); | |
1260 | ||
1261 | if (entry->next != &mmc_devices) | |
1262 | printf("%c ", separator); | |
1263 | } | |
1264 | ||
1265 | printf("\n"); | |
1266 | } | |
1267 | ||
ea6ebe21 LW |
1268 | int get_mmc_num(void) |
1269 | { | |
1270 | return cur_dev_num; | |
1271 | } | |
1272 | ||
272cc70b AF |
1273 | int mmc_initialize(bd_t *bis) |
1274 | { | |
1275 | INIT_LIST_HEAD (&mmc_devices); | |
1276 | cur_dev_num = 0; | |
1277 | ||
1278 | if (board_mmc_init(bis) < 0) | |
1279 | cpu_mmc_init(bis); | |
1280 | ||
1281 | print_mmc_devices(','); | |
1282 | ||
1283 | return 0; | |
1284 | } |