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Commit | Line | Data |
---|---|---|
e85390dc WD |
1 | /* |
2 | * COM1 NS16550 support | |
a47a12be | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
6d0f6bcf | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
e85390dc WD |
5 | */ |
6 | ||
fa54eb12 | 7 | #include <common.h> |
50fce1d5 | 8 | #include <clk.h> |
12e431b2 SG |
9 | #include <dm.h> |
10 | #include <errno.h> | |
11 | #include <fdtdec.h> | |
e85390dc | 12 | #include <ns16550.h> |
12e431b2 | 13 | #include <serial.h> |
a1b322a9 | 14 | #include <watchdog.h> |
167cdad1 GR |
15 | #include <linux/types.h> |
16 | #include <asm/io.h> | |
e85390dc | 17 | |
12e431b2 SG |
18 | DECLARE_GLOBAL_DATA_PTR; |
19 | ||
200779e3 DZ |
20 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
21 | #define UART_MCRVAL (UART_MCR_DTR | \ | |
22 | UART_MCR_RTS) /* RTS/DTR */ | |
12e431b2 SG |
23 | |
24 | #ifndef CONFIG_DM_SERIAL | |
167cdad1 | 25 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
f8df9d0d SG |
26 | #define serial_out(x, y) outb(x, (ulong)y) |
27 | #define serial_in(y) inb((ulong)y) | |
79df1208 | 28 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
f8df9d0d SG |
29 | #define serial_out(x, y) out_be32(y, x) |
30 | #define serial_in(y) in_be32(y) | |
79df1208 | 31 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
f8df9d0d SG |
32 | #define serial_out(x, y) out_le32(y, x) |
33 | #define serial_in(y) in_le32(y) | |
167cdad1 | 34 | #else |
f8df9d0d SG |
35 | #define serial_out(x, y) writeb(x, y) |
36 | #define serial_in(y) readb(y) | |
167cdad1 | 37 | #endif |
12e431b2 | 38 | #endif /* !CONFIG_DM_SERIAL */ |
e85390dc | 39 | |
7c387646 | 40 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
41 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
42 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) | |
d57dee57 KM |
43 | #undef UART_MCRVAL |
44 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL | |
45 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) | |
46 | #else | |
47 | #define UART_MCRVAL (UART_MCR_RTS) | |
48 | #endif | |
ef509b90 VA |
49 | #endif |
50 | ||
a160ea0b PW |
51 | #ifndef CONFIG_SYS_NS16550_IER |
52 | #define CONFIG_SYS_NS16550_IER 0x00 | |
53 | #endif /* CONFIG_SYS_NS16550_IER */ | |
54 | ||
363e6da1 | 55 | static inline void serial_out_shift(void *addr, int shift, int value) |
76571674 | 56 | { |
12e431b2 | 57 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
1f77690e | 58 | outb(value, (ulong)addr); |
12e431b2 SG |
59 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
60 | out_le32(addr, value); | |
61 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
62 | out_be32(addr, value); | |
90914008 SG |
63 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
64 | writel(value, addr); | |
12e431b2 | 65 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
76571674 | 66 | writeb(value, addr + (1 << shift) - 1); |
12e431b2 SG |
67 | #else |
68 | writeb(value, addr); | |
69 | #endif | |
70 | } | |
71 | ||
363e6da1 | 72 | static inline int serial_in_shift(void *addr, int shift) |
12e431b2 | 73 | { |
12e431b2 | 74 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
1f77690e | 75 | return inb((ulong)addr); |
12e431b2 SG |
76 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
77 | return in_le32(addr); | |
78 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
79 | return in_be32(addr); | |
90914008 SG |
80 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
81 | return readl(addr); | |
12e431b2 | 82 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
20379c11 | 83 | return readb(addr + (1 << shift) - 1); |
12e431b2 SG |
84 | #else |
85 | return readb(addr); | |
86 | #endif | |
87 | } | |
88 | ||
fa4ce723 MV |
89 | #ifdef CONFIG_DM_SERIAL |
90 | ||
91 | #ifndef CONFIG_SYS_NS16550_CLK | |
92 | #define CONFIG_SYS_NS16550_CLK 0 | |
93 | #endif | |
94 | ||
76571674 SG |
95 | static void ns16550_writeb(NS16550_t port, int offset, int value) |
96 | { | |
97 | struct ns16550_platdata *plat = port->plat; | |
98 | unsigned char *addr; | |
99 | ||
100 | offset *= 1 << plat->reg_shift; | |
df8ec55d PB |
101 | addr = (unsigned char *)plat->base + offset; |
102 | ||
76571674 SG |
103 | /* |
104 | * As far as we know it doesn't make sense to support selection of | |
105 | * these options at run-time, so use the existing CONFIG options. | |
106 | */ | |
59b35ddd | 107 | serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); |
76571674 SG |
108 | } |
109 | ||
110 | static int ns16550_readb(NS16550_t port, int offset) | |
111 | { | |
112 | struct ns16550_platdata *plat = port->plat; | |
113 | unsigned char *addr; | |
114 | ||
115 | offset *= 1 << plat->reg_shift; | |
df8ec55d | 116 | addr = (unsigned char *)plat->base + offset; |
76571674 | 117 | |
59b35ddd | 118 | return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); |
76571674 SG |
119 | } |
120 | ||
65f83802 MV |
121 | static u32 ns16550_getfcr(NS16550_t port) |
122 | { | |
123 | struct ns16550_platdata *plat = port->plat; | |
124 | ||
125 | return plat->fcr; | |
126 | } | |
127 | ||
12e431b2 SG |
128 | /* We can clean these up once everything is moved to driver model */ |
129 | #define serial_out(value, addr) \ | |
363e6da1 SG |
130 | ns16550_writeb(com_port, \ |
131 | (unsigned char *)addr - (unsigned char *)com_port, value) | |
12e431b2 | 132 | #define serial_in(addr) \ |
363e6da1 SG |
133 | ns16550_readb(com_port, \ |
134 | (unsigned char *)addr - (unsigned char *)com_port) | |
65f83802 MV |
135 | #else |
136 | static u32 ns16550_getfcr(NS16550_t port) | |
137 | { | |
17fa0326 | 138 | return UART_FCR_DEFVAL; |
65f83802 | 139 | } |
12e431b2 SG |
140 | #endif |
141 | ||
03c6f176 | 142 | int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) |
fa54eb12 SG |
143 | { |
144 | const unsigned int mode_x_div = 16; | |
145 | ||
21d00436 SG |
146 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); |
147 | } | |
148 | ||
8bbe33c8 SG |
149 | static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) |
150 | { | |
151 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); | |
152 | serial_out(baud_divisor & 0xff, &com_port->dll); | |
153 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); | |
154 | serial_out(UART_LCRVAL, &com_port->lcr); | |
155 | } | |
156 | ||
f8df9d0d | 157 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
e85390dc | 158 | { |
956a8bae GG |
159 | #if (defined(CONFIG_SPL_BUILD) && \ |
160 | (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) | |
fd2aeac5 | 161 | /* |
956a8bae GG |
162 | * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode |
163 | * before SPL starts only THRE bit is set. We have to empty the | |
164 | * transmitter before initialization starts. | |
fd2aeac5 MH |
165 | */ |
166 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) | |
167 | == UART_LSR_THRE) { | |
12e431b2 SG |
168 | if (baud_divisor != -1) |
169 | NS16550_setbrg(com_port, baud_divisor); | |
fd2aeac5 MH |
170 | serial_out(0, &com_port->mdr1); |
171 | } | |
172 | #endif | |
173 | ||
cb55b332 SW |
174 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
175 | ; | |
176 | ||
a160ea0b | 177 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
456ccfdf TR |
178 | #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ |
179 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) | |
167cdad1 | 180 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
945af8d7 | 181 | #endif |
167cdad1 | 182 | serial_out(UART_MCRVAL, &com_port->mcr); |
65f83802 | 183 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
12e431b2 SG |
184 | if (baud_divisor != -1) |
185 | NS16550_setbrg(com_port, baud_divisor); | |
8ac22a60 | 186 | #if defined(CONFIG_OMAP) || \ |
6213a68f | 187 | defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ |
9ed6e412 | 188 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
5289e83a | 189 | |
f8df9d0d SG |
190 | /* /16 is proper to hit 115200 with 48MHz */ |
191 | serial_out(0, &com_port->mdr1); | |
b4746d8b | 192 | #endif /* CONFIG_OMAP */ |
7c387646 | 193 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
194 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
195 | #endif | |
e85390dc WD |
196 | } |
197 | ||
f5675aa5 | 198 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 199 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
e85390dc | 200 | { |
a160ea0b | 201 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
8bbe33c8 | 202 | NS16550_setbrg(com_port, 0); |
167cdad1 | 203 | serial_out(UART_MCRVAL, &com_port->mcr); |
65f83802 | 204 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
8bbe33c8 | 205 | NS16550_setbrg(com_port, baud_divisor); |
e85390dc | 206 | } |
f5675aa5 | 207 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
e85390dc | 208 | |
f8df9d0d | 209 | void NS16550_putc(NS16550_t com_port, char c) |
e85390dc | 210 | { |
f8df9d0d SG |
211 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
212 | ; | |
167cdad1 | 213 | serial_out(c, &com_port->thr); |
1a2d9b30 SR |
214 | |
215 | /* | |
216 | * Call watchdog_reset() upon newline. This is done here in putc | |
217 | * since the environment code uses a single puts() to print the complete | |
218 | * environment upon "printenv". So we can't put this watchdog call | |
219 | * in puts(). | |
220 | */ | |
221 | if (c == '\n') | |
222 | WATCHDOG_RESET(); | |
e85390dc WD |
223 | } |
224 | ||
f5675aa5 | 225 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 226 | char NS16550_getc(NS16550_t com_port) |
e85390dc | 227 | { |
167cdad1 | 228 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
f2041388 | 229 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
232c150a WD |
230 | extern void usbtty_poll(void); |
231 | usbtty_poll(); | |
232 | #endif | |
a1b322a9 | 233 | WATCHDOG_RESET(); |
232c150a | 234 | } |
167cdad1 | 235 | return serial_in(&com_port->rbr); |
e85390dc WD |
236 | } |
237 | ||
f8df9d0d | 238 | int NS16550_tstc(NS16550_t com_port) |
e85390dc | 239 | { |
f8df9d0d | 240 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
e85390dc WD |
241 | } |
242 | ||
f5675aa5 | 243 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
12e431b2 | 244 | |
21d00436 SG |
245 | #ifdef CONFIG_DEBUG_UART_NS16550 |
246 | ||
247 | #include <debug_uart.h> | |
248 | ||
97b05973 | 249 | static inline void _debug_uart_init(void) |
21d00436 SG |
250 | { |
251 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
252 | int baud_divisor; | |
253 | ||
254 | /* | |
255 | * We copy the code from above because it is already horribly messy. | |
256 | * Trying to refactor to nicely remove the duplication doesn't seem | |
257 | * feasible. The better fix is to move all users of this driver to | |
258 | * driver model. | |
259 | */ | |
03c6f176 MV |
260 | baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, |
261 | CONFIG_BAUDRATE); | |
6e780c7a SG |
262 | serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); |
263 | serial_dout(&com_port->mcr, UART_MCRVAL); | |
17fa0326 | 264 | serial_dout(&com_port->fcr, UART_FCR_DEFVAL); |
6e780c7a SG |
265 | |
266 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); | |
267 | serial_dout(&com_port->dll, baud_divisor & 0xff); | |
268 | serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); | |
269 | serial_dout(&com_port->lcr, UART_LCRVAL); | |
21d00436 SG |
270 | } |
271 | ||
272 | static inline void _debug_uart_putc(int ch) | |
273 | { | |
274 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
275 | ||
6e780c7a | 276 | while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) |
21d00436 | 277 | ; |
6e780c7a | 278 | serial_dout(&com_port->thr, ch); |
21d00436 SG |
279 | } |
280 | ||
281 | DEBUG_UART_FUNCS | |
282 | ||
283 | #endif | |
284 | ||
a52cf086 LV |
285 | #ifdef CONFIG_DEBUG_UART_OMAP |
286 | ||
287 | #include <debug_uart.h> | |
288 | ||
289 | static inline void _debug_uart_init(void) | |
290 | { | |
291 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
292 | int baud_divisor; | |
293 | ||
294 | baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, | |
295 | CONFIG_BAUDRATE); | |
296 | serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); | |
297 | serial_dout(&com_port->mdr1, 0x7); | |
298 | serial_dout(&com_port->mcr, UART_MCRVAL); | |
299 | serial_dout(&com_port->fcr, UART_FCR_DEFVAL); | |
300 | ||
301 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); | |
302 | serial_dout(&com_port->dll, baud_divisor & 0xff); | |
303 | serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); | |
304 | serial_dout(&com_port->lcr, UART_LCRVAL); | |
305 | serial_dout(&com_port->mdr1, 0x0); | |
306 | } | |
307 | ||
308 | static inline void _debug_uart_putc(int ch) | |
309 | { | |
310 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
311 | ||
312 | while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) | |
313 | ; | |
314 | serial_dout(&com_port->thr, ch); | |
315 | } | |
316 | ||
317 | DEBUG_UART_FUNCS | |
318 | ||
319 | #endif | |
320 | ||
12e431b2 SG |
321 | #ifdef CONFIG_DM_SERIAL |
322 | static int ns16550_serial_putc(struct udevice *dev, const char ch) | |
323 | { | |
324 | struct NS16550 *const com_port = dev_get_priv(dev); | |
325 | ||
326 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) | |
327 | return -EAGAIN; | |
328 | serial_out(ch, &com_port->thr); | |
329 | ||
330 | /* | |
331 | * Call watchdog_reset() upon newline. This is done here in putc | |
332 | * since the environment code uses a single puts() to print the complete | |
333 | * environment upon "printenv". So we can't put this watchdog call | |
334 | * in puts(). | |
335 | */ | |
336 | if (ch == '\n') | |
337 | WATCHDOG_RESET(); | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static int ns16550_serial_pending(struct udevice *dev, bool input) | |
343 | { | |
344 | struct NS16550 *const com_port = dev_get_priv(dev); | |
345 | ||
346 | if (input) | |
347 | return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; | |
348 | else | |
349 | return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; | |
350 | } | |
351 | ||
352 | static int ns16550_serial_getc(struct udevice *dev) | |
353 | { | |
354 | struct NS16550 *const com_port = dev_get_priv(dev); | |
355 | ||
aea2be20 | 356 | if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) |
12e431b2 SG |
357 | return -EAGAIN; |
358 | ||
359 | return serial_in(&com_port->rbr); | |
360 | } | |
361 | ||
362 | static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) | |
363 | { | |
364 | struct NS16550 *const com_port = dev_get_priv(dev); | |
365 | struct ns16550_platdata *plat = com_port->plat; | |
366 | int clock_divisor; | |
367 | ||
368 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); | |
369 | ||
370 | NS16550_setbrg(com_port, clock_divisor); | |
371 | ||
372 | return 0; | |
373 | } | |
374 | ||
375 | int ns16550_serial_probe(struct udevice *dev) | |
376 | { | |
377 | struct NS16550 *const com_port = dev_get_priv(dev); | |
378 | ||
11c1a878 | 379 | com_port->plat = dev_get_platdata(dev); |
12e431b2 SG |
380 | NS16550_init(com_port, -1); |
381 | ||
382 | return 0; | |
383 | } | |
384 | ||
79fd9281 MV |
385 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
386 | enum { | |
387 | PORT_NS16550 = 0, | |
0b060eef | 388 | PORT_JZ4780, |
79fd9281 MV |
389 | }; |
390 | #endif | |
391 | ||
b2927fba | 392 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
12e431b2 SG |
393 | int ns16550_serial_ofdata_to_platdata(struct udevice *dev) |
394 | { | |
12e431b2 | 395 | struct ns16550_platdata *plat = dev->platdata; |
0b060eef | 396 | const u32 port_type = dev_get_driver_data(dev); |
12e431b2 | 397 | fdt_addr_t addr; |
021abf69 MY |
398 | struct clk clk; |
399 | int err; | |
12e431b2 | 400 | |
3db886a5 | 401 | /* try Processor Local Bus device first */ |
4e9838c1 | 402 | addr = dev_get_addr(dev); |
fcc0a877 | 403 | #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) |
3db886a5 BM |
404 | if (addr == FDT_ADDR_T_NONE) { |
405 | /* then try pci device */ | |
406 | struct fdt_pci_addr pci_addr; | |
407 | u32 bar; | |
408 | int ret; | |
409 | ||
410 | /* we prefer to use a memory-mapped register */ | |
e160f7d4 | 411 | ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), |
3db886a5 BM |
412 | FDT_PCI_SPACE_MEM32, "reg", |
413 | &pci_addr); | |
414 | if (ret) { | |
415 | /* try if there is any i/o-mapped register */ | |
416 | ret = fdtdec_get_pci_addr(gd->fdt_blob, | |
e160f7d4 | 417 | dev_of_offset(dev), |
3db886a5 BM |
418 | FDT_PCI_SPACE_IO, |
419 | "reg", &pci_addr); | |
420 | if (ret) | |
421 | return ret; | |
422 | } | |
423 | ||
fcc0a877 | 424 | ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); |
3db886a5 BM |
425 | if (ret) |
426 | return ret; | |
427 | ||
428 | addr = bar; | |
429 | } | |
430 | #endif | |
431 | ||
12e431b2 SG |
432 | if (addr == FDT_ADDR_T_NONE) |
433 | return -EINVAL; | |
434 | ||
df8ec55d | 435 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
167efe01 | 436 | plat->base = addr; |
df8ec55d PB |
437 | #else |
438 | plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); | |
439 | #endif | |
440 | ||
e160f7d4 | 441 | plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
59b35ddd | 442 | "reg-offset", 0); |
e160f7d4 | 443 | plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
80e06146 | 444 | "reg-shift", 0); |
50fce1d5 PB |
445 | |
446 | err = clk_get_by_index(dev, 0, &clk); | |
447 | if (!err) { | |
448 | err = clk_get_rate(&clk); | |
449 | if (!IS_ERR_VALUE(err)) | |
450 | plat->clock = err; | |
ab895d6a | 451 | } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { |
50fce1d5 PB |
452 | debug("ns16550 failed to get clock\n"); |
453 | return err; | |
454 | } | |
455 | ||
456 | if (!plat->clock) | |
e160f7d4 | 457 | plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
50fce1d5 PB |
458 | "clock-frequency", |
459 | CONFIG_SYS_NS16550_CLK); | |
8e62d32e TC |
460 | if (!plat->clock) { |
461 | debug("ns16550 clock not defined\n"); | |
462 | return -EINVAL; | |
463 | } | |
12e431b2 | 464 | |
17fa0326 | 465 | plat->fcr = UART_FCR_DEFVAL; |
0b060eef MV |
466 | if (port_type == PORT_JZ4780) |
467 | plat->fcr |= UART_FCR_UME; | |
65f83802 | 468 | |
12e431b2 SG |
469 | return 0; |
470 | } | |
11c1a878 | 471 | #endif |
12e431b2 SG |
472 | |
473 | const struct dm_serial_ops ns16550_serial_ops = { | |
474 | .putc = ns16550_serial_putc, | |
475 | .pending = ns16550_serial_pending, | |
476 | .getc = ns16550_serial_getc, | |
477 | .setbrg = ns16550_serial_setbrg, | |
478 | }; | |
8e62d32e | 479 | |
6f8c351e | 480 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
cc4228f9 TC |
481 | /* |
482 | * Please consider existing compatible strings before adding a new | |
483 | * one to keep this table compact. Or you may add a generic "ns16550" | |
484 | * compatible string to your dts. | |
485 | */ | |
8e62d32e | 486 | static const struct udevice_id ns16550_serial_ids[] = { |
79fd9281 MV |
487 | { .compatible = "ns16550", .data = PORT_NS16550 }, |
488 | { .compatible = "ns16550a", .data = PORT_NS16550 }, | |
0b060eef | 489 | { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, |
79fd9281 MV |
490 | { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, |
491 | { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, | |
492 | { .compatible = "ti,omap2-uart", .data = PORT_NS16550 }, | |
493 | { .compatible = "ti,omap3-uart", .data = PORT_NS16550 }, | |
494 | { .compatible = "ti,omap4-uart", .data = PORT_NS16550 }, | |
495 | { .compatible = "ti,am3352-uart", .data = PORT_NS16550 }, | |
496 | { .compatible = "ti,am4372-uart", .data = PORT_NS16550 }, | |
497 | { .compatible = "ti,dra742-uart", .data = PORT_NS16550 }, | |
8e62d32e TC |
498 | {} |
499 | }; | |
6f8c351e | 500 | #endif /* OF_CONTROL && !OF_PLATDATA */ |
8e62d32e | 501 | |
b7e29834 | 502 | #if CONFIG_IS_ENABLED(SERIAL_PRESENT) |
6f8c351e AG |
503 | |
504 | /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ | |
505 | #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) | |
8e62d32e TC |
506 | U_BOOT_DRIVER(ns16550_serial) = { |
507 | .name = "ns16550_serial", | |
508 | .id = UCLASS_SERIAL, | |
6f8c351e | 509 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
8e62d32e TC |
510 | .of_match = ns16550_serial_ids, |
511 | .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata, | |
512 | .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), | |
513 | #endif | |
514 | .priv_auto_alloc_size = sizeof(struct NS16550), | |
515 | .probe = ns16550_serial_probe, | |
516 | .ops = &ns16550_serial_ops, | |
b7e5a643 | 517 | .flags = DM_FLAG_PRE_RELOC, |
8e62d32e | 518 | }; |
b7e29834 | 519 | #endif |
6f8c351e AG |
520 | #endif /* SERIAL_PRESENT */ |
521 | ||
12e431b2 | 522 | #endif /* CONFIG_DM_SERIAL */ |