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56523f12 1/*
69445d6c 2 * (C) Copyright 2003-2014
56523f12
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
45a212c4 5 * (C) Copyright 2004-2006
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6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
3765b3e7 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
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14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
b2a6dfe4 19#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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20#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
56523f12 22
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23/*
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
29 */
30#ifndef CONFIG_SYS_TEXT_BASE
31#define CONFIG_SYS_TEXT_BASE 0xFC000000
32#endif
33
5196a7a0 34/* On a Cameron or on a FO300 board or ... */
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35#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
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37#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
38#endif
39
6d0f6bcf 40#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
56523f12 41
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42#define CONFIG_HIGH_BATS 1 /* High BATs supported */
43
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44/*
45 * Serial console configuration
46 */
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47#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 49#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
bef92e21 50#define CONFIG_BOOTCOUNT_LIMIT 1
56523f12 51
6d3bc9b8 52#ifdef CONFIG_FO300
6d0f6bcf 53#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
6d3bc9b8 54#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
ddde6b7c 55#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
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56#if 0
57#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
59#endif
60
61#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
62 /* switch is open */
5196a7a0 63#endif /* CONFIG_FO300 */
6d3bc9b8 64
98e69567 65#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
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66#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
6d0f6bcf 69#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
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70#define CONFIG_BOARD_EARLY_INIT_R
71#endif /* CONFIG_STK52XX */
56523f12 72
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73/*
74 * PCI Mapping:
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
77 */
98e69567 78#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
7e6bf358 79#define CONFIG_PCI 1
56523f12 80#define CONFIG_PCI_PNP 1
31a64923 81/* #define CONFIG_PCI_SCAN_SHOW 1 */
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82
83#define CONFIG_PCI_MEM_BUS 0x40000000
84#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
85#define CONFIG_PCI_MEM_SIZE 0x10000000
86
87#define CONFIG_PCI_IO_BUS 0x50000000
88#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
89#define CONFIG_PCI_IO_SIZE 0x01000000
90
cd65a3dc 91#define CONFIG_EEPRO100 1
6d0f6bcf 92#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
56523f12 93#define CONFIG_NS8382X 1
83e40ba7 94#endif /* CONFIG_STK52XX */
56523f12 95
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96/*
97 * Video console
98 */
5078cce8 99#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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100#define CONFIG_VIDEO_SM501
101#define CONFIG_VIDEO_SM501_32BPP
102#define CONFIG_CFB_CONSOLE
103#define CONFIG_VIDEO_LOGO
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104
105#ifndef CONFIG_FO300
8f0b7cbe 106#define CONFIG_CONSOLE_EXTRA_INFO
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107#else
108#define CONFIG_VIDEO_BMP_LOGO
109#endif
110
111#define CONFIG_VGA_AS_SINGLE_DEVICE
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112#define CONFIG_VIDEO_SW_CURSOR
113#define CONFIG_SPLASH_SCREEN
6d0f6bcf 114#define CONFIG_SYS_CONSOLE_IS_IN_ENV
6d3bc9b8 115#endif /* #ifndef CONFIG_TQM5200S */
56523f12 116
56523f12 117/* Partitions */
89c02e2c 118#define CONFIG_MAC_PARTITION
56523f12 119#define CONFIG_DOS_PARTITION
8f0b7cbe 120#define CONFIG_ISO_PARTITION
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121
122/* USB */
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123#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
124 defined(CONFIG_STK52XX)
7b59b3c7 125#define CONFIG_USB_OHCI_NEW
6d0f6bcf 126#define CONFIG_SYS_OHCI_BE_CONTROLLER
53e336e9 127
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128#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
129#define CONFIG_SYS_USB_OHCI_CPU_INIT
130#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
131#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
132#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
53e336e9 133
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134#endif
135
135ae006 136#ifndef CONFIG_CAM5200
56523f12 137/* POST support */
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138#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
139 CONFIG_SYS_POST_CPU | \
140 CONFIG_SYS_POST_I2C)
5078cce8 141#endif
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142
143#ifdef CONFIG_POST
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144/* preserve space for the post_word at end of on-chip SRAM */
145#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
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146#endif
147
56523f12 148/*
a1aa0bb5 149 * BOOTP options
56523f12 150 */
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151#define CONFIG_BOOTP_BOOTFILESIZE
152#define CONFIG_BOOTP_BOOTPATH
153#define CONFIG_BOOTP_GATEWAY
154#define CONFIG_BOOTP_HOSTNAME
155
56523f12 156/*
2694690e 157 * Command line configuration.
56523f12 158 */
2694690e 159#define CONFIG_CMD_DATE
2694690e 160#define CONFIG_CMD_EEPROM
2694690e 161#define CONFIG_CMD_JFFS2
2694690e 162#define CONFIG_CMD_REGINFO
2694690e
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163#define CONFIG_CMD_BSP
164
165#ifdef CONFIG_VIDEO
166 #define CONFIG_CMD_BMP
167#endif
168
169#ifdef CONFIG_PCI
2b2a587d 170#define CONFIG_CMD_PCI
f33fca22 171#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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172#endif
173
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174#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
175 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
2694690e 176 #define CONFIG_CMD_IDE
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177#endif
178
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179#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
180 defined(CONFIG_STK52XX)
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181 #define CONFIG_CFG_USB
182 #define CONFIG_CFG_FAT
183#endif
184
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185#ifdef CONFIG_POST
186 #define CONFIG_CMD_DIAG
187#endif
188
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189#define CONFIG_TIMESTAMP /* display image timestamps */
190
14d0a02a 191#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
6d0f6bcf 192# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
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193#endif
194
195/*
196 * Autobooting
197 */
56523f12 198
81050926 199#define CONFIG_PREBOOT "echo;" \
4c4aca81 200 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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201 "echo"
202
203#undef CONFIG_BOOTARGS
204
6d0f6bcf 205#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
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206# define ENV_UPDT \
207 "update=protect off FFF00000 +${filesize};" \
208 "erase FFF00000 +${filesize};" \
5078cce8 209 "cp.b 200000 FFF00000 ${filesize};" \
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210 "protect on FFF00000 +${filesize}\0"
211#else /* default lowboot configuration */
6d3bc9b8 212# define ENV_UPDT \
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213 "update=protect off FC000000 +${filesize};" \
214 "erase FC000000 +${filesize};" \
6d3bc9b8 215 "cp.b 200000 FC000000 ${filesize};" \
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216 "protect on FC000000 +${filesize}\0"
217#endif
5078cce8 218
e1f601b5 219#if defined(CONFIG_TQM5200)
6abaee42 220#define CUSTOM_ENV_SETTINGS \
e1f601b5 221 "hostname=tqm5200\0" \
6abaee42 222 "bootfile=/tftpboot/tqm5200/uImage\0" \
8f8416fa 223 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
6abaee42 224 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
e1f601b5 225#elif defined(CONFIG_CAM5200)
1636d1c8 226#define CUSTOM_ENV_SETTINGS \
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227 "bootfile=cam5200/uImage\0" \
228 "u-boot=cam5200/u-boot.bin\0" \
74de7aef 229 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
6abaee42
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230#endif
231
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232#if defined(CONFIG_TQM5200_B)
233#define ENV_FLASH_LAYOUT \
234 "fdt_addr=FC100000\0" \
235 "kernel_addr=FC140000\0" \
236 "ramdisk_addr=FC600000\0"
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237#elif defined(CONFIG_CHARON)
238#define ENV_FLASH_LAYOUT \
239 "fdt_addr=FDFC0000\0" \
240 "kernel_addr=FC0A0000\0" \
241 "ramdisk_addr=FC200000\0"
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242#else /* !CONFIG_TQM5200_B */
243#define ENV_FLASH_LAYOUT \
244 "fdt_addr=FC0A0000\0" \
245 "kernel_addr=FC0C0000\0" \
246 "ramdisk_addr=FC300000\0"
247#endif
248
81050926 249#define CONFIG_EXTRA_ENV_SETTINGS \
56523f12 250 "netdev=eth0\0" \
e1f601b5 251 "console=ttyPSC0\0" \
a5cc5555 252 ENV_FLASH_LAYOUT \
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253 "kernel_addr_r=400000\0" \
254 "fdt_addr_r=600000\0" \
89c02e2c 255 "rootpath=/opt/eldk/ppc_6xx\0" \
56523f12 256 "ramargs=setenv bootargs root=/dev/ram rw\0" \
56523f12 257 "nfsargs=setenv bootargs root=/dev/nfs rw " \
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258 "nfsroot=${serverip}:${rootpath}\0" \
259 "addip=setenv bootargs ${bootargs} " \
260 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
261 ":${hostname}:${netdev}:off panic=1\0" \
5078cce8 262 "addcons=setenv bootargs ${bootargs} " \
8f8416fa 263 "console=${console},${baudrate}\0" \
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264 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
265 "flash_self_old=sete console ttyS0; " \
266 "run ramargs addip addcons addmtd; " \
fe126d8b 267 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
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268 "flash_self=run ramargs addip addcons;" \
269 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
270 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
fe126d8b 271 "bootm ${kernel_addr}\0" \
e1f601b5 272 "flash_nfs=run nfsargs addip addcons;" \
8f8416fa 273 "bootm ${kernel_addr} - ${fdt_addr}\0" \
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274 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
275 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
276 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
277 "tftp ${fdt_addr_r} ${fdt_file}; " \
98e69567 278 "run nfsargs addip addcons addmtd; " \
e1f601b5 279 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
6abaee42 280 CUSTOM_ENV_SETTINGS \
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281 "load=tftp 200000 ${u-boot}\0" \
282 ENV_UPDT \
7e6bf358 283 ""
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284
285#define CONFIG_BOOTCOMMAND "run net_nfs"
286
287/*
288 * IPB Bus clocking configuration.
289 */
6d0f6bcf 290#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
56523f12 291
6d0f6bcf 292#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
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293/*
294 * PCI Bus clocking configuration
295 *
296 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
6d0f6bcf 297 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
c99512d6 298 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
56523f12 299 */
6d0f6bcf 300#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
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301#endif
302
303/*
304 * I2C configuration
305 */
306#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
8f0b7cbe 307#ifdef CONFIG_TQM5200_REV100
6d0f6bcf 308#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
56523f12 309#else
6d0f6bcf 310#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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311#endif
312
313/*
314 * I2C clock frequency
315 *
316 * Please notice, that the resulting clock frequency could differ from the
317 * configured value. This is because the I2C clock is derived from system
a187559e 318 * clock over a frequency divider with only a few divider values. U-Boot
6d0f6bcf 319 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
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320 * approximation allways lies below the configured value, never above.
321 */
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322#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
323#define CONFIG_SYS_I2C_SLAVE 0x7F
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324
325/*
326 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
327 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
328 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
329 * same configuration could be used.
330 */
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JCPV
331#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
332#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
333#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
334#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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335
336/*
337 * HW-Monitor configuration on Mini-FAP
338 */
339#if defined (CONFIG_MINIFAP)
6d0f6bcf 340#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
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341#endif
342
343/* List of I2C addresses to be verified by POST */
56523f12 344#if defined (CONFIG_MINIFAP)
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345#undef CONFIG_SYS_POST_I2C_ADDRS
346#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
347 CONFIG_SYS_I2C_HWMON_ADDR, \
348 CONFIG_SYS_I2C_SLAVE}
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349#endif
350
351/*
352 * Flash configuration
353 */
6d0f6bcf 354#define CONFIG_SYS_FLASH_BASE 0xFC000000
56523f12 355
d9384de2 356#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
6d0f6bcf 357#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
7299712c 358 (= chip selects) */
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JCPV
359#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
360#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
361#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
362
363#define CONFIG_SYS_FLASH_ADDR0 0x555
364#define CONFIG_SYS_FLASH_ADDR1 0x2AA
365#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
366#define CONFIG_SYS_MAX_FLASH_SECT 128
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367#else
368/* use CFI flash driver */
6d0f6bcf 369#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a 370#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
085ecde1 371#define CONFIG_FLASH_CFI_MTD /* with MTD support */
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372#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
373#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
d9384de2 374 (= chip selects) */
6d0f6bcf 375#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
d9384de2 376#endif
7299712c 377
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378#define CONFIG_SYS_FLASH_EMPTY_INFO
379#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
380#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
56523f12 381
135ae006 382#if defined (CONFIG_CAM5200)
6d0f6bcf 383# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
5078cce8 384#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 385# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
45a212c4 386#else
6d0f6bcf 387# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
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388#endif
389
d534f5cc 390/* Dynamic MTD partition support */
68d7d651 391#define CONFIG_CMD_MTDPARTS
942556a9 392#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
259bff7c 393#define MTDIDS_DEFAULT "nor0=fc000000.flash"
5078cce8 394
5624d66a 395#if defined(CONFIG_STK52XX)
5078cce8 396# if defined(CONFIG_TQM5200_B)
6d0f6bcf 397# if defined(CONFIG_SYS_LOWBOOT)
259bff7c 398# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
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399 "256k(dtb)," \
400 "2304k(kernel)," \
401 "2560k(small-fs)," \
45a212c4 402 "2m(initrd)," \
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403 "8m(misc)," \
404 "16m(big-fs)"
405# else /* highboot */
259bff7c 406# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
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407 "3584k(small-fs)," \
408 "2m(initrd)," \
409 "8m(misc)," \
410 "15m(big-fs)," \
411 "1m(firmware)"
6d0f6bcf 412# endif /* CONFIG_SYS_LOWBOOT */
5078cce8 413# else /* !CONFIG_TQM5200_B */
259bff7c 414# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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415 "128k(dtb)," \
416 "2304k(kernel)," \
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417 "2m(initrd)," \
418 "4m(small-fs)," \
5078cce8 419 "8m(misc)," \
e1f601b5 420 "15m(big-fs)"
5078cce8 421# endif /* CONFIG_TQM5200_B */
135ae006 422#elif defined (CONFIG_CAM5200)
259bff7c 423# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
5078cce8 424 "1792k(kernel)," \
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425 "5632k(rootfs)," \
426 "24m(home)"
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427#elif defined (CONFIG_CHARON)
428# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
429 "1408k(kernel)," \
430 "2m(initrd)," \
431 "4m(small-fs)," \
432 "24320k(big-fs)," \
433 "256k(dts)"
6d3bc9b8 434#elif defined (CONFIG_FO300)
259bff7c 435# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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436 "1408k(kernel)," \
437 "2m(initrd)," \
438 "4m(small-fs)," \
439 "8m(misc)," \
440 "16m(big-fs)"
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441#else
442# error "Unknown Carrier Board"
443#endif /* CONFIG_STK52XX */
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444
445/*
446 * Environment settings
447 */
5a1aceb0 448#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 449#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
78d620eb 450#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
0e8d1586 451#define CONFIG_ENV_SECT_SIZE 0x40000
45a212c4 452#else
0e8d1586 453#define CONFIG_ENV_SECT_SIZE 0x20000
5078cce8 454#endif /* CONFIG_TQM5200_B */
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455#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
456#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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457
458/*
459 * Memory map
460 */
6d0f6bcf
JCPV
461#define CONFIG_SYS_MBAR 0xF0000000
462#define CONFIG_SYS_SDRAM_BASE 0x00000000
463#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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464
465/* Use ON-Chip SRAM until RAM will be available */
6d0f6bcf 466#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
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467#ifdef CONFIG_POST
468/* preserve space for the post_word at end of on-chip SRAM */
553f0982 469#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
56523f12 470#else
553f0982 471#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
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472#endif
473
25ddd1fb 474#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 475#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
56523f12 476
14d0a02a 477#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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478#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
479# define CONFIG_SYS_RAMBOOT 1
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480#endif
481
135ae006 482#if defined (CONFIG_CAM5200)
6d0f6bcf 483# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
5078cce8 484#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 485# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
45a212c4 486#else
6d0f6bcf 487# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
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488#endif
489
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490#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
491#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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492
493/*
494 * Ethernet configuration
495 */
496#define CONFIG_MPC5xxx_FEC 1
86321fc1 497#define CONFIG_MPC5xxx_FEC_MII100
56523f12 498/*
86321fc1 499 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
56523f12 500 */
86321fc1 501/* #define CONFIG_MPC5xxx_FEC_MII10 */
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502#define CONFIG_PHY_ADDR 0x00
503
504/*
505 * GPIO configuration
506 *
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507 * use CS1: Bit 0 (mask: 0x80000000):
508 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
56523f12 509 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
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510 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
511 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
512 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
513 * Use for REV200 STK52XX boards and FO300 boards. Do not use
514 * with REV100 modules (because, there I2C1 is used as I2C bus).
515 * use ATA: Bits 6-7 (mask 0x03000000):
516 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
517 * Use for CAM5200 board.
518 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
519 * use PSC6: Bits 9-11 (mask 0x00700000):
520 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
521 * UART, CODEC or IrDA.
522 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
523 * enable extended POST tests.
524 * Use for MINI-FAP and TQM5200_IB boards.
525 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
526 * Extended POST test is not available.
527 * Use for STK52xx, FO300 and CAM5200 boards.
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528 * WARNING: When the extended POST is enabled, these bits will
529 * be overridden by this code as GPIOs!
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530 * use PCI_DIS: Bit 16 (mask 0x00008000):
531 * 1 -> disable PCI controller (on CAM5200 board).
532 * use USB: Bits 18-19 (mask 0x00003000):
533 * 10 -> two UARTs (on FO300 and CAM5200).
534 * use PSC3: Bits 20-23 (mask: 0x00000f00):
535 * 0000 -> All PSC3 pins are GPIOs.
536 * 1100 -> UART/SPI (on FO300 board).
537 * 0100 -> UART (on CAM5200 board).
538 * use PSC2: Bits 25:27 (mask: 0x00000030):
539 * 000 -> All PSC2 pins are GPIOs.
540 * 100 -> UART (on CAM5200 board).
541 * 001 -> CAN1/2 on PSC2 pins.
95c44ec4 542 * Use for REV100 STK52xx boards
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543 * 01x -> Use AC97 (on FO300 board).
544 * use PSC1: Bits 29-31 (mask: 0x00000007):
545 * 100 -> UART (on all boards).
56523f12 546 */
98e69567 547#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
56523f12 548#if defined (CONFIG_MINIFAP)
6d0f6bcf 549# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
7e6bf358 550#elif defined (CONFIG_STK52XX)
83e40ba7 551# if defined (CONFIG_STK52XX_REV100)
6d0f6bcf 552# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
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553# else /* STK52xx REV200 and above */
554# if defined (CONFIG_TQM5200_REV100)
555# error TQM5200 REV100 not supported on STK52XX REV200 or above
556# else/* TQM5200 REV200 and above */
6d0f6bcf 557# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
83e40ba7 558# endif
8f0b7cbe 559# endif
6d3bc9b8 560#elif defined (CONFIG_FO300)
6d0f6bcf 561# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
7299712c 562#elif defined (CONFIG_CAM5200)
6d0f6bcf 563# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
83e40ba7 564#else /* TMQ5200 Inbetriebnahme-Board */
6d0f6bcf 565# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
56523f12 566#endif
98e69567 567#endif
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568
569/*
570 * RTC configuration
571 */
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572#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
573# define CONFIG_RTC_M41T11 1
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574# define CONFIG_SYS_I2C_RTC_ADDR 0x68
575# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
edd0b509 576 year */
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577#else
578# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
579#endif
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580
581/*
582 * Miscellaneous configurable options
583 */
6d0f6bcf 584#define CONFIG_SYS_LONGHELP /* undef to save memory */
5078cce8 585
2751a95a 586#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
5078cce8 587
6d0f6bcf 588#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
2694690e 589#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 590#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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591#endif
592
593#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 594#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
56523f12 595#else
6d0f6bcf 596#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
56523f12 597#endif
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598#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
599#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
600#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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601
602/* Enable an alternate, more extensive memory test */
6d0f6bcf 603#define CONFIG_SYS_ALT_MEMTEST
56523f12 604
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605#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
606#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
56523f12 607
6d0f6bcf 608#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
56523f12 609
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610/*
611 * Various low-level settings
612 */
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613#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
614#define CONFIG_SYS_HID0_FINAL HID0_ICE
56523f12 615
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616#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
617#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
618#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
619#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
56523f12 620#else
6d0f6bcf 621#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
56523f12 622#endif
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623#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
624#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
56523f12 625
7e6bf358 626#define CONFIG_LAST_STAGE_INIT
7e6bf358 627
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628/*
629 * SRAM - Do not map below 2 GB in address space, because this area is used
630 * for SDRAM autosizing.
631 */
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632#define CONFIG_SYS_CS2_START 0xE5000000
633#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
634#define CONFIG_SYS_CS2_CFG 0x0004D930
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635
636/*
637 * Grafic controller - Do not map below 2 GB in address space, because this
638 * area is used for SDRAM autosizing.
639 */
8f0b7cbe 640#define SM501_FB_BASE 0xE0000000
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641#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
642#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
643#define CONFIG_SYS_CS1_CFG 0x8F48FF70
644#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
56523f12 645
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646#define CONFIG_SYS_CS_BURST 0x00000000
647#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
56523f12 648
7299712c 649#if defined(CONFIG_CAM5200)
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650#define CONFIG_SYS_CS4_START 0xB0000000
651#define CONFIG_SYS_CS4_SIZE 0x00010000
652#define CONFIG_SYS_CS4_CFG 0x01019C10
7299712c 653
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654#define CONFIG_SYS_CS5_START 0xD0000000
655#define CONFIG_SYS_CS5_SIZE 0x01208000
656#define CONFIG_SYS_CS5_CFG 0x1414BF10
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657#endif
658
6d0f6bcf 659#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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660
661/*-----------------------------------------------------------------------
662 * USB stuff
663 *-----------------------------------------------------------------------
664 */
665#define CONFIG_USB_CLOCK 0x0001BBBB
666#define CONFIG_USB_CONFIG 0x00001000
667
668/*-----------------------------------------------------------------------
669 * IDE/ATA stuff Supports IDE harddisk
670 *-----------------------------------------------------------------------
671 */
672
81050926 673#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
56523f12 674
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675#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
676#undef CONFIG_IDE_LED /* LED for ide not supported */
56523f12 677
81050926 678#define CONFIG_IDE_RESET /* reset for ide supported */
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679#define CONFIG_IDE_PREINIT
680
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681#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
682#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
56523f12 683
6d0f6bcf 684#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
56523f12 685
6d0f6bcf 686#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
56523f12 687
95c44ec4 688/* Offset for data I/O */
6d0f6bcf 689#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
56523f12 690
95c44ec4 691/* Offset for normal register accesses */
6d0f6bcf 692#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
56523f12 693
95c44ec4 694/* Offset for alternate registers */
6d0f6bcf 695#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
56523f12 696
95c44ec4 697/* Interval between registers */
6d0f6bcf 698#define CONFIG_SYS_ATA_STRIDE 4
56523f12 699
33af3e66 700/* Support ATAPI devices */
95c44ec4 701#define CONFIG_ATAPI 1
33af3e66 702
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703/*-----------------------------------------------------------------------
704 * Open firmware flat tree support
705 *-----------------------------------------------------------------------
706 */
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707#define OF_CPU "PowerPC,5200@0"
708#define OF_SOC "soc5200@f0000000"
709#define OF_TBCLK (bd->bi_busfreq / 4)
710#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
711
56523f12 712#endif /* __CONFIG_H */