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56523f12 1/*
69445d6c 2 * (C) Copyright 2003-2014
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
45a212c4 5 * (C) Copyright 2004-2006
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6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
3765b3e7 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
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14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
b2a6dfe4 19#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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20#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
56523f12 22
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23/*
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
29 */
30#ifndef CONFIG_SYS_TEXT_BASE
31#define CONFIG_SYS_TEXT_BASE 0xFC000000
32#endif
33
5196a7a0 34/* On a Cameron or on a FO300 board or ... */
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35#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
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37#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
38#endif
39
6d0f6bcf 40#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
56523f12 41
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42#define CONFIG_HIGH_BATS 1 /* High BATs supported */
43
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44/*
45 * Serial console configuration
46 */
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47#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 49#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
bef92e21 50#define CONFIG_BOOTCOUNT_LIMIT 1
56523f12 51
6d3bc9b8 52#ifdef CONFIG_FO300
6d0f6bcf 53#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
6d3bc9b8 54#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
ddde6b7c 55#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
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56#if 0
57#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
59#endif
60
61#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
62 /* switch is open */
5196a7a0 63#endif /* CONFIG_FO300 */
6d3bc9b8 64
98e69567 65#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
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66#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
6d0f6bcf 69#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
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70#define CONFIG_BOARD_EARLY_INIT_R
71#endif /* CONFIG_STK52XX */
56523f12 72
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73/*
74 * PCI Mapping:
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
77 */
98e69567 78#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
56523f12 79#define CONFIG_PCI_PNP 1
31a64923 80/* #define CONFIG_PCI_SCAN_SHOW 1 */
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81
82#define CONFIG_PCI_MEM_BUS 0x40000000
83#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
84#define CONFIG_PCI_MEM_SIZE 0x10000000
85
86#define CONFIG_PCI_IO_BUS 0x50000000
87#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
88#define CONFIG_PCI_IO_SIZE 0x01000000
89
cd65a3dc 90#define CONFIG_EEPRO100 1
6d0f6bcf 91#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
56523f12 92#define CONFIG_NS8382X 1
83e40ba7 93#endif /* CONFIG_STK52XX */
56523f12 94
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95/*
96 * Video console
97 */
5078cce8 98#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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99#define CONFIG_VIDEO_SM501
100#define CONFIG_VIDEO_SM501_32BPP
8f0b7cbe 101#define CONFIG_VIDEO_LOGO
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102
103#ifndef CONFIG_FO300
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104#else
105#define CONFIG_VIDEO_BMP_LOGO
106#endif
107
8f0b7cbe 108#define CONFIG_SPLASH_SCREEN
6d3bc9b8 109#endif /* #ifndef CONFIG_TQM5200S */
56523f12 110
56523f12 111/* Partitions */
89c02e2c 112#define CONFIG_MAC_PARTITION
56523f12 113#define CONFIG_DOS_PARTITION
8f0b7cbe 114#define CONFIG_ISO_PARTITION
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115
116/* USB */
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117#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
118 defined(CONFIG_STK52XX)
7b59b3c7 119#define CONFIG_USB_OHCI_NEW
6d0f6bcf 120#define CONFIG_SYS_OHCI_BE_CONTROLLER
53e336e9 121
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122#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
123#define CONFIG_SYS_USB_OHCI_CPU_INIT
124#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
125#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
126#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
53e336e9 127
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128#endif
129
135ae006 130#ifndef CONFIG_CAM5200
56523f12 131/* POST support */
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132#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
133 CONFIG_SYS_POST_CPU | \
134 CONFIG_SYS_POST_I2C)
5078cce8 135#endif
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136
137#ifdef CONFIG_POST
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138/* preserve space for the post_word at end of on-chip SRAM */
139#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
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140#endif
141
56523f12 142/*
a1aa0bb5 143 * BOOTP options
56523f12 144 */
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145#define CONFIG_BOOTP_BOOTFILESIZE
146#define CONFIG_BOOTP_BOOTPATH
147#define CONFIG_BOOTP_GATEWAY
148#define CONFIG_BOOTP_HOSTNAME
149
56523f12 150/*
2694690e 151 * Command line configuration.
56523f12 152 */
2694690e 153#define CONFIG_CMD_DATE
2694690e 154#define CONFIG_CMD_EEPROM
2694690e 155#define CONFIG_CMD_JFFS2
2694690e 156#define CONFIG_CMD_REGINFO
2694690e
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157#define CONFIG_CMD_BSP
158
159#ifdef CONFIG_VIDEO
160 #define CONFIG_CMD_BMP
161#endif
162
163#ifdef CONFIG_PCI
2b2a587d 164#define CONFIG_CMD_PCI
f33fca22 165#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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166#endif
167
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168#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
169 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
2694690e 170 #define CONFIG_CMD_IDE
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171#endif
172
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173#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
174 defined(CONFIG_STK52XX)
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175 #define CONFIG_CFG_USB
176 #define CONFIG_CFG_FAT
177#endif
178
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179#ifdef CONFIG_POST
180 #define CONFIG_CMD_DIAG
181#endif
182
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183#define CONFIG_TIMESTAMP /* display image timestamps */
184
14d0a02a 185#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
6d0f6bcf 186# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
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187#endif
188
189/*
190 * Autobooting
191 */
56523f12 192
81050926 193#define CONFIG_PREBOOT "echo;" \
4c4aca81 194 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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195 "echo"
196
197#undef CONFIG_BOOTARGS
198
6d0f6bcf 199#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
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200# define ENV_UPDT \
201 "update=protect off FFF00000 +${filesize};" \
202 "erase FFF00000 +${filesize};" \
5078cce8 203 "cp.b 200000 FFF00000 ${filesize};" \
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204 "protect on FFF00000 +${filesize}\0"
205#else /* default lowboot configuration */
6d3bc9b8 206# define ENV_UPDT \
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207 "update=protect off FC000000 +${filesize};" \
208 "erase FC000000 +${filesize};" \
6d3bc9b8 209 "cp.b 200000 FC000000 ${filesize};" \
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210 "protect on FC000000 +${filesize}\0"
211#endif
5078cce8 212
e1f601b5 213#if defined(CONFIG_TQM5200)
6abaee42 214#define CUSTOM_ENV_SETTINGS \
e1f601b5 215 "hostname=tqm5200\0" \
6abaee42 216 "bootfile=/tftpboot/tqm5200/uImage\0" \
8f8416fa 217 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
6abaee42 218 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
e1f601b5 219#elif defined(CONFIG_CAM5200)
1636d1c8 220#define CUSTOM_ENV_SETTINGS \
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221 "bootfile=cam5200/uImage\0" \
222 "u-boot=cam5200/u-boot.bin\0" \
74de7aef 223 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
6abaee42
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224#endif
225
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226#if defined(CONFIG_TQM5200_B)
227#define ENV_FLASH_LAYOUT \
228 "fdt_addr=FC100000\0" \
229 "kernel_addr=FC140000\0" \
230 "ramdisk_addr=FC600000\0"
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231#elif defined(CONFIG_CHARON)
232#define ENV_FLASH_LAYOUT \
233 "fdt_addr=FDFC0000\0" \
234 "kernel_addr=FC0A0000\0" \
235 "ramdisk_addr=FC200000\0"
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236#else /* !CONFIG_TQM5200_B */
237#define ENV_FLASH_LAYOUT \
238 "fdt_addr=FC0A0000\0" \
239 "kernel_addr=FC0C0000\0" \
240 "ramdisk_addr=FC300000\0"
241#endif
242
81050926 243#define CONFIG_EXTRA_ENV_SETTINGS \
56523f12 244 "netdev=eth0\0" \
e1f601b5 245 "console=ttyPSC0\0" \
a5cc5555 246 ENV_FLASH_LAYOUT \
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247 "kernel_addr_r=400000\0" \
248 "fdt_addr_r=600000\0" \
89c02e2c 249 "rootpath=/opt/eldk/ppc_6xx\0" \
56523f12 250 "ramargs=setenv bootargs root=/dev/ram rw\0" \
56523f12 251 "nfsargs=setenv bootargs root=/dev/nfs rw " \
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252 "nfsroot=${serverip}:${rootpath}\0" \
253 "addip=setenv bootargs ${bootargs} " \
254 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
255 ":${hostname}:${netdev}:off panic=1\0" \
5078cce8 256 "addcons=setenv bootargs ${bootargs} " \
8f8416fa 257 "console=${console},${baudrate}\0" \
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258 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
259 "flash_self_old=sete console ttyS0; " \
260 "run ramargs addip addcons addmtd; " \
fe126d8b 261 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
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262 "flash_self=run ramargs addip addcons;" \
263 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
264 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
fe126d8b 265 "bootm ${kernel_addr}\0" \
e1f601b5 266 "flash_nfs=run nfsargs addip addcons;" \
8f8416fa 267 "bootm ${kernel_addr} - ${fdt_addr}\0" \
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268 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
269 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
270 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
271 "tftp ${fdt_addr_r} ${fdt_file}; " \
98e69567 272 "run nfsargs addip addcons addmtd; " \
e1f601b5 273 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
6abaee42 274 CUSTOM_ENV_SETTINGS \
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275 "load=tftp 200000 ${u-boot}\0" \
276 ENV_UPDT \
7e6bf358 277 ""
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278
279#define CONFIG_BOOTCOMMAND "run net_nfs"
280
281/*
282 * IPB Bus clocking configuration.
283 */
6d0f6bcf 284#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
56523f12 285
6d0f6bcf 286#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
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287/*
288 * PCI Bus clocking configuration
289 *
290 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
6d0f6bcf 291 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
c99512d6 292 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
56523f12 293 */
6d0f6bcf 294#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
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295#endif
296
297/*
298 * I2C configuration
299 */
300#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
8f0b7cbe 301#ifdef CONFIG_TQM5200_REV100
6d0f6bcf 302#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
56523f12 303#else
6d0f6bcf 304#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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305#endif
306
307/*
308 * I2C clock frequency
309 *
310 * Please notice, that the resulting clock frequency could differ from the
311 * configured value. This is because the I2C clock is derived from system
a187559e 312 * clock over a frequency divider with only a few divider values. U-Boot
6d0f6bcf 313 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
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314 * approximation allways lies below the configured value, never above.
315 */
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JCPV
316#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
317#define CONFIG_SYS_I2C_SLAVE 0x7F
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318
319/*
320 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
321 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
322 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
323 * same configuration could be used.
324 */
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JCPV
325#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
326#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
327#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
328#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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329
330/*
331 * HW-Monitor configuration on Mini-FAP
332 */
333#if defined (CONFIG_MINIFAP)
6d0f6bcf 334#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
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335#endif
336
337/* List of I2C addresses to be verified by POST */
56523f12 338#if defined (CONFIG_MINIFAP)
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339#undef CONFIG_SYS_POST_I2C_ADDRS
340#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
341 CONFIG_SYS_I2C_HWMON_ADDR, \
342 CONFIG_SYS_I2C_SLAVE}
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343#endif
344
345/*
346 * Flash configuration
347 */
6d0f6bcf 348#define CONFIG_SYS_FLASH_BASE 0xFC000000
56523f12 349
d9384de2 350#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
6d0f6bcf 351#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
7299712c 352 (= chip selects) */
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353#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
354#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
355#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
356
357#define CONFIG_SYS_FLASH_ADDR0 0x555
358#define CONFIG_SYS_FLASH_ADDR1 0x2AA
359#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
360#define CONFIG_SYS_MAX_FLASH_SECT 128
d9384de2
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361#else
362/* use CFI flash driver */
6d0f6bcf 363#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a 364#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
085ecde1 365#define CONFIG_FLASH_CFI_MTD /* with MTD support */
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366#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
367#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
d9384de2 368 (= chip selects) */
6d0f6bcf 369#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
d9384de2 370#endif
7299712c 371
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372#define CONFIG_SYS_FLASH_EMPTY_INFO
373#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
374#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
56523f12 375
135ae006 376#if defined (CONFIG_CAM5200)
6d0f6bcf 377# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
5078cce8 378#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 379# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
45a212c4 380#else
6d0f6bcf 381# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
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382#endif
383
d534f5cc 384/* Dynamic MTD partition support */
68d7d651 385#define CONFIG_CMD_MTDPARTS
942556a9 386#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
259bff7c 387#define MTDIDS_DEFAULT "nor0=fc000000.flash"
5078cce8 388
5624d66a 389#if defined(CONFIG_STK52XX)
5078cce8 390# if defined(CONFIG_TQM5200_B)
6d0f6bcf 391# if defined(CONFIG_SYS_LOWBOOT)
259bff7c 392# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
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393 "256k(dtb)," \
394 "2304k(kernel)," \
395 "2560k(small-fs)," \
45a212c4 396 "2m(initrd)," \
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397 "8m(misc)," \
398 "16m(big-fs)"
399# else /* highboot */
259bff7c 400# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
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401 "3584k(small-fs)," \
402 "2m(initrd)," \
403 "8m(misc)," \
404 "15m(big-fs)," \
405 "1m(firmware)"
6d0f6bcf 406# endif /* CONFIG_SYS_LOWBOOT */
5078cce8 407# else /* !CONFIG_TQM5200_B */
259bff7c 408# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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409 "128k(dtb)," \
410 "2304k(kernel)," \
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411 "2m(initrd)," \
412 "4m(small-fs)," \
5078cce8 413 "8m(misc)," \
e1f601b5 414 "15m(big-fs)"
5078cce8 415# endif /* CONFIG_TQM5200_B */
135ae006 416#elif defined (CONFIG_CAM5200)
259bff7c 417# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
5078cce8 418 "1792k(kernel)," \
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419 "5632k(rootfs)," \
420 "24m(home)"
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421#elif defined (CONFIG_CHARON)
422# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
423 "1408k(kernel)," \
424 "2m(initrd)," \
425 "4m(small-fs)," \
426 "24320k(big-fs)," \
427 "256k(dts)"
6d3bc9b8 428#elif defined (CONFIG_FO300)
259bff7c 429# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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430 "1408k(kernel)," \
431 "2m(initrd)," \
432 "4m(small-fs)," \
433 "8m(misc)," \
434 "16m(big-fs)"
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435#else
436# error "Unknown Carrier Board"
437#endif /* CONFIG_STK52XX */
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438
439/*
440 * Environment settings
441 */
5a1aceb0 442#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 443#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
78d620eb 444#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
0e8d1586 445#define CONFIG_ENV_SECT_SIZE 0x40000
45a212c4 446#else
0e8d1586 447#define CONFIG_ENV_SECT_SIZE 0x20000
5078cce8 448#endif /* CONFIG_TQM5200_B */
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449#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
450#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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451
452/*
453 * Memory map
454 */
6d0f6bcf
JCPV
455#define CONFIG_SYS_MBAR 0xF0000000
456#define CONFIG_SYS_SDRAM_BASE 0x00000000
457#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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458
459/* Use ON-Chip SRAM until RAM will be available */
6d0f6bcf 460#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
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461#ifdef CONFIG_POST
462/* preserve space for the post_word at end of on-chip SRAM */
553f0982 463#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
56523f12 464#else
553f0982 465#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
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466#endif
467
25ddd1fb 468#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 469#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
56523f12 470
14d0a02a 471#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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472#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
473# define CONFIG_SYS_RAMBOOT 1
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474#endif
475
135ae006 476#if defined (CONFIG_CAM5200)
6d0f6bcf 477# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
5078cce8 478#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 479# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
45a212c4 480#else
6d0f6bcf 481# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
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482#endif
483
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484#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
485#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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486
487/*
488 * Ethernet configuration
489 */
490#define CONFIG_MPC5xxx_FEC 1
86321fc1 491#define CONFIG_MPC5xxx_FEC_MII100
56523f12 492/*
86321fc1 493 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
56523f12 494 */
86321fc1 495/* #define CONFIG_MPC5xxx_FEC_MII10 */
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496#define CONFIG_PHY_ADDR 0x00
497
498/*
499 * GPIO configuration
500 *
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501 * use CS1: Bit 0 (mask: 0x80000000):
502 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
56523f12 503 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
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504 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
505 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
506 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
507 * Use for REV200 STK52XX boards and FO300 boards. Do not use
508 * with REV100 modules (because, there I2C1 is used as I2C bus).
509 * use ATA: Bits 6-7 (mask 0x03000000):
510 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
511 * Use for CAM5200 board.
512 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
513 * use PSC6: Bits 9-11 (mask 0x00700000):
514 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
515 * UART, CODEC or IrDA.
516 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
517 * enable extended POST tests.
518 * Use for MINI-FAP and TQM5200_IB boards.
519 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
520 * Extended POST test is not available.
521 * Use for STK52xx, FO300 and CAM5200 boards.
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522 * WARNING: When the extended POST is enabled, these bits will
523 * be overridden by this code as GPIOs!
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524 * use PCI_DIS: Bit 16 (mask 0x00008000):
525 * 1 -> disable PCI controller (on CAM5200 board).
526 * use USB: Bits 18-19 (mask 0x00003000):
527 * 10 -> two UARTs (on FO300 and CAM5200).
528 * use PSC3: Bits 20-23 (mask: 0x00000f00):
529 * 0000 -> All PSC3 pins are GPIOs.
530 * 1100 -> UART/SPI (on FO300 board).
531 * 0100 -> UART (on CAM5200 board).
532 * use PSC2: Bits 25:27 (mask: 0x00000030):
533 * 000 -> All PSC2 pins are GPIOs.
534 * 100 -> UART (on CAM5200 board).
535 * 001 -> CAN1/2 on PSC2 pins.
95c44ec4 536 * Use for REV100 STK52xx boards
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537 * 01x -> Use AC97 (on FO300 board).
538 * use PSC1: Bits 29-31 (mask: 0x00000007):
539 * 100 -> UART (on all boards).
56523f12 540 */
98e69567 541#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
56523f12 542#if defined (CONFIG_MINIFAP)
6d0f6bcf 543# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
7e6bf358 544#elif defined (CONFIG_STK52XX)
83e40ba7 545# if defined (CONFIG_STK52XX_REV100)
6d0f6bcf 546# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
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547# else /* STK52xx REV200 and above */
548# if defined (CONFIG_TQM5200_REV100)
549# error TQM5200 REV100 not supported on STK52XX REV200 or above
550# else/* TQM5200 REV200 and above */
6d0f6bcf 551# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
83e40ba7 552# endif
8f0b7cbe 553# endif
6d3bc9b8 554#elif defined (CONFIG_FO300)
6d0f6bcf 555# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
7299712c 556#elif defined (CONFIG_CAM5200)
6d0f6bcf 557# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
83e40ba7 558#else /* TMQ5200 Inbetriebnahme-Board */
6d0f6bcf 559# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
56523f12 560#endif
98e69567 561#endif
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562
563/*
564 * RTC configuration
565 */
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566#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
567# define CONFIG_RTC_M41T11 1
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568# define CONFIG_SYS_I2C_RTC_ADDR 0x68
569# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
edd0b509 570 year */
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571#else
572# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
573#endif
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574
575/*
576 * Miscellaneous configurable options
577 */
6d0f6bcf 578#define CONFIG_SYS_LONGHELP /* undef to save memory */
5078cce8 579
2751a95a 580#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
5078cce8 581
6d0f6bcf 582#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
2694690e 583#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 584#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
2694690e
JL
585#endif
586
587#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 588#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
56523f12 589#else
6d0f6bcf 590#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
56523f12 591#endif
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592#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
593#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
594#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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595
596/* Enable an alternate, more extensive memory test */
6d0f6bcf 597#define CONFIG_SYS_ALT_MEMTEST
56523f12 598
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599#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
600#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
56523f12 601
6d0f6bcf 602#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
56523f12 603
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604/*
605 * Various low-level settings
606 */
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607#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
608#define CONFIG_SYS_HID0_FINAL HID0_ICE
56523f12 609
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610#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
611#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
612#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
613#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
56523f12 614#else
6d0f6bcf 615#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
56523f12 616#endif
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617#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
618#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
56523f12 619
7e6bf358 620#define CONFIG_LAST_STAGE_INIT
7e6bf358 621
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622/*
623 * SRAM - Do not map below 2 GB in address space, because this area is used
624 * for SDRAM autosizing.
625 */
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626#define CONFIG_SYS_CS2_START 0xE5000000
627#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
628#define CONFIG_SYS_CS2_CFG 0x0004D930
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629
630/*
631 * Grafic controller - Do not map below 2 GB in address space, because this
632 * area is used for SDRAM autosizing.
633 */
8f0b7cbe 634#define SM501_FB_BASE 0xE0000000
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635#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
636#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
637#define CONFIG_SYS_CS1_CFG 0x8F48FF70
638#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
56523f12 639
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640#define CONFIG_SYS_CS_BURST 0x00000000
641#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
56523f12 642
7299712c 643#if defined(CONFIG_CAM5200)
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644#define CONFIG_SYS_CS4_START 0xB0000000
645#define CONFIG_SYS_CS4_SIZE 0x00010000
646#define CONFIG_SYS_CS4_CFG 0x01019C10
7299712c 647
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648#define CONFIG_SYS_CS5_START 0xD0000000
649#define CONFIG_SYS_CS5_SIZE 0x01208000
650#define CONFIG_SYS_CS5_CFG 0x1414BF10
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651#endif
652
6d0f6bcf 653#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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654
655/*-----------------------------------------------------------------------
656 * USB stuff
657 *-----------------------------------------------------------------------
658 */
659#define CONFIG_USB_CLOCK 0x0001BBBB
660#define CONFIG_USB_CONFIG 0x00001000
661
662/*-----------------------------------------------------------------------
663 * IDE/ATA stuff Supports IDE harddisk
664 *-----------------------------------------------------------------------
665 */
666
81050926 667#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
56523f12 668
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669#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
670#undef CONFIG_IDE_LED /* LED for ide not supported */
56523f12 671
81050926 672#define CONFIG_IDE_RESET /* reset for ide supported */
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673#define CONFIG_IDE_PREINIT
674
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675#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
676#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
56523f12 677
6d0f6bcf 678#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
56523f12 679
6d0f6bcf 680#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
56523f12 681
95c44ec4 682/* Offset for data I/O */
6d0f6bcf 683#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
56523f12 684
95c44ec4 685/* Offset for normal register accesses */
6d0f6bcf 686#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
56523f12 687
95c44ec4 688/* Offset for alternate registers */
6d0f6bcf 689#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
56523f12 690
95c44ec4 691/* Interval between registers */
6d0f6bcf 692#define CONFIG_SYS_ATA_STRIDE 4
56523f12 693
33af3e66 694/* Support ATAPI devices */
95c44ec4 695#define CONFIG_ATAPI 1
33af3e66 696
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697/*-----------------------------------------------------------------------
698 * Open firmware flat tree support
699 *-----------------------------------------------------------------------
700 */
8f8416fa
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701#define OF_CPU "PowerPC,5200@0"
702#define OF_SOC "soc5200@f0000000"
703#define OF_TBCLK (bd->bi_busfreq / 4)
704#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
705
56523f12 706#endif /* __CONFIG_H */