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56523f12 1/*
69445d6c 2 * (C) Copyright 2003-2014
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
45a212c4 5 * (C) Copyright 2004-2006
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6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
3765b3e7 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
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14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
b2a6dfe4 19#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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20#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
56523f12 22
2ae18241
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23/*
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
29 */
30#ifndef CONFIG_SYS_TEXT_BASE
31#define CONFIG_SYS_TEXT_BASE 0xFC000000
32#endif
33
5196a7a0 34/* On a Cameron or on a FO300 board or ... */
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35#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
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37#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
38#endif
39
6d0f6bcf 40#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
56523f12 41
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42#define CONFIG_HIGH_BATS 1 /* High BATs supported */
43
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44/*
45 * Serial console configuration
46 */
5078cce8 47#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
6d0f6bcf 48#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
bef92e21 49#define CONFIG_BOOTCOUNT_LIMIT 1
56523f12 50
6d3bc9b8 51#ifdef CONFIG_FO300
6d0f6bcf 52#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
ddde6b7c 53#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
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54#if 0
55#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
56 /* switch is closed */
57#endif
58
59#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
60 /* switch is open */
5196a7a0 61#endif /* CONFIG_FO300 */
6d3bc9b8 62
98e69567 63#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
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64#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
65#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
66#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
6d0f6bcf 67#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
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68#define CONFIG_BOARD_EARLY_INIT_R
69#endif /* CONFIG_STK52XX */
56523f12 70
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71/*
72 * PCI Mapping:
73 * 0x40000000 - 0x4fffffff - PCI Memory
74 * 0x50000000 - 0x50ffffff - PCI IO Space
75 */
98e69567 76#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
31a64923 77/* #define CONFIG_PCI_SCAN_SHOW 1 */
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78
79#define CONFIG_PCI_MEM_BUS 0x40000000
80#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
81#define CONFIG_PCI_MEM_SIZE 0x10000000
82
83#define CONFIG_PCI_IO_BUS 0x50000000
84#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
85#define CONFIG_PCI_IO_SIZE 0x01000000
86
cd65a3dc 87#define CONFIG_EEPRO100 1
6d0f6bcf 88#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
56523f12 89#define CONFIG_NS8382X 1
83e40ba7 90#endif /* CONFIG_STK52XX */
56523f12 91
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92/*
93 * Video console
94 */
5078cce8 95#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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96#define CONFIG_VIDEO_SM501
97#define CONFIG_VIDEO_SM501_32BPP
8f0b7cbe 98#define CONFIG_VIDEO_LOGO
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99
100#ifndef CONFIG_FO300
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101#else
102#define CONFIG_VIDEO_BMP_LOGO
103#endif
104
8f0b7cbe 105#define CONFIG_SPLASH_SCREEN
6d3bc9b8 106#endif /* #ifndef CONFIG_TQM5200S */
56523f12 107
56523f12 108/* Partitions */
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109
110/* USB */
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111#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
112 defined(CONFIG_STK52XX)
7b59b3c7 113#define CONFIG_USB_OHCI_NEW
6d0f6bcf 114#define CONFIG_SYS_OHCI_BE_CONTROLLER
53e336e9 115
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116#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
117#define CONFIG_SYS_USB_OHCI_CPU_INIT
118#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
119#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
120#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
53e336e9 121
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122#endif
123
135ae006 124#ifndef CONFIG_CAM5200
56523f12 125/* POST support */
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126#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
127 CONFIG_SYS_POST_CPU | \
128 CONFIG_SYS_POST_I2C)
5078cce8 129#endif
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130
131#ifdef CONFIG_POST
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132/* preserve space for the post_word at end of on-chip SRAM */
133#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
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134#endif
135
56523f12 136/*
a1aa0bb5 137 * BOOTP options
56523f12 138 */
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139#define CONFIG_BOOTP_BOOTFILESIZE
140#define CONFIG_BOOTP_BOOTPATH
141#define CONFIG_BOOTP_GATEWAY
142#define CONFIG_BOOTP_HOSTNAME
143
56523f12 144/*
2694690e 145 * Command line configuration.
56523f12 146 */
2694690e 147#define CONFIG_CMD_DATE
2694690e 148#define CONFIG_CMD_EEPROM
2694690e 149#define CONFIG_CMD_JFFS2
2694690e 150#define CONFIG_CMD_REGINFO
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151#define CONFIG_CMD_BSP
152
153#ifdef CONFIG_VIDEO
154 #define CONFIG_CMD_BMP
155#endif
156
157#ifdef CONFIG_PCI
2b2a587d 158#define CONFIG_CMD_PCI
f33fca22 159#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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160#endif
161
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162#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
163 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
2694690e 164 #define CONFIG_CMD_IDE
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165#endif
166
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167#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
168 defined(CONFIG_STK52XX)
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169 #define CONFIG_CFG_USB
170 #define CONFIG_CFG_FAT
171#endif
172
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173#ifdef CONFIG_POST
174 #define CONFIG_CMD_DIAG
175#endif
176
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177#define CONFIG_TIMESTAMP /* display image timestamps */
178
14d0a02a 179#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
6d0f6bcf 180# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
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181#endif
182
183/*
184 * Autobooting
185 */
56523f12 186
81050926 187#define CONFIG_PREBOOT "echo;" \
4c4aca81 188 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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189 "echo"
190
191#undef CONFIG_BOOTARGS
192
6d0f6bcf 193#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
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194# define ENV_UPDT \
195 "update=protect off FFF00000 +${filesize};" \
196 "erase FFF00000 +${filesize};" \
5078cce8 197 "cp.b 200000 FFF00000 ${filesize};" \
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198 "protect on FFF00000 +${filesize}\0"
199#else /* default lowboot configuration */
6d3bc9b8 200# define ENV_UPDT \
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201 "update=protect off FC000000 +${filesize};" \
202 "erase FC000000 +${filesize};" \
6d3bc9b8 203 "cp.b 200000 FC000000 ${filesize};" \
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204 "protect on FC000000 +${filesize}\0"
205#endif
5078cce8 206
e1f601b5 207#if defined(CONFIG_TQM5200)
6abaee42 208#define CUSTOM_ENV_SETTINGS \
e1f601b5 209 "hostname=tqm5200\0" \
6abaee42 210 "bootfile=/tftpboot/tqm5200/uImage\0" \
8f8416fa 211 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
6abaee42 212 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
e1f601b5 213#elif defined(CONFIG_CAM5200)
1636d1c8 214#define CUSTOM_ENV_SETTINGS \
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215 "bootfile=cam5200/uImage\0" \
216 "u-boot=cam5200/u-boot.bin\0" \
74de7aef 217 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
6abaee42
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218#endif
219
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220#if defined(CONFIG_TQM5200_B)
221#define ENV_FLASH_LAYOUT \
222 "fdt_addr=FC100000\0" \
223 "kernel_addr=FC140000\0" \
224 "ramdisk_addr=FC600000\0"
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225#elif defined(CONFIG_CHARON)
226#define ENV_FLASH_LAYOUT \
227 "fdt_addr=FDFC0000\0" \
228 "kernel_addr=FC0A0000\0" \
229 "ramdisk_addr=FC200000\0"
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230#else /* !CONFIG_TQM5200_B */
231#define ENV_FLASH_LAYOUT \
232 "fdt_addr=FC0A0000\0" \
233 "kernel_addr=FC0C0000\0" \
234 "ramdisk_addr=FC300000\0"
235#endif
236
81050926 237#define CONFIG_EXTRA_ENV_SETTINGS \
56523f12 238 "netdev=eth0\0" \
e1f601b5 239 "console=ttyPSC0\0" \
a5cc5555 240 ENV_FLASH_LAYOUT \
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241 "kernel_addr_r=400000\0" \
242 "fdt_addr_r=600000\0" \
89c02e2c 243 "rootpath=/opt/eldk/ppc_6xx\0" \
56523f12 244 "ramargs=setenv bootargs root=/dev/ram rw\0" \
56523f12 245 "nfsargs=setenv bootargs root=/dev/nfs rw " \
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246 "nfsroot=${serverip}:${rootpath}\0" \
247 "addip=setenv bootargs ${bootargs} " \
248 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
249 ":${hostname}:${netdev}:off panic=1\0" \
5078cce8 250 "addcons=setenv bootargs ${bootargs} " \
8f8416fa 251 "console=${console},${baudrate}\0" \
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252 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
253 "flash_self_old=sete console ttyS0; " \
254 "run ramargs addip addcons addmtd; " \
fe126d8b 255 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
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256 "flash_self=run ramargs addip addcons;" \
257 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
258 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
fe126d8b 259 "bootm ${kernel_addr}\0" \
e1f601b5 260 "flash_nfs=run nfsargs addip addcons;" \
8f8416fa 261 "bootm ${kernel_addr} - ${fdt_addr}\0" \
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262 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
263 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
264 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
265 "tftp ${fdt_addr_r} ${fdt_file}; " \
98e69567 266 "run nfsargs addip addcons addmtd; " \
e1f601b5 267 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
6abaee42 268 CUSTOM_ENV_SETTINGS \
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269 "load=tftp 200000 ${u-boot}\0" \
270 ENV_UPDT \
7e6bf358 271 ""
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272
273#define CONFIG_BOOTCOMMAND "run net_nfs"
274
275/*
276 * IPB Bus clocking configuration.
277 */
6d0f6bcf 278#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
56523f12 279
6d0f6bcf 280#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
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281/*
282 * PCI Bus clocking configuration
283 *
284 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
6d0f6bcf 285 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
c99512d6 286 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
56523f12 287 */
6d0f6bcf 288#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
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289#endif
290
291/*
292 * I2C configuration
293 */
294#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
8f0b7cbe 295#ifdef CONFIG_TQM5200_REV100
6d0f6bcf 296#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
56523f12 297#else
6d0f6bcf 298#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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299#endif
300
301/*
302 * I2C clock frequency
303 *
304 * Please notice, that the resulting clock frequency could differ from the
305 * configured value. This is because the I2C clock is derived from system
a187559e 306 * clock over a frequency divider with only a few divider values. U-Boot
6d0f6bcf 307 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
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308 * approximation allways lies below the configured value, never above.
309 */
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310#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
311#define CONFIG_SYS_I2C_SLAVE 0x7F
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312
313/*
314 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
315 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
316 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
317 * same configuration could be used.
318 */
6d0f6bcf
JCPV
319#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
320#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
321#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
322#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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323
324/*
325 * HW-Monitor configuration on Mini-FAP
326 */
327#if defined (CONFIG_MINIFAP)
6d0f6bcf 328#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
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329#endif
330
331/* List of I2C addresses to be verified by POST */
56523f12 332#if defined (CONFIG_MINIFAP)
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333#undef CONFIG_SYS_POST_I2C_ADDRS
334#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
335 CONFIG_SYS_I2C_HWMON_ADDR, \
336 CONFIG_SYS_I2C_SLAVE}
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337#endif
338
339/*
340 * Flash configuration
341 */
6d0f6bcf 342#define CONFIG_SYS_FLASH_BASE 0xFC000000
56523f12 343
d9384de2 344#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
6d0f6bcf 345#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
7299712c 346 (= chip selects) */
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347#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
348#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
349#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
350
351#define CONFIG_SYS_FLASH_ADDR0 0x555
352#define CONFIG_SYS_FLASH_ADDR1 0x2AA
353#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
354#define CONFIG_SYS_MAX_FLASH_SECT 128
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355#else
356/* use CFI flash driver */
6d0f6bcf 357#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a 358#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
085ecde1 359#define CONFIG_FLASH_CFI_MTD /* with MTD support */
6d0f6bcf
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360#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
361#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
d9384de2 362 (= chip selects) */
6d0f6bcf 363#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
d9384de2 364#endif
7299712c 365
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366#define CONFIG_SYS_FLASH_EMPTY_INFO
367#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
368#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
56523f12 369
135ae006 370#if defined (CONFIG_CAM5200)
6d0f6bcf 371# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
5078cce8 372#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 373# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
45a212c4 374#else
6d0f6bcf 375# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
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376#endif
377
d534f5cc 378/* Dynamic MTD partition support */
68d7d651 379#define CONFIG_CMD_MTDPARTS
942556a9 380#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
259bff7c 381#define MTDIDS_DEFAULT "nor0=fc000000.flash"
5078cce8 382
5624d66a 383#if defined(CONFIG_STK52XX)
5078cce8 384# if defined(CONFIG_TQM5200_B)
6d0f6bcf 385# if defined(CONFIG_SYS_LOWBOOT)
259bff7c 386# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
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387 "256k(dtb)," \
388 "2304k(kernel)," \
389 "2560k(small-fs)," \
45a212c4 390 "2m(initrd)," \
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391 "8m(misc)," \
392 "16m(big-fs)"
393# else /* highboot */
259bff7c 394# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
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395 "3584k(small-fs)," \
396 "2m(initrd)," \
397 "8m(misc)," \
398 "15m(big-fs)," \
399 "1m(firmware)"
6d0f6bcf 400# endif /* CONFIG_SYS_LOWBOOT */
5078cce8 401# else /* !CONFIG_TQM5200_B */
259bff7c 402# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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403 "128k(dtb)," \
404 "2304k(kernel)," \
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405 "2m(initrd)," \
406 "4m(small-fs)," \
5078cce8 407 "8m(misc)," \
e1f601b5 408 "15m(big-fs)"
5078cce8 409# endif /* CONFIG_TQM5200_B */
135ae006 410#elif defined (CONFIG_CAM5200)
259bff7c 411# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
5078cce8 412 "1792k(kernel)," \
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413 "5632k(rootfs)," \
414 "24m(home)"
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415#elif defined (CONFIG_CHARON)
416# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
417 "1408k(kernel)," \
418 "2m(initrd)," \
419 "4m(small-fs)," \
420 "24320k(big-fs)," \
421 "256k(dts)"
6d3bc9b8 422#elif defined (CONFIG_FO300)
259bff7c 423# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
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424 "1408k(kernel)," \
425 "2m(initrd)," \
426 "4m(small-fs)," \
427 "8m(misc)," \
428 "16m(big-fs)"
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429#else
430# error "Unknown Carrier Board"
431#endif /* CONFIG_STK52XX */
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432
433/*
434 * Environment settings
435 */
5a1aceb0 436#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 437#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
78d620eb 438#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
0e8d1586 439#define CONFIG_ENV_SECT_SIZE 0x40000
45a212c4 440#else
0e8d1586 441#define CONFIG_ENV_SECT_SIZE 0x20000
5078cce8 442#endif /* CONFIG_TQM5200_B */
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443#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
444#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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445
446/*
447 * Memory map
448 */
6d0f6bcf
JCPV
449#define CONFIG_SYS_MBAR 0xF0000000
450#define CONFIG_SYS_SDRAM_BASE 0x00000000
451#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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452
453/* Use ON-Chip SRAM until RAM will be available */
6d0f6bcf 454#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
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455#ifdef CONFIG_POST
456/* preserve space for the post_word at end of on-chip SRAM */
553f0982 457#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
56523f12 458#else
553f0982 459#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
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460#endif
461
25ddd1fb 462#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 463#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
56523f12 464
14d0a02a 465#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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466#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
467# define CONFIG_SYS_RAMBOOT 1
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468#endif
469
135ae006 470#if defined (CONFIG_CAM5200)
6d0f6bcf 471# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
5078cce8 472#elif defined(CONFIG_TQM5200_B)
6d0f6bcf 473# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
45a212c4 474#else
6d0f6bcf 475# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
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476#endif
477
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478#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
479#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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480
481/*
482 * Ethernet configuration
483 */
484#define CONFIG_MPC5xxx_FEC 1
86321fc1 485#define CONFIG_MPC5xxx_FEC_MII100
56523f12 486/*
86321fc1 487 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
56523f12 488 */
86321fc1 489/* #define CONFIG_MPC5xxx_FEC_MII10 */
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490#define CONFIG_PHY_ADDR 0x00
491
492/*
493 * GPIO configuration
494 *
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495 * use CS1: Bit 0 (mask: 0x80000000):
496 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
56523f12 497 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
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498 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
499 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
500 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
501 * Use for REV200 STK52XX boards and FO300 boards. Do not use
502 * with REV100 modules (because, there I2C1 is used as I2C bus).
503 * use ATA: Bits 6-7 (mask 0x03000000):
504 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
505 * Use for CAM5200 board.
506 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
507 * use PSC6: Bits 9-11 (mask 0x00700000):
508 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
509 * UART, CODEC or IrDA.
510 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
511 * enable extended POST tests.
512 * Use for MINI-FAP and TQM5200_IB boards.
513 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
514 * Extended POST test is not available.
515 * Use for STK52xx, FO300 and CAM5200 boards.
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516 * WARNING: When the extended POST is enabled, these bits will
517 * be overridden by this code as GPIOs!
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518 * use PCI_DIS: Bit 16 (mask 0x00008000):
519 * 1 -> disable PCI controller (on CAM5200 board).
520 * use USB: Bits 18-19 (mask 0x00003000):
521 * 10 -> two UARTs (on FO300 and CAM5200).
522 * use PSC3: Bits 20-23 (mask: 0x00000f00):
523 * 0000 -> All PSC3 pins are GPIOs.
524 * 1100 -> UART/SPI (on FO300 board).
525 * 0100 -> UART (on CAM5200 board).
526 * use PSC2: Bits 25:27 (mask: 0x00000030):
527 * 000 -> All PSC2 pins are GPIOs.
528 * 100 -> UART (on CAM5200 board).
529 * 001 -> CAN1/2 on PSC2 pins.
95c44ec4 530 * Use for REV100 STK52xx boards
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531 * 01x -> Use AC97 (on FO300 board).
532 * use PSC1: Bits 29-31 (mask: 0x00000007):
533 * 100 -> UART (on all boards).
56523f12 534 */
98e69567 535#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
56523f12 536#if defined (CONFIG_MINIFAP)
6d0f6bcf 537# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
7e6bf358 538#elif defined (CONFIG_STK52XX)
83e40ba7 539# if defined (CONFIG_STK52XX_REV100)
6d0f6bcf 540# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
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541# else /* STK52xx REV200 and above */
542# if defined (CONFIG_TQM5200_REV100)
543# error TQM5200 REV100 not supported on STK52XX REV200 or above
544# else/* TQM5200 REV200 and above */
6d0f6bcf 545# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
83e40ba7 546# endif
8f0b7cbe 547# endif
6d3bc9b8 548#elif defined (CONFIG_FO300)
6d0f6bcf 549# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
7299712c 550#elif defined (CONFIG_CAM5200)
6d0f6bcf 551# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
83e40ba7 552#else /* TMQ5200 Inbetriebnahme-Board */
6d0f6bcf 553# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
56523f12 554#endif
98e69567 555#endif
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556
557/*
558 * RTC configuration
559 */
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560#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
561# define CONFIG_RTC_M41T11 1
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562# define CONFIG_SYS_I2C_RTC_ADDR 0x68
563# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
edd0b509 564 year */
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565#else
566# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
567#endif
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568
569/*
570 * Miscellaneous configurable options
571 */
6d0f6bcf 572#define CONFIG_SYS_LONGHELP /* undef to save memory */
5078cce8 573
2751a95a 574#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
5078cce8 575
6d0f6bcf 576#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
2694690e 577#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 578#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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579#endif
580
581#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 582#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
56523f12 583#else
6d0f6bcf 584#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
56523f12 585#endif
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586#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
587#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
588#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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589
590/* Enable an alternate, more extensive memory test */
6d0f6bcf 591#define CONFIG_SYS_ALT_MEMTEST
56523f12 592
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593#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
594#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
56523f12 595
6d0f6bcf 596#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
56523f12 597
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598/*
599 * Various low-level settings
600 */
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601#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
602#define CONFIG_SYS_HID0_FINAL HID0_ICE
56523f12 603
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604#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
605#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
606#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
607#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
56523f12 608#else
6d0f6bcf 609#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
56523f12 610#endif
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611#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
612#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
56523f12 613
7e6bf358 614#define CONFIG_LAST_STAGE_INIT
7e6bf358 615
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616/*
617 * SRAM - Do not map below 2 GB in address space, because this area is used
618 * for SDRAM autosizing.
619 */
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620#define CONFIG_SYS_CS2_START 0xE5000000
621#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
622#define CONFIG_SYS_CS2_CFG 0x0004D930
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623
624/*
625 * Grafic controller - Do not map below 2 GB in address space, because this
626 * area is used for SDRAM autosizing.
627 */
8f0b7cbe 628#define SM501_FB_BASE 0xE0000000
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629#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
630#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
631#define CONFIG_SYS_CS1_CFG 0x8F48FF70
632#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
56523f12 633
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634#define CONFIG_SYS_CS_BURST 0x00000000
635#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
56523f12 636
7299712c 637#if defined(CONFIG_CAM5200)
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638#define CONFIG_SYS_CS4_START 0xB0000000
639#define CONFIG_SYS_CS4_SIZE 0x00010000
640#define CONFIG_SYS_CS4_CFG 0x01019C10
7299712c 641
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642#define CONFIG_SYS_CS5_START 0xD0000000
643#define CONFIG_SYS_CS5_SIZE 0x01208000
644#define CONFIG_SYS_CS5_CFG 0x1414BF10
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645#endif
646
6d0f6bcf 647#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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648
649/*-----------------------------------------------------------------------
650 * USB stuff
651 *-----------------------------------------------------------------------
652 */
653#define CONFIG_USB_CLOCK 0x0001BBBB
654#define CONFIG_USB_CONFIG 0x00001000
655
656/*-----------------------------------------------------------------------
657 * IDE/ATA stuff Supports IDE harddisk
658 *-----------------------------------------------------------------------
659 */
660
81050926 661#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
56523f12 662
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663#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
664#undef CONFIG_IDE_LED /* LED for ide not supported */
56523f12 665
81050926 666#define CONFIG_IDE_RESET /* reset for ide supported */
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667#define CONFIG_IDE_PREINIT
668
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669#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
670#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
56523f12 671
6d0f6bcf 672#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
56523f12 673
6d0f6bcf 674#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
56523f12 675
95c44ec4 676/* Offset for data I/O */
6d0f6bcf 677#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
56523f12 678
95c44ec4 679/* Offset for normal register accesses */
6d0f6bcf 680#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
56523f12 681
95c44ec4 682/* Offset for alternate registers */
6d0f6bcf 683#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
56523f12 684
95c44ec4 685/* Interval between registers */
6d0f6bcf 686#define CONFIG_SYS_ATA_STRIDE 4
56523f12 687
33af3e66 688/* Support ATAPI devices */
95c44ec4 689#define CONFIG_ATAPI 1
33af3e66 690
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691/*-----------------------------------------------------------------------
692 * Open firmware flat tree support
693 *-----------------------------------------------------------------------
694 */
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695#define OF_CPU "PowerPC,5200@0"
696#define OF_SOC "soc5200@f0000000"
697#define OF_TBCLK (bd->bi_busfreq / 4)
698#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
699
56523f12 700#endif /* __CONFIG_H */