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1cb8e980 1/*
531716e1 2 * (C) Copyright 2002, 2003
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3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
792a09eb 5 * Gary Jennejohn <garyj@denx.de>
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6 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the MPL VCMA9 board.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H
30#define __CONFIG_H
31
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32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
ac67804f 36#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
37#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
38#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
39#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
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40
41/* input clock of PLL */
42#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
43
44#define USE_920T_MMU 1
45#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46
53677ef1 47#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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48#define CONFIG_SETUP_MEMORY_TAGS 1
49#define CONFIG_INITRD_TAG 1
50
a5562901 51
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52/*
53 * BOOTP options
54 */
55#define CONFIG_BOOTP_BOOTFILESIZE
56#define CONFIG_BOOTP_BOOTPATH
57#define CONFIG_BOOTP_GATEWAY
58#define CONFIG_BOOTP_HOSTNAME
59
60
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61/*
62 * Command line configuration.
63 */
64#include <config_cmd_default.h>
65
66#define CONFIG_CMD_CACHE
67#define CONFIG_CMD_EEPROM
68#define CONFIG_CMD_I2C
69#define CONFIG_CMD_USB
70#define CONFIG_CMD_REGINFO
71#define CONFIG_CMD_FAT
72#define CONFIG_CMD_DATE
73#define CONFIG_CMD_ELF
74#define CONFIG_CMD_DHCP
75#define CONFIG_CMD_PING
76#define CONFIG_CMD_BSP
77
1cb8e980 78
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79#define CONFIG_SYS_HUSH_PARSER
80#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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81/***********************************************************
82 * I2C stuff:
83 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
84 * address 0x50 with 16bit addressing
85 ***********************************************************/
86#define CONFIG_HARD_I2C /* I2C with hardware support */
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87#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
88#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */
1cb8e980 89
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90#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
91#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
bb1f8b4f 92#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
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93#define CONFIG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
94#define CONFIG_ENV_SIZE 0x800 /* 2KB should be more than enough */
1cb8e980 95
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96#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
97#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
98#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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99
100/*
101 * Size of malloc() pool
102 */
0e8d1586 103/*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/
1cb8e980 104
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105#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
106#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
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107
108/*
109 * Hardware drivers
110 */
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111#define CONFIG_NET_MULTI
112#define CONFIG_CS8900 /* we have a CS8900 on-board */
113#define CONFIG_CS8900_BASE 0x20000300
114#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
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115
116#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
117
118/*
119 * select serial console configuration
120 */
300f99f4 121#define CONFIG_S3C24X0_SERIAL
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122#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
123
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124/************************************************************
125 * USB support
126 ************************************************************/
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127#define CONFIG_USB_OHCI 1
128#define CONFIG_USB_KEYBOARD 1
129#define CONFIG_USB_STORAGE 1
130#define CONFIG_DOS_PARTITION 1
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131
132/* Enable needed helper functions */
52cb4d4f 133#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
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134
135/************************************************************
136 * RTC
137 ************************************************************/
138#define CONFIG_RTC_S3C24X0 1
139
140
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141/* allow to overwrite serial and ethaddr */
142#define CONFIG_ENV_OVERWRITE
143
144#define CONFIG_BAUDRATE 9600
145
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146#define CONFIG_BOOTDELAY 5
147/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
2893ecbf 148/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
53677ef1 149#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
a2663ea4 150
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151#define CONFIG_NETMASK 255.255.255.0
152#define CONFIG_IPADDR 10.0.0.110
153#define CONFIG_SERVERIP 10.0.0.1
154
a5562901 155#if defined(CONFIG_CMD_KGDB)
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156#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
157/* what's this ? it's not used anywhere */
158#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
159#endif
160
161/*
162 * Miscellaneous configurable options
163 */
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164#define CONFIG_SYS_LONGHELP /* undef to save memory */
165#define CONFIG_SYS_PROMPT "VCMA9 # " /* Monitor Command Prompt */
166#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
167#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
168#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
169#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
1cb8e980 170
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171#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
172#define CONFIG_SYS_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */
531716e1 173
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174#define CONFIG_SYS_ALT_MEMTEST
175#define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */
1cb8e980 176
1cb8e980 177/* we configure PWM Timer 4 to 1us ~ 1MHz */
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178/*#define CONFIG_SYS_HZ 1000000 */
179#define CONFIG_SYS_HZ 1562500
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180
181/* valid baudrates */
6d0f6bcf 182#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
1cb8e980 183
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184/* support BZIP2 compression */
185#define CONFIG_BZIP2 1
186
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187/************************************************************
188 * Ident
189 ************************************************************/
190/*#define VERSION_TAG "released"*/
191#define VERSION_TAG "unstable"
192#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG
193
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194/*-----------------------------------------------------------------------
195 * Stack sizes
196 *
197 * The stack sizes are set up in start.S using the settings below
198 */
199#define CONFIG_STACKSIZE (128*1024) /* regular stack */
200#ifdef CONFIG_USE_IRQ
201#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
202#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
203#endif
204
205/*-----------------------------------------------------------------------
206 * Physical Memory Map
207 */
208#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
209#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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210#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
211
6d0f6bcf 212#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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213
214/*-----------------------------------------------------------------------
215 * FLASH and environment organization
216 */
217
218#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
219#if 0
220#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
221#endif
222
6d0f6bcf 223#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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224#ifdef CONFIG_AMD_LV800
225#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
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226#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
227#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
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228#endif
229#ifdef CONFIG_AMD_LV400
230#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
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231#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
232#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
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233#endif
234
235/* timeout values are in ticks */
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236#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
237#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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238
239#if 0
5a1aceb0 240#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 241#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
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242#endif
243
48b42616 244
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245#define CONFIG_SYS_JFFS2_FIRST_BANK 0
246#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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247
248#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
249
1cb8e980 250#endif /* __CONFIG_H */