[people/ms/u-boot.git] / include / configs / km / km_arm.h

/*
 * (C) Copyright 2009
 * Marvell Semiconductor <www.marvell.com>
 * Prafulla Wadaskar <prafulla@marvell.com>
 *
 * (C) Copyright 2009
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 *
 * (C) Copyright 2010-2011
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301 USA
 */

/*
 * for linking errors see
 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
 */

#ifndef _CONFIG_KM_ARM_H
#define _CONFIG_KM_ARM_H

/* We got removed from Linux mach-types.h */
#define MACH_TYPE_KM_KIRKWOOD          2255

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_MARVELL
#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
#define CONFIG_KIRKWOOD			/* SOC Family Name */
#define CONFIG_KW88F6281		/* SOC Name */
#define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */

#define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD

/* include common defines/options for all Keymile boards */
#include "keymile-common.h"

#define CONFIG_CMD_NAND
#define CONFIG_CMD_SF
#define CONFIG_SOFT_I2C		/* I2C bit-banged	*/

/* SPI NOR Flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED		8100000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3

#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_SPI_BUS		0
#define CONFIG_ENV_SPI_CS		0
#define CONFIG_ENV_SPI_MAX_HZ		8100000
#define CONFIG_ENV_SPI_MODE		SPI_MODE_3
#endif

#include "asm/arch/config.h"

#define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */

/* pseudo-non volatile RAM [hex] */
#define CONFIG_KM_PNVRAM	0x80000
/* physical RAM MTD size [hex] */
#define CONFIG_KM_PHRAM		0x17F000

#define CONFIG_KM_CRAMFS_ADDR	0x2400000
#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */

/* architecture specific default bootargs */
#define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"

#define CONFIG_KM_DEF_ENV_CPU						\
	"boot=bootm ${load_addr_r} - -\0"				\
	"cramfsloadfdt=true\0"						\
	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
	CONFIG_KM_UPDATE_UBOOT						\
	""

#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
#define CONFIG_MISC_INIT_R

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

#define CONFIG_CONS_INDEX	1	/* Console on UART0 */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG		/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */

/*
 * Commands configuration
 */
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NFS

/*
 * Without NOR FLASH we need this
 */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS

/*
 * NAND Flash configuration
 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1

#define BOOTFLASH_START		0x0

/* Kirkwood has two serial IF */
#if (CONFIG_CONS_INDEX == 2)
#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
#else
#define CONFIG_KM_CONSOLE_TTY	"ttyS0"
#endif

/*
 * Other required minimal configurations
 */
#define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
#define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
#define CONFIG_NR_DRAM_BANKS	4
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */

/*
 * Ethernet Driver configuration
 */
#define CONFIG_NETCONSOLE	/* include NetConsole support   */
#define CONFIG_MII		/* expose smi ove miiphy interface */
#define CONFIG_CMD_MII		/* to debug mdio phy config */
#define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
#define CONFIG_PHY_BASE_ADR	0
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */

/*
 * UBI related stuff
 */
#define CONFIG_SYS_USE_UBI

/*
 * I2C related stuff
 */
#define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
#if defined(CONFIG_SOFT_I2C)
#ifndef __ASSEMBLY__
#include <asm/arch-kirkwood/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
int get_sda(void);
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN	8
#define KM_KIRKWOOD_SCL_PIN	9
#define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
#define KM_KIRKWOOD_ENV_WP	38

#define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
#define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
#define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
#define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
#define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
#endif

#define I2C_DELAY	udelay(1)
#define I2C_SOFT_DECLARATIONS

#endif

/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/*
 *  Environment variables configurations
 */
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
#define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
#define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
#define CONFIG_ENV_SECT_SIZE		0x10000
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
					CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
#else
#define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
#define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
#define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
#define CONFIG_I2C_ENV_EEPROM_BUS	KM_ENV_BUS "\0"
#define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
#endif

#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO

/* SPI bus claim MPP configuration */
#define CONFIG_SYS_KW_SPI_MPP	0x0

#define FLASH_GPIO_PIN			0x00010000
#define KM_FLASH_GPIO_PIN	16

#ifndef MTDIDS_DEFAULT
# define MTDIDS_DEFAULT		"nand0=orion_nand"
#endif /* MTDIDS_DEFAULT */

#ifndef MTDPARTS_DEFAULT
# define MTDPARTS_DEFAULT	"mtdparts="			\
	"orion_nand:"						\
		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
#endif /* MTDPARTS_DEFAULT */

#define	CONFIG_KM_UPDATE_UBOOT						\
	"update="							\
		"sf probe 0;sf erase 0 +${filesize};"			\
		"sf write ${load_addr_r} 0 ${filesize};\0"

#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_KM_NEW_ENV						\
	"newenv=sf probe 0;"						\
		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
#else
#define CONFIG_KM_NEW_ENV						\
	"newenv=setenv addr 0x100000 && "				\
		"i2c dev 1; mw.b ${addr} 0 4 && "			\
		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
#endif

/*
 * Default environment variables
 */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	CONFIG_KM_DEF_ENV						\
	CONFIG_KM_NEW_ENV						\
	"arch=arm\0"							\
	"EEprom_ivm=" KM_IVM_BUS "\0"					\
	""

#if defined(CONFIG_SYS_NO_FLASH)
#undef	CONFIG_FLASH_CFI_MTD
#undef	CONFIG_JFFS2_CMDLINE
#endif

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
/* Do early setups now in board_init_f() */
#define CONFIG_BOARD_EARLY_INIT_F

/*
 * resereved pram area at the end of memroy [hex]
 * 8Mbytes for switch + 4Kbytes for bootcount
 */
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
/* Use generic bootcount RAM driver */
#define CONFIG_BOOTCOUNT_RAM

/* enable POST tests */
#define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_SKIP_ENV_FLAGS
#define CONFIG_POST_EXTERNAL_WORD_FUNCS
#define CONFIG_CMD_DIAG

/* we do the whole PCIe FPGA config stuff here */
#define	CONFIG_BOARD_LATE_INIT

#endif /* _CONFIG_KM_ARM_H */
Commit	Line	Data
67fa8c25 HS	1	/*
	2	* (C) Copyright 2009
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Prafulla Wadaskar <prafulla@marvell.com>
	5	*
	6	* (C) Copyright 2009
	7	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	8	*
b11f53f3 HS	9	* (C) Copyright 2010-2011
	10	* Heiko Schocher, DENX Software Engineering, hs@denx.de.
	11	*
67fa8c25 HS	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	28	* MA 02110-1301 USA
	29	*/
	30
b11f53f3 HS	31	/*
	32	* for linking errors see
	33	* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
	34	*/
67fa8c25 HS	35
	36	#ifndef _CONFIG_KM_ARM_H
	37	#define _CONFIG_KM_ARM_H
	38
8620ca2a VL	39	/* We got removed from Linux mach-types.h */
	40	#define MACH_TYPE_KM_KIRKWOOD 2255
	41
67fa8c25 HS	42	/*
	43	* High Level Configuration Options (easy to change)
	44	*/
	45	#define CONFIG_MARVELL
67fa8c25 HS	46	#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
	47	#define CONFIG_KIRKWOOD /* SOC Family Name */
	48	#define CONFIG_KW88F6281 /* SOC Name */
802d9963	49	#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
67fa8c25	50
8620ca2a VL	51	#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD
8620ca2a VL	52
67fa8c25 HS	53	/* include common defines/options for all Keymile boards */
67fa8c25 HS	54	#include "keymile-common.h"
de3ad13d	55
b5befd82 HB	56	#define CONFIG_CMD_NAND
	57	#define CONFIG_CMD_SF
	58	#define CONFIG_SOFT_I2C /* I2C bit-banged */
	59
f46b4a1a VL	60	/* SPI NOR Flash default params, used by sf commands */
	61	#define CONFIG_SF_DEFAULT_SPEED 8100000
	62	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
	63
8170aefc HB	64	#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
	65	#define CONFIG_ENV_SPI_BUS 0
	66	#define CONFIG_ENV_SPI_CS 0
05c8e81f	67	#define CONFIG_ENV_SPI_MAX_HZ 8100000
8170aefc HB	68	#define CONFIG_ENV_SPI_MODE SPI_MODE_3
	69	#endif
	70
b5befd82 HB	71	#include "asm/arch/config.h"
b5befd82 HB	72
e5847b77	73	#define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */
de3ad13d HB	74	#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
	75	#define CONFIG_SYS_MEMTEST_END 0x007fffff /(_8M -1) /
	76	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	77
	78	/* pseudo-non volatile RAM [hex] */
	79	#define CONFIG_KM_PNVRAM 0x80000
	80	/* physical RAM MTD size [hex] */
	81	#define CONFIG_KM_PHRAM 0x17F000
	82
	83	#define CONFIG_KM_CRAMFS_ADDR 0x2400000
	84	#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
	85
db0bb572 HB	86	/* architecture specific default bootargs */
db0bb572 HB	87	#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
66072a8c HB	88	"bootcountaddr=${bootcountaddr} ${mtdparts}" \
66072a8c HB	89	" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
db0bb572	90
de3ad13d	91	#define CONFIG_KM_DEF_ENV_CPU \
db0bb572	92	"boot=bootm ${load_addr_r} - -\0" \
2d9528e3	93	"cramfsloadfdt=true\0" \
93ea89f0	94	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
af85f085	95	CONFIG_KM_UPDATE_UBOOT \
de3ad13d HB	96	""
de3ad13d HB	97
67fa8c25	98	#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
67fa8c25 HS	99	#define CONFIG_MISC_INIT_R
	100
	101	/*
	102	* NS16550 Configuration
	103	*/
	104	#define CONFIG_SYS_NS16550
	105	#define CONFIG_SYS_NS16550_SERIAL
	106	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	107	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
	108	#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
3d3c7096	109	#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
67fa8c25 HS	110
	111	/*
	112	* Serial Port configuration
	113	* The following definitions let you select what serial you want to use
	114	* for your console driver.
	115	*/
	116
	117	#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
	118
	119	/*
	120	* For booting Linux, the board info and command line data
	121	* have to be in the first 8 MB of memory, since this is
	122	* the maximum mapped by the Linux kernel during initialization.
	123	*/
	124	#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
	125	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	126	#define CONFIG_INITRD_TAG /* enable INITRD tag */
499b1a4d	127	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
67fa8c25 HS	128
	129	/*
	130	* Commands configuration
	131	*/
	132	#define CONFIG_CMD_ELF
	133	#define CONFIG_CMD_MTDPARTS
67fa8c25 HS	134	#define CONFIG_CMD_NFS
	135
	136	/*
	137	* Without NOR FLASH we need this
	138	*/
	139	#define CONFIG_SYS_NO_FLASH
	140	#undef CONFIG_CMD_FLASH
	141	#undef CONFIG_CMD_IMLS
	142
	143	/*
	144	* NAND Flash configuration
	145	*/
	146	#define CONFIG_SYS_MAX_NAND_DEVICE 1
67fa8c25 HS	147
	148	#define BOOTFLASH_START 0x0
	149
3d3c7096 HB	150	/* Kirkwood has two serial IF */
	151	#if (CONFIG_CONS_INDEX == 2)
	152	#define CONFIG_KM_CONSOLE_TTY "ttyS1"
	153	#else
67fa8c25	154	#define CONFIG_KM_CONSOLE_TTY "ttyS0"
3d3c7096	155	#endif
67fa8c25	156
67fa8c25 HS	157	/*
	158	* Other required minimal configurations
	159	*/
	160	#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
	161	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
	162	#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
	163	#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
	164	#define CONFIG_NR_DRAM_BANKS 4
67fa8c25 HS	165	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	166
	167	/*
	168	* Ethernet Driver configuration
	169	*/
	170	#define CONFIG_NETCONSOLE /* include NetConsole support */
67fa8c25	171	#define CONFIG_MII /* expose smi ove miiphy interface */
002ec08d	172	#define CONFIG_CMD_MII /* to debug mdio phy config */
d44265ad	173	#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
67fa8c25	174	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
d44265ad	175	#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
67fa8c25 HS	176	#define CONFIG_PHY_BASE_ADR 0
67fa8c25 HS	177	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
67fa8c25 HS	178
	179	/*
	180	* UBI related stuff
	181	*/
	182	#define CONFIG_SYS_USE_UBI
	183
	184	/*
	185	* I2C related stuff
	186	*/
67fa8c25 HS	187	#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
	188	#if defined(CONFIG_SOFT_I2C)
	189	#ifndef __ASSEMBLY__
	190	#include <asm/arch-kirkwood/gpio.h>
	191	extern void __set_direction(unsigned pin, int high);
499b1a4d HB	192	void set_sda(int state);
	193	void set_scl(int state);
	194	int get_sda(void);
	195	int get_scl(void);
44097e26 HS	196	#define KM_KIRKWOOD_SDA_PIN 8
44097e26 HS	197	#define KM_KIRKWOOD_SCL_PIN 9
c471d848	198	#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
44097e26 HS	199	#define KM_KIRKWOOD_ENV_WP 38
	200
	201	#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
	202	#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
	203	#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
	204	#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
	205	#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
67fa8c25 HS	206	#endif
67fa8c25 HS	207
9e9c6d7c	208	#define I2C_DELAY udelay(1)
67fa8c25 HS	209	#define I2C_SOFT_DECLARATIONS
67fa8c25 HS	210
67fa8c25 HS	211	#endif
67fa8c25 HS	212
4daea6ff SB	213	/* EEprom support 24C128, 24C256 valid for environment eeprom */
	214	#define CONFIG_SYS_I2C_MULTI_EEPROMS
	215	#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
	216	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
	217	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
	218
67fa8c25 HS	219	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	220	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	221
331a30dc HS	222	/*
	223	* Environment variables configurations
	224	*/
8170aefc HB	225	#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
	226	#define CONFIG_ENV_IS_IN_SPI_FLASH /* use SPI-Flash for environment vars */
	227	#define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */
	228	#define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */
	229	#define CONFIG_ENV_SECT_SIZE 0x10000
	230	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
	231	CONFIG_ENV_SECT_SIZE)
	232	#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
	233	#else
331a30dc HS	234	#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
	235	#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
	236	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	237	#define CONFIG_SYS_EEPROM_WREN
	238	#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
331a30dc	239	#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
680cfaf8	240	#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0"
331a30dc HS	241	#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
331a30dc HS	242	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8170aefc HB	243	#endif
	244
	245	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
331a30dc	246
331a30dc	247	#define CONFIG_SPI_FLASH
331a30dc	248	#define CONFIG_SPI_FLASH_STMICRO
331a30dc	249
0c25defc VL	250	/* SPI bus claim MPP configuration */
	251	#define CONFIG_SYS_KW_SPI_MPP 0x0
	252
331a30dc	253	#define FLASH_GPIO_PIN 0x00010000
0c25defc	254	#define KM_FLASH_GPIO_PIN 16
331a30dc	255
cf73639d AH	256	#ifndef MTDIDS_DEFAULT
	257	# define MTDIDS_DEFAULT "nand0=orion_nand"
	258	#endif /* MTDIDS_DEFAULT */
	259
	260	#ifndef MTDPARTS_DEFAULT
	261	# define MTDPARTS_DEFAULT "mtdparts=" \
	262	"orion_nand:" \
	263	"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
	264	#endif /* MTDPARTS_DEFAULT */
331a30dc	265
af85f085	266	#define CONFIG_KM_UPDATE_UBOOT \
331a30dc	267	"update=" \
0c25defc VL	268	"sf probe 0;sf erase 0 +${filesize};" \
0c25defc VL	269	"sf write ${load_addr_r} 0 ${filesize};\0"
331a30dc	270
8170aefc HB	271	#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
	272	#define CONFIG_KM_NEW_ENV \
	273	"newenv=sf probe 0;" \
93ea89f0 MV	274	"sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
93ea89f0 MV	275	__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
8170aefc HB	276	#else
8170aefc HB	277	#define CONFIG_KM_NEW_ENV \
ea616d4d VL	278	"newenv=setenv addr 0x100000 && " \
ea616d4d VL	279	"i2c dev 1; mw.b ${addr} 0 4 && " \
93ea89f0 MV	280	"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
	281	" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
	282	"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
	283	" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
8170aefc HB	284	#endif
	285
	286	/*
	287	* Default environment variables
	288	*/
	289	#define CONFIG_EXTRA_ENV_SETTINGS \
	290	CONFIG_KM_DEF_ENV \
	291	CONFIG_KM_NEW_ENV \
b648bfc2	292	"arch=arm\0" \
ea616d4d VL	293	"EEprom_ivm=" KM_IVM_BUS "\0" \
	294	""
	295
67fa8c25	296	#if defined(CONFIG_SYS_NO_FLASH)
67fa8c25 HS	297	#undef CONFIG_FLASH_CFI_MTD
	298	#undef CONFIG_JFFS2_CMDLINE
	299	#endif
	300
a784c01a	301	/* additions for new relocation code, must be added to all boards */
ab86f72c	302	#define CONFIG_SYS_SDRAM_BASE 0x00000000
6b0ccc3b HS	303	/* Do early setups now in board_init_f() */
6b0ccc3b HS	304	#define CONFIG_BOARD_EARLY_INIT_F
f1fef1d8 HS	305
	306	/*
	307	* resereved pram area at the end of memroy [hex]
	308	* 8Mbytes for switch + 4Kbytes for bootcount
	309	*/
	310	#define CONFIG_KM_RESERVED_PRAM 0x801000
a21b5d4b HB	311	/* address for the bootcount (taken from end of RAM) */
a21b5d4b HB	312	#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
0044c42e SR	313	/* Use generic bootcount RAM driver */
0044c42e SR	314	#define CONFIG_BOOTCOUNT_RAM
f1fef1d8	315
9400f8fa VL	316	/* enable POST tests */
	317	#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
	318	#define CONFIG_POST_SKIP_ENV_FLAGS
	319	#define CONFIG_POST_EXTERNAL_WORD_FUNCS
	320	#define CONFIG_CMD_DIAG
	321
b37f7724	322	/* we do the whole PCIe FPGA config stuff here */
45bd01ef	323	#define CONFIG_BOARD_LATE_INIT
b37f7724	324
67fa8c25	325	#endif /* _CONFIG_KM_ARM_H */