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8a3f6bb6 1/*
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2 * Common configuration settings for IGEP technology based boards
3 *
4 * (C) Copyright 2012
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5 * ISEE 2007 SL, <www.iseebcn.com>
6 *
3765b3e7 7 * SPDX-License-Identifier: GPL-2.0+
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8 */
9
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10#ifndef __IGEP00X0_H
11#define __IGEP00X0_H
12
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13#ifdef CONFIG_BOOT_NAND
14#define CONFIG_NAND
15#endif
8a3f6bb6 16
e37e954e 17#define CONFIG_NR_DRAM_BANKS 2
8a3f6bb6 18
e37e954e 19#include <configs/ti_omap3_common.h>
aa127df6 20#include <asm/mach-types.h>
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21
22/*
23 * Display CPU and Board information
24 */
25#define CONFIG_DISPLAY_CPUINFO 1
26#define CONFIG_DISPLAY_BOARDINFO 1
27
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28#define CONFIG_MISC_INIT_R
29
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30#define CONFIG_REVISION_TAG 1
31
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32/* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
33#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
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34#define CONFIG_STATUS_LED
35#define CONFIG_BOARD_SPECIFIC_LED
36#define CONFIG_GPIO_LED
37#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
38#define RED_LED_GPIO 27
50bb94c9 39#elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
f3b4bc45 40#define RED_LED_GPIO 16
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41#else
42#error "status LED not defined for this machine."
d9aacf41 43#endif
d636f2a7 44#define RED_LED_DEV 0
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45#define STATUS_LED_BIT RED_LED_GPIO
46#define STATUS_LED_STATE STATUS_LED_ON
47#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
48#define STATUS_LED_BOOT RED_LED_DEV
50bb94c9 49#endif
9d4f5421 50
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51/* GPIO banks */
52#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
53#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
54#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
55
8a3f6bb6 56/* USB */
d636f2a7 57#define CONFIG_USB_MUSB_UDC 1
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58#define CONFIG_USB_OMAP3 1
59#define CONFIG_TWL4030_USB 1
60
61/* USB device configuration */
62#define CONFIG_USB_DEVICE 1
63#define CONFIG_USB_TTY 1
64#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
65
66/* Change these to suit your needs */
67#define CONFIG_USBD_VENDORID 0x0451
68#define CONFIG_USBD_PRODUCTID 0x5678
69#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
70#define CONFIG_USBD_PRODUCT_NAME "IGEP"
71
ca511cfb 72#ifdef CONFIG_BOOT_ONENAND
8a3f6bb6 73#define CONFIG_CMD_ONENAND /* ONENAND support */
ca511cfb 74#endif
8a3f6bb6 75
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76#ifndef CONFIG_SPL_BUILD
77
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78/* Environment */
79#define ENV_DEVICE_SETTINGS \
80 "stdin=serial\0" \
81 "stdout=serial\0" \
82 "stderr=serial\0"
83
84#define MEM_LAYOUT_SETTINGS \
85 DEFAULT_LINUX_BOOT_ENV \
86 "scriptaddr=0x87E00000\0" \
87 "pxefile_addr_r=0x87F00000\0"
88
89#define BOOT_TARGET_DEVICES(func) \
90 func(MMC, mmc, 0)
91
92#include <config_distro_bootcmd.h>
93
8a3f6bb6 94#define CONFIG_EXTRA_ENV_SETTINGS \
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95 ENV_DEVICE_SETTINGS \
96 MEM_LAYOUT_SETTINGS \
97 BOOTENV
98
99#endif
8a3f6bb6 100
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101/*
102 * FLASH and environment organization
103 */
104
ca511cfb 105#ifdef CONFIG_BOOT_ONENAND
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106#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
107
108#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
109
110#define CONFIG_ENV_IS_IN_ONENAND 1
111#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
112#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
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113#endif
114
e37e954e 115#ifdef CONFIG_NAND
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116#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
117#define CONFIG_ENV_IS_IN_NAND 1
118#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
119#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
ca511cfb 120#endif
8a3f6bb6 121
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122/*
123 * SMSC911x Ethernet
124 */
125#if defined(CONFIG_CMD_NET)
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126#define CONFIG_SMC911X
127#define CONFIG_SMC911X_32_BIT
d636f2a7 128#define CONFIG_SMC911X_BASE 0x2C000000
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129#endif /* (CONFIG_CMD_NET) */
130
e37e954e 131/* OneNAND boot config */
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132#ifdef CONFIG_BOOT_ONENAND
133#define CONFIG_SPL_ONENAND_SUPPORT
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134#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
135#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
136#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
137#define CONFIG_SPL_ONENAND_LOAD_SIZE \
138 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
139
140#endif
141
d271a611 142/* NAND boot config */
e37e954e 143#ifdef CONFIG_NAND
55f1b39f 144#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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145#define CONFIG_SYS_NAND_5_ADDR_CYCLE
146#define CONFIG_SYS_NAND_PAGE_COUNT 64
147#define CONFIG_SYS_NAND_PAGE_SIZE 2048
148#define CONFIG_SYS_NAND_OOBSIZE 64
149#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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150#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
151#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
152 10, 11, 12, 13, 14, 15, 16, 17, \
153 18, 19, 20, 21, 22, 23, 24, 25, \
154 26, 27, 28, 29, 30, 31, 32, 33, \
155 34, 35, 36, 37, 38, 39, 40, 41, \
156 42, 43, 44, 45, 46, 47, 48, 49, \
157 50, 51, 52, 53, 54, 55, 56, 57, }
d271a611 158#define CONFIG_SYS_NAND_ECCSIZE 512
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159#define CONFIG_SYS_NAND_ECCBYTES 14
160#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
161#define CONFIG_NAND_OMAP_GPMC
162#define CONFIG_BCH
163
434f2cfc 164#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
165/* NAND: SPL falcon mode configs */
166#ifdef CONFIG_SPL_OS_BOOT
167#define CONFIG_CMD_SPL_NAND_OFS 0x240000
168#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
169#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
170#endif
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171#endif
172
dc7a9e64 173#endif /* __IGEP00X0_H */